[Intel-gfx] [PATCH i-g-t] gem_cs_prefetch: Remove gem_cs_prefetch from IGT

gem_cs_prefetch is replaced by igt_ggtt_scratch subtest in i915_gem_gtt kselftest --- tests/Makefile.sources | 1 - tests/gem_cs_prefetch.c | 149 --- tests/intel-ci/blacklist.txt | 1 - tests/meson.build| 1 - 4 files changed,

[Intel-gfx] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

Test have similar functionality that gem_cs_prefetch IGT test but gem_cs_prefetch is not up to date and there was an idea to move this test to kselftests so this is respond for this request. There is another patch on igt_dev which is removing gem_cs_prefetch test from IGT. ---

Re: [Intel-gfx] [igt-dev] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

Quoting Ewelina Musial (2018-04-11 09:27:12) > Test have similar functionality that gem_cs_prefetch IGT test > but gem_cs_prefetch is not up to date and there was an idea > to move this test to kselftests so this is respond for this > request. gem_cs_prefetch itself does one thing: verify that we

Re: [Intel-gfx] [PATCH] drm/i915/psr: enable psr1 on psr2 panels

+ puthik On Saturday 07 April 2018 12:36 AM, Vivi, Rodrigo wrote: On Fri, Apr 06, 2018 at 12:10:24PM -0700, Dhinakaran Pandiyan wrote: On Sat, 2018-04-07 at 00:12 +0530, vathsala nagaraju wrote: From: Vathsala Nagaraju Adds force_psr1 mod parameter to enable

Re: [Intel-gfx] [PATCH v2] drm/i915/execlists: Set queue priority from secondary port

Quoting Chris Wilson (2018-04-11 10:55:30) > We can refine our current execlists->queue_priority if we inspect > ELSP[1] rather than the head of the unsubmitted queue. Currently, we use > the unsubmitted queue and say that if a subsequent request is more > important than the current queue, we will

[Intel-gfx] [PATCH igt] igt/gem_exec_schedule: Exercise "deep" preemption

In investigating the issue with having to force preemption within the executing ELSP[], we want to trigger preemption between all elements of that array. To that end, we issue a series of requests with different priorities to fill the in-flight ELSP[] and then demand preemption into the middle of

Re: [Intel-gfx] [igt-dev] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

On Wed, Apr 11, 2018 at 11:43:34AM +0100, Chris Wilson wrote: > Quoting Ewelina Musial (2018-04-11 11:20:56) > > On Wed, Apr 11, 2018 at 09:48:21AM +0100, Chris Wilson wrote: > > > Quoting Ewelina Musial (2018-04-11 09:27:12) > > > > Test have similar functionality that gem_cs_prefetch IGT test >

Re: [Intel-gfx] [RFC v2] drm/i915: Engine discovery query

Quoting Tvrtko Ursulin (2018-04-11 12:10:05) > > On 11/04/2018 11:27, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-04-11 10:46:31) > >> +/** > >> + * struct drm_i915_engine_info > >> + * > >> + * Describes one engine known to the driver, whether or not is physical > >> engine > >> + *

[Intel-gfx] ✓ Fi.CI.BAT: success for selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

== Series Details == Series: selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest URL : https://patchwork.freedesktop.org/series/41529/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4042 -> Patchwork_8662 = == Summary - SUCCESS == No regressions found. External

Re: [Intel-gfx] [RFC v1] Data port coherency control for UMDs.

We don’t have any timeline for this at the moment. NEO driver is quite fresh in open source and adoption will be handled in near future. Can we move on with review process and handle adoption in separate thread? Thanks, Bartosz -Original Message- From: Joonas Lahtinen

[Intel-gfx] [PATCH v2] drm/i915/execlists: Set queue priority from secondary port

We can refine our current execlists->queue_priority if we inspect ELSP[1] rather than the head of the unsubmitted queue. Currently, we use the unsubmitted queue and say that if a subsequent request is more important than the current queue, we will rerun the submission tasklet to evaluate the need

Re: [Intel-gfx] [PATCH] drm/i915/bios: filter out invalid DDC pins from VBT child devices

On Wed, 11 Apr 2018, Jani Nikula wrote: > The VBT contains the DDC pin to use for specific ports. Alas, sometimes > the field appears to contain bogus data, and while we check for it later > on in intel_gmbus_get_adapter() we fail to check the returned NULL on > errors.

[Intel-gfx] ✗ Fi.CI.IGT: failure for selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

== Series Details == Series: selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest URL : https://patchwork.freedesktop.org/series/41529/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4042_full -> Patchwork_8662_full = == Summary - FAILURE == Serious unknown changes

Re: [Intel-gfx] [PATCH v3] drm/i915/execlists: Set queue priority from secondary port

Quoting Chris Wilson (2018-04-11 11:39:29) > We can refine our current execlists->queue_priority if we inspect > ELSP[1] rather than the head of the unsubmitted queue. Currently, we use > the unsubmitted queue and say that if a subsequent request is more > important than the current queue, we will

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Engine discovery query (rev2)

== Series Details == Series: drm/i915: Engine discovery query (rev2) URL : https://patchwork.freedesktop.org/series/39958/ State : warning == Summary == $ dim checkpatch origin/drm-tip 487fa7f5e720 drm/i915: Engine discovery query -:164: WARNING:TYPO_SPELLING: 'targetted' may be misspelled -

[Intel-gfx] [PATCH] drm/i915/bios: filter out invalid DDC pins from VBT child devices

The VBT contains the DDC pin to use for specific ports. Alas, sometimes the field appears to contain bogus data, and while we check for it later on in intel_gmbus_get_adapter() we fail to check the returned NULL on errors. Oops results. The simplest approach seems to be to catch and ignore the

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Send DPCD ON for MST before phy_up

Hi, [This is an automated email] This commit has been processed because it contains a "Fixes:" tag, fixing commit: . The bot has also determined it's probably a bug fixing patch. (score: 97.3902) The bot has tested the following trees: v4.16.1, v4.15.16, v4.14.33, v4.9.93, v4.4.127. v4.16.1:

Re: [Intel-gfx] [PATCH v2] drm/i915/dp: Send DPCD ON for MST before phy_up

Hi, [This is an automated email] This commit has been processed because it contains a "Fixes:" tag, fixing commit: . The bot has also determined it's probably a bug fixing patch. (score: 98.1292) The bot has tested the following trees: v4.16.1, v4.15.16, v4.14.33, v4.9.93, v4.4.127. v4.16.1:

Re: [Intel-gfx] [PATCH v4] drm/i915/dp: Send DPCD ON for MST before phy_up

Hi, [This is an automated email] This commit has been processed because it contains a "Fixes:" tag, fixing commit: ad260ab32a4d9 ("drm/i915/dp: Write to SET_POWER dpcd to enable MST hub."). The bot has also determined it's probably a bug fixing patch. (score: 95.4452) The bot has tested the

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RESEND,1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

== Series Details == Series: series starting with [RESEND,1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake URL : https://patchwork.freedesktop.org/series/41533/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4043 -> Patchwork_8664 = == Summary - SUCCESS == No

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Enable display workaround 827 for all planes.

Patch looks good to me. Reviewed-by: Vidya Srinivas > -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Maarten Lankhorst > Sent: Monday, April 9, 2018 6:17 PM > To: intel-gfx@lists.freedesktop.org > Subject:

Re: [Intel-gfx] [PATCH v1 6/6] drm/i915: Enable Display WA 0528

Op 11-04-18 om 11:09 schreef Vidya Srinivas: > Possible hang with NV12 plane surface formats. > WA: When the plane source pixel format is NV12, > the CHICKEN_PIPESL_* register bit 22 must be set to 1 > and the render decompression must not be enabled > on any of the planes in that pipe. The last

Re: [Intel-gfx] [PATCH 01/18] drm/i915/execlists: Set queue priority from secondary port

Quoting Tvrtko Ursulin (2018-04-11 11:23:01) > > On 10/04/2018 15:56, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-04-10 15:42:07) > >> > >> On 10/04/2018 15:24, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-04-10 15:05:33) > > On 09/04/2018 12:13, Chris Wilson wrote: >

[Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

From: Ian W MORRISON As the Geminilake firmware is now merged to linux-firmware.git use MODUE_FIRMWARE to load the firmware. This removes the error message in the dmesg log: i915 :00:02.0: Direct firmware load for i915/glk_dmc_ver1_04.bin failed with

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: filter out invalid DDC pins from VBT child devices

== Series Details == Series: drm/i915/bios: filter out invalid DDC pins from VBT child devices URL : https://patchwork.freedesktop.org/series/41531/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5b0b06659059 drm/i915/bios: filter out invalid DDC pins from VBT child devices

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bios: filter out invalid DDC pins from VBT child devices

== Series Details == Series: drm/i915/bios: filter out invalid DDC pins from VBT child devices URL : https://patchwork.freedesktop.org/series/41531/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4043 -> Patchwork_8663 = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH 01/18] drm/i915/execlists: Set queue priority from secondary port

Quoting Tvrtko Ursulin (2018-04-11 11:47:00) > > On 11/04/2018 11:36, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-04-11 11:23:01) > >> > >> On 10/04/2018 15:56, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-04-10 15:42:07) > > On 10/04/2018 15:24, Chris Wilson wrote: >

Re: [Intel-gfx] [RFC v2] drm/i915: Engine discovery query

Quoting Tvrtko Ursulin (2018-04-11 10:46:31) > +/** > + * struct drm_i915_engine_info > + * > + * Describes one engine known to the driver, whether or not is physical > engine > + * only, or it can also be targetted from userspace, and what are its > + * capabilities where applicable. > + */ >

Re: [Intel-gfx] [igt-dev] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

Quoting Ewelina Musial (2018-04-11 11:20:56) > On Wed, Apr 11, 2018 at 09:48:21AM +0100, Chris Wilson wrote: > > Quoting Ewelina Musial (2018-04-11 09:27:12) > > > Test have similar functionality that gem_cs_prefetch IGT test > > > but gem_cs_prefetch is not up to date and there was an idea > > >

Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

> > NAK on indiscriminate Cc: stable. There are zero guarantees that older > kernels will work with whatever firmware you throw at them. > I included 'Cc: stable' so the patch would get added to the v4.16 and v4.15 kernels which I have tested with the patch. I found that earlier kernels didn't

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

== Series Details == Series: selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest URL : https://patchwork.freedesktop.org/series/41529/ State : warning == Summary == $ dim checkpatch origin/drm-tip e5d6592bb290 selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest -:50:

Re: [Intel-gfx] [PATCH v1 6/6] drm/i915: Enable Display WA 0528

> -Original Message- > From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com] > Sent: Wednesday, April 11, 2018 3:09 PM > To: Srinivas, Vidya ; intel- > g...@lists.freedesktop.org > Cc: Kamath, Sunil ; Saarinen, Jani >

Re: [Intel-gfx] [PATCH 1/1] drm/i915: move audio component intialization before audio driver use it

On Wed, 11 Apr 2018, "Shi, Yang A" wrote: >>No, that's not true. Just as an example, dev_priv->cdclk.hw.cdclk >>hasn't been initialized. > i915_load_modeset_init->intel_power_domains_init_hw->bxt_display_core_init->bxt_init_cdclk > dev_priv->cdclk.hw.cdclk will be

Re: [Intel-gfx] [PATCH 01/18] drm/i915/execlists: Set queue priority from secondary port

On 11/04/2018 11:36, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-11 11:23:01) On 10/04/2018 15:56, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-10 15:42:07) On 10/04/2018 15:24, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-10 15:05:33) On 09/04/2018 12:13, Chris

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: Check hdcp key loadability

On Monday 09 April 2018 01:58 PM, Daniel Vetter wrote: On Fri, Apr 06, 2018 at 07:02:02PM +0300, Ville Syrjälä wrote: On Mon, Apr 02, 2018 at 02:35:42PM +0530, Ramalingam C wrote: On Thursday 29 March 2018 07:54 PM, Ville Syrjälä wrote: On Thu, Mar 29, 2018 at 07:39:07PM +0530, Ramalingam

Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

On Wed, 11 Apr 2018, ianwmorri...@gmail.com wrote: > From: Ian W MORRISON > > As the Geminilake firmware is now merged to linux-firmware.git > use MODUE_FIRMWARE to load the firmware. > > This removes the error message in the dmesg log: > > i915 :00:02.0: Direct

[Intel-gfx] [RFC v2] drm/i915: Engine discovery query

From: Tvrtko Ursulin Engine discovery query allows userspace to enumerate engines, probe their configuration features, all without needing to maintain the internal PCI ID based database. A new query for the generic i915 query ioctl is added named

Re: [Intel-gfx] [PATCH] drm/i915: Disable LVDS on Radiant P845

On Tue, 10 Apr 2018, Ondrej Zary wrote: > Hello, > any news about this patch? The bug is rotting here: > https://bugs.freedesktop.org/show_bug.cgi?id=105468 I'm afraid we've failed to make the connection between the bug and the patch until now. Sorry about that. BR,

Re: [Intel-gfx] [igt-dev] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

Quoting Ewelina Musial (2018-04-11 11:57:39) > On Wed, Apr 11, 2018 at 11:43:34AM +0100, Chris Wilson wrote: > > Quoting Ewelina Musial (2018-04-11 11:20:56) > > > On Wed, Apr 11, 2018 at 09:48:21AM +0100, Chris Wilson wrote: > > > > Quoting Ewelina Musial (2018-04-11 09:27:12) > > > > > Test have

Re: [Intel-gfx] [PATCH 01/18] drm/i915/execlists: Set queue priority from secondary port

On 10/04/2018 15:56, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-10 15:42:07) On 10/04/2018 15:24, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-10 15:05:33) On 09/04/2018 12:13, Chris Wilson wrote: We can refine our current execlists->queue_priority if we inspect ELSP[1]

Re: [Intel-gfx] [igt-dev] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest

On Wed, Apr 11, 2018 at 09:48:21AM +0100, Chris Wilson wrote: > Quoting Ewelina Musial (2018-04-11 09:27:12) > > Test have similar functionality that gem_cs_prefetch IGT test > > but gem_cs_prefetch is not up to date and there was an idea > > to move this test to kselftests so this is respond for

[Intel-gfx] [PATCH v3] drm/i915/execlists: Set queue priority from secondary port

We can refine our current execlists->queue_priority if we inspect ELSP[1] rather than the head of the unsubmitted queue. Currently, we use the unsubmitted queue and say that if a subsequent request is more important than the current queue, we will rerun the submission tasklet to evaluate the need

Re: [Intel-gfx] [RFC v2] drm/i915: Engine discovery query

On 11/04/2018 11:27, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-11 10:46:31) +/** + * struct drm_i915_engine_info + * + * Describes one engine known to the driver, whether or not is physical engine + * only, or it can also be targetted from userspace, and what are its + * capabilities

Re: [Intel-gfx] [PATCH v3] drm/i915/execlists: Set queue priority from secondary port

On 11/04/2018 12:34, Chris Wilson wrote: Quoting Chris Wilson (2018-04-11 11:39:29) We can refine our current execlists->queue_priority if we inspect ELSP[1] rather than the head of the unsubmitted queue. Currently, we use the unsubmitted queue and say that if a subsequent request is more

Re: [Intel-gfx] [PATCH] drm/i915/bios: filter out invalid DDC pins from VBT child devices

Quoting Jani Nikula (2018-04-11 10:01:46) > The VBT contains the DDC pin to use for specific ports. Alas, sometimes > the field appears to contain bogus data, and while we check for it later > on in intel_gmbus_get_adapter() we fail to check the returned NULL on > errors. Oops results. > > The

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Wait for idle between idle resets as well

== Series Details == Series: drm/i915/selftests: Wait for idle between idle resets as well URL : https://patchwork.freedesktop.org/series/41543/ State : warning == Summary == $ dim checkpatch origin/drm-tip b63ecede2893 drm/i915/selftests: Wait for idle between idle resets as well -:17:

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/bios: reduce the scope of some local variables in parse_ddi_port()

Quoting Jani Nikula (2018-04-11 14:15:19) > No functional changes. > > Cc: Chris Wilson > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_bios.c | 10 -- > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git

Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

On Wed, 11 Apr 2018, Ian W MORRISON wrote: > > >> >> NAK on indiscriminate Cc: stable. There are zero guarantees that older >> kernels will work with whatever firmware you throw at them. >> > > I included 'Cc: stable' so the patch would get added to the v4.16 and > v4.15

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [RESEND,1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

== Series Details == Series: series starting with [RESEND,1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake URL : https://patchwork.freedesktop.org/series/41533/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4043_full -> Patchwork_8664_full = == Summary - WARNING ==

Re: [Intel-gfx] [PATCH] drm/i915/bios: filter out invalid DDC pins from VBT child devices

On Wed, 11 Apr 2018, Chris Wilson wrote: > Quoting Jani Nikula (2018-04-11 10:01:46) >> diff --git a/drivers/gpu/drm/i915/intel_bios.c >> b/drivers/gpu/drm/i915/intel_bios.c >> index c5c7530ba157..6db845991a69 100644 >> --- a/drivers/gpu/drm/i915/intel_bios.c >> +++

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Set queue priority from secondary port (rev3)

== Series Details == Series: drm/i915/execlists: Set queue priority from secondary port (rev3) URL : https://patchwork.freedesktop.org/series/40869/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4045 -> Patchwork_8666 = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH] drm/i915/bios: filter out invalid DDC pins from VBT child devices

Quoting Jani Nikula (2018-04-11 13:53:09) > On Wed, 11 Apr 2018, Chris Wilson wrote: > > Quoting Jani Nikula (2018-04-11 10:01:46) > >> diff --git a/drivers/gpu/drm/i915/intel_bios.c > >> b/drivers/gpu/drm/i915/intel_bios.c > >> index c5c7530ba157..6db845991a69 100644 >

Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

On 11 April 2018 at 22:27, Jani Nikula wrote: > On Wed, 11 Apr 2018, Ian W MORRISON wrote: >> >> >>> >>> NAK on indiscriminate Cc: stable. There are zero guarantees that older >>> kernels will work with whatever firmware you throw at them.

Re: [Intel-gfx] [PATCH i-g-t v4] tests/perf_pmu: Avoid RT thread for accuracy test

On 11/04/2018 14:23, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-04 10:51:52) From: Tvrtko Ursulin Realtime scheduling interferes with execlists submission (tasklet) so try to simplify the PWM loop in a few ways: * Drop RT. * Longer batches for smaller

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Engine discovery query (rev2)

== Series Details == Series: drm/i915: Engine discovery query (rev2) URL : https://patchwork.freedesktop.org/series/39958/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4044_full -> Patchwork_8665_full = == Summary - SUCCESS == No regressions found. External URL:

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410

Rodrigo Vivi writes: > "Clock gating bug in GWL may not clear barrier state when an EOT > is received, causing a hang the next time that barrier is used." > > HSDES: 2201832410 > A bit late here but do we have a preference of going like the above or, References:

Re: [Intel-gfx] [PATCH] drm/i915/bios: remove duplicated code

On Tue, 10 Apr 2018, Paulo Zanoni wrote: > Em Ter, 2018-04-10 às 12:12 +0300, Jani Nikula escreveu: >> Apparently caused by a merge fail at some point. Due to the nature of >> the duplicated block, the second one will have no effect, and there's >> no >> need to

[Intel-gfx] [PULL] drm-misc-next-fixes

Hi Dave, I misspoke yesterday when I said we were up-to-date. I have this patch from Tomi to fix a regression in omap. drm-misc-next-fixes-2018-04-11: omap: Fix crash on AM4 EVM, and all OMAP2/3 boards (Tomi) Cc: Tomi Valkeinen Cheers, Sean The following changes

[Intel-gfx] [PATCH] drm/i915/selftests: Wait for idle between idle resets as well

Even though we weren't injecting guilty requests to be reset, we could still fall over the issue of resetting the same request too fast -- where the GPU refuses to start again. (Although it is interesting to note that reloading the driver is sufficient, suggesting that we could recover if we

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/bios: filter out invalid DDC pins from VBT child devices

== Series Details == Series: drm/i915/bios: filter out invalid DDC pins from VBT child devices URL : https://patchwork.freedesktop.org/series/41531/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4043_full -> Patchwork_8663_full = == Summary - WARNING == Minor unknown

Re: [Intel-gfx] [PATCH 1/1] drm/i915: move audio component intialization before audio driver use it

On Wed, 11 Apr 2018, "Shi, Yang A" wrote: > This issue is not related to request_module. When issue happened, > request_module get i915 Correctly and return 0 successfully. It just > be caused by acomp->ops is null in function snd_hdac_i915_init after > it called

Re: [Intel-gfx] [PATCH i-g-t v4] tests/perf_pmu: Avoid RT thread for accuracy test

Quoting Tvrtko Ursulin (2018-04-04 10:51:52) > From: Tvrtko Ursulin > > Realtime scheduling interferes with execlists submission (tasklet) so try > to simplify the PWM loop in a few ways: > > * Drop RT. > * Longer batches for smaller systematic error. > * More

[Intel-gfx] [PATCH v2 2/2] drm/i915/bios: reduce the scope of some local variables in parse_ddi_port()

No functional changes. Cc: Chris Wilson Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_bios.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c

[Intel-gfx] [PATCH v2 1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices

The VBT contains the DDC pin to use for specific ports. Alas, sometimes the field appears to contain bogus data, and while we check for it later on in intel_gmbus_get_adapter() we fail to check the returned NULL on errors. Oops results. The simplest approach seems to be to catch and ignore the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Engine discovery query (rev2)

== Series Details == Series: drm/i915: Engine discovery query (rev2) URL : https://patchwork.freedesktop.org/series/39958/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4044 -> Patchwork_8665 = == Summary - WARNING == Minor unknown changes coming with Patchwork_8665

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Set queue priority from secondary port (rev3)

== Series Details == Series: drm/i915/execlists: Set queue priority from secondary port (rev3) URL : https://patchwork.freedesktop.org/series/40869/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7aa8f3485832 drm/i915/execlists: Set queue priority from secondary port -:28:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Wait for idle between idle resets as well

== Series Details == Series: drm/i915/selftests: Wait for idle between idle resets as well URL : https://patchwork.freedesktop.org/series/41543/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4045 -> Patchwork_8667 = == Summary - WARNING == Minor unknown changes coming

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Set queue priority from secondary port (rev3)

== Series Details == Series: drm/i915/execlists: Set queue priority from secondary port (rev3) URL : https://patchwork.freedesktop.org/series/40869/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4045_full -> Patchwork_8666_full = == Summary - WARNING == Minor unknown

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev3)

== Series Details == Series: drm/i915: Add Exec param to control data port coherency. (rev3) URL : https://patchwork.freedesktop.org/series/40181/ State : warning == Summary == $ dim checkpatch origin/drm-tip bcf7786e9207 drm/i915: Add Exec param to control data port coherency. -:14:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices

== Series Details == Series: series starting with [v2,1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices URL : https://patchwork.freedesktop.org/series/41547/ State : warning == Summary == $ dim checkpatch origin/drm-tip c57f8a17744e drm/i915/bios: filter out invalid DDC

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Wait for idle between idle resets as well

== Series Details == Series: drm/i915/selftests: Wait for idle between idle resets as well URL : https://patchwork.freedesktop.org/series/41543/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4045_full -> Patchwork_8667_full = == Summary - FAILURE == Serious unknown

Re: [Intel-gfx] [PATCH 0/9] GPU-bound energy efficiency improvements for the intel_pstate driver.

Hi Srinivas, Srinivas Pandruvada writes: > On Tue, 2018-04-10 at 15:28 -0700, Francisco Jerez wrote: >> Francisco Jerez writes: >> > [...] > > >> For the case anyone is wondering what's going on, Srinivas pointed me >> at >> a larger

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices

== Series Details == Series: series starting with [v2,1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices URL : https://patchwork.freedesktop.org/series/41547/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4046 -> Patchwork_8668 = == Summary - SUCCESS

[Intel-gfx] [PATCH v2] drm/i915: Add Exec param to control data port coherency.

The patch adds a parameter to control the data port coherency functionality on a per-exec call basis. When data port coherency flag value is different than what it was in previous call for the context, a command to switch data port coherency state is added before the buffer to be executed.

Re: [Intel-gfx] [PATCH] drm/i915/psr: enable psr1 on psr2 panels

On Wed, Apr 11, 2018 at 03:01:24PM +0530, vathsala nagaraju wrote: > > + puthik > On Saturday 07 April 2018 12:36 AM, Vivi, Rodrigo wrote: > > On Fri, Apr 06, 2018 at 12:10:24PM -0700, Dhinakaran Pandiyan wrote: > > > > > > > > > On Sat, 2018-04-07 at 00:12 +0530, vathsala nagaraju wrote: > > >

Re: [Intel-gfx] [RFC v2] drm/i915: Engine discovery query

Looks good to me, a few nits below. I'll try to find some time to display this information in gputop. Reviewed-by: Lionel Landwerlin On 11/04/18 02:46, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Engine discovery query allows userspace

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Exec param to control data port coherency. (rev3)

== Series Details == Series: drm/i915: Add Exec param to control data port coherency. (rev3) URL : https://patchwork.freedesktop.org/series/40181/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4046 -> Patchwork_8669 = == Summary - WARNING == Minor unknown changes coming

Re: [Intel-gfx] [PATCH 0/9] GPU-bound energy efficiency improvements for the intel_pstate driver.

Francisco Jerez writes: > Hi Srinivas, > > Srinivas Pandruvada writes: > >> On Tue, 2018-04-10 at 15:28 -0700, Francisco Jerez wrote: >>> Francisco Jerez writes: >>> >> [...] >> >> >>> For the case anyone is

[Intel-gfx] [PATCH] drm/i915: Pack params to engine->schedule() into a struct

Today we only want to pass along the priority to engine->schedule(), but in the future we want to have much more control over the various aspects of the GPU during a context's execution, for example controlling the frequency allowed. As we need an ever growing number of parameters for scheduling,

[Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr

From: Vathsala Nagaraju For psr block #9, the vbt description has moved to options [0-3] for TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt structure. Since spec does not mention from which VBT version this change was added to vbt.bsf file, we

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Pack params to engine->schedule() into a struct

== Series Details == Series: drm/i915: Pack params to engine->schedule() into a struct URL : https://patchwork.freedesktop.org/series/41567/ State : warning == Summary == $ dim checkpatch origin/drm-tip 203e77ff5941 drm/i915: Pack params to engine->schedule() into a struct -:309:

Re: [Intel-gfx] [PATCH] drm/i915/psr: enable psr1 on psr2 panels

On Wed, 2018-04-11 at 07:40 -0700, Rodrigo Vivi wrote: > On Wed, Apr 11, 2018 at 03:01:24PM +0530, vathsala nagaraju wrote: > > > > + puthik > > On Saturday 07 April 2018 12:36 AM, Vivi, Rodrigo wrote: > > > On Fri, Apr 06, 2018 at 12:10:24PM -0700, Dhinakaran Pandiyan wrote: > > > > > > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Pack params to engine->schedule() into a struct

== Series Details == Series: drm/i915: Pack params to engine->schedule() into a struct URL : https://patchwork.freedesktop.org/series/41567/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4047 -> Patchwork_8670 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices

== Series Details == Series: series starting with [v2,1/2] drm/i915/bios: filter out invalid DDC pins from VBT child devices URL : https://patchwork.freedesktop.org/series/41547/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4046_full -> Patchwork_8668_full = == Summary -

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: vbt change for psr (rev2)

== Series Details == Series: drm/i915/psr: vbt change for psr (rev2) URL : https://patchwork.freedesktop.org/series/41289/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4047 -> Patchwork_8671 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Pack params to engine->schedule() into a struct

== Series Details == Series: drm/i915: Pack params to engine->schedule() into a struct URL : https://patchwork.freedesktop.org/series/41567/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4047_full -> Patchwork_8670_full = == Summary - FAILURE == Serious unknown changes

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Move a bunch of workaround-related code to its own file

== Series Details == Series: series starting with [CI,1/2] drm/i915: Move a bunch of workaround-related code to its own file URL : https://patchwork.freedesktop.org/series/41586/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4047 -> Patchwork_8673 = == Summary - SUCCESS

[Intel-gfx] [PATCH v7 00/10] drm/i915: Implement proper fallback training for MST

Next version of https://patchwork.freedesktop.org/series/41576/ All changes in this patch series are just to make checkpatch a little happier, no functional changes. Lyude Paul (10): drm/atomic: Print debug message on atomic check failure drm/i915: Move DP modeset retry work into intel_dp

[Intel-gfx] [PATCH v7 06/10] drm/dp_mst: Add reset_state callback to topology mgr

This gives drivers subclassing drm_dp_mst_topology_state the ability to prepare their topology states for a new hub to be connected whenever it's detected that the currently connected topology has been disconnected from the system. We'll need this in order to correctly track RX capabilities in

[Intel-gfx] [PATCH v7 02/10] drm/i915: Move DP modeset retry work into intel_dp

While having the modeset_retry_work in intel_connector makes sense with SST, this paradigm doesn't make a whole ton of sense when it comes to MST since we have to deal with multiple connectors. In most cases, it's more useful to just use the intel_dp struct since it indicates whether or not we're

[Intel-gfx] [PATCH v7 10/10] drm/i915: Implement proper fallback training for MST

For a while we actually haven't had any way of retraining MST links with fallback link parameters like we do with SST. While uncommon, certain setups such as my Caldigit TS3 + EVGA MST hub require this since otherwise, they end up getting stuck in an infinite MST retraining loop. MST retraining

[Intel-gfx] [PATCH v7 08/10] drm/i915: Make intel_dp_mst_atomic_check() idempotent

The current way of handling changing VCPI allocations doesn't make a whole ton of sense. Since drm_atomic_helper_check_modeset() can be called multiple times which means that intel_dp_mst_atomic_check() can also be called multiple times. However, since we make the silly mistake of trying to free

[Intel-gfx] [PATCH v7 07/10] drm/i915: Only use one link bw config for MST topologies

When a DP MST link needs retraining, sometimes the hub will detect that the current link bw config is impossible and will update it's RX caps in the DPCD to reflect the new maximum link rate. Currently, we make the assumption that the RX caps in the dpcd will never change like this. This means if

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Implement proper fallback training for MST (rev2)

== Series Details == Series: drm/i915: Implement proper fallback training for MST (rev2) URL : https://patchwork.freedesktop.org/series/41576/ State : warning == Summary == $ dim checkpatch origin/drm-tip b5a1cc33318b drm/atomic: Print debug message on atomic check failure 75ceb33d2660

[Intel-gfx] [CI 2/2] drm/i915: Split out functions for different kinds of workarounds

From: Oscar Mateo There are different kind of workarounds (those that modify registers that live in the context image, those that modify global registers, those that whitelist registers, etc...) and they have different requirements in terms of where they are applied and

[Intel-gfx] [CI 1/2] drm/i915: Move a bunch of workaround-related code to its own file

From: Oscar Mateo This has grown to be a sizable amount of code, so move it to its own file before we try to refactor anything. For the moment, we are leaving behind the WA BB code and the WAs that get applied (incorrectly) in init_clock_gating, but we will deal with it

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Move a bunch of workaround-related code to its own file

== Series Details == Series: series starting with [CI,1/2] drm/i915: Move a bunch of workaround-related code to its own file URL : https://patchwork.freedesktop.org/series/41586/ State : warning == Summary == $ dim checkpatch origin/drm-tip e95c3b723634 drm/i915: Move a bunch of

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: vbt change for psr (rev2)

== Series Details == Series: drm/i915/psr: vbt change for psr (rev2) URL : https://patchwork.freedesktop.org/series/41289/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4047_full -> Patchwork_8671_full = == Summary - WARNING == Minor unknown changes coming with

[Intel-gfx] [PATCH v7 01/10] drm/atomic: Print debug message on atomic check failure

Does what it says on the label, it's a little confusing debugging atomic check failures otherwise. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Lyude Paul --- drivers/gpu/drm/drm_atomic.c | 5 - 1 file

[Intel-gfx] [PATCH v7 04/10] drm/dp_mst: Remove all evil duplicate state pointers

There's no reason to track the atomic state three times. Unfortunately, this is currently what we're doing, and even worse is that there is only one actually correct state pointer: the one in mst_state->base.state. mgr->state never seems to be used, along with the one in mst_state->state. This

  1   2   >