Currently we have some corner cases where area calculation fails. For
these sel fetch are calculation ends up having update area as y1 = 0,
y2 = 4. Instead of these values safer option is full update.
Cc: José Roberto de Souza
Cc: Mika Kahola
Tested-by: Mark Pearson
Signed-off-by: Jouni
Current update area calculation is not handling situation where
e.g. cursor plane is fully or partially outside pipe area.
Fix this by checking damage area against pipe_src area using
drm_rect_intersect.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5440
Cc: José Roberto de Souza
Currently selective fetch area calculation ends up as bogus area in
following cases:
1. Updated plane is partially or fully outside pipe area
2. Big fb with only part of memory area used for plane
These end up as y1 = 0, y2 = 4 or y2 being outside pipe area. This
patch set addresses these by
== Series Details ==
Series: drm/i915: Prepare for GSC-loaded HuC (rev2)
URL : https://patchwork.freedesktop.org/series/103186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607_full -> Patchwork_103186v2_full
Summary
> > There is that GTT alignment restriction that should be mentioned
> > somewhere. Can't quite remember where it was, maybe in PLANE_SURF.
> >
> I checked the BSpec, and don't find anything as such specific for Async flip.
> I also cross verified with the hardware team.
>
> > But I guess the
Hi Dave, Daniel,
Here goes the final drm-intel-gt-next PR towards 5.19.
A fix for a security issue affecting Tigerlake onwards and a plain fix for
a race in VMA handling have landed since the previous pull.
Also last two bits of DG2 enablement are included - GuC firmware version
has been
== Series Details ==
Series: drm/i915/guc/slpc: Use non-blocking H2G for waitboost
URL : https://patchwork.freedesktop.org/series/103598/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607 -> Patchwork_103598v1
Summary
== Series Details ==
Series: drm/i915: Make fastset not suck and allow seamless M/N changes (rev4)
URL : https://patchwork.freedesktop.org/series/103491/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607_full -> Patchwork_103491v4_full
== Series Details ==
Series: drm/i915/dmc: Add MMIO range restrictions (rev5)
URL : https://patchwork.freedesktop.org/series/102630/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607 -> Patchwork_102630v5
Summary
---
On Thu, 05 May 2022, Ville Syrjälä wrote:
> On Tue, May 03, 2022 at 12:24:03PM +0300, Jani Nikula wrote:
>> Convert drm_find_cea_extension() to EDID block iterator in color format
>> and CTA revision detection. Detect them in all CTA extensions.
>>
>> Also parse CTA Data Blocks in DisplayID even
On Thu, 05 May 2022, cgel@gmail.com wrote:
> From: Minghao Chi
>
> Simplify the return expression.
>
> Reported-by: Zeal Robot
> Signed-off-by: Minghao Chi
No, I don't want this. Please stop sending these return expression
"simplifications". The cocci script to do this was removed in
On Thu, 05 May 2022, Yang Li wrote:
> Fix following includecheck warning:
> ./drivers/gpu/drm/i915/gt/intel_sseu.c: linux/string_helpers.h is
> included more than once.
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
Already fixed by commit 10dcf783f7e9 ("drm/i915: remove superfluous
Convert drm_find_cea_extension() to EDID block iterator in color format
and CTA revision detection. Detect them in all CTA extensions.
Also parse CTA Data Blocks in DisplayID even if there's no CTA EDID
extension.
v2:
- Don't assume DRM_COLOR_FORMAT_RGB444 support if there's only DisplayID
CTA
Tvrtko Ursulin writes:
> From: Tvrtko Ursulin
>
> DRM_DEBUG_WARN_ON should only be used when we are certain CI is guaranteed
> to exercise a certain code path, so in case of values coming from MMIO
> reads we cannot be sure CI will have all the possible SKUs and parts, or
> that it will catch
On Wed, 04 May 2022, José Roberto de Souza wrote:
> This feature is supported from display 9 to display 12 and was
> incorrectly being applied to DG2 and Alderlake-P.
>
> While at is also taking the oportunity to drop it from
> intel_device_info struct as a display check is more simple
> and less
== Series Details ==
Series: drm/i915/bios: Rework BDB block handling (rev7)
URL : https://patchwork.freedesktop.org/series/101496/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607_full -> Patchwork_101496v7_full
Hello Ramalingam C,
The patch da0595ae91da: "drm/i915/migrate: Evict and restore the
flatccs capable lmem obj" from Apr 5, 2022, leads to the following
Smatch static checker warning:
drivers/gpu/drm/i915/gt/intel_migrate.c:832 intel_context_migrate_copy() error:
uninitialized symbol
== Series Details ==
Series: drm/i915/guc: Support programming the EU priority in the GuC descriptor
(rev2)
URL : https://patchwork.freedesktop.org/series/103515/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607_full -> Patchwork_103515v2_full
From: Tvrtko Ursulin
DRM_DEBUG_WARN_ON should only be used when we are certain CI is guaranteed
to exercise a certain code path, so in case of values coming from MMIO
reads we cannot be sure CI will have all the possible SKUs and parts, or
that it will catch all possible error conditions. Use
From: Tvrtko Ursulin
DRM_DEBUG_WARN_ON should only be used when we are certain CI is guaranteed
to exercise a certain code path, so in case of values coming from MMIO
reads we cannot be sure CI will have all the possible SKUs and parts.
Use drm_warn instead and move logging to init phase while
Hi Andi,
On 18/03/2022 23:39, Andi Shyti wrote:
Now tiles have their own sysfs interfaces under the gt/
directory. Because RPS is a property that can be configured on a
tile basis, then each tile should have its own interface
The new sysfs structure will have a similar layout for the 4 tile
On 04/05/2022 19:17, Matt Roper wrote:
On Wed, May 04, 2022 at 06:59:32PM +0100, Tvrtko Ursulin wrote:
On 04/05/2022 17:48, Matt Roper wrote:
On Wed, May 04, 2022 at 01:07:14PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
DRM_DEBUG_WARN_ON should only be used when we are certain CI
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when GuC channel is backed up and it is unable to respond
in a timely fashion causing warnings and affecting CI.
Is it the "Unable to force min freq" error? Do you have a
== Series Details ==
Series: drm/edid: CEA data block iterators, and more (rev4)
URL : https://patchwork.freedesktop.org/series/102703/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610 -> Patchwork_102703v4
Summary
Hi Tvrtko,
[...]
> > +static ssize_t act_freq_mhz_show(struct device *dev,
> > +struct device_attribute *attr, char *buff)
> > +{
> > + u32 actual_freq = sysfs_gt_attribute_r_max_func(dev, attr,
> > +
On Thu, May 05, 2022 at 06:33:46AM +, Murthy, Arun R wrote:
> > > There is that GTT alignment restriction that should be mentioned
> > > somewhere. Can't quite remember where it was, maybe in PLANE_SURF.
> > >
> > I checked the BSpec, and don't find anything as such specific for Async
> >
Deferred framebuffer can be registered in hpd worker. So
drm_fb_helper_unregister_fbi should be called after hpd is stopped.
Otherwise we risk UAF after module removal.
The patch should fix following GPF:
[272.634530] general protection fault, probably for non-canonical address
== Series Details ==
Series: drm/edid: CEA data block iterators, and more (rev4)
URL : https://patchwork.freedesktop.org/series/102703/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610_full -> Patchwork_102703v4_full
== Series Details ==
Series: drm/i915/fbdev: unregister framebuffer after disabling hpd
URL : https://patchwork.freedesktop.org/series/103621/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610 -> Patchwork_103621v1
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Don't use DRM_DEBUG_WARN_ON for
unexpected l3bank/mslice config
URL : https://patchwork.freedesktop.org/series/103610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610_full -> Patchwork_103610v1_full
On Thu, 2022-05-05 at 00:33 +0300, Ville Syrjälä wrote:
> On Wed, May 04, 2022 at 12:07:45PM -0700, José Roberto de Souza wrote:
> > This feature is supported from display 9 to display 12 and was
> > incorrectly being applied to DG2 and Alderlake-P.
>
> They just renamed the register to
drm-misc-fixes-2022-05-05:
drm-misc-fixes for v5.18-rc6:
- Small fix for hot-unplugging fb devices.
- Kconfig fix for it6505.
The following changes since commit dc3ae06c5f2170d879ff58696f629d8c3868aec3:
drm/sun4i: Remove obsolete references to PHYS_OFFSET (2022-04-26 14:39:56
+0200)
are
> > Can I have your Reviewed-by for this patch?
>
> You didn't find the GTT alignment restriction yet which to me syas you didn't
> really look hard enough.
I checked in the BSpec and also clarified with the hardware team on this.
>
> And you haven't answered what the actual use case for this
On Thu, May 05, 2022 at 02:00:50PM +, Souza, Jose wrote:
> On Thu, 2022-05-05 at 13:45 +0300, Jani Nikula wrote:
> > - has_rc6p - complicated
>
> Matt Ropper suggested to use IS_GRAPHICS_VER(i915, 6, 7) so it will become
> even less complicated.
That won't really simplify it. The simplest
On Thu, May 05, 2022 at 12:02:45PM +0100, Tvrtko Ursulin wrote:
>
> On 04/05/2022 19:17, Matt Roper wrote:
> > On Wed, May 04, 2022 at 06:59:32PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 04/05/2022 17:48, Matt Roper wrote:
> > > > On Wed, May 04, 2022 at 01:07:14PM +0100, Tvrtko Ursulin
== Series Details ==
Series: drm/i915/fbdev: unregister framebuffer after disabling hpd (rev2)
URL : https://patchwork.freedesktop.org/series/103621/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610 -> Patchwork_103621v2
== Series Details ==
Series: drm/i915/fbdev: unregister framebuffer after disabling hpd (rev2)
URL : https://patchwork.freedesktop.org/series/103621/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11610_full -> Patchwork_103621v2_full
On 5/5/2022 10:21, Belgaumkar, Vinay wrote:
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when GuC channel is backed up and it is unable to respond
in a timely fashion causing
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 9 or newer has graphics
microcontroller.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 6 or newer have software
support for this feature.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 7 or newer can reset engines.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and
No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer, haswell or broadwell
supports it.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the
No need to have this parameter in intel_device_info struct
as the requirement to support it is the DDI support.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 11 or newer has this feature.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and
No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer has this feature.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare
Because i reviewed this already and the only new change is the relocation
of the function "huc_is_authenticated()" from Patch 1 to this patch while
maintaining the same logic as rev-1, thus:
Acked-by: Alan Previn
On Wed, 2022-05-04 at 13:48 -0700, Daniele Ceraolo Spurio wrote:
> HuC loading
== Series Details ==
Series: drm/i915/fbdev: unregister framebuffer after disabling hpd
URL : https://patchwork.freedesktop.org/series/103621/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11610_full -> Patchwork_103621v1_full
While DG2 supports DC5 and DC9, some of the tests in
fast-feedback blew up DG2 when the tests forced transition
from dc5->dc9 on suspend and dc9->dc5 on resume. Some local
experiments performed with Rodrigo on a RIL system showed promising
results when dc5 was completely diabled and i915 took
Add Support for DC states on Dg2.
v2: Add dc9 as the max supported DC states and disable DC5.
v3: set max_dc to 0. (Imre)
v4: Add FIXME (Rodrigo)
Cc: Imre Deak
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi (v1)
---
On Wed, 04 May 2022, Andrzej Hajda wrote:
> On some configurations drm_fb_helper_initial_config sometimes fails.
> Logging error value should help debugging such issues.
>
> Signed-off-by: Andrzej Hajda
> ---
> drivers/gpu/drm/i915/display/intel_fbdev.c | 11 ---
> 1 file changed, 8
On Thu, 2022-05-05 at 09:58 -0700, Anusha Srivatsa wrote:
> Add Support for DC states on Dg2.
>
> v2: Add dc9 as the max supported DC states and disable DC5.
> v3: set max_dc to 0. (Imre)
>
> Cc: Imre Deak
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> Reviewed-by: Rodrigo Vivi (v1)
>
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when GuC channel is backed up and it is unable to respond
in a timely fashion causing warnings and affecting CI.
Is it the
== Series Details ==
Series: drm/i915/dmc: Load DMC on DG2 (rev2)
URL : https://patchwork.freedesktop.org/series/103625/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610 -> Patchwork_103625v2
Summary
---
On 5/4/2022 16:46, Daniele Ceraolo Spurio wrote:
From: Matthew Brost
In GuC submission mode the EU priority must be updated by the GuC rather
than the driver as the GuC owns the programming of the context descriptor.
Given that the GuC code uses the GuC priorities, we can't use a generic
Hi Jani,
On 05.05.2022 20:37, Jani Nikula wrote:
On Wed, 04 May 2022, Andrzej Hajda wrote:
On some configurations drm_fb_helper_initial_config sometimes fails.
Logging error value should help debugging such issues.
Signed-off-by: Andrzej Hajda
---
== Series Details ==
Series: drm/i915/fbdev: unregister framebuffer after disabling hpd (rev3)
URL : https://patchwork.freedesktop.org/series/103621/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11611 -> Patchwork_103621v3
While DG2 supports DC5 and DC9, some of the tests in
fast-feedback blew up DG2 when the tests forced transition
from dc5->dc9 on suspend and dc9->dc5 on resume. Some local
experiments performed with Rodrigo on a RIL system showed promising
results when dc5 was completely diabled and i915 took
Add Support for DC states on Dg2.
v2: Add dc9 as the max supported DC states and disable DC5.
v3: set max_dc to 0. (Imre)
Cc: Imre Deak
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi (v1)
---
drivers/gpu/drm/i915/display/intel_display_power.c | 4 +++-
Add Support for DC states on Dg2.
v2: Add dc9 as the max supported DC states and disable DC5.
v3: set max_dc to 0. (Imre)
Cc: Imre Deak
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi (v1)
---
drivers/gpu/drm/i915/display/intel_display_power.c | 4 +++-
While DG2 supports DC5 and DC9, some of the tests in
fast-feedback blew up DG2 when the tests forced transition
from dc5->dc9 on suspend and dc9->dc5 on resume. Some local
experiments performed with Rodrigo on a RIL system showed promising
results when dc5 was completely diabled and i915 took
On Thu, 05 May 2022, Ville Syrjälä wrote:
> On Tue, May 03, 2022 at 12:23:45PM +0300, Jani Nikula wrote:
>> I've kind of lost track of the version numbers on some of the iterator
>> patches, but this is the next version (or mostly a resend) of
>> [1]. There's an additional rename patch for SCDS.
On Wed, 4 May 2022 14:49:26 -0300
Jason Gunthorpe wrote:
> On Mon, May 02, 2022 at 02:31:30PM -0300, Jason Gunthorpe wrote:
> > Prior series have transformed other parts of VFIO from working on struct
> > device or struct vfio_group into working directly on struct
> > vfio_device. Based on that
== Series Details ==
Series: drm/i915/dmc: Load DMC on DG2 (rev3)
URL : https://patchwork.freedesktop.org/series/103625/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11611 -> Patchwork_103625v3
Summary
---
On Thu, May 05, 2022 at 04:09:18PM +, Murthy, Arun R wrote:
> > > Can I have your Reviewed-by for this patch?
> >
> > You didn't find the GTT alignment restriction yet which to me syas you
> > didn't
> > really look hard enough.
> I checked in the BSpec and also clarified with the hardware
Reviewed-by: Alan Previn
On Wed, 2022-05-04 at 13:48 -0700, Daniele Ceraolo Spurio wrote:
> The fuction name is confusing, because it doesn't check the actual auth
> status in HW but the SW status. Given that there is only one user (the
> huc_auth function itself), just get rid of it and use the
On 04/05/2022 19:37, Jani Nikula wrote:
Reduce the magic of what's going on in GEM_DEBUG_EXEC() by expanding it
inline and being explicit about it. It's as single use case anyway, so
the macro feels overkill.
Cc: Tvrtko Ursulin
Signed-off-by: Jani Nikula
---
On Thu, May 05, 2022 at 01:52:42PM +0300, Jani Nikula wrote:
> Convert drm_find_cea_extension() to EDID block iterator in color format
> and CTA revision detection. Detect them in all CTA extensions.
>
> Also parse CTA Data Blocks in DisplayID even if there's no CTA EDID
> extension.
>
> v2:
> -
On 04/05/2022 19:37, Jani Nikula wrote:
Avoid bringing the entire machine down even if there's a bug that
shouldn't happen, but won't corrupt the system either. Log them loudly
and limp on.
Cc: Tvrtko Ursulin
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c |
On Thu, 05 May 2022, Tvrtko Ursulin wrote:
> On 04/05/2022 19:37, Jani Nikula wrote:
>> Avoid bringing the entire machine down even if there's a bug that
>> shouldn't happen, but won't corrupt the system either. Log them loudly
>> and limp on.
>>
>> Cc: Tvrtko Ursulin
>> Signed-off-by: Jani
On Wed, May 04, 2022 at 11:12:26AM -0700, Matt Roper wrote:
> On Wed, May 04, 2022 at 06:42:37PM +0200, Daniel Vetter wrote:
> > On Wed, May 04, 2022 at 07:59:27AM -0700, Matt Roper wrote:
> > > On Wed, May 04, 2022 at 02:24:07PM +0200, Daniel Vetter wrote:
> > > > On Fri, 29 Apr 2022 at 17:11,
Hi Dave, Daniel,
Here's this week drm-misc-next PR
Maxime
drm-misc-next-2022-05-05:
drm-misc-next for 5.19:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
- Add DRM-managed mutex initialisation
- edid: Doc improvements
- fbdev: deferred io improvements
- format-helper:
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Don't use DRM_DEBUG_WARN_ON for
unexpected l3bank/mslice config
URL : https://patchwork.freedesktop.org/series/103610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11610 -> Patchwork_103610v1
On Thu, 2022-05-05 at 13:45 +0300, Jani Nikula wrote:
> On Wed, 04 May 2022, José Roberto de Souza wrote:
> > This feature is supported from display 9 to display 12 and was
> > incorrectly being applied to DG2 and Alderlake-P.
> >
> > While at is also taking the oportunity to drop it from
> >
On 04/05/2022 19:37, Jani Nikula wrote:
There are already too many choices here, take away the unused ones.
Cc: Tvrtko Ursulin
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_gem.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.h
== Series Details ==
Series: drm/i915/guc/slpc: Use non-blocking H2G for waitboost
URL : https://patchwork.freedesktop.org/series/103598/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11607_full -> Patchwork_103598v1_full
== Series Details ==
Series: drm/edid: CEA data block iterators, and more (rev4)
URL : https://patchwork.freedesktop.org/series/102703/
State : warning
== Summary ==
Error: dim checkpatch failed
fe31b8863c44 drm/edid: reset display info in drm_add_edid_modes() for NULL edid
39c77f38058d
On Tue, May 03, 2022 at 09:05:43AM +0100, Tvrtko Ursulin wrote:
>
> On 02/05/2022 17:34, Matt Roper wrote:
> > This patch adds the basic definitions needed to support
> > new copy engines. Also updating the cmd_info to accommodate
> > new engines, as the engine id's of legacy engines have been
>
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: Drop has_gt_uc from device info
URL : https://patchwork.freedesktop.org/series/103629/
State : warning
== Summary ==
Error: dim checkpatch failed
56f051d52ffd drm/i915: Drop has_gt_uc from device info
a717cf4a929c drm/i915:
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: Drop has_gt_uc from device info
URL : https://patchwork.freedesktop.org/series/103629/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: Drop has_gt_uc from device info
URL : https://patchwork.freedesktop.org/series/103629/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11612 -> Patchwork_103629v1
Hi Mauro,
[...]
> +static int ref_module_dependency(struct module *mod, struct module *this)
> +{
> + int ret;
> +
> + if (!this || !this->name)
> + return -EINVAL;
> +
> + if (mod == this)
> + return 0;
> +
> + mutex_lock(_mutex);
> +
> + ret =
== Series Details ==
Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev2)
URL : https://patchwork.freedesktop.org/series/102666/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
This patch adds the basic definitions needed to support
new copy engines. Also updating the cmd_info to accommodate
new engines, as the engine id's of legacy engines have been
changed.
v2:
- Add _BCS(n) definition, similar to other engines. (Tvrtko)
- Add I915_MAX_BCS definition, similar to
== Series Details ==
Series: drm/i915/fbdev: unregister framebuffer after disabling hpd (rev3)
URL : https://patchwork.freedesktop.org/series/103621/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11611_full -> Patchwork_103621v3_full
From: John Harrison
PVC adds extra blitter engines (in the following patch). The reset
selftest has a local array on the stack which is sized by the number
of engines. The increase pushes the size of this array to the point
where it trips the 'stack too large' compile warning. This patch takes
Add the interrupt handler support for new copy engines.
Bspec: 54030
Original-author: CQ Tang
Signed-off-by: Matt Roper
Reviewed-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 16
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4
2 files changed, 20
Let's reorganize some of the forcewake/shadow handling in intel_uncore.c
and consolidate the cargo-cult comments on each table into more general
comments that apply to all tables.
We'll probably move forcewake handling to its own dedicated file in the
near future and further enhance this with
From: Stuart Summers
Although we already strip 3D-specific flags from PIPE_CONTROL
instructions when submitting to a compute engine, there are some
additional flags that need to be removed when the platform as a whole
lacks a 3D pipeline. Add those restrictions here.
Bspec: 47112
Add PVC's forcewake ranges.
v2:
- Drop replicated comment completely; move general cleanup of the
documentation to a separate patch.
Bspec: 67609
Cc: Daniele Ceraolo Spurio
Cc: Stuart Summers
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/intel_uncore.c | 142
When i915 adds additional PVC blitter instances (in an upcoming patch),
the definition of VECS0 will change from bit(10) to bit(18), causing
GVT's R_ALL mask to overflow the u16 storage that's currently used.
Let's replace the u16 with an intel_engine_mask_t to ensure we avoid
this.
Cc: Tvrtko
Ponte Vecchio (PVC) is a new GPU based on the Xe_HPC architecture. As a
compute-focused platform, PVC has compute engines and enhanced copy
engines, but no render engine (there is no geometry pipeline) and no
display.
This is just a handful of early enablement patches, including some
initial
The SoC registers, including RP_STATE_CAP, have moved to a new location
in GTTMMADR on Ponte Vecchio. We need to update the register offset
accordingly.
Cc: Rodrigo Vivi
Signed-off-by: Matt Roper
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_rps.c | 4 +++-
From: Ayaz A Siddiqui
v2 (MattR):
- Clarify comment above RING_CMD_CCTL programming.
- Remove bspec reference from field definition. (Lucas)
- Add WARN if we try to use a (presumably uninitialized) wb_index of 0.
On most platforms 0 is an invalid MOCS entry and even on the ones
where
Add the reset support for new copy engines in PVC.
Bspec: 52549
Original-author: CQ Tang
Signed-off-by: Matt Roper
Reviewed-by: José Roberto de Souza
Reviewed-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 8 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 44
From: Lucas De Marchi
The new Link Copy engines in PVC may be fused off according to the
mslice_mask. Each bit of the MEML3_EN_MASK we read from the
GEN10_MIRROR_FUSE3 register disables a pair of link copy engines.
v2 (Tvrtko):
- Minor cosmetic changes: s/u8/unsigned long/, use instance local
From: Lucas De Marchi
As we have more copy engines now, mask all of them from aux table
invalidate.
v2 (MattR):
- Use I915_MAX_BCS to determine mask rather than hardcoding BCS8.
(Prathap)
Cc: Prathap Kumar Valsan
Signed-off-by: Lucas De Marchi
Signed-off-by: Matt Roper
Reviewed-by: José
== Series Details ==
Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev2)
URL : https://patchwork.freedesktop.org/series/102666/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11612 -> Patchwork_102666v2
== Series Details ==
Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev3)
URL : https://patchwork.freedesktop.org/series/102666/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev3)
URL : https://patchwork.freedesktop.org/series/102666/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11613 -> Patchwork_102666v3
== Series Details ==
Series: Make the rest of the VFIO driver interface use vfio_device (rev5)
URL : https://patchwork.freedesktop.org/series/102606/
State : warning
== Summary ==
Error: dim checkpatch failed
843eb2b14576 vfio: Make vfio_(un)register_notifier accept a vfio_device
-:229:
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