On 20/10/2022 12:03, Christoph Hellwig wrote:
From: Robert Beckett
swiotlb_max_segment used to return either the maximum size that swiotlb
could bounce, or for Xen PV PAGE_SIZE even if swiotlb could bounce buffer
larger mappings. This made i915 on Xen PV work as it bypasses the
coherency
On Thu, Oct 27, 2022 at 10:51:45AM +0200, Hans de Goede wrote:
> In their backlight register paths and this has been present since
> circa 2015.
>
> So both before and after my 6.1 refactor vendor is only preferred
> on devices which don't implement the ACPI video bus control method.
Sorry,
Change ttm_resource structure from num_pages to size_t size in bytes.
v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
v1 -> v2: change bo->resource->size to bo->base.size at some places
v1 -> v2: remove the local variable
v1 -> v2: cleanup cmp_size_smaller_first()
v2 -> v3: adding missing
We had already grabbed the rpm wakeref at obj destruction path,
but it also required to grab the wakeref when object moves.
When i915_gem_object_release_mmap_offset() gets called by
i915_ttm_move_notify(), it will release the mmap offset without
grabbing the wakeref. We want to avoid that
v3 series rev fixes the nit review comment.
Anshuman Gupta (2):
drm/i915: Encapsulate lmem rpm stuff in intel_runtime_pm
drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 +---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +-
Runtime pm is not really per GT, therefore it make sense to
move lmem_userfault_list, lmem_userfault_lock and
userfault_wakeref from intel_gt to intel_runtime_pm structure,
which is embedded to i915.
No functional change.
v2:
- Fixes the code comment nit. [Matt Auld]
Signed-off-by: Anshuman
Hi Mateusz,
On Thu, Oct 27, 2022 at 12:02:24AM +0200, Mateusz Kwiatkowski wrote:
> First of all, nice idea with the helper function that can be reused by
> different drivers. This is neat!
Yeah, it looked to me that given how complex it is, we don't want to
duplicate it in each and every driver.
Hi Matthew,
On 10/27/22 11:11, Matthew Garrett wrote:
> On Thu, Oct 27, 2022 at 10:51:45AM +0200, Hans de Goede wrote:
>
>> In their backlight register paths and this has been present since
>> circa 2015.
>>
>> So both before and after my 6.1 refactor vendor is only preferred
>> on devices which
On Thu, Oct 27, 2022 at 2:17 PM Hans de Goede wrote:
>
> Hi,
>
> On 10/27/22 14:09, Rafael J. Wysocki wrote:
> > On Thu, Oct 27, 2022 at 12:37 PM Hans de Goede wrote:
> >>
> >> Hi,
> >>
> >> On 10/27/22 11:52, Matthew Garrett wrote:
> >>> On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede
== Series Details ==
Series: drm/ttm: rework on ttm_resource to use size_t type (rev2)
URL : https://patchwork.freedesktop.org/series/110129/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/110129/revisions/2/mbox/ not
applied
Applying: drm/ttm:
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Call intel_sdvo_select_ddc_bus() before initializing any
> of the outputs. And before that is functional (assuming no VBT)
> we have to set up the controlled_outputs thing. Otherwise DDC
> won't be functional during the output
On 20/10/2022 12:33, Christian König wrote:
Am 20.10.22 um 09:34 schrieb Tvrtko Ursulin:
On 20/10/2022 07:40, Christian König wrote:
Am 19.10.22 um 19:32 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
To enable propagation of settings from the cgroup drm controller to
drm we
need to
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Get rid of this funny byte based dumping of invalid output
> flags and just dump it as a single hex numbers. Also do that
> early since all the rest is going to get skipped anyway of
> the thing is zero.
>
> Signed-off-by: Ville
On 21/10/2022 23:52, T.J. Mercier wrote:
On Wed, Oct 19, 2022 at 10:34 AM Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
Add a scanning worker, which if enabled, periodically queries the cgroup
for GPU usage and if over budget (as configured by it's relative weight
share) notifies the drm
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Avoid having to call the output init function for each
> output type separately. We can just call the right one
> based on the "class" of the output.
>
> Technically we could just walk the bits of the bitmask
> but that could
[
quilt mail --send still can't handle unicode characters.
Here's the patch again
]
From: "Steven Rostedt (Google)"
Before a timer is freed, del_timer_shutdown() must be called.
Link: https://lore.kernel.org/all/20220407161745.7d675...@gandalf.local.home/
Cc: "Noralf Trønnes"
Cc: David
On Thu, Oct 27, 2022 at 09:37:52AM -0600, jim.cro...@gmail.com wrote:
> On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
> >
> >
> >
> > On 10/21/22 05:18, Jani Nikula wrote:
> > > On Thu, 20 Oct 2022, Ville Syrjälä wrote:
> > >> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote:
> > >>>
On Thu, Oct 27, 2022 at 12:37 PM Hans de Goede wrote:
>
> Hi,
>
> On 10/27/22 11:52, Matthew Garrett wrote:
> > On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
> >
> >> The *only* behavior which actually is new in 6.1 is the native GPU
> >> drivers now doing the equivalent of:
> >>
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Correctly indicate which outputs we support in the debug print.
>
> Signed-off-by: Ville Syrjälä
Could change that to str_yes_no() or str_enabled_disabled() while at it.
Reviewed-by: Jani Nikula
> ---
>
On Thu, Oct 27, 2022 at 05:49:53PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 27, 2022 at 05:36:24PM +0300, Jani Nikula wrote:
> > On Wed, 26 Oct 2022, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Call intel_sdvo_select_ddc_bus() before initializing any
> > > of the outputs. And
== Series Details ==
Series: Add DG2 OA support (rev11)
URL : https://patchwork.freedesktop.org/series/107584/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12304_full -> Patchwork_107584v11_full
Summary
---
On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
>
>
>
> On 10/21/22 05:18, Jani Nikula wrote:
> > On Thu, 20 Oct 2022, Ville Syrjälä wrote:
> >> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote:
> >>> On Sun, Sep 11, 2022 at 11:28:43PM -0600, Jim Cromie wrote:
> hi Greg, Dan,
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Get rid of this silly output type<->device index back and
> forth and just pass the output type directly to the corresponding
> output init function. This was already being done for TV outputs
> anyway.
>
> Signed-off-by: Ville
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Stop enumerating the DDC modes for SDVO LVDS outputs (outside
> the initial fixed mode setup). intel_panel_mode_valid() will
> just reject most of them anyway, and any left over are entirely
> pointless as they'll match the
== Series Details ==
Series: drm/i915: Audio stuff (rev2)
URL : https://patchwork.freedesktop.org/series/110188/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12302_full -> Patchwork_110188v2_full
Summary
---
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> drm_mode_probed_add() is unhappy about being called w/o
> mode_config.mutex. Grab it during LVDS fixed mode setup
> to silence the WARNs.
>
> Cc: sta...@vger.kernel.org
> Closes:
Hi,
On 10/27/22 14:09, Rafael J. Wysocki wrote:
> On Thu, Oct 27, 2022 at 12:37 PM Hans de Goede wrote:
>>
>> Hi,
>>
>> On 10/27/22 11:52, Matthew Garrett wrote:
>>> On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
>>>
The *only* behavior which actually is new in 6.1 is the
Hi Tejun,
On 19/10/2022 19:45, Tejun Heo wrote:
Hello,
On Wed, Oct 19, 2022 at 06:32:37PM +0100, Tvrtko Ursulin wrote:
...
DRM static priority interface files
~~~
drm.priority_levels
One of:
1) And integer representing the minimum number
On Wed, 26 Oct 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We try to filter out the corresponding xxx1 output
> if the xxx0 output is not present. But the way that is
> being done is pretty awkward. Make it less so.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Ville Syrjälä
From: "Steven Rostedt (Google)"
Before a timer is freed, del_timer_shutdown() must be called.
Link: https://lore.kernel.org/all/20220407161745.7d675...@gandalf.local.home/
Cc: "Noralf Trønnes"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc:
We need to iterate over the original entries here for the sg_table,
pulling out the struct page for each one, to be remapped. However
currently this incorrectly iterates over the final dma mapped entries,
which is likely just one gigantic sg entry if the iommu is enabled,
leading to us only
Using PAGE_SIZE here potentially hides issues so bump that to something
larger. This should also make it possible for iommu to coalesce entries
for us. With that in place verify we can write from the GPU using the
importers sg_table, followed by checking that our writes match when read
from the
== Series Details ==
Series: i915: CAGF and RC6 changes for MTL (rev11)
URL : https://patchwork.freedesktop.org/series/108156/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12288_full -> Patchwork_108156v11_full
Summary
== Series Details ==
Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)
URL : https://patchwork.freedesktop.org/series/108972/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)
URL : https://patchwork.freedesktop.org/series/108972/
State : warning
== Summary ==
Error: dim checkpatch failed
d83d4490c920 drm/i915: Encapsulate lmem rpm stuff in intel_runtime_pm
-:69:
On Wed, Oct 26, 2022 at 01:43:00PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 26, 2022 at 01:32:31PM +0300, Ville Syrjälä wrote:
> > Short form looks to be this:
> > <4>[ 355.437846] 1 lock held by rs:main Q:Reg/359:
> > <4>[ 355.438418] #0: 88844693b758 (>__lock){-.-.}-{2:2}, at:
> >
On Thu, Oct 27, 2022 at 05:36:24PM +0300, Jani Nikula wrote:
> On Wed, 26 Oct 2022, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Call intel_sdvo_select_ddc_bus() before initializing any
> > of the outputs. And before that is functional (assuming no VBT)
> > we have to set up the
Hi,
On Thu, Oct 27, 2022 at 12:32:50AM +0200, Mateusz Kwiatkowski wrote:
> I've seen that you've incorporated my PAL60 patch. Thanks!
>
> I still yet need to test your v6 changes, but looking at this code with just
> my
> mental static analysis, it seems to me that the
== Series Details ==
Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)
URL : https://patchwork.freedesktop.org/series/108972/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12310 -> Patchwork_108972v4
+Rafael
On Thu, Jul 21, 2022 at 03:29:48PM +0530, tilak.tang...@intel.com wrote:
> From: Tilak Tangudu
>
> Added is_intel_rpm_allowed function to query the runtime_pm
> status and disllow during suspending and resuming.
>
> v2: Return -2 if runtime pm is not allowed in runtime_pm_get
> and
On Thu, 27 Oct 2022, Ville Syrjälä wrote:
> On Thu, Oct 27, 2022 at 05:49:53PM +0300, Ville Syrjälä wrote:
>> On Thu, Oct 27, 2022 at 05:36:24PM +0300, Jani Nikula wrote:
>> > On Wed, 26 Oct 2022, Ville Syrjala wrote:
>> > > From: Ville Syrjälä
>> > >
>> > > Call intel_sdvo_select_ddc_bus()
== Series Details ==
Series: series starting with [1/2] drm/i915/dmabuf: fix sg_table handling in
map_dma_buf
URL : https://patchwork.freedesktop.org/series/110229/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12311 -> Patchwork_110229v1
On Wed, 2022-10-19 at 18:21 +0200, Eric Farman wrote:
> Move the stuff associated with the mdev parent (and thus the
> subchannel struct) into its own struct, and leave the rest in
> the existing private structure.
>
> The subchannel will point to the parent, and the parent will point
> to the
There is no userspace user for this CS yet, we only need it for internal
kernel ops (e.g. HuC, PXP), so don't expose it.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 4
1 file changed, 4 insertions(+)
diff --git
Gentle Reminder!
> -Original Message-
> From: Murthy, Arun R
> Sent: Monday, October 10, 2022 1:24 PM
> To: 'intel-gfx@lists.freedesktop.org'
> Cc: Syrjala, Ville
> Subject: RE: [PATCHv3] drm/i915: Support Async Flip on Linear buffers
>
> Ville,
> Gentle reminder!
>
> Thanks and
== Series Details ==
Series: Introduce the GSC CS
URL : https://patchwork.freedesktop.org/series/110237/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12313 -> Patchwork_110237v1
Summary
---
**SUCCESS**
No
The GSC CS re-uses the same interrupt bits that the GSC used in older
platforms. This means that we can now have an engine interrupt coming
out of OTHER_CLASS, so we need to handle that appropriately.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matt Roper
---
Starting on MTL, the GSC is no longer managed with direct MMIO access,
but we instead have a dedicated command streamer for it. As a first step
for adding support for this CS, add the required definitions.
Note that, although it is now a CS, the GSC retains its old
class:instance value
We need to tell the GuC that the GSC CS is there. The GuC interface
swaps COMPUTE and OTHER class, so we also need to handle that.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 11 +--
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
The GSC CS has its own dedicated bit in the GDRST register.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
2 files changed, 2 insertions(+)
diff --git
Starting on MTL, the GSC microcontroller resides inside the media GT
and the driver can communicate with it via a new Command Streamer, the
GSC CS. As a first step in supporting the GSC integration within the
media GT, this series adds the required defines and basic support for
this CS. Note that,
== Series Details ==
Series: Introduce the GSC CS
URL : https://patchwork.freedesktop.org/series/110237/
State : warning
== Summary ==
Error: dim checkpatch failed
9a055873a680 drm/i915/mtl: add initial definitions for GSC CS
ddb719782376 drm/i915/mtl: pass the GSC CS info to the GuC
-:81:
== Series Details ==
Series: Introduce the GSC CS
URL : https://patchwork.freedesktop.org/series/110237/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Replace internal with discrete of dgfx platforms.
v2: commit title reword (Jani)
v3: use variable name i915 (Jani)
Cc: Jani Nikula
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
On Thu, Oct 27, 2022 at 03:15:50PM -0700, Daniele Ceraolo Spurio wrote:
> Starting on MTL, the GSC is no longer managed with direct MMIO access,
> but we instead have a dedicated command streamer for it. As a first step
> for adding support for this CS, add the required definitions.
> Note that,
== Series Details ==
Series: drm/i915/hdmi: SPD infoframe updated for discrete (rev3)
URL : https://patchwork.freedesktop.org/series/109908/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12313 -> Patchwork_109908v3
Summary
On Thu, Oct 27, 2022 at 03:15:52PM -0700, Daniele Ceraolo Spurio wrote:
> The GSC CS re-uses the same interrupt bits that the GSC used in older
> platforms. This means that we can now have an engine interrupt coming
> out of OTHER_CLASS, so we need to handle that appropriately.
>
> Signed-off-by:
On Thu, Oct 27, 2022 at 03:15:53PM -0700, Daniele Ceraolo Spurio wrote:
> The GSC CS has its own dedicated bit in the GDRST register.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Matt Roper
Bspec: 52549
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 +
>
On Thu, Oct 27, 2022 at 03:15:51PM -0700, Daniele Ceraolo Spurio wrote:
> We need to tell the GuC that the GSC CS is there. The GuC interface
> swaps COMPUTE and OTHER class, so we also need to handle that.
When I first read the second sentence here, I thought you were saying
that the GuC
== Series Details ==
Series: series starting with [1/2] drm/i915/dmabuf: fix sg_table handling in
map_dma_buf
URL : https://patchwork.freedesktop.org/series/110229/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Do both crawl and squash
when changing cdclk
URL : https://patchwork.freedesktop.org/series/110199/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12304_full -> Patchwork_110199v1_full
On Thu, Oct 27, 2022 at 9:53 AM Dixit, Ashutosh
wrote:
>
> On Thu, 27 Oct 2022 09:35:24 -0700, Nick Desaulniers wrote:
> >
>
> Hi Nick,
>
> > On Tue, Oct 25, 2022 at 5:18 PM Andi Shyti
> > wrote:
> > >
> > > Hi Ashutosh,
> > >
> > > > But I'd wait to hear from clang/llvm folks first.
> > >
> >
On Thu, Oct 27, 2022 at 01:55:39PM -0600, jim.cro...@gmail.com wrote:
> On Thu, Oct 27, 2022 at 9:59 AM Ville Syrjälä
> wrote:
> >
> > On Thu, Oct 27, 2022 at 09:37:52AM -0600, jim.cro...@gmail.com wrote:
> > > On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
> > > >
> > > >
> > > >
> > > > On
On Thu, 27 Oct 2022 09:35:24 -0700, Nick Desaulniers wrote:
>
Hi Nick,
> On Tue, Oct 25, 2022 at 5:18 PM Andi Shyti wrote:
> >
> > Hi Ashutosh,
> >
> > > But I'd wait to hear from clang/llvm folks first.
> >
> > Yeah! Looking forward to getting some ideas :)
>
> Gwan-gyeong, which tree and set
On Thu, Oct 27, 2022 at 04:09:01PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 26, 2022 at 01:43:00PM +0200, Peter Zijlstra wrote:
> > Could you please give the below a spin?
>
> Thanks. I've added this to our CI branch. I'll try to keep and eye
> on it in the coming days and let you know if
On Tue, Oct 25, 2022 at 11:03:34AM -0700, Matt Atwood wrote:
> Wa_18018764978 applies to specific steppings of DG2 (G11 C0+,
I believe you mean "G10 C0+"?
> G11 and G12 A0+).
>
> Bspec: 66622
>
> Signed-off-by: Matt Atwood
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++
>
On Thu, Oct 27, 2022 at 9:59 AM Ville Syrjälä
wrote:
>
> On Thu, Oct 27, 2022 at 09:37:52AM -0600, jim.cro...@gmail.com wrote:
> > On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
> > >
> > >
> > >
> > > On 10/21/22 05:18, Jani Nikula wrote:
> > > > On Thu, 20 Oct 2022, Ville Syrjälä
> > > >
Hi Nathan,
pushed in drm-intel-gt-next.
Thanks!
Andi
On Thu, Oct 13, 2022 at 01:59:10PM -0700, Nathan Chancellor wrote:
> When booting with CONFIG_CFI_CLANG, there are numerous violations when
> accessing the files under
> /sys/devices/pci:00/:00:02.0/drm/card0/gt/gt0:
>
> $ cd
On Thu, 27 Oct 2022 10:16:47 -0700, Nick Desaulniers wrote:
>
Hi Nick,
> Thanks, I can repro now.
>
> I haven't detangled the macro soup, but I noticed:
>
> 1. FIELD_PREP is defined in include/linux/bitfield.h which has the
> following comment:
> 18 * Mask must be a compilation time constant.
On Tue, Oct 25, 2022 at 5:18 PM Andi Shyti wrote:
>
> Hi Ashutosh,
>
> > But I'd wait to hear from clang/llvm folks first.
>
> Yeah! Looking forward to getting some ideas :)
Gwan-gyeong, which tree and set of configs are necessary to reproduce
the observed warning?
Warnings are treated as
On Thu, Sep 29, 2022 at 05:56:36AM +, Gupta, Anshuman wrote:
>
> Quoting Tilak.
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Wednesday, September 28, 2022 8:00 PM
> > To: Nikula, Jani ; Gupta, Anshuman
> > ; Tangudu, Tilak
> > Cc: Wilson, Chris P ; Gupta, saurabhg
> > ;
On Tue, Oct 25, 2022 at 11:03:35AM -0700, Matt Atwood wrote:
> Wa_18019271663 applies to all DG2 steppings and skus.
>
> Bspec:45809
Could we also add the reference to the BSpec containing the WA description?
>
> Signed-off-by: Matt Atwood
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h
On Thu, Oct 27, 2022 at 03:08:41PM +, Patchwork wrote:
Patch Details
Series: Add DG2 OA support (rev11)
URL: [1]https://patchwork.freedesktop.org/series/107584/
State: failure
Details:
[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107584v11/index.html
CI Bug Log -
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Do both crawl and squash
when changing cdclk (rev2)
URL : https://patchwork.freedesktop.org/series/110199/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12311 -> Patchwork_110199v2
== Series Details ==
Series: drm/i915/hwmon: Fix a build error used with clang compiler (rev2)
URL : https://patchwork.freedesktop.org/series/110094/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/110094/revisions/2/mbox/ not
applied
Applying:
Thanks Umesh,
Is it looking good to land?
Looking forward to have this in Mesa upstream.
-Lionel
On 27/10/2022 01:20, Umesh Nerlige Ramappa wrote:
Add OA format support for DG2 and various fixes for DG2.
This series has 2 uapi changes listed below:
1) drm/i915/perf: Add OAG and OAR formats
On Thu, Oct 27, 2022 at 12:34:06PM -0700, Umesh Nerlige Ramappa wrote:
On Thu, Oct 27, 2022 at 03:08:41PM +, Patchwork wrote:
Patch Details
Series: Add DG2 OA support (rev11)
URL: [1]https://patchwork.freedesktop.org/series/107584/
State: failure
Details:
On Thu, Oct 27, 2022 at 03:15:54PM -0700, Daniele Ceraolo Spurio wrote:
> There is no userspace user for this CS yet, we only need it for internal
> kernel ops (e.g. HuC, PXP), so don't expose it.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Matt Roper
Since we never expose it to userspace,
== Series Details ==
Series: drm/i915/psr: Send update also on invalidate (rev2)
URL : https://patchwork.freedesktop.org/series/110037/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12311 -> Patchwork_110037v2
Summary
Am 27.10.22 um 11:12 schrieb Somalapuram Amaranath:
Change ttm_resource structure from num_pages to size_t size in bytes.
v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
v1 -> v2: change bo->resource->size to bo->base.size at some places
v1 -> v2: remove the local variable
v1 -> v2:
On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
> The *only* behavior which actually is new in 6.1 is the native GPU
> drivers now doing the equivalent of:
>
> if (acpi_video_get_backlight_type() != acpi_backlight_native)
> return;
>
> In their backlight
drm-misc-fixes-2022-10-27:
drm-misc-fixes for v6.1-rc3:
- Fix HPD on bridge/ps8640.
- Stop leaking fences when killing a sched entity.
- Avoid uninitialized read in aperture_remove_conflicting_pci_device()
The following changes since commit 247f34f7b80357943234f93f247a1ae6b6c3a740:
Linux
== Series Details ==
Series: drm/i915: prepare for uC loading on MTL (rev5)
URL : https://patchwork.freedesktop.org/series/108925/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12302_full -> Patchwork_108925v5_full
Summary
Hi,
On 10/27/22 11:52, Matthew Garrett wrote:
> On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
>
>> The *only* behavior which actually is new in 6.1 is the native GPU
>> drivers now doing the equivalent of:
>>
>> if (acpi_video_get_backlight_type() != acpi_backlight_native)
Hi Karolina,
On Tue, Oct 25, 2022 at 11:19:03AM +0200, Karolina Drobnik wrote:
> We know that as long as GEM context create ioctl succeeds, a context was
> created. There is no need to write about it, especially when such a message
> heavily pollutes dmesg and makes debugging actual errors
Hi,
Here's this week drm-misc-next PR
Maxime
drm-misc-next-2022-10-27:
drm-misc-next for 6.2:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
- connector: Send hotplug event on cleanup
- edid: logging/debug improvements
- plane_helper: Improve tests
Driver Changes:
- bridge:
-
On Thu, Oct 27, 2022 at 01:58:09PM +0800, Chen Yu wrote:
> > It's a very narrow race between schedule() and task_call_func().
> >
> > CPU0 CPU1
> >
> > __schedule()
> > rq_lock();
> > prev_state = READ_ONCE(prev->__state);
> > if (...
> -Original Message-
> From: Deak, Imre
> Sent: Wednesday, October 26, 2022 5:27 PM
> To: Kahola, Mika
> Cc: intel-gfx@lists.freedesktop.org; Srivatsa, Anusha
> ; Roper, Matthew D
> ; Souza, Jose
> Subject: Re: [PATCH 20/20] drm/i915/mtl: Pin assignment for TypeC
>
> On Fri, Oct 14,
Hi Dave, Daniel,
Three fixes for the next release candidate: one display training fix, one
new workaround and disabling of autosuspend for DG2 until things can get
properly fixed.
Regards,
Tvrtko
drm-intel-fixes-2022-10-27-1:
- Extend Wa_1607297627 to Alderlake-P (José Roberto de Souza)
- Keep
Hi,
On 10/26/22 22:49, Matthew Garrett wrote:
> On Wed, Oct 26, 2022 at 11:59:28AM +0200, Hans de Goede wrote:
>
>> Ok, so this is a local customization to what is already a custom BIOS
>> for a custom motherboard. There is a lot of custom in that sentence and
>> TBH at some point things might
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