== Series Details ==
Series: Add OAM support for MTL
URL : https://patchwork.freedesktop.org/series/115570/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12907_full -> Patchwork_115570v1_full
Summary
---
**SUCCESS**
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 16, 2023 3:17 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 06/14] drm/i915/tc: Factor out helpers converting
> HPD mask to TC mode
>
> Factor out helpers used later in the
> -Original Message-
> From: Deak, Imre
> Sent: Tuesday, March 21, 2023 4:00 PM
> To: Kahola, Mika
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 02/14] drm/i915/tc: Fix TC port link ref init
> for DP
> MST during HW readout
>
> On Tue, Mar 21, 2023 at
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 16, 2023 3:17 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 05/14] drm/i915/tc: Wait for IOM/FW PHY
> initialization of legacy TC ports
>
> During boot-up/system resume, the
On Thu, 23 Mar 2023, "Ceraolo Spurio, Daniele"
wrote:
> On 3/23/2023 11:41 AM, Alan Previn wrote:
>> MESA driver is creating protected context on every driver handle
>> creation to query caps bits for app. So when running CI tests,
>> they are observing hundreds of drm_errors when enabling PXP
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename
> tc_phy_status_complete() to tc_phy_is_ready()
>
> For consistency rename
> From: Alex Williamson
> Sent: Wednesday, March 22, 2023 5:01 AM
>
> On Tue, 21 Mar 2023 17:50:08 -0300
> Jason Gunthorpe wrote:
>
> >
> > Though it would be nice if qemu didn't need two implementations so Yi
> > I'd rather see a new info in this series as well and qemu can just
> >
On Thu, Mar 23, 2023 at 12:46:27PM +0200, Jani Nikula wrote:
>
> Hi Dave & Daniel -
>
> Otherwise a fairly regular fixes pull, except for two things:
>
> First, I have not gotten CI results on this. I don't know what gives.
>
> Second, I missed adding the hwmon revert to the tag. I
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP
> TC
> PHY functions
>
> Use the usual adlp prefix for all ADLP
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: limit double GT reset to pre-MTL
URL : https://patchwork.freedesktop.org/series/115572/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12907_full -> Patchwork_115572v1_full
== Series Details ==
Series: cover-letter: Add vfio_device cdev for iommufd support (rev2)
URL : https://patchwork.freedesktop.org/series/114850/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/114850/revisions/2/mbox/ not
applied
Applying: vfio:
Hello John Harrison,
The patch 9bbba0667f37: "drm/i915/guc: Use GuC submission API version
number" from Nov 29, 2022, leads to the following Smatch static
checker warning:
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:821 intel_uc_fw_fetch()
warn: passing zero to 'ERR_PTR'
On Thu, Mar 23, 2023 at 09:24:01AM +0100, Thomas Zimmermann wrote:
> Hi Dave and Daniel,
>
> here's the weekly PR for drm-misc-fixes.
>
> Best regards
> Thomas
>
> drm-misc-fixes-2023-03-23:
> Short summary of fixes pull:
>
> * fixes for bind and probing error handling
> * panel-orientation
> From: Jason Gunthorpe
> Sent: Thursday, March 23, 2023 8:02 PM
>
> On Thu, Mar 23, 2023 at 03:15:20AM +, Liu, Yi L wrote:
> > > From: Jason Gunthorpe
> > > Sent: Wednesday, March 22, 2023 9:43 PM
> > >
> > > On Wed, Mar 22, 2023 at 01:33:09PM +, Liu, Yi L wrote:
> > >
> > > > Thanks.
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, March 23, 2023 4:33 PM
> To: Deak, Imre ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY
> setup/query functions per platform
>
> On Thu, 23 Mar
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all
> TC
> PHY functions
>
> For consistency use the tc_phy prefix
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new
> intel_tc_port struct
>
> Move the TC port specific fields from
ack
On 2023-03-20 09:59, Jani Nikula wrote:
Thomas, Maxime, Maarten, ack for merging this one via drm-intel?
BR,
Jani.
On Thu, 09 Mar 2023, Suraj Kandpal wrote:
From: Ankit Nautiyal
Add helper to check if the DP sink supports DSC with the given
o/p format.
v2: Add documentation for the
On 3/15/2023 8:59 PM, Ashutosh Dixit wrote:
On dGfx, the PL1 power limit being enabled and set to a low value results
in a low GPU operating freq. It also negates the freq raise operation which
is done before GuC firmware load. As a result GuC firmware load can time
out. Such timeouts were
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY
> connect/disconnect handlers
>
> Add generic handlers to connect/disconnect
Earlier merge dropped an if block when applying the patch -
"drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the
if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL
A step" to disable C6 on media for A0 stepping.
Fixes: 3735040978a4 ("drm/i915/mtl:
== Series Details ==
Series: drm/i915: Implement UHBR bandwidth check (rev3)
URL : https://patchwork.freedesktop.org/series/112806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12910 -> Patchwork_112806v3
Summary
---
On Thu, Mar 16, 2023 at 01:13:17PM +0200, Mika Kahola wrote:
> From: Radhakrishna Sripada
>
> XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
> has a dedicated PIPE 5.2 Message bus for configuration. This message
> bus is used to configure the phy internal registers.
>
>
According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.
v2: - s/pipe_config/crtc_state/ (Jani Nikula)
- Merged previous patch into that one, to remove empty function(Jani Nikula)
v3: - Make that constraint check to be DSC-related only
-
== Series Details ==
Series: drm/i915/overlay: Remove redundant drm_rect_visible() use
URL : https://patchwork.freedesktop.org/series/115605/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12910 -> Patchwork_115605v1
The drm_rect_intersect() already returns if the intersection is visible
or not, so the use of drm_rect_visible() is duplicate.
Signed-off-by: Arthur Grillo
---
drivers/gpu/drm/i915/display/intel_overlay.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
== Series Details ==
Series: drm/i915: Implement UHBR bandwidth check (rev3)
URL : https://patchwork.freedesktop.org/series/112806/
State : warning
== Summary ==
Error: dim checkpatch failed
5b3a41314c80 drm/i915: Implement UHBR bandwidth check
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out
> tc_phy_verify_legacy_or_dp_alt_mode()
>
> Factor out a function verifying the PHY
Use the xe_guc_pc test for i915 as well. Validate basic
api for GT freq control. Also test interaction with GT
reset. We skip rps tests with SLPC enabled, this will
re-introduce some coverage. SLPC selftests are already
covering some other workload related scenarios.
Signed-off-by: Rodrigo Vivi
These can be used to open per-gt debugfs files.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Vinay Belgaumkar
---
lib/igt_debugfs.c | 60 +++
lib/igt_debugfs.h | 4
2 files changed, 64 insertions(+)
diff --git a/lib/igt_debugfs.c
Borrow some subtests from xe_guc_pc. Also add per GT debugfs helpers.
Signed-off-by: Vinay Belgaumkar
Vinay Belgaumkar (2):
lib/debugfs: Add per GT debugfs helpers
i915_guc_pc: Add some basic SLPC igt tests
lib/igt_debugfs.c| 60
lib/igt_debugfs.h| 4 ++
== Series Details ==
Series: drm/i915/mtl: Disable C6 on MTL A0 for media
URL : https://patchwork.freedesktop.org/series/115610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12911 -> Patchwork_115610v1
Summary
---
From: Sean Paul
Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
---
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
From: Sean Paul
Add the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
Cc: Rob Herring
Cc: Stephen Boyd
Reviewed-by: Rob Herring
From: Sean Paul
Add HDCP 1.x support to msm DP bridges using the new HDCP
helpers.
Cc: Stephen Boyd
Reviewed-by: Stephen Boyd
Signed-off-by: Sean Paul
Signed-off-by: Mark Yacoub
---
Changes in v2:
-Squash [1] into this patch with the following changes (Stephen)
-Update the sc7180 dtsi
From: Sean Paul
Add the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller.
Signed-off-by: Sean Paul
Signed-off-by: Mark Yacoub
---
Changes in v3:
-Split off into a new patch containing just the dts
On Thu, Mar 16, 2023 at 01:13:21PM +0200, Mika Kahola wrote:
> C20 phy PLL programming sequence for DP, DP2.0, HDMI2.x non-FRL and
> HDMI2.x FRL. This enables C20 MPLLA and MPLLB programming sequence. add
> 4 lane support for c20.
>
> v2: Rename intel_c20_write() to intel_c20_sram_write()
From: Sean Paul
Now that all of the HDCP 1.x logic has been migrated to the central HDCP
helpers, use it in the i915 driver.
The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
however there are a few helper hooks which are connector-specific and
need to be partially or
From: Sean Paul
The shim functions return error codes, but they are discarded in
intel_hdcp.c. This patch plumbs the return codes through so they are
properly handled.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
Signed-off-by: Mark Yacoub
---
Changes in v2:
From: Sean Paul
Expand upon the HDCP helper library to manage HDCP enable, disable, and check.
Previous to this patch, the majority of the state management and sink
interaction is tucked inside the Intel driver with the understanding
that once a new platform supported HDCP we could make good
From: Sean Paul
Move the hdcp atomic check from i915 to drm_hdcp so other
drivers can use it. No functional changes, just cleaned up some of the
code when moving it over.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Sean Paul
Signed-off-by:
From: Sean Paul
Update the connector's property value in 2 cases which were
previously missed:
1- Content type changes. The value should revert back to DESIRED from
ENABLED in case the driver must re-authenticate the link due to the
new content type.
2- Userspace sets value to DESIRED
From: Sean Paul
Instead of forcing a modeset in the hdcp atomic check, rename to
drm_hdcp_has_changed and return true if the content protection value
is changing and let the driver decide whether a modeset is required or not.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean
On Fri, 24 Mar 2023 11:15:02 -0700, Belgaumkar, Vinay wrote:
>
Hi Vinay,
Thanks for the review. Comments inline below.
> On 3/15/2023 8:59 PM, Ashutosh Dixit wrote:
> > On dGfx, the PL1 power limit being enabled and set to a low value results
> > in a low GPU operating freq. It also negates the
On 3/24/2023 4:31 PM, Dixit, Ashutosh wrote:
On Fri, 24 Mar 2023 11:15:02 -0700, Belgaumkar, Vinay wrote:
Hi Vinay,
Thanks for the review. Comments inline below.
Sorry about asking the same questions all over again :) Didn't look at
previous versions.
On 3/15/2023 8:59 PM, Ashutosh Dixit
On Tue, Mar 14, 2023 at 1:54 AM Kandpal, Suraj wrote:
>
> >
> > From: Sean Paul
> >
> > Now that all of the HDCP 1.x logic has been migrated to the central HDCP
> > helpers, use it in the i915 driver.
> >
> > The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
> > however
On Thu, Feb 23, 2023 at 06:47:27AM -0300, Kahola, Mika wrote:
> > -Original Message-
> > From: Sousa, Gustavo
> > Sent: Tuesday, February 7, 2023 6:54 PM
> > To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> > Cc: Nikula, Jani
> > Subject: Re: [Intel-gfx] [PATCH v2 09/21]
On Fri, 24 Mar 2023 at 21:21, Mark Yacoub wrote:
>
> From: Sean Paul
>
> Move the hdcp atomic check from i915 to drm_hdcp so other
> drivers can use it. No functional changes, just cleaned up some of the
> code when moving it over.
>
> Acked-by: Jani Nikula
> Reviewed-by: Rodrigo Vivi
>
Earlier merge dropped an if block when applying the patch -
"drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the
if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL
A step" to disable C6 on media for A0 stepping.
Fixes: 3735040978a4 ("drm/i915/mtl:
On 3/12/2023 12:56, Alexandre Oliva wrote:
If two or more suitable entries with the same filename are found in
__uc_fw_auto_select's fw_blobs, and that filename fails to load in the
first attempt and in the retry, when __uc_fw_auto_select is called for
the third time, the coincidence of strings
On Thu, Mar 23, 2023 at 3:18 AM Kandpal, Suraj wrote:
>
>
>
> > -Original Message-
> > From: Kandpal, Suraj
> > Sent: Friday, March 10, 2023 1:55 PM
> > To: Mark Yacoub ; quic_khs...@quicinc.com;
> > linux-arm-...@vger.kernel.org; dri-de...@lists.freedesktop.org;
> >
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev7)
URL : https://patchwork.freedesktop.org/series/94712/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/94712/revisions/7/mbox/ not
applied
Applying: drm/hdcp:
On Fri, Mar 24, 2023 at 11:25:33AM -0300, Arthur Grillo wrote:
> The drm_rect_intersect() already returns if the intersection is visible
> or not, so the use of drm_rect_visible() is duplicate.
>
> Signed-off-by: Arthur Grillo
> ---
> drivers/gpu/drm/i915/display/intel_overlay.c | 3 +--
> 1
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Restore dsparb_lock. (rev4)
URL : https://patchwork.freedesktop.org/series/114868/
State : warning
== Summary ==
Error: dim checkpatch failed
4a0ced9e598f drm/i915/display: Restore dsparb_lock.
6ac1060f9408
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Restore dsparb_lock. (rev4)
URL : https://patchwork.freedesktop.org/series/114868/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Fri, Mar 24, 2023 at 06:43:19PM +, Patchwork wrote:
Patch Details
Series: drm/i915/mtl: Disable C6 on MTL A0 for media
URL: [1]https://patchwork.freedesktop.org/series/115610/
State: failure
Details:
[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115610v1/index.html
== Series Details ==
Series: drm/i915/mtl: Disable C6 on MTL A0 for media (rev3)
URL : https://patchwork.freedesktop.org/series/115610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12913 -> Patchwork_115610v3
Summary
== Series Details ==
Series: drm/i915: Implement UHBR bandwidth check (rev3)
URL : https://patchwork.freedesktop.org/series/112806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12910_full -> Patchwork_112806v3_full
On 3/24/2023 11:02 AM, Umesh Nerlige Ramappa wrote:
Earlier merge dropped an if block when applying the patch -
"drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the
if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL
A step" to disable C6 on media for A0
From: Sean Paul
Now that all of the HDCP 1.x logic has been migrated to the central HDCP
helpers, use it in the i915 driver.
The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
however there are a few helper hooks which are connector-specific and
need to be partially or
From: Sean Paul
Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
---
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
From: Sean Paul
The shim functions return error codes, but they are discarded in
intel_hdcp.c. This patch plumbs the return codes through so they are
properly handled.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
Signed-off-by: Mark Yacoub
---
Changes in v2:
On Thu, Mar 23, 2023 at 12:08:57PM +0100, Maarten Lankhorst wrote:
> Hi Dave, Daniel,
>
> Lots of small commits with cleanup and fixes this time around, nothing major
> otherwise.
>
> Cheers,
> ~Maarten
>
> drm-misc-next-2023-03-23:
> drm-misc-next for v6.4-rc1:
>
> Core Changes:
> - Add unit
From: Sean Paul
Instead of forcing a modeset in the hdcp atomic check, rename to
drm_hdcp_has_changed and return true if the content protection value
is changing and let the driver decide whether a modeset is required or not.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean
From: Sean Paul
Move the hdcp atomic check from i915 to drm_hdcp so other
drivers can use it. No functional changes, just cleaned up some of the
code when moving it over.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Sean Paul
Signed-off-by:
On Thu, Mar 23, 2023 at 04:43:22PM -0400, Rodrigo Vivi wrote:
> Hi Daniel,
>
> Here goes drm-intel-next-2023-03-23:
>
> Core Changes:
> - drm: Add SDP Error Detection Configuration Register (Arun)
>
> Driver Changes:
> - Meteor Lake enabling and fixes (RK, Jose, Madhumitha)
> - Lock the fbdev
== Series Details ==
Series: drm/i915/overlay: Remove redundant drm_rect_visible() use
URL : https://patchwork.freedesktop.org/series/115605/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12910_full -> Patchwork_115605v1_full
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Restore dsparb_lock. (rev4)
URL : https://patchwork.freedesktop.org/series/114868/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12911 -> Patchwork_114868v4
From: Mark Yacoub
Hi all,
This is v7 of the HDCP patches. The patches are authored by Sean Paul.
I rebased and addressed the review comments in v6-v7.
Patches 1-4 focus on moving the common HDCP helpers to common DRM.
This introduces a slight change in the original intel flow
as it splits the
On Thu, Mar 16, 2023 at 01:13:22PM +0200, Mika Kahola wrote:
> Create a table for C20 DP1.4, DP2.0 and HDMI2.1 rates.
> The PLL settings are based on table, not for algorithmic alternative.
> For DP 1.4 only MPLLB is in use.
>
> Once register settings are done, we read back C20 HW state.
>
>
== Series Details ==
Series: drm/i915/mtl: Disable C6 on MTL A0 for media (rev2)
URL : https://patchwork.freedesktop.org/series/115610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12912 -> Patchwork_115610v2
Summary
When min/max are both at RPn, restoring min back to 300
will not work. Max needs to be increased first. Also, add
igt_assert() here, which would have caught the issue.
Cc: Rodrigo Vivi
Signed-off-by: Vinay Belgaumkar
---
tests/xe/xe_guc_pc.c | 4 ++--
1 file changed, 2 insertions(+), 2
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Restore dsparb_lock. (rev4)
URL : https://patchwork.freedesktop.org/series/114868/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12911_full -> Patchwork_114868v4_full
== Series Details ==
Series: drm/i915/mtl: Disable C6 on MTL A0 for media (rev3)
URL : https://patchwork.freedesktop.org/series/115610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12913_full -> Patchwork_115610v3_full
Hello, Tvrtko.
On Tue, Mar 14, 2023 at 02:18:54PM +, Tvrtko Ursulin wrote:
> DRM scheduling soft limits
> ~~
>
> Because of the heterogenous hardware and driver DRM capabilities, soft limits
> are implemented as a loose co-operative (bi-directional) interface between
Thanks Daniele, Thanks Jani.
...alan
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in
> intel_tc_port_fia_max_lane_count()
>
> Check explicitly if the
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct
> declaration to intel_tc.c
>
> Move the intel_tc_port struct to
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the
> PHY ready/owned state
>
> Add TC PHY hooks to get the PHY
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY
> HPD live status
>
> Add a table of TC PHY hooks which can be
On Fri, Mar 24, 2023 at 09:09:59AM +, Tian, Kevin wrote:
> > From: Alex Williamson
> > Sent: Wednesday, March 22, 2023 5:01 AM
> >
> > On Tue, 21 Mar 2023 17:50:08 -0300
> > Jason Gunthorpe wrote:
> >
> > >
> > > Though it would be nice if qemu didn't need two implementations so Yi
> > >
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out
> the
> PHY HW state
>
> Add a TC PHY hook to read out the PHY HW
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