== Summary ==
Built on 06d0112e293dfdea7f796d4085f755898850947b drm-intel-nightly:
2016y-01m-12d-21h-16m-40s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (bdw-nuci7)
dmesg-warn -> PASS (bdw-ultra)
Te
On 01/13/2016 11:00 AM, C. B. wrote:
On 12 January 2016 at 08:59, Shobhit Kumar wrote:
Not sending yet to pwm mailing list as this is all untested. C.B. please
test the patches and see if they work at all for you. For testing Please
enable -
CONFIG_PWM_LPSS=y
CONFIG_PWM_LPSS_PLATFORM=y
I ap
On 12 January 2016 at 08:59, Shobhit Kumar wrote:
> Not sending yet to pwm mailing list as this is all untested. C.B. please
> test the patches and see if they work at all for you. For testing Please
> enable -
>
> CONFIG_PWM_LPSS=y
> CONFIG_PWM_LPSS_PLATFORM=y
I applied these patches to 4.4-rc8
> From: Gordon, David S
> Sent: Tuesday, January 12, 2016 9:49 PM
>
> On 12/01/2016 11:43, John Harrison wrote:
> > On 12/01/2016 04:37, Tian, Kevin wrote:
> >>> From: john.c.harri...@intel.com
> >>> Sent: Tuesday, January 12, 2016 2:42 AM
> >>>
> >>> From: John Harrison
> >>>
> >>> Implemented a
From: Abhay Kumar
Make resume/on codepath not to wait for panel_power_cycle_delay(t11_t12)
if this time is already spent in suspend/poweron time.
v2: Use CLOCK_BOOTTIME and remove jiffies for panel power cycle
delay calculation(Ville).
v3: Addressed below comments
1. Tracking time from
On Tue, Jan 12, 2016 at 04:45:02PM +, Dave Gordon wrote:
> On 12/01/16 13:11, Chris Wilson wrote:
> >On Tue, Jan 12, 2016 at 12:54:25PM +, Tvrtko Ursulin wrote:
> >>
> >>On 12/01/16 12:12, Chris Wilson wrote:
> >>>On Tue, Jan 12, 2016 at 11:56:11AM +, Tvrtko Ursulin wrote:
> From: T
On Tue, Jan 12, 2016 at 11:40:06PM +, Chris Wilson wrote:
> struct drm_i915_gem_object_ops {
> + const unsigned int flags;
Bleh, const is redundant as the definitions should be const themselves.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
commit 033908aed5a596f6202c848c6bbc8a40fb1a8490
Author: Dave Gordon
Date: Thu Dec 10 18:51:23 2015 +
drm/i915: mark GEM object pages dirty when mapped & written by the CPU
introduced a check into i915_gem_object_get_dirty_pages() that returned
a NULL pointer when called with a bad obje
From: Alex Dai
During driver unloading, the guc_client created for command submission
needs to be released to avoid memory leak.
The struct_mutex needs to be held before tearing down GuC.
v1: Move i915_guc_submission_disable out of i915_guc_submission_fini and
take struct_mutex lock before
On 01/12/2016 04:11 AM, Dave Gordon wrote:
On 06/01/16 20:53, yu@intel.com wrote:
> From: Alex Dai
>
> During driver unloading, the guc_client created for command submission
> needs to be released to avoid memory leak.
>
> Signed-off-by: Alex Dai
> ---
> drivers/gpu/drm/i915/i915_guc_su
On Tue, Jan 12, 2016 at 03:07:03PM +0100, Daniel Vetter wrote:
> On Tue, Jan 12, 2016 at 11:19:26AM +, John Harrison wrote:
> > On 11/01/2016 22:16, Chris Wilson wrote:
> > >On Mon, Jan 11, 2016 at 06:42:39PM +, john.c.harri...@intel.com wrote:
> > >>From: John Harrison
> > >>
> > >>MMIO f
On Tue, Jan 12, 2016 at 05:32:34PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Majority of them was duplicated code and only render ring
> currently overrides some of them. We can save some lines of
> code and also take away the confusion on why bsd2 did not
> do the seqno coherency w
On 11/01/16 09:17, Chris Wilson wrote:
Rather than recomputing whether semaphores are enabled, we can do that
computation once during early initialisation as the i915.semaphores
module parameter is now read-only.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
From: Ville Syrjälä
I find more usual to think about tile widths than heights, so changing
the intel_tile_height() to calculate the tile height as
tile_size/tile_width is easier than the opposite to the poor brain.
v2: Reorder arguments for consistency
Constify dev_priv arguments
Signed-off
From: Ville Syrjälä
Since intel_gen4_compute_page_offset() can now handle tiling formats
all the way down to gen2, rename it to intel_compute_tile_offset().
Not that we actually use it on gen2/3 since there's no DSPSURF etc.
registers which would take a page aligned address.
v2: s/page/tile/ (Da
From: Ville Syrjälä
Make intel_gen4_compute_page_offset() ready for other tiling formats
besied X-tile by getting the tile dimensions through
intel_tile_{size,width,height}().
Signed-off-by: Ville Syrjälä
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 15 ++-
From: Ville Syrjälä
Pull the code to determine the surface alignment for both linear and
tiled surfaces into a separate function intel_surf_alignment(). This
will be used not only for the vma alignment but actually aligning
the plane SURF once SKL+ starts using intel_compute_page_offset()
(since
From: Ville Syrjälä
Here's a repost of some already reviewed patches from my larger fb
offsets[] series [1] from last year, for the sake of the CI system.
[1] http://lists.freedesktop.org/archives/intel-gfx/2015-October/078050.html
Ville Syrjälä (7):
drm/i915: Pass modifier instead of tiling
From: Ville Syrjälä
Use the actual tile size as to compute stuff in
intel_fill_fb_ggtt_view() instead of assuming it's PAGE_SIZE. I suppose
it doesn't matter since we don't use the results on gen2 platforms
where the tile size is 2k.
v2: Update due to CbCr plane
Signed-off-by: Ville Syrjälä
Re
From: Ville Syrjälä
In preparation for handling more than X tiling, pass the fb modifier to
gen4_compute_page_offset() instead of the obj->tiling_mode.
Signed-off-by: Ville Syrjälä
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 12 ++--
drivers/gpu/drm/i915/inte
From: Ville Syrjälä
Pull the tile width calculations from intel_fb_stride_alignment() into a
new function intel_tile_width().
Also take the opportunity to pass aroun dev_priv instead of dev to
intel_fb_stride_alignment().
v2: Reorder argumnents to be more consistent with other functions
Cha
On 11/01/16 09:16, Chris Wilson wrote:
As we add the VMA to the request early, it may be cancelled during
execbuf reservation. This will leave the context object pointing to a
dangling request; i915_wait_request() simply skips the wait and so we
may unbind the object whilst it is still active.
== Summary ==
Built on 9a47f23e3744929b9b222cb750994723fff0e5ee drm-intel-nightly:
2016y-01m-12d-16h-55m-40s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (skl-i5k-2) UNSTABLE
pass -> DMESG-WARN (bdw-
On Tue, Dec 01, 2015 at 05:43:33PM +0200, Jani Nikula wrote:
> On Tue, 01 Dec 2015, Ville Syrjälä wrote:
> > On Tue, Dec 01, 2015 at 02:47:41PM +0200, Jani Nikula wrote:
> >> On Mon, 30 Nov 2015, ville.syrj...@linux.intel.com wrote:
> >> > From: Ville Syrjälä
> >> >
> >> > Generalize rawclk handl
On 11/01/16 09:16, Chris Wilson wrote:
Currently there is a #define to enable extra BUG_ON for debugging
requests and associated activities. I want to expand its use to cover
all of GEM internals (so that we can saturate the code with asserts).
We can add a Kconfig option to make it easier to ena
On Tue, Jan 12, 2016 at 11:06:17AM +, Graham Whaley wrote:
> On Tue, 2016-01-12 at 09:34 +0100, Daniel Vetter wrote:
> > On Mon, Jan 11, 2016 at 06:12:12PM -0700, Jonathan Corbet wrote:
> > > On Sat, 12 Dec 2015 12:13:45 +0100
> > > Daniel Vetter wrote:
> > >
> > > > I just figured there's no
On 12/01/16 17:12, Chris Wilson wrote:
On Tue, Jan 12, 2016 at 04:04:06PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
One bugfix and a few tidy-ups:
* Pipe fault logging was broken on Gen9+.
* Removed some unnecessary local variables.
* Removed unnecessary initializers.
* Decre
From: Tvrtko Ursulin
Identically to vfuncs interrupt mask initialization can also be
compacted for more readable code.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 33 +
1 file changed, 13 insertions(+), 20 deletions(-)
diff --git a/driv
From: Tvrtko Ursulin
Majority of them was duplicated code and only render ring
currently overrides some of them. We can save some lines of
code and also take away the confusion on why bsd2 did not
do the seqno coherency workaround. (VCS2 ring does not exist
on platforms where workaround is needed
From: Tvrtko Ursulin
Chris Wilson noticed the "bds2" typo.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4a6ba0a4
On Tue, 12 Jan 2016, Daniel Stone wrote:
> On 12 January 2016 at 17:18, Jani Nikula wrote:
>> On Tue, 12 Jan 2016, Daniel Stone wrote:
>>> On 12 January 2016 at 15:59, Yetunde Adebisi
>>> wrote:
+ memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
>>>
>>> gcc should'
On 11/01/16 09:17, Chris Wilson wrote:
Both perform the same actions with more or less indirection, so just
unify the code.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c| 2 +-
drivers/gpu/drm/i915/i915_gem_context.c| 8 +-
drivers/gpu/drm/i915/i915_gem
On 12 January 2016 at 17:18, Jani Nikula wrote:
> On Tue, 12 Jan 2016, Daniel Stone wrote:
>> On 12 January 2016 at 15:59, Yetunde Adebisi
>> wrote:
>>> + memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
>>
>> gcc should've warned you about this; you're memsetting too sm
Hi Shobhit,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.4 next-20160112]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Shobhit-Kumar/LPSS-PWM-support-for
On Tue, 12 Jan 2016, Daniel Stone wrote:
> On 12 January 2016 at 15:59, Yetunde Adebisi
> wrote:
>> + memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
>
> gcc should've warned you about this; you're memsetting too small a size.
Really? I think it's fine.
BR,
Jani.
--
On Tue, Jan 12, 2016 at 03:52:36PM +, Dave Gordon wrote:
> On 11/01/16 15:04, Tvrtko Ursulin wrote:
> >
> >On 11/01/16 14:36, Chris Wilson wrote:
> >>On Mon, Jan 11, 2016 at 02:08:40PM +, Tvrtko Ursulin wrote:
> >>>From: Tvrtko Ursulin
> >>>
> >>>No need to call ktime_get_raw_ns twice per
On Tue, Jan 12, 2016 at 04:04:07PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Tidy quite long interrupt service routine by factoring out
> the display part.
>
> This simplifies the exit path a little bit, makes the code
> a bit more readable, and potentialy makes code reuse in the
>
On Tue, Jan 12, 2016 at 04:04:06PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> One bugfix and a few tidy-ups:
>
> * Pipe fault logging was broken on Gen9+.
> * Removed some unnecessary local variables.
> * Removed unnecessary initializers.
> * Decreased pipe iir block indentation
On 11/01/16 09:17, Chris Wilson wrote:
If is simpler and leads to more readable code through the callstack if
the allocation returns the allocated struct through the return value.
The importance of this is that it no longer looks like we accidentally
allocate requests as side-effect of calling c
On 01/12/2016 05:21 AM, Ville Syrjälä wrote:
On Mon, Jan 11, 2016 at 01:52:17PM -0800, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
Add reboot notifier for all platforms. This guarantees T12 delay
compliance during reboot cycles when pre-os enables the panel within
500ms.
Signed-off-b
On Tue, Jan 12, 2016 at 05:11:00PM +0100, Daniel Vetter wrote:
> On Tue, Jan 12, 2016 at 05:59:46PM +0200, Imre Deak wrote:
> > On ti, 2016-01-12 at 16:35 +0100, Daniel Vetter wrote:
> > > On Tue, Jan 12, 2016 at 02:21:51PM +, John Harrison wrote:
> > > > On 12/01/2016 14:04, Daniel Vetter wrot
On Tue, Jan 12, 2016 at 04:55:24PM +0100, Daniel Vetter wrote:
> On Tue, Jan 12, 2016 at 05:28:16PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > commit 10afa0b65fe2 ("drm/i915: Reject >9 ddi translation entried if port
> > != A/E on SKL")
> > added sanity checks to
Op 12-01-16 om 17:19 schreef Daniel Vetter:
> On Mon, Jan 11, 2016 at 09:51:38AM +, Tvrtko Ursulin wrote:
>> On 11/01/16 08:43, Daniel Vetter wrote:
>>> On Fri, Jan 08, 2016 at 01:29:14PM +, Tvrtko Ursulin wrote:
On 08/01/16 11:29, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
On Mon, Jan 11, 2016 at 11:53:53AM -, Patchwork wrote:
> == Summary ==
>
> Built on ff88655b3a5467bbc3be8c67d3e05ebf182557d3 drm-intel-nightly:
> 2016y-01m-11d-07h-30m-16s UTC integration manifest
>
> Test gem_storedw_loop:
> Subgroup basic-render:
> dmesg-warn -> PAS
== Summary ==
Built on 37f6c2ae666fbba9eff4355115252b8b0fd43050 drm-intel-nightly:
2016y-01m-12d-14h-25m-44s UTC integration manifest
Test drv_module_reload_basic:
Subgroup none:
dmesg-warn -> PASS (skl-i5k-2)
dmesg-warn -> PASS (skl-i7k-2)
Tes
On Tue, Jan 12, 2016 at 05:28:24PM +0200, Mika Kuoppala wrote:
> The most common thing on normal operation is ring tail
> pointer update. Put it first in the shadow register list for
> gen8, like we do with gen9.
With execlists it is not. Also BSD2?
Do you have the complete list of shadowed regs
On 12/01/16 13:11, Chris Wilson wrote:
On Tue, Jan 12, 2016 at 12:54:25PM +, Tvrtko Ursulin wrote:
On 12/01/16 12:12, Chris Wilson wrote:
On Tue, Jan 12, 2016 at 11:56:11AM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
LRC lifetime is well defined so we can cache the page pointing
t
On Mon, Jan 11, 2016 at 02:50:28PM +0200, Mika Kuoppala wrote:
> Patchwork writes:
>
> > == Summary ==
> >
> > Built on ff88655b3a5467bbc3be8c67d3e05ebf182557d3 drm-intel-nightly:
> > 2016y-01m-11d-07h-30m-16s UTC integration manifest
> >
> > Test gem_storedw_loop:
> > Subgroup basic-ren
On Mon, Jan 11, 2016 at 11:20:21AM -, Patchwork wrote:
> == Summary ==
>
> HEAD is now at ff88655 drm-intel-nightly: 2016y-01m-11d-07h-30m-16s UTC
> integration manifest
> Applying: drm: kerneldoc for drm_fops.c
> Repository lacks necessary blobs to fall back on 3-way merge.
> Cannot fall bac
On Mon, Jan 11, 2016 at 10:13:53AM -, Patchwork wrote:
> == Summary ==
>
> Built on ff88655b3a5467bbc3be8c67d3e05ebf182557d3 drm-intel-nightly:
> 2016y-01m-11d-07h-30m-16s UTC integration manifest
>
> Test gem_storedw_loop:
> Subgroup basic-render:
> pass -> DME
== Summary ==
Built on 37f6c2ae666fbba9eff4355115252b8b0fd43050 drm-intel-nightly:
2016y-01m-12d-14h-25m-44s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (skl-i5k-2) UNSTABLE
dmesg-warn -> PASS (bdw-
On Mon, Jan 11, 2016 at 09:51:38AM +, Tvrtko Ursulin wrote:
>
> On 11/01/16 08:43, Daniel Vetter wrote:
> > On Fri, Jan 08, 2016 at 01:29:14PM +, Tvrtko Ursulin wrote:
> >>
> >> On 08/01/16 11:29, Tvrtko Ursulin wrote:
> >>> From: Tvrtko Ursulin
> >>>
> >>> Purpose is to catch places whic
On 12 January 2016 at 15:59, Yetunde Adebisi wrote:
> + memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
gcc should've warned you about this; you're memsetting too small a size.
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gf
On Tue, Jan 12, 2016 at 05:59:46PM +0200, Imre Deak wrote:
> On ti, 2016-01-12 at 16:35 +0100, Daniel Vetter wrote:
> > On Tue, Jan 12, 2016 at 02:21:51PM +, John Harrison wrote:
> > > On 12/01/2016 14:04, Daniel Vetter wrote:
> > > > On Tue, Jan 12, 2016 at 11:50:34AM +, John Harrison wrot
On ti, 2016-01-12 at 16:35 +0100, Daniel Vetter wrote:
> On Tue, Jan 12, 2016 at 02:21:51PM +, John Harrison wrote:
> > On 12/01/2016 14:04, Daniel Vetter wrote:
> > > On Tue, Jan 12, 2016 at 11:50:34AM +, John Harrison wrote:
> > > > On 12/01/2016 11:28, Chris Wilson wrote:
> > > > > On Tu
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.
It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.
v2: Moved backlight functions from intel_
From: Tvrtko Ursulin
Tidy quite long interrupt service routine by factoring out
the display part.
This simplifies the exit path a little bit, makes the code
a bit more readable, and potentialy makes code reuse in the
future easier.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_i
This is used when reading Display Control capability Registers on the sink
device.
cc: Jani Nikula
cc: dri-de...@lists.freedesktop.org
Signed-off-by: Yetunde Adebisi
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm
From: Tvrtko Ursulin
One bugfix and a few tidy-ups:
* Pipe fault logging was broken on Gen9+.
* Removed some unnecessary local variables.
* Removed unnecessary initializers.
* Decreased pipe iir block indentation level.
* Grouped variable initialization close to use sites.
Signed-off-by: T
On Tue, Jan 12, 2016 at 04:54:27PM +0200, Ville Syrjälä wrote:
> On Mon, Dec 14, 2015 at 06:23:39PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > It's been a while since I last ran igt on gen2, so I figured I'd
> > give it a shot. 855 had some failures, 830 no longer
These patches add support for Backlight Control using DPCD registers on eDP
displays.
- Patch 1 adds macro for DPCD registers capability size to drm_dp_helper.h
A copy of this patch has also been sent to dri-devel list.
- Patch 2 Implements functionaly for DPCD Backlight Control
Yetunde Adebisi
On Tue, Jan 12, 2016 at 05:28:16PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> commit 10afa0b65fe2 ("drm/i915: Reject >9 ddi translation entried if port !=
> A/E on SKL")
> added sanity checks to make sure we don't end up with too many ddi translation
> values for eDP p
On 11/01/16 15:04, Tvrtko Ursulin wrote:
On 11/01/16 14:36, Chris Wilson wrote:
On Mon, Jan 11, 2016 at 02:08:40PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
No need to call ktime_get_raw_ns twice per unlimited wait and can
also elimate a local variable.
But we could eliminate both,
== Summary ==
Built on 37f6c2ae666fbba9eff4355115252b8b0fd43050 drm-intel-nightly:
2016y-01m-12d-14h-25m-44s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (skl-i5k-2) UNSTABLE
Test kms_flip:
Subgroup basic-flip-vs-
On 12/01/16 11:41, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
LRC code was calling GEM API like i915_gem_obj_ggtt_offset from
places where the struct_mutex cannot be grabbed (irq handlers).
To avoid that this patch caches some interesting bits and values
in the engine and context structures.
On Tue, Jan 12, 2016 at 02:21:51PM +, John Harrison wrote:
> On 12/01/2016 14:04, Daniel Vetter wrote:
> >On Tue, Jan 12, 2016 at 11:50:34AM +, John Harrison wrote:
> >>On 12/01/2016 11:28, Chris Wilson wrote:
> >>>On Tue, Jan 12, 2016 at 11:11:20AM +, John Harrison wrote:
> On 12/0
From: Ville Syrjälä
commit 10afa0b65fe2 ("drm/i915: Reject >9 ddi translation entried if port !=
A/E on SKL")
added sanity checks to make sure we don't end up with too many ddi translation
values for eDP ports, but it actually failed to check if the port is eDP.
We still look up the edp translat
On Wed, Jan 13, 2016 at 12:06:07AM +0900, Sergey Senozhatsky wrote:
> Hello,
>
> -mmots 4.4.0-mm1-dbg-00602-g776bd09
Patch to shut this up (rpm is disabled by default for a reason still) on
it's way into 4.5/-next.
Thanks anyway for the report.
-Daniel
>
>
> [ 5331.509087] WARNING: CPU: 0 PID:
The most common thing on normal operation is ring tail
pointer update. Put it first in the shadow register list for
gen8, like we do with gen9.
Also order the checks inside reg write paths so that
if register is shadowed, no additional checks need to be made.
Cc: Chris Wilson
Signed-off-by: Mika
== Summary ==
Built on 37f6c2ae666fbba9eff4355115252b8b0fd43050 drm-intel-nightly:
2016y-01m-12d-14h-25m-44s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
dmesg-warn -> PASS (bdw-nuci7)
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe
sanitize_watermarks() does not properly handle errors returned by
drm_atomic_helper_duplicate_state(). Make failures drop locks before
returning. We also change the lock of connection_mutex to a
drm_modeset_lock_all_ctx() to make sure any EDEADLK's are handled
earlier.
v2: Change call to lock co
On Tue, Jan 12, 2016 at 04:19:39PM +0200, Tomi Valkeinen wrote:
>
> On 11/01/16 23:41, Daniel Vetter wrote:
> > Again since the drm core takes care of event unlinking/disarming this
> > is now just needless code.
> >
> > v2: Fixup misplaced hunks.
> >
> > Cc: Rob Clark
> > Acked-by: Daniel Ston
On Tue, Jan 12, 2016 at 05:00:16PM +0200, Gabriel Feceoru wrote:
>
>
> On 11.01.2016 19:56, Ville Syrjälä wrote:
> > On Mon, Dec 21, 2015 at 01:57:22PM +0200, Gabriel Feceoru wrote:
> >> On some HSW boards all pipeC tests fail with various dmesg errors.
> >> This seems to be caused by Pipe C beei
Hello,
-mmots 4.4.0-mm1-dbg-00602-g776bd09
[ 5331.509087] WARNING: CPU: 0 PID: 359 at
drivers/gpu/drm/i915/intel_drv.h:1446 gen6_read32+0x7b/0x253 [i915]()
[ 5331.509091] RPM wakelock ref not held during HW access
[ 5331.509093] Modules linked in:
[ 5331.509182] CPU: 0 PID: 359 Comm: Xorg Not t
Cc: cbroo...@gmail.com
Cc: jani.nik...@linux.intel.com
Signed-off-by: Shobhit Kumar
---
drivers/gpu/drm/i915/intel_panel.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 9e24c59..1
Syncs with:
commit 15620206ae87ba9643ffa6f5ddb5471be7192006
Author: Mika Kuoppala
Date: Fri Nov 6 14:11:16 2015 +0200
drm/i915/skl: Add SKL GT4 PCI IDs
Signed-off-by: Damien Lespiau
---
src/i915_pciids.h | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff
Cc: cbroo...@gmail.com
Cc: jani.nik...@linux.intel.com
Signed-off-by: Shobhit Kumar
---
drivers/pwm/pwm-lpss-platform.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c
index 54433fc..910bc14 100644
--- a/drivers/pwm/pwm
Hi,
This is an untested attempt to enable LPSS PWM in the driver. As part
of this did some restructuring for encapsulating the pwm_info inside the
panel->backlight itself. This makes enabling LPSS PWM clean and simple.
Not sending yet to pwm mailing list as this is all untested. C.B. please
test t
pwm_info helps in encapsulating the PWM period_ns values and will form
basis of adding new pwm devices which can then be genrically used by
initializing proper pwm_info structure in the backlight setup call.
Cc: cbroo...@gmail.com
Cc: jani.nik...@linux.intel.com
Signed-off-by: Shobhit Kumar
---
On Mon, Dec 14, 2015 at 06:23:39PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> It's been a while since I last ran igt on gen2, so I figured I'd
> give it a shot. 855 had some failures, 830 no longer worked at
> all. So I went ahead and fixed them, and here's the result.
On 11.01.2016 19:56, Ville Syrjälä wrote:
On Mon, Dec 21, 2015 at 01:57:22PM +0200, Gabriel Feceoru wrote:
On some HSW boards all pipeC tests fail with various dmesg errors.
This seems to be caused by Pipe C beeing disabled in FUSE_STRAP and
thus reading back the PIPECONF register is always ze
On Tue, Dec 08, 2015 at 07:59:35PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> While debugging problems on DDI platforms I got tired of the crap
> caused by the the dual personality DDI encoders, so I went ahead
> and split them into separate HDMI and DP encoders.
>
> A
On Tue, Jan 12, 2016 at 04:30:03PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > On Tue, Jan 12, 2016 at 12:05:06PM +0200, Mika Kuoppala wrote:
> >> Chris Wilson writes:
> >> > -intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) |
> >> > PIPE_CONTROL_QW_WRITE |
> >> > -
Chris Wilson writes:
> On Tue, Jan 12, 2016 at 12:05:06PM +0200, Mika Kuoppala wrote:
>> Chris Wilson writes:
>> > - intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE |
>> > - PIPE_CONTROL_WRITE_FLUSH |
>> > - PIPE_CONTROL_TEXTURE_CACHE_INVAL
On Tue, Jan 12, 2016 at 01:56:48PM +, Chris Wilson wrote:
> But we were removing the engine->default_context as it complicated the
> rest of the code. I strongly prefer keeping the contexts explicit as
> context separation should be first and foremost in the driver.
$ git grep kernel_context -
On 11/01/16 23:41, Daniel Vetter wrote:
> Again since the drm core takes care of event unlinking/disarming this
> is now just needless code.
>
> v2: Fixup misplaced hunks.
>
> Cc: Rob Clark
> Acked-by: Daniel Stone
> Reviewed-by: Alex Deucher (v1)
> Signed-off-by: Daniel Vetter
> ---
> driv
On 12/01/2016 14:04, Daniel Vetter wrote:
On Tue, Jan 12, 2016 at 11:50:34AM +, John Harrison wrote:
On 12/01/2016 11:28, Chris Wilson wrote:
On Tue, Jan 12, 2016 at 11:11:20AM +, John Harrison wrote:
On 12/01/2016 00:20, Chris Wilson wrote:
On Mon, Jan 11, 2016 at 06:42:31PM +, j
Chris Wilson writes:
> When reading from the HWS page, we use barrier() to prevent the compiler
> optimising away the read from the volatile (may be updated by the GPU)
> memory address. This is more suited to READ_ONCE(); make it so.
>
> Signed-off-by: Chris Wilson
> Cc: Daniel Vetter
After r
On 11/01/16 23:41, Daniel Vetter wrote:
> Again since the core takes care of this we can remove them. While at
> it also remove the postclose hook, it's empty.
>
> v2: Laurent pointed me at even more code to delete.
>
> Cc: Laurent Pinchart
> Cc: Tomi Valkeinen
> Acked-by: Daniel Stone
> Revie
On Tue, Jan 12, 2016 at 01:44:13PM +, Tvrtko Ursulin wrote:
>
> On 12/01/16 11:01, Chris Wilson wrote:
> >On Tue, Jan 12, 2016 at 10:04:20AM +, Tvrtko Ursulin wrote:
> >>Perhaps then leave the structure name as is and just rename the
> >>function to i915_gem_request_assign_active? I think
On Tue, Jan 12, 2016 at 11:19:26AM +, John Harrison wrote:
> On 11/01/2016 22:16, Chris Wilson wrote:
> >On Mon, Jan 11, 2016 at 06:42:39PM +, john.c.harri...@intel.com wrote:
> >>From: John Harrison
> >>
> >>MMIO flips are the preferred mechanism now but more importantly,
> >Says who?
>
On Tue, Jan 12, 2016 at 11:50:34AM +, John Harrison wrote:
> On 12/01/2016 11:28, Chris Wilson wrote:
> >On Tue, Jan 12, 2016 at 11:11:20AM +, John Harrison wrote:
> >>On 12/01/2016 00:20, Chris Wilson wrote:
> >>>On Mon, Jan 11, 2016 at 06:42:31PM +, john.c.harri...@intel.com wrote:
>
On Tue, Jan 12, 2016 at 02:50:28PM +0100, Daniel Vetter wrote:
> On Thu, Jan 07, 2016 at 10:20:50AM +, Dave Gordon wrote:
> > There are a number of places where the driver needs a request, but isn't
> > working on behalf of any specific user or in a specific context. At
> > present, we associat
On Thu, Jan 07, 2016 at 10:20:52AM +, Dave Gordon wrote:
> There are a few bits of code which the transformations implemented by
> the previous patch reveal to be suboptimal, once the notion of a per-
> ring default context has gone away. So this tidies up the leftovers.
>
> It could have been
On Thu, Jan 07, 2016 at 10:20:51AM +, Dave Gordon wrote:
> Now that we've eliminated a lot of uses of ring->default_context,
> we can eliminate the pointer itself.
>
> All the engines share the same default intel_context, so we can just
> keep a single reference to it in the dev_priv structure
On Thu, Jan 07, 2016 at 10:20:50AM +, Dave Gordon wrote:
> There are a number of places where the driver needs a request, but isn't
> working on behalf of any specific user or in a specific context. At
> present, we associate them with the per-engine default context. A future
> patch will aboli
On 11/01/16 09:17, Chris Wilson wrote:
Elsewhere we have adopted the convention of using '_link' to denote
elements in the list (and '_list' for the actual list_head itself), and
that the name should indicate which list the link belongs to (and
preferrably not just where the link is being store
On 12/01/2016 11:43, John Harrison wrote:
On 12/01/2016 04:37, Tian, Kevin wrote:
From: john.c.harri...@intel.com
Sent: Tuesday, January 12, 2016 2:42 AM
From: John Harrison
Implemented a batch buffer submission scheduler for the i915 DRM
driver.
The general theory of operation is that whe
On Mon, Jan 11, 2016 at 02:55:37PM -0800, abhay.ku...@intel.com wrote:
> From: Abhay Kumar
>
> Make resume/on codepath not to wait for panel_power_cycle_delay(t11_t12)
> if this time is already spent in suspend/poweron time.
>
> v2: Use CLOCK_BOOTTIME and remove jiffies for panel power cycle
>
On 11/01/16 09:17, Chris Wilson wrote:
We use "list" to denote the list and "link" to denote an element on that
list. Rename request->list to match this idiom.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 12 +++
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