[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Support to enable TRTT on GEN9 (rev3)

== Series Details == Series: drm/i915: Support to enable TRTT on GEN9 (rev3) URL : https://patchwork.freedesktop.org/series/2321/ State : failure == Summary == LD net/ipv6/built-in.o CC [M] drivers/net/ethernet/intel/e1000e/phy.o CC [M] drivers/net/ethernet/intel/e1000e/param.o

Re: [Intel-gfx] [PATCH v3] drm/i915: Support to enable TRTT on GEN9

Hi Akash, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20160302] [cannot apply to v4.5-rc6] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/akash-goel

[Intel-gfx] [PATCH v3] igt/gem_trtt: Exercise the TRTT hardware

From: Akash Goel This patch provides the testcase to exercise the TRTT hardware. Some platforms have an additional address translation hardware support in form of Tiled Resource Translation Table (TR-TT) which provides an extra level of abstraction over PPGTT. This is

[Intel-gfx] [PATCH v3] drm/i915: Support to enable TRTT on GEN9

From: Akash Goel Gen9 has an additional address translation hardware support in form of Tiled Resource Translation Table (TR-TT) which provides an extra level of abstraction over PPGTT. This is useful for mapping Sparse/Tiled texture resources. Sparse resources are created

Re: [Intel-gfx] [PATCH] drm/i915: add audio_ptr pointer check

Hi Takashi, > -Original Message- > From: Takashi Iwai [mailto:ti...@suse.de] > Sent: Wednesday, March 02, 2016 4:57 PM > To: Yang, Libin > Cc: libin.y...@linux.intel.com; intel-gfx@lists.freedesktop.org; > conselv...@gmail.com; jani.nik...@linux.intel.com; > ville.syrj...@linux.intel.com;

Re: [Intel-gfx] [4.4-rc1][Regression] drm/i915: Check live status before reading edid

On 02/29/2016 04:33 AM, Jani Nikula wrote: > On Wed, 24 Feb 2016, Joseph Salisbury wrote: >> Hi Sonika, >> >> A kernel bug report was opened against Ubuntu [0]. After a kernel >> bisect, it was found that reverting the following commit resolved this bug: >> >>

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Only recalculate wm's for planes part of the state, v2.

Em Ter, 2016-03-01 às 14:28 -0800, Matt Roper escreveu: > On Tue, Mar 01, 2016 at 11:07:22AM +0100, Maarten Lankhorst wrote: > > Only planes that are part of the state should be used for > > recalculating > > watermarks. For planes not part of the state the previous patch > > allows > > us to

Re: [Intel-gfx] [PATCH i-g-t v2 4/7] tests/gem_scheduler: Add gem_scheduler test

> +static struct ring { > + const char *name; > + int id; > + bool exists; > +} rings[] = { > + { "render", I915_EXEC_RENDER, false }, > + { "bsd1",I915_EXEC_BSD | 1<<13, false }, > + { "bsd2",I915_EXEC_BSD | 2<<13, false }, This is wrong. The timeline is coupled

Re: [Intel-gfx] [PATCH v1.1 1/2] drm/i915: Allow preservation of watermarks, v2.

Em Qua, 2016-03-02 às 12:38 +0100, Maarten Lankhorst escreveu: > As Paulo has noted we can help bisectability by separating computing > watermarks on a noop in 2 separate commits. > > This patch no longer clears the crtc watermark state, but > recalculates > it completely. Regardless whether a

Re: [Intel-gfx] [PATCH i-g-t v2 2/7] lib/ioctl_wrappers: Separate ring BSD1 from BSD2 checks

On Wed, Mar 02, 2016 at 06:10:40PM +, Derek Morton wrote: > Some platforms have ring BSD available but no BSD2. > Because of the current verification, tests involving ring BSD1 > will be skipped if no BSD2 is available. The code does what exactly what we want. We run BSD or BSD, BSD1, BSD2

[Intel-gfx] [PATCH i-g-t v2 3/7] lib/intel_batchbuffer: Add functions to be used in the scheduler test

Adds functions to create a number of different batch buffers to perform several functions including: Batch buffer which will run for a long duration to provide a delay on a specified ring. Function to calibrate the delay batch buffer to run for a specified period of time. Function to create a

[Intel-gfx] [PATCH i-g-t v2 7/7] gem_scheduler: Added subtests to test priority bumping

When a higher priority batch buffer bumps a lower priority batch buffer all batch buffers in the scheduler queue get a small priority increase. Added a subtest to check this behaviour. Requested by Joonas Lahtinen during scheduler code review Signed-off-by: Derek Morton

[Intel-gfx] [PATCH i-g-t v2 1/7] ioctl_wrappers: make gem_has_ring non static

For tests that use multiple rings to test interactions it is useful to know if a ring exists without triggering the test to skip. Signed-off-by: Derek Morton --- lib/ioctl_wrappers.c | 2 +- lib/ioctl_wrappers.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)

[Intel-gfx] [PATCH i-g-t v2 6/7] tests/gem_scheduler: Add subtests to test batch priority behaviour

Add subtests to test each ring to check batch buffers of a higher priority will be executed before batch buffers of a lower priority. v2: Addressed review comments from Daniele Ceraolo Spurio Signed-off-by: Derek Morton --- tests/gem_scheduler.c | 53

[Intel-gfx] [PATCH i-g-t v2 2/7] lib/ioctl_wrappers: Separate ring BSD1 from BSD2 checks

Some platforms have ring BSD available but no BSD2. Because of the current verification, tests involving ring BSD1 will be skipped if no BSD2 is available. Decoupling the checks will allow running the BSD1 specific tests on these platforms. Based on a patch originally submitted by Gabriel

[Intel-gfx] [PATCH i-g-t v2 5/7] igt/gem_ctx_param_basic: Updated to support scheduler priority interface

From: John Harrison The GPU scheduler has added an execution priority level to the context object. There is an IOCTL interface to allow user apps/libraries to set this priority. This patch updates the context paramter IOCTL test to include the new interface. For:

[Intel-gfx] [PATCH i-g-t v2 4/7] tests/gem_scheduler: Add gem_scheduler test

This is intended to test the scheduler behaviour is correct. The subtests are -basic Tests that batch buffers of the same priority submitted to a ring execute in the order they are submitted. -read Submits a batch buffer with a read dependency to a buffer object to a ring which is held in the

[Intel-gfx] [PATCH i-g-t v2 0/7] Scheduler tests

This patch set adds scheduler tests. Patch 1 Makes gem_has_ring() non static as the test will need to call it Patch 2 Separate ring BSD1 from BSD2 in gem_require_ring() to prevent the BSD1 specific tests from skipping if there is no BSD2 ring. Based on a patch originally submitted by Gabriel

Re: [Intel-gfx] [PATCH i-g-t 1/4] lib/igt_bb_factory: Add igt_bb_factory library

> > >-Original Message- >From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of >Morton, Derek J >Sent: Tuesday, March 1, 2016 10:31 AM >To: Ceraolo Spurio, Daniele ; >intel-gfx@lists.freedesktop.org >Subject: Re: [Intel-gfx] [PATCH

Re: [Intel-gfx] [PATCH v2 6/6] drm/atomic: Clean up steal_encoder

On Wed, Mar 02, 2016 at 07:32:30PM +0200, Ville Syrjälä wrote: > On Wed, Feb 24, 2016 at 09:37:33AM +0100, Maarten Lankhorst wrote: > > Now that only encoders can be stolen that are part of the state > > steal_encoder no longer needs to inspect all connectors, > > just those that are part of the

Re: [Intel-gfx] [PATCH i-g-t v4] tests/pm_rpm: Fix CRASH on machines that lack LLC

On ke, 2016-03-02 at 17:20 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 07:01:28PM +0200, David Weinehall wrote: > > On machines that lack an LLC the pm-caching subtest will > > terminate with sigbus and thus CRASH during the > > I915_CACHING_CACHED iteration. To work around this we reset

Re: [Intel-gfx] [PATCH v2 6/6] drm/atomic: Clean up steal_encoder

On Wed, Feb 24, 2016 at 09:37:33AM +0100, Maarten Lankhorst wrote: > Now that only encoders can be stolen that are part of the state > steal_encoder no longer needs to inspect all connectors, > just those that are part of the atomic state. steal_encoder() can no longer fail after this, so should

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/6] drm/i915: Store rawclk_freq in dev_priv

On Wed, Mar 02, 2016 at 04:55:52PM -, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/6] drm/i915: Store rawclk_freq in dev_priv > URL : https://patchwork.freedesktop.org/series/4024/ > State : failure > > == Summary == > > Series 4024v1 Series without cover

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/6] drm/i915: Store rawclk_freq in dev_priv

== Series Details == Series: series starting with [v2,1/6] drm/i915: Store rawclk_freq in dev_priv URL : https://patchwork.freedesktop.org/series/4024/ State : failure == Summary == Series 4024v1 Series without cover letter

Re: [Intel-gfx] [PATCH] intel: Adding missing Broxton PCI IDs.

On 03/01/2016 05:12 PM, Rodrigo Vivi wrote: These IDs were already part of the kernel since: kernel commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0 Author: Imre Deak Date: Thu Jan 28 16:04:12 2016 +0200 drm/i915/bxt: update list of PCIIDs Signed-off-by: Rodrigo

Re: [Intel-gfx] [PATCH i-g-t v4] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 07:01:28PM +0200, David Weinehall wrote: > On machines that lack an LLC the pm-caching subtest will > terminate with sigbus and thus CRASH during the > I915_CACHING_CACHED iteration. To work around this we reset > the caching to I915_CACHING_NONE before doing memory access.

Re: [Intel-gfx] Fwd: [PATCH] drm/i915: Avoid vblank counter for gen9+

On Fri, 2016-02-26 at 10:02 -0800, Rodrigo Vivi wrote: > [...] > Well, I have this tree: > https://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=rpm-domains-psr-vblank-counter-full > with mainly: > 1 - vblank domain on pre-enable post-disable vblanks hooks as Ville > had suggested > 2 - psr

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Generalise common GPU engine reset request/unrequest code

On 02/03/2016 15:56, Patchwork wrote: == Series Details == Series: drm/i915: Generalise common GPU engine reset request/unrequest code URL : https://patchwork.freedesktop.org/series/4021/ State : warning == Summary == Series 4021v1 drm/i915: Generalise common GPU engine reset

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs

On Mon, Feb 08, 2016 at 07:20:11PM +0200, Ville Syrjälä wrote: > On Mon, Feb 08, 2016 at 10:47:11PM +0530, Sagar Arun Kamble wrote: > > This changes ensures device is active when frequency limits are changed. > > This is needed as we are writing to register RPNSWREQ in intel_set_rps. > > If not

[Intel-gfx] [PATCH i-g-t v4] tests/pm_rpm: Fix CRASH on machines that lack LLC

On machines that lack an LLC the pm-caching subtest will terminate with sigbus and thus CRASH during the I915_CACHING_CACHED iteration. To work around this we reset the caching to I915_CACHING_NONE before doing memory access. v2: Various improvements based on feedback from Chris Wilson v3: Fix

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/hangcheck: Prevent long walks across full-ppgtt

== Series Details == Series: drm/i915/hangcheck: Prevent long walks across full-ppgtt URL : https://patchwork.freedesktop.org/series/4023/ State : warning == Summary == Series 4023v1 drm/i915/hangcheck: Prevent long walks across full-ppgtt

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On ke, 2016-03-02 at 15:28 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 05:01:19PM +0200, Imre Deak wrote: > [...] > Hmm, this file has a noticeable lack of GEM domain management. E.g. > gem_mmap_subtest() will only work by happenstance on !llc with > gtt_mmap=false. > > To test the

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Generalise common GPU engine reset request/unrequest code

== Series Details == Series: drm/i915: Generalise common GPU engine reset request/unrequest code URL : https://patchwork.freedesktop.org/series/4021/ State : warning == Summary == Series 4021v1 drm/i915: Generalise common GPU engine reset request/unrequest code

Re: [Intel-gfx] [PATCH i-g-t v2] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 05:50:28PM +0200, David Weinehall wrote: > On machines that lack an LLC the pm-caching subtest will > terminate with sigbus and thus CRASH during the > I915_CACHING_CACHED iteration. This patch adds a check for > this and uses I915_CACHING_NONE instead. > > v2: Various

[Intel-gfx] [PATCH i-g-t v3] tests/pm_rpm: Fix CRASH on machines that lack LLC

On machines that lack an LLC the pm-caching subtest will terminate with sigbus and thus CRASH during the I915_CACHING_CACHED iteration. This patch adds a check for this and uses I915_CACHING_NONE instead. v2: Various improvements based on feedback from Chris Wilson v3: Fix incorrect

[Intel-gfx] [PATCH i-g-t v2] tests/pm_rpm: Fix CRASH on machines that lack LLC

On machines that lack an LLC the pm-caching subtest will terminate with sigbus and thus CRASH during the I915_CACHING_CACHED iteration. This patch adds a check for this and uses I915_CACHING_NONE instead. v2: Various improvements based on feedback from Chris Wilson Signed-off-by: David

Re: [Intel-gfx] [PATCH] drm/i915: Handle invalid ilk pipe watermarks correctly.

On Wed, Mar 02, 2016 at 12:36:03PM +0100, Maarten Lankhorst wrote: > This function returns an int, but when ilk_validate_pipe_wm fails it > returns false, which is 0 (success). As a result invalid watermarks > are applied, while they should have been rejected. > > Fix this by returning -EINVAL. >

Re: [Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

On Wed, 2016-03-02 at 14:54 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 02:40:44PM +, Daniel Stone wrote: > > On Wed, 2016-03-02 at 14:39 +, Chris Wilson wrote: > > > Don't forget to call dirtyfb then. > > Are you talking about frontbuffer rendering, or pageflipping > > between >

Re: [Intel-gfx] [PATCH v7 6/7] drm/i915: refactor duplicate object vmap functions (the final rework?)

On 02/03/16 12:08, Chris Wilson wrote: On Tue, Mar 01, 2016 at 04:33:58PM +, Dave Gordon wrote: This is essentially Chris Wilson's patch of a similar name, reworked on top of Alex Dai's recent patch: | drm/i915: Add i915_gem_object_vmap to map GEM object to virtual space Chris' original

Re: [Intel-gfx] [PATCH] drm/i915/hangcheck: Prevent long walks across full-ppgtt

On Wed, Mar 02, 2016 at 04:48:29PM +0200, Mika Kuoppala wrote: > With full-ppgtt, it takes the GPU an eon to traverse the entire 256PiB > address space, causing a loop to be detected. Under the current scheme, > if ACTHD walks off the end of a batch buffer and into an empty > address space, we

Re: [Intel-gfx] [PATCH 07/13] drm/i915: Use a table to initilize shared dplls

Op 26-02-16 om 14:54 schreef Ander Conselvan de Oliveira: > Use a table to store the per-platform shared dpll information in one > place. This way, there is no need for platform specific init funtions. > > Signed-off-by: Ander Conselvan de Oliveira > > ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: GPIO for BXT generic MIPI

== Series Details == Series: drm/i915: GPIO for BXT generic MIPI URL : https://patchwork.freedesktop.org/series/4020/ State : failure == Summary == Series 4020v1 drm/i915: GPIO for BXT generic MIPI 2016-03-02T14:22:37.509722

Re: [Intel-gfx] [PATCH] drm/i915: Resume DP MST before doing any kind of modesetting

On Wed, Mar 2, 2016 at 4:29 AM, Daniel Vetter wrote: > On Mon, Feb 29, 2016 at 06:33:42PM -0500, Rob Clark wrote: >> On Mon, Feb 29, 2016 at 11:12 AM, Daniel Vetter wrote: >> > On Wed, Feb 24, 2016 at 08:03:04AM +0530, Thulasimani, Sivakumar wrote: >> >> >> >>

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 05:01:19PM +0200, Imre Deak wrote: > Ah right, I missed that, thanks for explaining. But we still need to > make sure the device is suspended before the set-cache-level call, that > is an initial disable_all_screens() and then wait_for_suspended() > before calling

[Intel-gfx] [PATCH 5/6] drm/i915: Clean up .get_aux_clock_divider() functions

From: Ville Syrjälä Now that the mess with AUX clock divder rounding is sorted out and we have both cdclk and rawclk cached in dev_priv, we can clean up the .get_aux_clock_divider() functions a bit. The main thing here is just calling ilk_get_aux_clock_divider()

[Intel-gfx] [PATCH 4/6] drm/i915: Read out hrawclk from CCK on vlv/chv

From: Ville Syrjälä Currently we assume that hrawclk is 200MHz on VLV/CHV. That should be true always, but just to avoid such asumptions we can read out the actual frequency from CCK. Signed-off-by: Ville Syrjälä ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: add sanity check for partial view creation (rev2)

== Series Details == Series: drm/i915: add sanity check for partial view creation (rev2) URL : https://patchwork.freedesktop.org/series/3926/ State : failure == Summary == Series 3926v2 drm/i915: add sanity check for partial view creation

[Intel-gfx] [maintainer-tools PATCH] dim: Check for required tags before pushing a branch

Check if the committer's and author's Signed-off-by line and at least one Reviewed-by line exists in each commit to be pushed. Signed-off-by: Imre Deak --- dim | 32 1 file changed, 32 insertions(+) diff --git a/dim b/dim index

[Intel-gfx] [PATCH v2 3/6] drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV

From: Ville Syrjälä With the hrawclk frequency cached in dev_priv, we can simply use g4x_get_aux_clock_divider() for VLV/CHV. v2: Rebase due to IS_VALLYVIEW vs. IS_CHERRYVIEW split Signed-off-by: Ville Syrjälä Reviewed-by: Jani

[Intel-gfx] [PATCH v2 1/6] drm/i915: Store rawclk_freq in dev_priv

From: Ville Syrjälä Generalize rawclk handling by storing it in dev_priv. Presumably our hrawclk readout works at least for CTG and ELK since we've been using it for DP AUX on those platforms. There are no real docs anymore after configdb vanished, so the only

[Intel-gfx] [PATCH 2/6] drm/i915: Rename s/i9xx/g4x/ in DP code

From: Ville Syrjälä g4x is the first platform with DP support, so let's name the relevant functions as g4x_ instead i9xx_ to avoid confusion. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula ---

[Intel-gfx] [PATCH 6/6] drm/i915: Use DIV_ROUND_CLOSEST for PWM calculations

From: Ville Syrjälä Supposedly we would want to get the PWM output as close as possible to the target, so let's round to closest. Cc: Jani Nikula Suggested-by: Jani Nikula Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH v2 drm/i915: rawclk/cdclk stuff (v2)

From: Ville Syrjälä Here are the remainder of my cdclk/rawclk cleanup patches. Previous time I posted these was [1]. Bunch of them got already r-b'd by Jani. I also did the PWM DIV_ROUND_CLOSEST() changes as Jani suggested last time around. Entire series is

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On ke, 2016-03-02 at 14:49 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 04:41:54PM +0200, Imre Deak wrote: > > On ke, 2016-03-02 at 14:37 +, Chris Wilson wrote: > > > On Wed, Mar 02, 2016 at 04:32:41PM +0200, Imre Deak wrote: > > > > On ke, 2016-03-02 at 14:04 +, Chris Wilson

Re: [Intel-gfx] [PATCH v7 7/7] drm: add parameter-order checking to drm memory allocators

On 01/03/16 16:33, Dave Gordon wrote: After the recent addition of drm_malloc_gfp(), it was noticed that some callers of these functions has swapped the parameters in the call - it's supposed to be 'number of members' and 'sizeof(element)', but a few callers had got the size first and the count

Re: [Intel-gfx] [PATCH 06/13] drm/i915: Move shared dpll function prototypes to intel_dpll_mgr.h

Hey, Op 26-02-16 om 14:54 schreef Ander Conselvan de Oliveira: > Move shared dpll function prototype together with other shared dpll > definitions. > > Signed-off-by: Ander Conselvan de Oliveira > > For patch 1-6, Reviewed-by: Maarten Lankhorst

[Intel-gfx] [PATCH v1.1] drm/i915: Update state before setting watermarks, v2.

When intel_update_watermarks is called on skylake from the hw state readout disable function it calls intel_update_watermarks. intel_update_watermarks inspects crtc->state, which should be set to disabled. This wasn't the case, and this resulted in a divide-by-zero in skl_update_wm when

Re: [Intel-gfx] [PATCH] drm/i915: GPIO for BXT generic MIPI

Attached is the GPIO table for the BXT, most of the GPIO`s numberings are sequential except few of them in the northwest core because of which complete table is added in the file. > -Original Message- > From: Deepak, M > Sent: Wednesday, March 2, 2016 8:14 PM > To:

Re: [Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

On Wed, Mar 02, 2016 at 02:40:44PM +, Daniel Stone wrote: > > On Wed, 2016-03-02 at 14:39 +, Chris Wilson wrote: > > On Wed, Mar 02, 2016 at 02:22:58PM +, Daniel Stone wrote: > > > On Wed, 2016-03-02 at 14:21 +, Chris Wilson wrote: > > > > On Wed, Mar 02, 2016 at 03:00:14PM +0100,

[Intel-gfx] [PATCH] drm/i915: Generalise common GPU engine reset request/unrequest code

From: Tomas Elf GPU engine reset handshaking is something that is applicable to both full GPU reset and engine reset, which is something that is part of the upcoming TDR per-engine hang recovery patches. Break out the common engine reset request/unrequest code (originally

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 04:41:54PM +0200, Imre Deak wrote: > On ke, 2016-03-02 at 14:37 +, Chris Wilson wrote: > > On Wed, Mar 02, 2016 at 04:32:41PM +0200, Imre Deak wrote: > > > On ke, 2016-03-02 at 14:04 +, Chris Wilson wrote: > > > > On Wed, Mar 02, 2016 at 03:55:56PM +0200, David

Re: [Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

On Wed, 2016-03-02 at 14:39 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 02:22:58PM +, Daniel Stone wrote: > > On Wed, 2016-03-02 at 14:21 +, Chris Wilson wrote: > > > On Wed, Mar 02, 2016 at 03:00:14PM +0100, Tomeu Vizoso wrote: > > > > - gem_set_domain(fd, fb->gem_handle, >

[Intel-gfx] [PATCH] drm/i915/hangcheck: Prevent long walks across full-ppgtt

With full-ppgtt, it takes the GPU an eon to traverse the entire 256PiB address space, causing a loop to be detected. Under the current scheme, if ACTHD walks off the end of a batch buffer and into an empty address space, we "never" detect the hang. If we always increment the score as the ACTHD is

[Intel-gfx] [PATCH] drm/i915: GPIO for BXT generic MIPI

Added the BXT GPIO pin configuration and programming logic for backlight and panel control. v2 by Deepak - Added the GPIO table got BXT. - Added gpio_free v3 by Deepak - requesting the gpio once - freeing the gpio while unloading Cc: Jani Nikula Cc: Ville Syrjälä

Re: [Intel-gfx] [PATCH] drm/i915: add sanity check for partial view creation

On Wed, Mar 02, 2016 at 02:33:29PM +, Matthew Auld wrote: > When binding pages for a partial view we should check that the offset + > size is valid relative to the size of the gem object. > > v2: Don't use pages->nents to determine the page count (Tvrtko Ursulin) > > Cc: Joonas Lahtinen

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On ke, 2016-03-02 at 14:37 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 04:32:41PM +0200, Imre Deak wrote: > > On ke, 2016-03-02 at 14:04 +, Chris Wilson wrote: > > > On Wed, Mar 02, 2016 at 03:55:56PM +0200, David Weinehall wrote: > > > > On Wed, Mar 02, 2016 at 01:27:06PM +,

Re: [Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

On Wed, Mar 02, 2016 at 02:22:58PM +, Daniel Stone wrote: > On Wed, 2016-03-02 at 14:21 +, Chris Wilson wrote: > > On Wed, Mar 02, 2016 at 03:00:14PM +0100, Tomeu Vizoso wrote: > > > @@ -1006,8 +1019,9 @@ static cairo_surface_t *get_cairo_surface(int > > > fd, struct igt_fb *fb) > > >  

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 02:04:58PM +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 03:55:56PM +0200, David Weinehall wrote: > > On Wed, Mar 02, 2016 at 01:27:06PM +, Chris Wilson wrote: > > > On Wed, Mar 02, 2016 at 03:11:57PM +0200, David Weinehall wrote: > > > > On machines that lack an

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 04:32:41PM +0200, Imre Deak wrote: > On ke, 2016-03-02 at 14:04 +, Chris Wilson wrote: > > On Wed, Mar 02, 2016 at 03:55:56PM +0200, David Weinehall wrote: > > > On Wed, Mar 02, 2016 at 01:27:06PM +, Chris Wilson wrote: > > > > On Wed, Mar 02, 2016 at 03:11:57PM

[Intel-gfx] [PATCH] drm/i915: add sanity check for partial view creation

When binding pages for a partial view we should check that the offset + size is valid relative to the size of the gem object. v2: Don't use pages->nents to determine the page count (Tvrtko Ursulin) Cc: Joonas Lahtinen Signed-off-by: Matthew Auld

Re: [Intel-gfx] [i-g-t PATCH v1 01/14] lib: add igt_require_intel

On Wed, Mar 02, 2016 at 03:00:08PM +0100, Tomeu Vizoso wrote: > Add function that requires that the driver we are talking to is i915. > > This allows us to skip subtests that are specific to that driver. > > Signed-off-by: Tomeu Vizoso > --- > > lib/drmtest.c | 5

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On ke, 2016-03-02 at 14:04 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 03:55:56PM +0200, David Weinehall wrote: > > On Wed, Mar 02, 2016 at 01:27:06PM +, Chris Wilson wrote: > > > On Wed, Mar 02, 2016 at 03:11:57PM +0200, David Weinehall wrote: > > > > On machines that lack an LLC the

Re: [Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

On Wed, Mar 02, 2016 at 03:00:14PM +0100, Tomeu Vizoso wrote: > @@ -1006,8 +1019,9 @@ static cairo_surface_t *get_cairo_surface(int fd, > struct igt_fb *fb) > create_cairo_surface__gtt(fd, fb); > } > > - gem_set_domain(fd, fb->gem_handle, > -

Re: [Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

On Wed, 2016-03-02 at 14:21 +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 03:00:14PM +0100, Tomeu Vizoso wrote: > > @@ -1006,8 +1019,9 @@ static cairo_surface_t *get_cairo_surface(int > > fd, struct igt_fb *fb) > >   create_cairo_surface__gtt(fd, fb); > >   } > >   > > -

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 03:55:56PM +0200, David Weinehall wrote: > On Wed, Mar 02, 2016 at 01:27:06PM +, Chris Wilson wrote: > > On Wed, Mar 02, 2016 at 03:11:57PM +0200, David Weinehall wrote: > > > On machines that lack an LLC the pm-caching subtest will > > > terminate with sigbus and thus

Re: [Intel-gfx] [PATCH] drm/i915: Treat cursor plane as another sprite plane for BSW

On Tue, Mar 01, 2016 at 03:27:17PM -0800, Dhinakaran Pandiyan wrote: > From: Maarten Lankhorst > > Work around the CHV pipe C FIFO underruns that cause display failure by > enabling sprite plane for cursor. > > This patch for BSW is based on Maarten

[Intel-gfx] [i-g-t PATCH v1 10/14] kms_addfb_basic: call igt_create_bo_with_dimensions

Many tests can do their work on drivers other than i915 and even with just dumb buffers, so call igt_create_bo_with_dimensions instead of gem_create which will paper out the differences and call the proper ioctls or cause the subtest to be skipped if that's not possible. Signed-off-by: Tomeu

[Intel-gfx] [i-g-t PATCH v1 06/14] lib: Add wrapper for DRM_IOCTL_MODE_CREATE_DUMB

In order to test drivers that don't have support for proper buffer objects, add a wrapper for creating dumb buffer objects that will be called from the lib code for those subtests that don't need to care. Signed-off-by: Tomeu Vizoso --- lib/ioctl_wrappers.c | 36

[Intel-gfx] [i-g-t PATCH v1 07/14] lib: Map dumb buffers

If a buffer object is dumb, call DRM_IOCTL_MODE_MAP_DUMB when mapping it. Also, don't call DRM_IOCTL_I915_GEM_SET_DOMAIN on dumb buffers. Signed-off-by: Tomeu Vizoso --- lib/igt_fb.c | 20 +--- 1 file changed, 17 insertions(+), 3 deletions(-) diff

[Intel-gfx] [i-g-t PATCH v1 13/14] kms_addfb_basic: Move calls to gem_set_tiling to the subtests

So they don't cause unrelated subtests to be skipped when testing drivers other than i915. Signed-off-by: Tomeu Vizoso --- tests/kms_addfb_basic.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/tests/kms_addfb_basic.c

[Intel-gfx] [i-g-t PATCH v1 12/14] kms_addfb_basic: Split tiling_tests off

Move tests requiring tiled BOs to the end so they don't cause unrelated subtests to be skipped when testing drivers with only dumb buffer support. Signed-off-by: Tomeu Vizoso --- tests/kms_addfb_basic.c | 50 - 1 file

[Intel-gfx] [i-g-t PATCH v1 14/14] kms_addfb_basic: Get intel gen from within subtest

Because determining the Intel GFX generation requires a call to DRM_IOCTL_I915_GETPARAM, move the code that requires it to a subtest that can be skipped on drivers other than i915. Signed-off-by: Tomeu Vizoso --- tests/kms_addfb_basic.c | 36

[Intel-gfx] [i-g-t PATCH v1 11/14] kms_addfb_basic: move tiling functionality into each subtest

Because calls to gem_set_tiling will cause the subtest to be skipped on drivers other than i915, move them to each subtest that needs them so the other subtests aren't skipped as well. Signed-off-by: Tomeu Vizoso --- tests/kms_addfb_basic.c | 8 1 file

[Intel-gfx] [i-g-t PATCH v1 08/14] lib: Add igt_create_bo_with_dimensions

igt_create_bo_with_dimensions() is intended to abstract differences between drivers in buffer object creation. The driver-specific ioctls will be called if the driver that is being tested can satisfy the needs of the calling subtest, or it will be skipped otherwise. Signed-off-by: Tomeu Vizoso

[Intel-gfx] [i-g-t PATCH v1 04/14] lib: Have intel_get_drm_devid call igt_require_intel

I915_PARAM_CHIPSET_ID is a i915-only thing, so if a subtest ends up calling it when testing another driver, let's skip it. Signed-off-by: Tomeu Vizoso --- lib/intel_chipset.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/intel_chipset.c

[Intel-gfx] [i-g-t PATCH v1 02/14] lib: Have gem_set_tiling require intel

Before calling a i915-specific IOCTL, require i915. This allows us to skip subtests that are specific to that driver, though what should eventually happen is that tests don't generally call gem_set_tiling directly but go through an abstraction layer that constructs the buffer object in a

[Intel-gfx] [i-g-t PATCH v1 05/14] lib: Call intel_get_drm_devid only from intel code

It only makes sense when testing the i915 driver, so don't call it otherwise. Signed-off-by: Tomeu Vizoso --- lib/igt_fb.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 5f23136e01ac..3e76a419b3ee

[Intel-gfx] [i-g-t PATCH v1 03/14] lib: Expose is_i915_device

Lib and test code can use this function to avoid i915-specific behavior when running on other drivers. Signed-off-by: Tomeu Vizoso --- lib/drmtest.c | 2 +- lib/drmtest.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/drmtest.c

[Intel-gfx] [i-g-t PATCH v1 01/14] lib: add igt_require_intel

Add function that requires that the driver we are talking to is i915. This allows us to skip subtests that are specific to that driver. Signed-off-by: Tomeu Vizoso --- lib/drmtest.c | 5 + lib/drmtest.h | 2 ++ 2 files changed, 7 insertions(+) diff --git

[Intel-gfx] [i-g-t PATCH v1 00/14] Get a few more tests to run on !i915

Hi, have restarted work on getting tests in IGT to run on drivers other than i915. These changes make the modified tests pass in a Radxa Rock2 board by using dumb buffers as much as possible and having subtests skip if they require tiled BOs. The plan is for igt_create_bo_with_dimensions to be

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 01:27:06PM +, Chris Wilson wrote: > On Wed, Mar 02, 2016 at 03:11:57PM +0200, David Weinehall wrote: > > On machines that lack an LLC the pm-caching subtest will > > terminate with sigbus and thus CRASH during the > > I915_CACHING_CACHED iteration. This patch adds a

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Avoid snooping with userptr where not supported (rev3)

On 02/03/16 12:31, Patchwork wrote: == Series Details == Series: drm/i915: Avoid snooping with userptr where not supported (rev3) URL : https://patchwork.freedesktop.org/series/3979/ State : failure == Summary == Series 3979v3 drm/i915: Avoid snooping with userptr where not supported

[Intel-gfx] [PATCH v2.1 5/6] drm/atomic: Handle encoder assignment conflicts in a separate check, v3.

The current check doesn't handle the case where we don't steal an encoder, but keep it on the current connector. If we repurpose disable_conflicting_encoders to do the checking, we just have to reject the ones that conflict. Changes since v1: - Return early with empty encoder_mask,

Re: [Intel-gfx] [PATCH] drm/i915: add sanity check for partial view creation

On ma, 2016-02-29 at 19:57 +0200, Ville Syrjälä wrote: > On Mon, Feb 29, 2016 at 05:11:02PM +, Matthew Auld wrote: > > > > When binding pages for a partial view we should check that the offset + > > size is valid relative to the size of the gem object. > > > > Cc: Joonas Lahtinen

Re: [Intel-gfx] [PATCH] drm/i915: add sanity check for partial view creation

On Wed, Mar 02, 2016 at 03:29:12PM +0200, Joonas Lahtinen wrote: > On ma, 2016-02-29 at 17:11 +, Matthew Auld wrote: > > When binding pages for a partial view we should check that the offset + > > size is valid relative to the size of the gem object. > > > > Cc: Joonas Lahtinen

Re: [Intel-gfx] [PATCH] drm/i915: add sanity check for partial view creation

On 29/02/16 17:11, Matthew Auld wrote: When binding pages for a partial view we should check that the offset + size is valid relative to the size of the gem object. Cc: Joonas Lahtinen Signed-off-by: Matthew Auld ---

Re: [Intel-gfx] [PATCH] drm/i915: add sanity check for partial view creation

On ma, 2016-02-29 at 17:11 +, Matthew Auld wrote: > When binding pages for a partial view we should check that the offset + > size is valid relative to the size of the gem object. > > Cc: Joonas Lahtinen Reviewed-by: Joonas Lahtinen

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On Wed, Mar 02, 2016 at 03:11:57PM +0200, David Weinehall wrote: > On machines that lack an LLC the pm-caching subtest will > terminate with sigbus and thus CRASH during the > I915_CACHING_CACHED iteration. This patch adds a check for > this condition and skips that iteration. you can delete the

[Intel-gfx] [PATCH i-g-t] tests/pm_rpm: Fix CRASH on machines that lack LLC

On machines that lack an LLC the pm-caching subtest will terminate with sigbus and thus CRASH during the I915_CACHING_CACHED iteration. This patch adds a check for this condition and skips that iteration. Signed-off-by: David Weinehall --- tests/pm_rpm.c | 10

Re: [Intel-gfx] [PATCH] drm/i915: Treat cursor plane as another sprite plane for BSW

Hey, Op 02-03-16 om 00:27 schreef Dhinakaran Pandiyan: > From: Maarten Lankhorst > > Work around the CHV pipe C FIFO underruns that cause display failure by > enabling sprite plane for cursor. > > This patch for BSW is based on Maarten Lankhorst's work that >

  1   2   >