Hi,
I am working on a solution for handling link failures during or after
the modeset.
In case of link failure, the max link rate/lane count values
are updated to lower link rate/lane count as per the spec and uevent is
sent to the userspace with link-status BAD. The userspace is expected to fir
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Generate i915_params {} using a
macro
URL : https://patchwork.freedesktop.org/series/19179/
State : failure
== Summary ==
Series 19179v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/19179/revi
They include useful material such as what mode the VM address space is
running in, what submission mode, extra quirks, etc.
v2: Undef the right macro, use type specific pretty printers
v3: Use strcmp(TYPENAME) rather than creating per-type pretty printers
v4: Use __always_inline to force GCC to el
The alpha_support module option can only take one of two values, so
assign it to a boolean type. The only advantage is in pretty printing
via /sys/module/i915/parameters/alpha_support and elsewhere.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Daniel Vetter
Acked-by: Jani N
Alongside the hw capabilities, it is useful to know which of those have
been overridden by the user setting module parameters.
v2: Use __always_inline and BUILD_BUG magic
Signed-off-by: Chris Wilson
Acked-by: Jani Nikula
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_debugfs.c | 2
I want to print the struct from the error state and so would like to use
the existing struct definition as the template ala DEV_INFO*
v2: Use MEMBER() rather than p().
Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
Acked-by: Jani Nikula
Acked-by: Daniel Vetter
---
drivers/gpu/drm/i
On Mon, Feb 06, 2017 at 07:52:15PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,1/2] drm/i915: Mark the end of
> intel_ring_begin() and check in intel_ring_advance()
> URL : https://patchwork.freedesktop.org/series/19169/
> State : success
>
> == Summary
On Thu, Feb 02, 2017 at 03:02:41PM +, Chris Wilson wrote:
> We only operate on known extents (both for alloc/clear) and so we can use
> both the knowledge of the bind/unbind range along with the knowledge of
> the existing pagetable to avoid having to allocate temporary and
> auxiliary bitmaps.
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Mark the end of
intel_ring_begin() and check in intel_ring_advance()
URL : https://patchwork.freedesktop.org/series/19169/
State : success
== Summary ==
Series 19169v1 Series without cover letter
https://patchwork.freedeskto
== Series Details ==
Series: HDMI 2.0: Scrambling in DRM layer
URL : https://patchwork.freedesktop.org/series/19161/
State : success
== Summary ==
Series 19161v1 HDMI 2.0: Scrambling in DRM layer
https://patchwork.freedesktop.org/api/1.0/series/19161/revisions/1/mbox/
Test kms_force_connector
== Series Details ==
Series: series starting with [1/2] drm/i915: Mark the end of intel_ring_begin()
and check in intel_ring_advance()
URL : https://patchwork.freedesktop.org/series/19160/
State : failure
== Summary ==
Series 19160v1 Series without cover letter
https://patchwork.freedesktop.o
On Mon, Feb 6, 2017 at 1:23 PM, Daniel Stone wrote:
> Hi,
>
> On 6 February 2017 at 17:59, Daniel Vetter wrote:
>> On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote:
>>> This initial series implements 4 ringbuffers to give sufficient coverage
>>> for the
>>> range of priority levels
On Mon, Feb 6, 2017 at 12:59 PM, Daniel Vetter wrote:
> On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote:
>> This series of patches implements multiple ringbuffers and preemption for
>> Adreno
>> A5XX targets. Preemption allows a command to be interrupted at specific
>> preemption po
Hi,
On 6 February 2017 at 17:59, Daniel Vetter wrote:
> On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote:
>> This initial series implements 4 ringbuffers to give sufficient coverage for
>> the
>> range of priority levels requested by the GLES and compute extensions. The
>> targeted
On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote:
> This series of patches implements multiple ringbuffers and preemption for
> Adreno
> A5XX targets. Preemption allows a command to be interrupted at specific
> preemption points and execution switched to a different ringbuffer.
>
> T
In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
completion matches our context") I added a read to the irq tasklet
handler that compared the on-chip status with that of our sw tracking,
using an unguarded read of the request pointer to get the context and
beyond. Whilst we hold a
It is required that the caller declare the exact number of dwords they
wish to write into the ring. This is required for two reasons, we need
to allocate sufficient space for the entire command packet and we need
to be sure that the contents are completely written to avoid executing
stale data. The
On Mon, Feb 06, 2017 at 03:25:27PM +0200, Jani Nikula wrote:
> On Mon, 06 Feb 2017, Joonas Lahtinen wrote:
> > Convert all scripts to use /bin/sh shebang and fix all shellcheck
> > reported problems.
>
> Pro-tip, this is the place reserved in commit messages for describing
> *why* you think the c
Kinda no reason only to use them for drm-intel-next ...
Acked-by: Jani Nikula
Signed-off-by: Daniel Vetter
---
dim | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/dim b/dim
index 20eac8c58c58..457bf93d8a11 100755
--- a/dim
+++ b/dim
@@ -1232,9 +1232,9 @@ function dim_pul
== Series Details ==
Series: drm/i915/guc: Log significant events at the info level
URL : https://patchwork.freedesktop.org/series/19158/
State : failure
== Summary ==
Series 19158v1 drm/i915/guc: Log significant events at the info level
https://patchwork.freedesktop.org/api/1.0/series/19158/r
On Mon, Feb 06, 2017 at 05:33:34PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
> > static void reset_ring_common(struct intel_engine_cs *engine,
> > struct drm_i915_gem_request *request)
> > {
> > - struct intel_ring *ring = request->ring;
> > + if (request)
Chris Wilson writes:
> Following a reset, the context and page directory registers are lost.
> However, the queue of requests that we resubmit after the reset may
> depend upon them - the registers are restored from a context image, but
> that restore may be inhibited and may simply be absent fro
On Mon, Feb 06, 2017 at 01:54:52PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Let execlist_update_context() cover !FULL_PPGTT mode.
> URL : https://patchwork.freedesktop.org/series/19155/
> State : success
>
> == Summary ==
>
> Series 19155v1 drm/i915: Let execlist_up
On 2 February 2017 at 15:02, Chris Wilson wrote:
> Similar to how we already split the bind_vma for ggtt/aliasing_gtt, also
> split up the unbind for symmetry.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-g
Chris Wilson writes:
> On Mon, Feb 06, 2017 at 03:57:47PM +0200, Mika Kuoppala wrote:
>> Chris Wilson writes:
>>
>> > In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
>> > completion matches our context") I added a read to the irq tasklet
>> > handler that compared the on-chip
On Fri, Jan 27, 2017 at 11:24:22AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/lspcon: Fix resume time init due to low HPD
> URL : https://patchwork.freedesktop.org/series/18656/
> State : success
>
> == Summary ==
>
> Series 18656v1 drm/i915/lspcon: Fix resume time ini
On Mon, 06 Feb 2017, Chris Wilson wrote:
> Make the actual path we attempt to load for each of (DMC, GuC, HuC)
> overidable by the user. This helps testing new firmware releases.
And old firmware releases, and potentially helps bisect the kernel by
eliminating firmware changes.
> Signed-off-by:
On 2 February 2017 at 15:02, Chris Wilson wrote:
> The aliasing_ppgtt is a regular ppgtt, and we can use the regular
> i915_ppgtt_put() to properly tear it down.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel
On Mon, Feb 06, 2017 at 02:52:14PM +0100, Michal Wajdeczko wrote:
> On Mon, Feb 06, 2017 at 01:05:29PM +, Chris Wilson wrote:
> > Make the actual path we attempt to load for each of (DMC, GuC, HuC)
> > overidable by the user. This helps testing new firmware releases.
> >
> > Signed-off-by: Chr
On Mon, Feb 06, 2017 at 03:57:47PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
> > completion matches our context") I added a read to the irq tasklet
> > handler that compared the on-chip status with that of our sw tra
On Mon, Feb 06, 2017 at 03:57:47PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
> > completion matches our context") I added a read to the irq tasklet
> > handler that compared the on-chip status with that of our sw tra
Chris Wilson writes:
> In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
> completion matches our context") I added a read to the irq tasklet
> handler that compared the on-chip status with that of our sw tracking,
> using an unguarded read of the request pointer to get the contex
Reading the CRC files in debugfs will never
terminate. drv_suspend/debugfs-reader will leave a cat process around
which blocks all other access to the device until manually killed if
CRC files are not omitted.
Signed-off-by: Petri Latvala
---
tests/drv_suspend.c | 2 +-
1 file changed, 1 inserti
Chris Wilson writes:
> In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
> completion matches our context") I added a read to the irq tasklet
> handler that compared the on-chip status with that of our sw tracking,
> using an unguarded read of the request pointer to get the contex
On Mon, Feb 06, 2017 at 12:54:39PM +, Matthew Auld wrote:
> On 6 February 2017 at 08:45, Chris Wilson wrote:
> > As we now mark the reserved hole (drm_mm.head_node) with the special
> > UNEVICTABLE color, we can use the page coloring to avoid prefetching of
> > the CS beyond the end of the GTT
Chris Wilson writes:
> It is required that the caller declare the exact number of dwords they
> wish to write into the ring. This is required for two reasons, we need
> to allocate sufficient space for the entire command packet and we need
> to be sure that the contents are completely written to
== Series Details ==
Series: drm/i915: Let execlist_update_context() cover !FULL_PPGTT mode.
URL : https://patchwork.freedesktop.org/series/19155/
State : success
== Summary ==
Series 19155v1 drm/i915: Let execlist_update_context() cover !FULL_PPGTT mode.
https://patchwork.freedesktop.org/api/
On Mon, Feb 06, 2017 at 01:05:29PM +, Chris Wilson wrote:
> Make the actual path we attempt to load for each of (DMC, GuC, HuC)
> overidable by the user. This helps testing new firmware releases.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_params.c | 12 +++
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for reduced RF footprint.
This patch checks if the monitor supports scrambling, and if required,
enables it during the modeset.
V
Geminilake has a native HDMI 2.0 controller, which is capable of
driving clocks upto 594Mhz. This patch updates the max tmds clock
limit for the same.
V2: rebase
Cc: Ander
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/i915/intel_hdmi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a
From: Thierry Reding
This patch implements a small function that finds if a
given CEA db is hdmi-forum vendor specific data block
or not.
Signed-off-by: Thierry Reding
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_edid.c | 15 +++
include/linux/hdmi.h | 1 +
2 file
HDMI 2.0 spec defines a method to reduce the RF footprint while
operating at higher pixel clocks, which is called Scrambling.
Scrambling can be controlled over a new set of I2C registers
which are accessible over existing DDC I2C lines, called SCDC
register set.
This patch series contains 6 patche
From: Thierry Reding
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.
This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.
Signed-off-by: Thierry
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
HDMI 2.0 spec mandates scrambling for modes with pixel clock higher
than 340 MHz. This patch adds few new functions in drm layer for
core drivers to enable/disable scrambling.
This patch adds:
- A function to detect scrambling support parsing HF-VSDB
- A function to check scrambling status runtime
== Series Details ==
Series: series starting with [v3,1/6] drm/i915: Generate i915_params {} using a
macro
URL : https://patchwork.freedesktop.org/series/19149/
State : failure
== Summary ==
Series 19149v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/19149/revi
On Mon, 06 Feb 2017, Joonas Lahtinen wrote:
> Convert all scripts to use /bin/sh shebang and fix all shellcheck
> reported problems.
Pro-tip, this is the place reserved in commit messages for describing
*why* you think the change is needed or for the better. ;)
BR,
Jani.
>
> v2: Include tests/M
It is required that the caller declare the exact number of dwords they
wish to write into the ring. This is required for two reasons, we need
to allocate sufficient space for the entire command packet and we need
to be sure that the contents are completely written to avoid executing
stale data. The
In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch
completion matches our context") I added a read to the irq tasklet
handler that compared the on-chip status with that of our sw tracking,
using an unguarded read of the request pointer to get the context and
beyond. Whilst we hold a
On Mon, Feb 06, 2017 at 02:32:17PM +0200, Joonas Lahtinen wrote:
> On ma, 2017-02-06 at 09:51 +, Chris Wilson wrote:
> > Handling the dynamic charp module parameter requires us to copy it for
> > the error state, or remember to lock it when reading (in case it used
> > with 0600).
> >
> > Sign
Make the actual path we attempt to load for each of (DMC, GuC, HuC)
overidable by the user. This helps testing new firmware releases.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_params.c | 12
drivers/gpu/drm/i915/i915_params.h | 3 +++
drivers/gpu/drm/i915/
On 6 February 2017 at 08:45, Chris Wilson wrote:
> As we now mark the reserved hole (drm_mm.head_node) with the special
> UNEVICTABLE color, we can use the page coloring to avoid prefetching of
> the CS beyond the end of the GTT.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_
On Fri, 2017-02-03 at 14:17 -0800, Rodrigo Vivi wrote:
> There is a new version of DMC available for Geminilake.
>
> It's release notes only mention:
> - Enhancement in the FW to restore the PG2 state
>
> v2: Fixed the platform name on commit message.
> Noticed by Jani S.
>
> Cc: Jani Saarin
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Manipulate the Global GTT size
using I915_GTT_PAGE_SIZE
URL : https://patchwork.freedesktop.org/series/19148/
State : warning
== Summary ==
Series 19148v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0
On 6 February 2017 at 08:45, Chris Wilson wrote:
> The drm_mm range manager (within i915_address_space) uses a special
> drm_mm_node that excludes the unavailable range (beyond the end of the
> drm_mm). However, we play games with the global GTT to use the head_node
> to exclude the tail page but
On ma, 2017-02-06 at 09:51 +, Chris Wilson wrote:
> Handling the dynamic charp module parameter requires us to copy it for
> the error state, or remember to lock it when reading (in case it used
> with 0600).
>
> Signed-off-by: Chris Wilson
I'm bit hesitant that we merge known dead code here
On 6 February 2017 at 08:45, Chris Wilson wrote:
> I incorrectly converted the exclusion of the last 4096 bytes (that avoids
> any potential prefetching past the end of the GTT) to PAGE_SIZE and not
> to I915_GTT_PAGE_SIZE as it should be.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
On Mon, Feb 06, 2017 at 11:32:06AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Currently to establish whether GuC firmware has been loaded or
> submission enabled (default DRM log level), one has to detect
> the absence of the message saying that the load has been skipped
> and infer
On Mon, Feb 06, 2017 at 01:31:28PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > After resetting, show the requests that each engine restarts from in the
> > debug log.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
>
> Reviewed-by: Mika Kuoppala
Applied with the hope o
On Mon, Feb 06, 2017 at 11:32:06AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Currently to establish whether GuC firmware has been loaded or
> submission enabled (default DRM log level), one has to detect
> the absence of the message saying that the load has been skipped
> and infer
On Mon, Feb 06, 2017 at 07:03:39PM +0800, Zhi Wang wrote:
> Thanks for the merging. I guess that with your patches of keeping PD
> structure under aliasing PPGTT mode in 32bit page table, the amount
> of PDPs will not change anymore under aliasing PPGTT mode. :P
Yes. That's the idea atm, we will p
Chris Wilson writes:
> After resetting, show the requests that each engine restarts from in the
> debug log.
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --gi
From: Tvrtko Ursulin
Currently to establish whether GuC firmware has been loaded or
submission enabled (default DRM log level), one has to detect
the absence of the message saying that the load has been skipped
and infer the opposite.
It is better to log the fact GuC firmware has been loaded and
On Mon, Feb 06, 2017 at 11:24:53AM +, Chris Wilson wrote:
> On Mon, Feb 06, 2017 at 09:51:43AM +, Chris Wilson wrote:
> > They include useful material such as what mode the VM address space is
> > running in, what submission mode, extra quirks, etc.
> >
> > v2: Undef the right macro, use t
On Mon, Feb 06, 2017 at 09:51:43AM +, Chris Wilson wrote:
> They include useful material such as what mode the VM address space is
> running in, what submission mode, extra quirks, etc.
>
> v2: Undef the right macro, use type specific pretty printers
> v3: Use strcmp(TYPENAME) rather than crea
On ma, 2017-02-06 at 09:51 +, Chris Wilson wrote:
> Alongside the hw capabilities, it is useful to know which of those have
> been overridden by the user setting module parameters.
>
> Signed-off-by: Chris Wilson
> Acked-by: Jani Nikula
As discussed in IRC, with always_inline, this is (like
On Mon, Feb 06, 2017 at 01:04:58PM +0200, Petri Latvala wrote:
> gem_exec_reloc --list-subtests breaks otherwise.
>
> v2: use igt_subtest_group (Chris)
>
> CC: Chris Wilson
> Signed-off-by: Petri Latvala
Lgtm, thanks.
Reviewed-by: Chris Wilson
-Chris
--
Chris Wilson, Intel Open Source Techn
Thanks for the merging. I guess that with your patches of keeping PD
structure under aliasing PPGTT mode in 32bit page table, the amount of
PDPs will not change anymore under aliasing PPGTT mode. :P
On 02/06/17 18:58, Chris Wilson wrote:
On Mon, Feb 06, 2017 at 06:37:16PM +0800, Zhi Wang wrote
On ma, 2017-02-06 at 09:51 +, Chris Wilson wrote:
> They include useful material such as what mode the VM address space is
> running in, what submission mode, extra quirks, etc.
>
> v2: Undef the right macro, use type specific pretty printers
> v3: Use strcmp(TYPENAME) rather than creating per
gem_exec_reloc --list-subtests breaks otherwise.
v2: use igt_subtest_group (Chris)
CC: Chris Wilson
Signed-off-by: Petri Latvala
---
tests/gem_exec_reloc.c | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/tests/gem_exec_reloc.c b/tests/gem_ex
On Mon, Feb 06, 2017 at 06:37:16PM +0800, Zhi Wang wrote:
> execlist_update_context() will try to update PDPs in a context before a
> ELSP submission only for full PPGTT mode, while PDPs was populated during
> context initialization. Now the latter code path is removed. Let
> execlist_update_contex
execlist_update_context() will try to update PDPs in a context before a
ELSP submission only for full PPGTT mode, while PDPs was populated during
context initialization. Now the latter code path is removed. Let
execlist_update_context() also cover !FULL_PPGTT mode.
Cc: Tvrtko Ursulin
Cc: Michal W
On Mon, Feb 06, 2017 at 12:16:01PM +0200, Petri Latvala wrote:
> gem_exec_reloc --list-subtests breaks otherwise.
>
> CC: Chris Wilson
> Signed-off-by: Petri Latvala
> ---
> tests/gem_exec_reloc.c | 15 ---
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/tests/ge
Convert all scripts to use /bin/sh shebang and fix all shellcheck
reported problems.
v2: Include tests/Makefile.sources (Petri)
Signed-off-by: Joonas Lahtinen
Cc: Petri Latvala
Cc: Daniel Vetter
Cc: Jani Nikula
Reviewed-by: Petri Latvala
---
tests/Makefile.sources | 1 -
tests/check_d
Yep. Wait a second. :P
On 02/06/17 16:50, Chris Wilson wrote:
On Mon, Feb 06, 2017 at 04:18:23PM +0800, Zhi Wang wrote:
Hi Chris:
Thanks for the reply! :P Have you also fixed here with your new ideas?
in intel_lrc:
static u64 execlists_update_context(struct drm_i915_gem_request *rq)
{
gem_exec_reloc --list-subtests breaks otherwise.
CC: Chris Wilson
Signed-off-by: Petri Latvala
---
tests/gem_exec_reloc.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tests/gem_exec_reloc.c b/tests/gem_exec_reloc.c
index 78bb59c..012abc2 100644
--- a/tests
== Series Details ==
Series: drm/i915: Re-enable aliasing PPGTT mode.
URL : https://patchwork.freedesktop.org/series/19146/
State : warning
== Summary ==
Series 19146v1 drm/i915: Re-enable aliasing PPGTT mode.
https://patchwork.freedesktop.org/api/1.0/series/19146/revisions/1/mbox/
Test kms_f
Alongside the hw capabilities, it is useful to know which of those have
been overridden by the user setting module parameters.
Signed-off-by: Chris Wilson
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/dr
They include useful material such as what mode the VM address space is
running in, what submission mode, extra quirks, etc.
v2: Undef the right macro, use type specific pretty printers
v3: Use strcmp(TYPENAME) rather than creating per-type pretty printers
Signed-off-by: Chris Wilson
Reviewed-by:
Once upon a time before we had automated GPU state capture upon hangs,
we had intel_gpu_dump. Now we come almost full circle and reinstate that
view of the current GPU queues and registers by using the error capture
facility to snapshot the GPU state when debugfs/.../i915_gpu_info is
opened - which
I want to print the struct from the error state and so would like to use
the existing struct definition as the template ala DEV_INFO*
v2: Use MEMBER() rather than p().
Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
Acked-by: Jani Nikula
Acked-by: Daniel Vetter
---
drivers/gpu/drm/i
Handling the dynamic charp module parameter requires us to copy it for
the error state, or remember to lock it when reading (in case it used
with 0600).
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
drivers/gpu/drm/i915/i915_gpu_error.c | 22 +
The alpha_support module option can only take one of two values, so
assign it to a boolean type. The only advantage is in pretty printing
via /sys/module/i915/parameters/alpha_support and elsewhere.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Daniel Vetter
Acked-by: Jani N
Hi all,
First feature pile for 4.12:
- use atomic_commit for legay page flips, once more! (from Maarten)
- piles and piles of fixes and patches to make corner-cases more
robust in atomic code, execlist, gem, from lots of different folks
- remove pre-production w/a for bxt (Chris)
- taint the ke
On Mon, Feb 06, 2017 at 09:41:42AM +0100, Maarten Lankhorst wrote:
> Op 02-02-17 om 21:47 schreef Chris Wilson:
> > If we have any residual freed atomic state from earlier commits, flush
> > the freed list after performing the current modeset. This prevents the
> > freed list from ever-growing if u
== Series Details ==
Series: drm/i915: Restore context and pd for ringbuffer submission after reset
URL : https://patchwork.freedesktop.org/series/19110/
State : failure
== Summary ==
Series 19110v1 drm/i915: Restore context and pd for ringbuffer submission after
reset
https://patchwork.freed
On Mon, Feb 06, 2017 at 08:51:36AM +, Tvrtko Ursulin wrote:
>
> On 04/02/2017 01:23, Daniele Ceraolo Spurio wrote:
> >The only difference for the more recent of those macros is the version
> >of the *_reg__fw_domains function. Passing the function
> >prefix in allows us to re-use the same macr
On 04/02/2017 01:23, Daniele Ceraolo Spurio wrote:
The only difference for the more recent of those macros is the version
of the *_reg__fw_domains function. Passing the function
prefix in allows us to re-use the same macro to generate functions for
different GENs and will make it easier to add n
On Mon, Feb 06, 2017 at 04:18:23PM +0800, Zhi Wang wrote:
> Hi Chris:
> Thanks for the reply! :P Have you also fixed here with your new ideas?
>
> in intel_lrc:
>
> static u64 execlists_update_context(struct drm_i915_gem_request *rq)
> {
> struct intel_context *ce = &rq->ctx->engine[r
I incorrectly converted the exclusion of the last 4096 bytes (that avoids
any potential prefetching past the end of the GTT) to PAGE_SIZE and not
to I915_GTT_PAGE_SIZE as it should be.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
1 file changed, 2 insertions(+),
As we now mark the reserved hole (drm_mm.head_node) with the special
UNEVICTABLE color, we can use the page coloring to avoid prefetching of
the CS beyond the end of the GTT.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_evict.c | 10 --
drivers/gpu/drm/i915/i915_gem_gtt.
The drm_mm range manager (within i915_address_space) uses a special
drm_mm_node that excludes the unavailable range (beyond the end of the
drm_mm). However, we play games with the global GTT to use the head_node
to exclude the tail page but tell ourselves that the whole range is
available. This cau
Op 02-02-17 om 21:47 schreef Chris Wilson:
> If we have any residual freed atomic state from earlier commits, flush
> the freed list after performing the current modeset. This prevents the
> freed list from ever-growing if userspace manages to starve the kernel
> threads (i.e. we are never able to
On to, 2017-02-02 at 08:55 +, Chris Wilson wrote:
> In order to specialise a pretty printer for different types of module
> parameters using macro construction, the type names must be a single
> word. Use typedefs to construct the parameters using the modparams type
> shortnames.
>
> Signed-of
Hi Chris:
Thanks for the reply! :P Have you also fixed here with your new ideas?
in intel_lrc:
static u64 execlists_update_context(struct drm_i915_gem_request *rq)
{
struct intel_context *ce = &rq->ctx->engine[rq->engine->id];
struct i915_hw_ppgtt *ppgtt = rq->ctx->ppgtt; //
On Mon, Feb 06, 2017 at 03:04:55PM +0800, Zhi Wang wrote:
> Aliasing PPGTT mode is broken due to recent changes. Mostly boot the
> system with i915.enable_ppgtt=1 will lead a kernel crash.
>
> This patch fixes this problem by:
>
> - PPGTT page table will not be shrinkable if working under aliasin
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