On Tue, Oct 03, 2017 at 05:27:29AM +, Mahesh Kumar wrote:
> Hi,
>
> sorry for late reply, it was India site holiday.
>
> On Friday 29 September 2017 12:42 AM, Rodrigo Vivi wrote:
> > On Thu, Sep 28, 2017 at 07:02:59PM +, Chris Wilson wrote:
> > > Quoting Rodrigo Vivi (2017-09-28 19:51:48)
According to Spec for SKL+: "Isochronous Priority Control.
If enabled, Display sends demoted requests once the transition
watermark is reached. If transition watermark is not enabled,
Display sends demoted requests when the display buffer is full."
The commit 'e57f1c02155f ("drm/i915/gen9+: Add ha
As Chris noticed the current organization is confusing
and inheritance is not clear.
So, let's split it in GEN_FEATURES _PLATFORM
where new GEN inherit features from previous gens and
Platforms only use gen features plus what ever is specific
for that platform and shouldn't be passed on.
Cc: Chri
Let's organize this in a way that it gets more obvious
when looking to the platform colors and in a easier
way to get inherited.
v2: Add comma at the end (Jani), when possible.
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_pci.c | 6 --
On 10/2/2017 7:31 PM, Michal Wajdeczko wrote:
We want to keep GuC specific code in separated files.
v2: move all functions in single patch (Joonas)
fix old checkpatch issues (Sagar)
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Sagar Arun Kamble
Reviewed-by
On 10/2/2017 7:31 PM, Michal Wajdeczko wrote:
We don't want to make aggregate uc functions to be too detailed.
This will also make future patch easier.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_uc.c | 9 ++---
On 10/2/2017 7:31 PM, Michal Wajdeczko wrote:
From: Sagar Arun Kamble
This patch adds new function intel_uc_init_mmio which will initialize
MMIO access related variables prior to uc load/init.
v2: Removed unnecessary export of guc_send_init_regs. Created
intel_uc_init_mmio that currently wra
On Mon, 02 Oct 2017, Joonas Lahtinen wrote:
> On Mon, 2017-10-02 at 12:24 +0300, Jani Nikula wrote:
>> Signed-off-by: Jani Nikula
>
> Yay :)
>
> Reviewed-by: Joonas Lahtinen
Pushed, thanks.
Jani.
--
Jani Nikula, Intel Open Source Technology Center
On Mon, 02 Oct 2017, Joonas Lahtinen wrote:
> On Mon, 2017-10-02 at 12:23 +0300, Jani Nikula wrote:
>> Avoid extra pipelines for no good reason.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Joonas Lahtinen
Pushed, thanks.
Jani.
--
Jani Nikula, Intel Open Source Technology Center
__
On Mon, 02 Oct 2017, Rodrigo Vivi wrote:
> On Mon, Oct 02, 2017 at 01:02:28PM +, Jani Nikula wrote:
>> On Thu, 28 Sep 2017, Rodrigo Vivi wrote:
>> > Let's organize this in a way that it gets more obvious
>> > when looking to the platform colors and in a easier
>> > way to get inherited.
>> >
Hi,
sorry for late reply, it was India site holiday.
On Friday 29 September 2017 12:42 AM, Rodrigo Vivi wrote:
On Thu, Sep 28, 2017 at 07:02:59PM +, Chris Wilson wrote:
Quoting Rodrigo Vivi (2017-09-28 19:51:48)
Although Bspec state this Workaround is only relevant for SKL:All.
The wa_da
Hi,
On Friday 29 September 2017 12:21 AM, Rodrigo Vivi wrote:
According to Spec for SKL+: "Isochronous Priority Control.
If enabled, Display sends demoted requests once the transition
watermark is reached. If transition watermark is not enabled,
Display sends demoted requests when the display b
On Mon, 2 Oct 2017 15:22:24 -0400
bfie...@fieldses.org (J. Bruce Fields) wrote:
> Mainly I'd just like to know which you're asking for. Do you want me to
> apply this, or to ACK it so someone else can? If it's sent as a series
> I tend to assume the latter.
>
> But in this case I'm assuming it'
== Series Details ==
Series: tests/gem_bad_length: drop gem_bad_length.c
URL : https://patchwork.freedesktop.org/series/31292/
State : success
== Summary ==
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
Test kms_setmode:
Subgroup
== Series Details ==
Series: Drop tests for object creation from stolen
URL : https://patchwork.freedesktop.org/series/31290/
State : success
== Summary ==
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
Test kms_flip:
Subgroup flip
== Series Details ==
Series: tests/gem_bad_length: drop gem_bad_length.c
URL : https://patchwork.freedesktop.org/series/31292/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
b5404f8435f828ca039a2e46be629b3d4c92465b meson: Follow suit with the renaming
of k
Most of the gem_bad_length code is compiled out because creating
a zero-length object is not allowed anymore by i915 and thus it is
not possible to execute it. The remaining part checks that creation of
a zero-length object does indeed fail, which is also checked by
gem_create/create-invalid-size.
== Series Details ==
Series: Drop tests for object creation from stolen
URL : https://patchwork.freedesktop.org/series/31290/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
b5404f8435f828ca039a2e46be629b3d4c92465b meson: Follow suit with the renaming
of km
== Series Details ==
Series: 2-in-1: Organize feature inheritance and disable IPC.
URL : https://patchwork.freedesktop.org/series/31090/
State : success
== Summary ==
Series 31090v1 2-in-1: Organize feature inheritance and disable IPC.
https://patchwork.freedesktop.org/api/1.0/series/31090/rev
The feature was never merged and there has been no progress in the
last year. The wrappers are using a wrong ioctl number (38 is
HAS_POOLED_EU and not CREATE_VERSION) and extensions of the
gem_create and get_aperture ioctl structures that never made it into
the kernel.
Tests that were using the wra
The feature was never merged and there has been no progress in the
last year. The tests are currently excluded from compilation with and
ifdef.
Cc: Chris Wilson
Signed-off-by: Daniele Ceraolo Spurio
---
tests/gem_concurrent_all.c | 35 ---
1 file changed, 35 dele
The feature was never merged and there has been no progress in the
last year. The subtests are currently skipping on all platforms by
checking a field in the get_aperture ioctl structure that doesn't
exist in the kernel version of the struct.
Signed-off-by: Daniele Ceraolo Spurio
---
tests/Makef
The feature was never merged and there has been no progress in the
last year. The subtests are currently skipping on all platforms by
checking a field in the get_aperture ioctl structure that doesn't
exist in the kernel version of the struct.
Signed-off-by: Daniele Ceraolo Spurio
---
tests/gem_p
The feature was never merged and there has been no progress in the
last year. The subtests are currently skipping on all platforms by
checking a field in the get_aperture ioctl structure that doesn't
exist in the kernel version of the struct.
Signed-off-by: Daniele Ceraolo Spurio
---
tests/gem_p
The feature was never merged and there has been no progress in the
last year. The subtest is currently skipping on all platforms by checking
a field in the get_aperture ioctl structure that doesn't exist in the
kernel version of the struct.
Signed-off-by: Daniele Ceraolo Spurio
---
tests/gem_cre
The tests were merged before the feature, which never made it to the
driver; the last update I could find ([1]) is more than a year old.
The tests are using a wrong getparam number and planned extensions
to the gem_create and get_aperture ioctl structures that don't match
what's currently in i915.
On Mon, Oct 02, 2017 at 01:02:28PM +, Jani Nikula wrote:
> On Thu, 28 Sep 2017, Rodrigo Vivi wrote:
> > Let's organize this in a way that it gets more obvious
> > when looking to the platform colors and in a easier
> > way to get inherited.
> >
> > Signed-off-by: Rodrigo Vivi
> > ---
> > dri
== Series Details ==
Series: drm/i915/cnl: Do not add an extra page for precaution in the Gen10 LRC
size
URL : https://patchwork.freedesktop.org/series/31284/
State : success
== Summary ==
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252 +1
Hi Matthew,
[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v4.14-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Matthew-Auld/huge-gtt-pages/20171002-212557
base
Hi Peter, friendly reminder. Could you, please, respond?
-Original Message-
From: Rogozhkin, Dmitry V
Sent: Wednesday, September 20, 2017 1:15 PM
To: Rogozhkin, Dmitry V ; pet...@infradead.org
Cc: Intel-gfx@lists.freedesktop.org
Subject: RE: [Intel-gfx] [RFC 04/10] drm/i915: Expose a PMU
== Series Details ==
Series: drm/i915/cnl: Do not add an extra page for precaution in the Gen10 LRC
size
URL : https://patchwork.freedesktop.org/series/31284/
State : success
== Summary ==
Series 31284v1 drm/i915/cnl: Do not add an extra page for precaution in the
Gen10 LRC size
https://patc
BSpec indicates exactly 16750 DWORDs (17 pages), plus one page for PPHWSP.
Suggested-by: Joonas Lahtinen
Fixes: 7fd0b1a ("drm/i915/cnl: Add Gen10 LRC size")
Signed-off-by: Oscar Mateo
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Ben Widawsky
---
drivers/gpu/drm/i915/intel_engine_cs.c | 2
On Fri, Sep 29, 2017 at 12:32:10PM +, David Weinehall wrote:
> On Thu, Sep 28, 2017 at 08:19:29PM -, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm/i915: Add has_psr-flag to gen9lp
> > URL : https://patchwork.freedesktop.org/series/28488/
> > State : success
> >
> > == Su
== Series Details ==
Series: drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put()
URL : https://patchwork.freedesktop.org/series/31283/
State : failure
== Summary ==
Series 31283v1 drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put()
https://patchw
On Mon, Oct 02, 2017 at 01:53:07PM +, Imre Deak wrote:
> The common lane power down flag of a DPIO PHY has a funky semantic:
> after the initial enabling of the PHY (so from a disabled state) this
> flag will be clear. It will be set only after the PHY will be used for
> the first time (for ins
Tetsuo Handa wrote:
> Michael S. Tsirkin wrote:
> > On Mon, Sep 11, 2017 at 07:27:19PM +0900, Tetsuo Handa wrote:
> > > Hello.
> > >
> > > I noticed that virtio_balloon is using register_oom_notifier() and
> > > leak_balloon() from virtballoon_oom_notify() might depend on
> > > __GFP_DIRECT_RECLAI
On Sun, Oct 01, 2017 at 03:30:38PM -0400, Jérémy Lefaure wrote:
> Hi everyone,
> Using ARRAY_SIZE improves the code readability. I used coccinelle (I
> made a change to the array_size.cocci file [1]) to find several places
> where ARRAY_SIZE could be used instead of other macros or sizeof
> divisio
On Mon, Oct 02, 2017 at 07:35:54AM +0200, Greg KH wrote:
> On Sun, Oct 01, 2017 at 08:52:20PM -0400, Jérémy Lefaure wrote:
> > On Mon, 2 Oct 2017 09:01:31 +1100
> > "Tobin C. Harding" wrote:
> >
> > > > In order to reduce the size of the To: and Cc: lines, each patch of the
> > > > series is sent
Replace instances of drm_framebuffer_reference/unreference() with
*_get/put() suffixes and drm_dev_unref with *_put() suffix
because get/put is shorter and consistent with the
kernel use of *_get/put suffixes.
Done with following coccinelle semantic patch
@@
expression ex;
@@
(
-drm_framebuff
Michal Hocko wrote:
> [Hmm, I do not see the original patch which this has been a reply to]
urbl.hostedemail.com and b.barracudacentral.org blocked my IP address,
and the rest are "Recipient address rejected: Greylisted" or
"Deferred: 451-4.3.0 Multiple destination domains per transaction is
unsu
On Mon, Oct 02, 2017 at 07:55:57AM +, Imre Deak wrote:
> On GLK and CNL enabling a pipe with its pipe scaler enabled will result
> in a FIFO underrun. This happens only once after driver loading or
> system/runtime resume, more specifically after power well 1 gets
> enabled; subsequent modesets
One of main doubts I had when starting maintaining the
fixes branches was when to move them, but also how, to-where,
and when avoid moving and stay on the current one.
So this scripts aims to avoid doubts and mistakes on fixes
maintainance besides making all bases more clear and
standardized.
Cc:
Thanks for the patch! :)
2017-10-01 22:30 GMT+03:00 Jérémy Lefaure :
> Hi everyone,
> Using ARRAY_SIZE improves the code readability. I used coccinelle (I
> made a change to the array_size.cocci file [1]) to find several places
> where ARRAY_SIZE could be used instead of other macros or sizeof
>
Em Sun, 1 Oct 2017 20:52:20 -0400
Jérémy Lefaure escreveu:
> Anyway, I can tell to each maintainer that they can apply the patches
> they're concerned about and next time I may send individual patches.
In the case of media, we'll handle it as if they were individual ones.
Thanks,
Mauro
== Series Details ==
Series: drm/i915: Fix DDI PHY init if it was already on
URL : https://patchwork.freedesktop.org/series/31265/
State : success
== Summary ==
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252 +1
Test kms_flip:
Subgr
== Series Details ==
Series: drm/i915: Guc code reorg
URL : https://patchwork.freedesktop.org/series/31266/
State : failure
== Summary ==
Series 31266v1 drm/i915: Guc code reorg
https://patchwork.freedesktop.org/api/1.0/series/31266/revisions/1/mbox/
Test gem_ctx_switch:
Subgroup basi
On Mon 02-10-17 17:29:47, Michael S. Tsirkin wrote:
> On Mon, Oct 02, 2017 at 04:19:00PM +0200, Michal Hocko wrote:
> > On Mon 02-10-17 17:11:55, Michael S. Tsirkin wrote:
> > > On Mon, Oct 02, 2017 at 01:50:35PM +0200, Michal Hocko wrote:
> > [...]
> > > > and some
> > > > other call path is alloc
On Mon, Oct 02, 2017 at 04:19:00PM +0200, Michal Hocko wrote:
> On Mon 02-10-17 17:11:55, Michael S. Tsirkin wrote:
> > On Mon, Oct 02, 2017 at 01:50:35PM +0200, Michal Hocko wrote:
> [...]
> > > and some
> > > other call path is allocating while holding the lock. But you seem to be
> > > right and
On Mon 02-10-17 17:11:55, Michael S. Tsirkin wrote:
> On Mon, Oct 02, 2017 at 01:50:35PM +0200, Michal Hocko wrote:
[...]
> > and some
> > other call path is allocating while holding the lock. But you seem to be
> > right and
> > leak_balloon
> > tell_host
> > virtqueue_add_outbuf
> > v
== Series Details ==
Series: drm/i915: Fix DDI PHY init if it was already on
URL : https://patchwork.freedesktop.org/series/31265/
State : success
== Summary ==
Series 31265v1 drm/i915: Fix DDI PHY init if it was already on
https://patchwork.freedesktop.org/api/1.0/series/31265/revisions/1/mbo
On Mon, Oct 02, 2017 at 01:50:35PM +0200, Michal Hocko wrote:
> On Mon 02-10-17 20:33:52, Tetsuo Handa wrote:
> > Michal Hocko wrote:
> > > [Hmm, I do not see the original patch which this has been a reply to]
> >
> > urbl.hostedemail.com and b.barracudacentral.org blocked my IP address,
> > and t
On Mon, 02 Oct 2017, Jani Nikula wrote:
> On Mon, 11 Sep 2017, Sean Paul wrote:
>> On Mon, Sep 11, 2017 at 9:16 AM, Jani Nikula wrote:
>>> Add new environment variable $DIM_GPG_KEYID for configuring the GPG key
>>> ID of the key to use for signing tags for pull requests. The tags will
>>> be sig
Other pending series will try to fix current GuC code.
Lets move some functions to dedicated files now to
make place for these changes and preserve history.
v2: move guc files in one step (Joonas)
don't rename dev_priv (Joonas)
uc_init_mmio (Sagar)
Cc: Joonas Lahtinen
Cc: Chris Wilson
C
From: Sagar Arun Kamble
This patch adds new function intel_uc_init_mmio which will initialize
MMIO access related variables prior to uc load/init.
v2: Removed unnecessary export of guc_send_init_regs. Created
intel_uc_init_mmio that currently wraps guc_init_send_regs. (Michal)
Cc: Michal Wajdec
We don't want to make aggregate uc functions to be too detailed.
This will also make future patch easier.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_uc.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i
We want to keep each uC specific code in separate files.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Sagar Arun Kamble
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_huc.h | 38 ++
drivers/gpu/drm/i915/intel_uc.h
We want to keep GuC specific code in separated files.
v2: move all functions in single patch (Joonas)
fix old checkpatch issues (Sagar)
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Sagar Arun Kamble
Reviewed-by: Sagar Arun Kamble #1
---
drivers/gpu/drm/i915/M
This is a prerequisite to unblock next steps.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Sagar Arun Kamble
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/intel_uc.c| 159 +
We don't need it here.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_uc.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 6966349..38ec880 100644
-
The common lane power down flag of a DPIO PHY has a funky semantic:
after the initial enabling of the PHY (so from a disabled state) this
flag will be clear. It will be set only after the PHY will be used for
the first time (for instance due to enabling the corresponding pipe) and
then become unuse
On 2 October 2017 at 13:31, Joonas Lahtinen
wrote:
> On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
>> When SW enables the use of 2M/1G pages, it must disable the GTT cache.
>>
>> v2: don't disable for Cherryview which doesn't even support 48b PPGTT!
>>
>> v3: explicitly check that the sys
On Mon, 02 Oct 2017, Daniel Vetter wrote:
> On Mon, Oct 02, 2017 at 12:45:19PM +0300, Jani Nikula wrote:
>> It's not perfect or exactly the same, but prefer fewer lines of special
>> casing anyway.
>>
>> Signed-off-by: Jani Nikula
>
> Ack on both patches in this series.
Pushed, thanks.
BR,
Jan
On Mon, Oct 02, 2017 at 12:45:19PM +0300, Jani Nikula wrote:
> It's not perfect or exactly the same, but prefer fewer lines of special
> casing anyway.
>
> Signed-off-by: Jani Nikula
Ack on both patches in this series.
-Daniel
> ---
> dim | 8 ++--
> 1 file changed, 2 insertions(+), 6 delet
On Mon, Oct 02, 2017 at 01:50:05PM +0300, Petri Latvala wrote:
> CC: Maarten Lankhorst
> Signed-off-by: Petri Latvala
Reviewed-by: Arkadiusz Hiler
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo
On Thu, 28 Sep 2017, Rodrigo Vivi wrote:
> Let's organize this in a way that it gets more obvious
> when looking to the platform colors and in a easier
> way to get inherited.
>
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_pci.c | 6 --
> 1 file changed, 4 insertions(+), 2
== Series Details ==
Series: meson: Follow suit with the renaming of kms_pipe_color
URL : https://patchwork.freedesktop.org/series/31264/
State : success
== Summary ==
Test gem_eio:
Subgroup in-flight-contexts:
pass -> DMESG-WARN (shard-hsw) fdo#102886 +1
Test kms
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> When SW enables the use of 2M/1G pages, it must disable the GTT cache.
>
> v2: don't disable for Cherryview which doesn't even support 48b PPGTT!
>
> v3: explicitly check that the system does support 2M/1G pages
>
> Signed-off-by: Matthew
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> Before we can enable 64K pages through the IPS bit, we must first enable
> it through MMIO, otherwise the page-walker will simply ignore it.
>
> v2: add comment mentioning that 64K is BDW+
>
> v3: move to more suitable home
>
> Signed-off-
On Fri, 2017-09-29 at 11:59 +0200, Maarten Lankhorst wrote:
> In the future I want to allow tests to commit more properties,
> but for this to work I have to fix all properties to work better
> with atomic commit. Instead of special casing each
> property make a bitmask for all property changed fla
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> We can't mix 64K and 4K pte's in the same page-table, so for now we
> align 64K objects to 2M to avoid any potential mixing. This is
> potentially wasteful but in reality shouldn't be too bad since this only
> applies to the virtual address s
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> For the 48b PPGTT try to align the vma start address to the required
> page size boundary to guarantee we use said page size in the gtt. If we
> are dealing with multiple page sizes, we can't guarantee anything and
> just align to the largest
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> Move the setting/clearing of the vma->pages to a vm operation. Doing so
> neatens things up a little, but more importantly gives us a sane place
> to also set/clear the vma->pages_sizes, which we introduce later in
> preparation for supportin
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> Enable transparent-huge-pages through gemfs by mounting with
> huge=within_size.
>
> v2: sprinkle within_size comment
>
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_gemfs.c | 2
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
> Not a fully blown gemfs, just our very own tmpfs kernel mount. Doing so
> moves us away from the shmemfs shm_mnt, and gives us the much needed
> flexibility to do things like set our own mount options, namely huge=
> which should allow us to
On Mon 02-10-17 20:33:52, Tetsuo Handa wrote:
> Michal Hocko wrote:
> > [Hmm, I do not see the original patch which this has been a reply to]
>
> urbl.hostedemail.com and b.barracudacentral.org blocked my IP address,
> and the rest are "Recipient address rejected: Greylisted" or
> "Deferred: 451-4
== Series Details ==
Series: meson: Follow suit with the renaming of kms_pipe_color
URL : https://patchwork.freedesktop.org/series/31264/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
1e99f8b8d2563d7f5c4e82932bab15abc5eacaef meson: Distribute meson build s
On Mon, Oct 02, 2017 at 11:04:16AM +0100, Chris Wilson wrote:
> Not all compilers are able to determine that pg is guarded by wait_fuses
> and so may think that pg is used uninitialized.
>
> Reported-by: Geert Uytterhoeven
> Fixes: b2891eb2531e ("drm/i915/hsw+: Add has_fuses power well attribute"
On Mon, 2017-10-02 at 11:23 +0100, Chris Wilson wrote:
> Quoting Joonas Lahtinen (2017-10-02 11:03:30)
> > On Sat, 2017-09-30 at 13:57 +0800, Weinan Li wrote:
> > > Let GVT-g VM read the CSB and CSB write pointer from virtual HWSP, not all
> > > the host support this feature, need to check the BIT(
On Sat, Sep 30, 2017 at 12:35:33PM -0700, kei...@keithp.com wrote:
> From: Keith Packard
>
> These ioctls replace drmWaitVBlank and add ns time resolution and
> 64-bit sequence numbers to comply with the Vulkan API specifications.
>
> The tests were derived from the existing kms_vblank tests wit
On Fri, 2017-09-29 at 11:59 +0200, Maarten Lankhorst wrote:
> In between tests, some tests can do the following sequence:
>
> (pipe C configured with FB)
> igt_plane_set_fb(primary (pipe C), NULL);
> /* Clear rotation property first */
> igt_display_commit2(display, COMMIT_UNIVERSAL);
>
> /* disa
CC: Maarten Lankhorst
Signed-off-by: Petri Latvala
---
tests/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/meson.build b/tests/meson.build
index 53d02d13..6cb3584a 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -157,6 +157,7 @@ test_progs = [
== Series Details ==
Series: drm/i915: Silence compiler warning for hsw_power_well_enable()
URL : https://patchwork.freedesktop.org/series/31260/
State : warning
== Summary ==
Series 31260v1 drm/i915: Silence compiler warning for hsw_power_well_enable()
https://patchwork.freedesktop.org/api/1.
== Series Details ==
Series: drm/i915/glk, cnl: Implement WaDisableScalarClockGating (rev2)
URL : https://patchwork.freedesktop.org/series/31094/
State : success
== Summary ==
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252
fdo#102252 https
Quoting Joonas Lahtinen (2017-10-02 11:03:30)
> On Sat, 2017-09-30 at 13:57 +0800, Weinan Li wrote:
> > Let GVT-g VM read the CSB and CSB write pointer from virtual HWSP, not all
> > the host support this feature, need to check the BIT(3) of caps in PVINFO.
> >
> > Signed-off-by: Weinan Li
> > Cc
On Fri, 2017-09-29 at 11:59 +0200, Maarten Lankhorst wrote:
> igt_output_set_pipe with PIPE_ANY used to mean that we bind the
> output
> to any pipe, but this is now a deprecated alias for PIPE_NONE, and
> means the output will be unbound.
>
> Because of this it's better to change output->pending_
Not all compilers are able to determine that pg is guarded by wait_fuses
and so may think that pg is used uninitialized.
Reported-by: Geert Uytterhoeven
Fixes: b2891eb2531e ("drm/i915/hsw+: Add has_fuses power well attribute")
Signed-off-by: Chris Wilson
Cc: Imre Deak
Cc: Arkadiusz Hiler
---
On Sat, 2017-09-30 at 13:57 +0800, Weinan Li wrote:
> Let GVT-g VM read the CSB and CSB write pointer from virtual HWSP, not all
> the host support this feature, need to check the BIT(3) of caps in PVINFO.
>
> Signed-off-by: Weinan Li
> Cc: Chris Wilson
> @@ -396,6 +393,12 @@ static bool csb_
It's not perfect or exactly the same, but prefer fewer lines of special
casing anyway.
Signed-off-by: Jani Nikula
---
dim | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/dim b/dim
index bfa6ef010806..866a420d4ef6 100755
--- a/dim
+++ b/dim
@@ -1615,12 +1615,8 @@ funct
Signed tags have the signature at the end. Strip them out when preparing
pull mail overviews.
Signed-off-by: Jani Nikula
---
dim | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dim b/dim
index 866a420d4ef6..fc16d114632f 100755
--- a/dim
+++ b/dim
@@ -1483,7 +1483,7 @@ functio
On Mon, 2017-10-02 at 12:23 +0300, Jani Nikula wrote:
> Avoid extra pipelines for no good reason.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Joonas Lahtinen
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
___
Inte
On Mon, 2017-10-02 at 12:24 +0300, Jani Nikula wrote:
> Signed-off-by: Jani Nikula
Yay :)
Reviewed-by: Joonas Lahtinen
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
___
Intel-gfx mailing list
Intel-gfx@lists.free
Op 29-09-17 om 15:13 schreef Mika Kahola:
> On Fri, 2017-09-29 at 11:59 +0200, Maarten Lankhorst wrote:
>> Most of these tests have no reason to look at those members,
>> so try other ways of getting the information.
>>
>> Signed-off-by: Maarten Lankhorst
> Reviewed-by: Mika Kahola
Thanks, patch
On Thu, Sep 28, 2017 at 11:44:52AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are
> enabled
> URL : https://patchwork.freedesktop.org/series/31058/
> State : warning
>
> == Summary ==
>
> Series 31058v1 drm/i915/g
Signed-off-by: Jani Nikula
---
dim | 2 ++
1 file changed, 2 insertions(+)
diff --git a/dim b/dim
index d2f165893161..bfa6ef010806 100755
--- a/dim
+++ b/dim
@@ -1612,6 +1612,8 @@ function dim_update_next_continue
cat > $req_file <<-HERE
Hi all,
+ The foll
Avoid extra pipelines for no good reason.
Signed-off-by: Jani Nikula
---
dim | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dim b/dim
index 678f34d5f7bd..d2f165893161 100755
--- a/dim
+++ b/dim
@@ -602,7 +602,7 @@ function commit_rerere_cache
return 1
On Mon, 11 Sep 2017, Sean Paul wrote:
> On Mon, Sep 11, 2017 at 9:16 AM, Jani Nikula wrote:
>> Add new environment variable $DIM_GPG_KEYID for configuring the GPG key
>> ID of the key to use for signing tags for pull requests. The tags will
>> be signed if the key ID is set, otherwise annotated t
On Wed, Aug 16, 2017 at 04:50:01PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/gen9+: Set same power state before hibernation image
> save/restore
> URL : https://patchwork.freedesktop.org/series/28873/
> State : success
Thanks for the review, pushed it to -dinq.
>
>
On Fri, 2017-09-22 at 16:11 +0100, Lionel Landwerlin wrote:
> Verifies that the kernel programs slices correctly based by reading
> the value of PWR_CLK_STATE register.
>
> v2: Add subslice tests (Lionel)
> Use MI_SET_PREDICATE for further verification when available (Lionel)
>
> Signed-off-b
[Hmm, I do not see the original patch which this has been a reply to]
On Mon 02-10-17 06:59:12, Michael S. Tsirkin wrote:
> On Sun, Oct 01, 2017 at 02:44:34PM +0900, Tetsuo Handa wrote:
> > Tetsuo Handa wrote:
> > > Michael S. Tsirkin wrote:
> > > > On Mon, Sep 11, 2017 at 07:27:19PM +0900, Tetsuo
+ Zhenyu and Zhi
On Sat, 2017-09-30 at 02:58 +, Zhang, Xiaolin wrote:
> On 09/28/2017 10:25 PM, Joonas Lahtinen wrote:
> > On Thu, 2017-09-28 at 10:09 +0800, Xiaolin Zhang wrote:
> > > if vgpu active, the page table entry should be initialized after
> > > allocation and then the hypersivor can
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