Hi Manasi,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
linus/master next-20200612]
[cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next v5.7]
[if your patch
Hi Chris,
On Sun, Jun 07, 2020 at 11:20:45PM +0100, Chris Wilson wrote:
> Reduce the smoke depth by trimming the number of contexts, repetitions
> and wait times. This is in preparation for a less greedy scheduler that
> tries to be fair across contexts, resulting in a great many more context
>
Hi Manasi,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
linus/master next-20200612]
[cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next v5.7]
[if your patch
== Series Details ==
Series: drm/i915/execlists: Lift opportunistic process_csb to before engine lock
URL : https://patchwork.freedesktop.org/series/78277/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621_full -> Patchwork_17944_full
== Series Details ==
Series: VRR capable attach prop in i915, DPCD helper, VRR debugfs (rev2)
URL : https://patchwork.freedesktop.org/series/78278/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17946
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc
reset (rev2)
URL : https://patchwork.freedesktop.org/series/78268/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621_full -> Patchwork_17943_full
== Series Details ==
Series: drm/i915: Update bw_buddy pagemask table
URL : https://patchwork.freedesktop.org/series/78276/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621_full -> Patchwork_17942_full
Summary
---
== Series Details ==
Series: VRR capable attach prop in i915, DPCD helper, VRR debugfs (rev2)
URL : https://patchwork.freedesktop.org/series/78278/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: VRR capable attach prop in i915, DPCD helper, VRR debugfs (rev2)
URL : https://patchwork.freedesktop.org/series/78278/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
46b7d1d313bd drm/dp: DRM DP helper for reading Ignore MSA from DPCD
b0b10c7d0ea5
From: Bhanuprakash Modem
[Why]
It's useful to know the min and max vrr range for IGT testing.
[How]
Expose the min and max vfreq for the connector via a debugfs file
on the connector, "vrr_range".
Example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range
v7:
* Fix cmpilation due to rebase
v6:
Hi Daniel,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next linus/master v5.7 next-20200612]
[cannot apply to drm/drm-next]
[if your patch is applied
== Series Details ==
Series: VRR capable attach prop in i915, DPCD helper, VRR debugfs
URL : https://patchwork.freedesktop.org/series/78278/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK
From: Aditya Swarup
This function sets the VRR property for connector based
on the platform support, EDID monitor range and DP sink
DPCD capability of outputing video without msa
timing information.
v5:
* Fix the vrr prop not being set in kernel (Manasi)
* Unset the prop on connector disconnect
From: Bhanuprakash Modem
[Why]
It's useful to know the min and max vrr range for IGT testing.
[How]
Expose the min and max vfreq for the connector via a debugfs file
on the connector, "vrr_range".
Example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range
v6:
* Rebase (manasi)
v5:
* Rename to
DP sink device sets the Ignore MSA bit in its
DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
ignore the MSA video timing parameters and its ability to support
seamless video timing change over a range of timing exposed by
DisplayID and EDID.
This is required for the sink to indicate
This is an initial set of patches for enabling VRR support in i915.
This series has patches for:
1. adding a drm dpcd helper to read ignore MSA
bit in sink's DPCD indicating sink support for VRR
2. Attach and set VRR capable connector prop for Intel DP conn
3. Expose VRR min and max through
== Series Details ==
Series: drm/i915/execlists: Lift opportunistic process_csb to before engine lock
URL : https://patchwork.freedesktop.org/series/78277/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17944
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc
reset (rev2)
URL : https://patchwork.freedesktop.org/series/78268/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17943
Since the process_csb() does not require us to hold the
engine->active.lock, we can move the opportunistic flush before
direction submission to outside of the lock.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 21 ++---
1 file
Quoting Mika Kuoppala (2020-06-12 23:05:18)
> Chris Wilson writes:
>
> > gen3 does not fully flush MI stores to memory on MI_FLUSH, such that a
> > subsequent read from e.g. the sampler can bypass the store and read the
> > stale value from memory. This is a serious issue when we are using MI
>
Chris Wilson writes:
> gen3 does not fully flush MI stores to memory on MI_FLUSH, such that a
> subsequent read from e.g. the sampler can bypass the store and read the
> stale value from memory. This is a serious issue when we are using MI
> stores to rewrite the batches for relocation, as it
== Series Details ==
Series: drm/i915/icl+: Fix hotplug interrupt disabling after storm detection
URL : https://patchwork.freedesktop.org/series/78258/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621_full -> Patchwork_17937_full
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc
reset (rev2)
URL : https://patchwork.freedesktop.org/series/78268/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc
reset (rev2)
URL : https://patchwork.freedesktop.org/series/78268/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
459d02ce47b5 drm/atomic-helper: reset vblank on crtc reset
-:295:
Chris Wilson writes:
> Since the process_csb() does not require us to hold the
> engine->active.lock, we can move the opportunistic flush before
> direction submission to outside of the lock.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
>
== Series Details ==
Series: drm/i915: Update bw_buddy pagemask table
URL : https://patchwork.freedesktop.org/series/78276/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17942
Summary
---
On Fri, 2020-06-12 at 14:18 -0700, Souza, Jose wrote:
> On Fri, 2020-06-12 at 21:57 +0100, Mun, Gwan-gyeong wrote:
> > On Tue, 2020-05-26 at 15:14 -0700, José Roberto de Souza wrote:
> > > This registers will be used to implement PSR2 software tracking.
> > >
> > > BSpec: 55229
> > > BSpec: 50424
On Fri, 2020-06-12 at 21:57 +0100, Mun, Gwan-gyeong wrote:
> On Tue, 2020-05-26 at 15:14 -0700, José Roberto de Souza wrote:
> > This registers will be used to implement PSR2 software tracking.
> >
> > BSpec: 55229
> > BSpec: 50424
> > BSpec: 50420
> > Signed-off-by: José Roberto de Souza
> >
> -Original Message-
> From: Intel-gfx On Behalf Of
> Rodrigo Vivi
> Sent: Wednesday, June 10, 2020 1:18 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Alexandre Oliva ; Nikula, Jani ;
> sta...@vger.kernel.org; Chris Wilson
> Subject: [Intel-gfx] [PATCH] drm/i915: Include asm sources for
On Tue, 2020-05-26 at 15:14 -0700, José Roberto de Souza wrote:
> This registers will be used to implement PSR2 software tracking.
>
> BSpec: 55229
> BSpec: 50424
> BSpec: 50420
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/i915_reg.h | 68 ++-
>
On 2020-06-12 12:00 p.m., Daniel Vetter wrote:
> Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
> which means vblank state isn't ill-defined and fail-y at driver load
> before the first modeset on each crtc.
>
> Signed-off-by: Daniel Vetter
> Cc: Alex Deucher
> Cc:
Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
which means vblank state isn't ill-defined and fail-y at driver load
before the first modeset on each crtc.
v2: Compile fix. Oops.
Signed-off-by: Daniel Vetter
Cc: VMware Graphics
Cc: Roland Scheidegger
---
A recent bspec update removed the LPDDR4 single channel entry from the
buddy register table, but added a new four-channel entry.
Workaround 1409767108 hasn't been updated with any guidance for four
channel configurations, so we leave that alternate table unchanged for
now.
Bspec 49218
Fixes:
On Fri, 2020-06-12 at 19:30 +0300, Ville Syrjälä wrote:
> On Tue, May 26, 2020 at 03:14:46PM -0700, José Roberto de Souza wrote:
> > All GEN12 platforms supports PSR2 selective fetch but not all GEN12
> > platforms supports PSR2 hardware tracking(aka RKL).
> >
> > This feature consists in
Hi Daniel,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next linus/master v5.7 next-20200612]
[cannot apply to drm/drm-next]
[if your patch is applied
Filed https://gitlab.freedesktop.org/drm/intel/-/issues/2029 and re-reported.
-Original Message-
From: Imre Deak
Sent: Friday, June 12, 2020 4:20 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
; Sarvela, Tomi P ;
Latvala, Petri
Subject: Re: ✗ Fi.CI.BAT: failure for
== Series Details ==
Series: drm/i915/icl+: Fix hotplug interrupt disabling after storm detection
URL : https://patchwork.freedesktop.org/series/78258/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17937
On Fri, Jun 12, 2020 at 10:21:31PM +0300, Ville Syrjälä wrote:
> On Fri, Jun 12, 2020 at 12:12:25PM -0700, Manasi Navare wrote:
> > On Fri, Jun 12, 2020 at 10:01:19PM +0300, Ville Syrjälä wrote:
> > > On Fri, Jun 12, 2020 at 11:44:13AM -0700, Manasi Navare wrote:
> > > > On Fri, Jun 12, 2020 at
On Fri, Jun 12, 2020 at 12:12:25PM -0700, Manasi Navare wrote:
> On Fri, Jun 12, 2020 at 10:01:19PM +0300, Ville Syrjälä wrote:
> > On Fri, Jun 12, 2020 at 11:44:13AM -0700, Manasi Navare wrote:
> > > On Fri, Jun 12, 2020 at 09:36:37PM +0300, Ville Syrjälä wrote:
> > > > On Fri, Jun 12, 2020 at
On Fri, Jun 12, 2020 at 10:01:19PM +0300, Ville Syrjälä wrote:
> On Fri, Jun 12, 2020 at 11:44:13AM -0700, Manasi Navare wrote:
> > On Fri, Jun 12, 2020 at 09:36:37PM +0300, Ville Syrjälä wrote:
> > > On Fri, Jun 12, 2020 at 11:25:42AM -0700, Manasi Navare wrote:
> > > > On Fri, Jun 05, 2020 at
On Fri, Jun 12, 2020 at 11:44:13AM -0700, Manasi Navare wrote:
> On Fri, Jun 12, 2020 at 09:36:37PM +0300, Ville Syrjälä wrote:
> > On Fri, Jun 12, 2020 at 11:25:42AM -0700, Manasi Navare wrote:
> > > On Fri, Jun 05, 2020 at 12:03:19AM +0300, Ville Syrjälä wrote:
> > > > On Thu, Jun 04, 2020 at
On Fri, Jun 12, 2020 at 09:36:37PM +0300, Ville Syrjälä wrote:
> On Fri, Jun 12, 2020 at 11:25:42AM -0700, Manasi Navare wrote:
> > On Fri, Jun 05, 2020 at 12:03:19AM +0300, Ville Syrjälä wrote:
> > > On Thu, Jun 04, 2020 at 08:01:03PM +, Almahallawy, Khaled wrote:
> > > > On Thu, 2020-06-04
On Fri, Jun 12, 2020 at 11:33:45AM -0700, Manasi Navare wrote:
> On Thu, Jun 04, 2020 at 08:01:03PM +, Almahallawy, Khaled wrote:
> > On Thu, 2020-06-04 at 22:06 +0300, Ville Syrjälä wrote:
> > > On Thu, Jun 04, 2020 at 10:33:48AM +0530, Vidya Srinivas wrote:
> > > > Signed-off-by: Khaled
On Fri, Jun 12, 2020 at 11:25:42AM -0700, Manasi Navare wrote:
> On Fri, Jun 05, 2020 at 12:03:19AM +0300, Ville Syrjälä wrote:
> > On Thu, Jun 04, 2020 at 08:01:03PM +, Almahallawy, Khaled wrote:
> > > On Thu, 2020-06-04 at 22:06 +0300, Ville Syrjälä wrote:
> > > > On Thu, Jun 04, 2020 at
On Thu, Jun 04, 2020 at 08:01:03PM +, Almahallawy, Khaled wrote:
> On Thu, 2020-06-04 at 22:06 +0300, Ville Syrjälä wrote:
> > On Thu, Jun 04, 2020 at 10:33:48AM +0530, Vidya Srinivas wrote:
> > > Signed-off-by: Khaled Almahallawy
> > > Signed-off-by: Vidya Srinivas
> > > ---
> > >
On Fri, Jun 05, 2020 at 12:03:19AM +0300, Ville Syrjälä wrote:
> On Thu, Jun 04, 2020 at 08:01:03PM +, Almahallawy, Khaled wrote:
> > On Thu, 2020-06-04 at 22:06 +0300, Ville Syrjälä wrote:
> > > On Thu, Jun 04, 2020 at 10:33:48AM +0530, Vidya Srinivas wrote:
> > > > Signed-off-by: Khaled
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc reset
URL : https://patchwork.freedesktop.org/series/78268/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621_full -> Patchwork_17941_full
On Fri, Jun 12, 2020 at 1:24 PM Harry Wentland wrote:
>
> On 2020-06-12 12:00 p.m., Daniel Vetter wrote:
> > Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
> > which means vblank state isn't ill-defined and fail-y at driver load
> > before the first modeset on each crtc.
Hi,
On 6/11/20 11:21 PM, Uwe Kleine-König wrote:
Hello,
On Mon, Jun 08, 2020 at 04:35:00PM +0200, Daniel Vetter wrote:
On Sat, Jun 06, 2020 at 10:25:45PM +0200, Hans de Goede wrote:
Hi All,
This patch series converts the i915 driver's cpde for controlling the
panel's backlight with an
Hi,
On 6/11/20 11:37 PM, Uwe Kleine-König wrote:
Hello,
On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote:
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29
Hi,
On 6/12/20 12:20 AM, Uwe Kleine-König wrote:
On Sun, Jun 07, 2020 at 08:18:34PM +0200, Hans de Goede wrote:
The pwm-crc code is using 2 different enable bits:
1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
2. bit 0 of the BACKLIGHT_EN register
So far we've kept the PWM_OUTPUT_ENABLE
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc reset
URL : https://patchwork.freedesktop.org/series/78268/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17941
On Tue, May 26, 2020 at 03:14:46PM -0700, José Roberto de Souza wrote:
> All GEN12 platforms supports PSR2 selective fetch but not all GEN12
> platforms supports PSR2 hardware tracking(aka RKL).
>
> This feature consists in software program registers with the damaged
> area of each plane this way
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc reset
URL : https://patchwork.freedesktop.org/series/78268/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [1/8] drm/atomic-helper: reset vblank on crtc reset
URL : https://patchwork.freedesktop.org/series/78268/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8594ab0d8772 drm/atomic-helper: reset vblank on crtc reset
-:295:
Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
which means vblank state isn't ill-defined and fail-y at driver load
before the first modeset on each crtc.
Signed-off-by: Daniel Vetter
Cc: VMware Graphics
Cc: Roland Scheidegger
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c |
The atomic helpers try really hard to not lose track of things,
duplicating enabled tracking in the driver is at best confusing.
Double-enabling or disabling is a bug in atomic helpers.
In the fb_dirty function we can just assume that the fb always exists,
simple display pipe helpers guarantee
Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
which means vblank state isn't ill-defined and fail-y at driver load
before the first modeset on each crtc.
Signed-off-by: Daniel Vetter
Cc: Philipp Zabel
Cc: Shawn Guo
Cc: Sascha Hauer
Cc: Pengutronix Kernel Team
Cc:
Same patch as the mipi-dbi one, atomic tracks this for us already, we
just have to check the right thing.
Signed-off-by: Daniel Vetter
Cc: "Noralf Trønnes"
---
drivers/gpu/drm/tiny/repaper.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git
Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
which means vblank state isn't ill-defined and fail-y at driver load
before the first modeset on each crtc.
Signed-off-by: Daniel Vetter
Cc: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_crtc.c | 3 +--
1 file changed, 1
Only when vblanks are supported ofc.
Some drivers do this already, but most unfortunately missed it. This
opens up bugs after driver load, before the crtc is enabled for the
first time. syzbot spotted this when loading vkms as a secondary
output. Given how many drivers are buggy it's best to
Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
which means vblank state isn't ill-defined and fail-y at driver load
before the first modeset on each crtc.
Signed-off-by: Daniel Vetter
Cc: Chun-Kuang Hu
Cc: Philipp Zabel
Cc: Matthias Brugger
Cc:
Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
which means vblank state isn't ill-defined and fail-y at driver load
before the first modeset on each crtc.
Signed-off-by: Daniel Vetter
Cc: Alex Deucher
Cc: Nicholas Kazlauskas
Cc: Harry Wentland
Cc: Rodrigo Siqueira
Looks good to me.
Reviewed-by: Gwan-gyeong Mun
On Tue, 2020-05-26 at 15:14 -0700, José Roberto de Souza wrote:
> Future patches will bring PSR2 selective fetch configuration
> validation but most of the configuration checks will be used for HW
> tracking and selective fetch so the reoder was
On Fri, 2020-06-12 at 18:37 +0300, Ville Syrjälä wrote:
> On Fri, Jun 12, 2020 at 03:30:59PM +, Souza, Jose wrote:
> > On Fri, 2020-06-12 at 18:25 +0300, Ville Syrjälä wrote:
> > > On Tue, May 26, 2020 at 03:14:43PM -0700, José Roberto de Souza wrote:
> > > > This property will be used by PSR2
On Fri, Jun 12, 2020 at 03:30:59PM +, Souza, Jose wrote:
> On Fri, 2020-06-12 at 18:25 +0300, Ville Syrjälä wrote:
> > On Tue, May 26, 2020 at 03:14:43PM -0700, José Roberto de Souza wrote:
> > > This property will be used by PSR2 software tracking, adding it to
> > > GEN12+.
> >
> > Is there
On Sun, Jun 07, 2020 at 08:18:34PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> So far we've kept the PWM_OUTPUT_ENABLE bit set when disabling the PWM,
> this commit
Hello,
On Mon, Jun 08, 2020 at 04:35:00PM +0200, Daniel Vetter wrote:
> On Sat, Jun 06, 2020 at 10:25:45PM +0200, Hans de Goede wrote:
> > Hi All,
> >
> > This patch series converts the i915 driver's cpde for controlling the
> > panel's backlight with an external PWM controller to use the atomic
On Mon, Jun 08, 2020 at 01:07:12PM +0200, Hans de Goede wrote:
> Hi,
>
> On 6/8/20 5:50 AM, Andy Shevchenko wrote:
> > On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
> > > When the user requests a high enough period ns value, then the
> > > calculations in pwm_lpss_prepare() might
Hello,
On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote:
> Implement the pwm_ops.get_state() method to complete the support for the
> new atomic PWM API.
>
> Signed-off-by: Hans de Goede
> ---
> drivers/pwm/pwm-crc.c | 29 +
> 1 file changed, 29
On Fri, 2020-06-12 at 18:25 +0300, Ville Syrjälä wrote:
> On Tue, May 26, 2020 at 03:14:43PM -0700, José Roberto de Souza wrote:
> > This property will be used by PSR2 software tracking, adding it to
> > GEN12+.
>
> Is there actual userspace that uses this?
Only Weston for now:
== Series Details ==
Series: drm/i915/gt: Flush gen3 relocs harder, again (rev2)
URL : https://patchwork.freedesktop.org/series/78230/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621_full -> Patchwork_17938_full
Summary
== Series Details ==
Series: drm/i915/selftests: Move test flush to outside vm->mutex
URL : https://patchwork.freedesktop.org/series/78263/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17940
Summary
On Tue, May 26, 2020 at 03:14:43PM -0700, José Roberto de Souza wrote:
> This property will be used by PSR2 software tracking, adding it to
> GEN12+.
Is there actual userspace that uses this?
>
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4
This feature is supported from GEN9+, but this time it focuses on
supporting of PSR2 software tracking for GEN12+.
Looks good to me.
Reviewed-by: Gwan-gyeong Mun
On Tue, 2020-05-26 at 15:14 -0700, José Roberto de Souza wrote:
> This property will be used by PSR2 software tracking, adding it to
Quoting Tvrtko Ursulin (2020-06-12 16:04:15)
>
> On 12/06/2020 15:55, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-06-12 15:44:51)
> >> From: Tvrtko Ursulin
> >>
> >> As per our locking rules it is not allowed to wait on requests while
> >> holding locks. In this case we were trying to
On 12/06/2020 15:55, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-06-12 15:44:51)
From: Tvrtko Ursulin
As per our locking rules it is not allowed to wait on requests while
holding locks. In this case we were trying to idle the GPU while holding
the vm->mutex.
Synchronous eviction
== Series Details ==
Series: series starting with [1/3] drm/i915/execlists: Lift opportunistic
process_csb to before engine lock
URL : https://patchwork.freedesktop.org/series/78262/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17939
Quoting Tvrtko Ursulin (2020-06-12 15:44:51)
> From: Tvrtko Ursulin
>
> As per our locking rules it is not allowed to wait on requests while
> holding locks. In this case we were trying to idle the GPU while holding
> the vm->mutex.
Synchronous eviction would like to have a word.
>
From: Tvrtko Ursulin
As per our locking rules it is not allowed to wait on requests while
holding locks. In this case we were trying to idle the GPU while holding
the vm->mutex.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 5 +++--
1 file changed, 3
Since the process_csb() does not require us to hold the
engine->active.lock, we can move the opportunistic flush before
direction submission to outside of the lock.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 21 ++---
1 file changed, 14 insertions(+),
Rather than having special case code for opportunistically calling
process_csb() and performing a direct submit while holding the engine
spinlock for submitting the request, simply call the tasklet directly.
This allows us to retain the direct submission path, including the CS
draining to allow
Inside schedule_out, we do extra work upon idling the context, such as
updating the runtime, kicking off retires, kicking virtual engines.
However, if we are in a series of processing single requests per
contexts, we may find ourselves scheduling out the context, only to
immediately schedule it
== Series Details ==
Series: drm/i915/gt: Flush gen3 relocs harder, again (rev2)
URL : https://patchwork.freedesktop.org/series/78230/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17938
Summary
---
On Fri, Jun 12, 2020 at 01:04:19PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/icl+: Fix hotplug interrupt disabling after storm detection
> URL : https://patchwork.freedesktop.org/series/78258/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from
On Fri, Jun 12, 2020 at 03:17:31PM +0300, Imre Deak wrote:
> Atm, hotplug interrupts on TypeC ports are left enabled after detecting
> an interrupt storm, fix this.
>
> Reported-by: Kunal Joshi
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/351
> Bugzilla:
== Series Details ==
Series: drm/i915/gt: Flush gen3 relocs harder, again (rev2)
URL : https://patchwork.freedesktop.org/series/78230/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e754040f8747 drm/i915/gt: Flush gen3 relocs harder, again
-:22: ERROR:GIT_COMMIT_ID: Please use
== Series Details ==
Series: drm/i915/icl+: Fix hotplug interrupt disabling after storm detection
URL : https://patchwork.freedesktop.org/series/78258/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8621 -> Patchwork_17937
gen3 does not fully flush MI stores to memory on MI_FLUSH, such that a
subsequent read from e.g. the sampler can bypass the store and read the
stale value from memory. This is a serious issue when we are using MI
stores to rewrite the batches for relocation, as it means that the batch
is reading
Atm, hotplug interrupts on TypeC ports are left enabled after detecting
an interrupt storm, fix this.
Reported-by: Kunal Joshi
References: https://gitlab.freedesktop.org/drm/intel/-/issues/351
Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/1964
Cc: Kunal Joshi
Cc:
On Fri, Jun 12, 2020 at 12:12:42AM +0200, Uwe Kleine-König wrote:
> On Mon, Jun 08, 2020 at 01:07:12PM +0200, Hans de Goede wrote:
> > On 6/8/20 5:50 AM, Andy Shevchenko wrote:
> > > On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
> > > > When the user requests a high enough period
== Series Details ==
Series: intel: sync i915_pciids.h with kernel
URL : https://patchwork.freedesktop.org/series/78256/
State : failure
== Summary ==
Applying: intel: sync i915_pciids.h with kernel
Using index info to reconstruct a base tree...
A intel/i915_pciids.h
Falling back to
== Series Details ==
Series: drm/i915/display: Fix the encoder type check (rev2)
URL : https://patchwork.freedesktop.org/series/76891/
State : failure
== Summary ==
Applying: drm/i915/display: Fix the encoder type check
Using index info to reconstruct a base tree...
M
From: Gandi Ramadevi
Add DG1 PCI ID
Signed-off-by: Gandi Ramadevi
---
intel/i915_pciids.h | 4
1 file changed, 4 insertions(+)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index 662d8351..3de6e574 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -605,4 +605,8 @@
Quoting Chris Wilson (2020-06-12 10:23:30)
> Quoting Mika Kuoppala (2020-06-12 10:14:55)
> > Chris Wilson writes:
> >
> > > gen3 does not fully flush MI stores to memory on MI_FLUSH, such that a
> > > subsequent read from e.g. the sampler can bypass the store and read the
> > > stale value from
Quoting Mika Kuoppala (2020-06-12 10:14:55)
> Chris Wilson writes:
>
> > gen3 does not fully flush MI stores to memory on MI_FLUSH, such that a
> > subsequent read from e.g. the sampler can bypass the store and read the
> > stale value from memory. This is a serious issue when we are using MI
>
Chris Wilson writes:
> gen3 does not fully flush MI stores to memory on MI_FLUSH, such that a
> subsequent read from e.g. the sampler can bypass the store and read the
> stale value from memory. This is a serious issue when we are using MI
> stores to rewrite the batches for relocation, as it
Quoting Matthew Auld (2020-06-12 10:04:55)
> On 11/06/2020 19:04, Chris Wilson wrote:
> > If we find ourselves trying to reuse a misplaced but active vma, we
> > currently try to discard it to avoid having to wait to unbind it
> > (upsetting the current user fo the vma). An alternative to marking
On 11/06/2020 19:04, Chris Wilson wrote:
If we find ourselves trying to reuse a misplaced but active vma, we
currently try to discard it to avoid having to wait to unbind it
(upsetting the current user fo the vma). An alternative to marking it as
a dicarded vma and keeping it in both the
> -Original Message-
> From: Kulkarni, Vandita
> Sent: Friday, June 12, 2020 1:53 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Kulkarni, Vandita
>
> Subject: [PATCH] drm/i915/display: Fix the encoder type check
>
> For all ddi, encoder->type holds output type as ddi,
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