== Series Details ==
Series: drm/i915: Implement display WA #1142:kbl, cfl, cml
URL : https://patchwork.freedesktop.org/series/82073/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9053_full -> Patchwork_18569_full
Summary
== Series Details ==
Series: drm/i915: Add plane .{min, max}_width() and .max_height() vfuncs
URL : https://patchwork.freedesktop.org/series/82071/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9053_full -> Patchwork_18568_full
== Series Details ==
Series: drm/i915: Add support for LTTPR non-transparent link training mode
(rev2)
URL : https://patchwork.freedesktop.org/series/81968/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9053_full -> Patchwork_18567_full
cc back a few others who were unintentionally dropped from the thread earlier.
Someone (at Google) helped me dig into this a little more and they
found a document titled "eDP Backlight Brightness bit alignment" sent
out for review in January 2017. I registered for a new account (google
is a
== Series Details ==
Series: drm/i915: Implement display WA #1142:kbl, cfl, cml
URL : https://patchwork.freedesktop.org/series/82073/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9053 -> Patchwork_18569
Summary
---
Hi Dan,
On Thu, 24 Sep 2020 11:18:30 +0300 Dan Carpenter
wrote:
>
> The "i" iterator is never set to zero. This probably doesn't affect
> testing because GCC sometimes initializes variables and also we have a
> new pluggin to initialize stack variables to zero.
>
> Fixes: 7edd32a9e614
== Series Details ==
Series: series starting with [v9,01/11] HAX to make DSC work on the icelake
test system
URL : https://patchwork.freedesktop.org/series/82068/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9050_full -> Patchwork_18566_full
== Series Details ==
Series: drm/i915: Add plane .{min, max}_width() and .max_height() vfuncs
URL : https://patchwork.freedesktop.org/series/82071/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9053 -> Patchwork_18568
== Series Details ==
Series: drm/i915: Add support for LTTPR non-transparent link training mode
(rev2)
URL : https://patchwork.freedesktop.org/series/81968/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9053 -> Patchwork_18567
== Series Details ==
Series: series starting with [1/3] drm/i915: Nuke lspcon_downsampling
URL : https://patchwork.freedesktop.org/series/82067/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9050_full -> Patchwork_18565_full
== Series Details ==
Series: drm/i915: Add support for LTTPR non-transparent link training mode
(rev2)
URL : https://patchwork.freedesktop.org/series/81968/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [v4,1/3] drm/i915/display: Ignore
IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
URL : https://patchwork.freedesktop.org/series/82066/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9050_full -> Patchwork_18564_full
== Series Details ==
Series: series starting with [01/11] mm: update the documentation for vfree
URL : https://patchwork.freedesktop.org/series/82063/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9049_full -> Patchwork_18563_full
On Thu, 2020-09-24 at 22:48 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrj...@linux.intel.com
> >
>
> Implement display w/a #1142. This supposedly fixes some underruns
> with FBC+VTd. Bspec says we should use the same programming regardless
> of circumstances. Apparently we
== Series Details ==
Series: series starting with [v9,01/11] HAX to make DSC work on the icelake
test system
URL : https://patchwork.freedesktop.org/series/82068/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9050 -> Patchwork_18566
From: Ville Syrjälä
Implement display w/a #1142. This supposedly fixes some underruns
with FBC+VTd. Bspec says we should use the same programming regardless
of circumstances. Apparently we should flip the magic bits before
turning on any planes so let's put this into the early w/as.
Cc: Lee
== Series Details ==
Series: series starting with [v9,01/11] HAX to make DSC work on the icelake
test system
URL : https://patchwork.freedesktop.org/series/82068/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [v9,01/11] HAX to make DSC work on the icelake
test system
URL : https://patchwork.freedesktop.org/series/82068/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
82d24d08f989 HAX to make DSC work on the icelake test system
On 9/24/20 10:27 AM, pet...@infradead.org wrote:
> So my current todo list is:
>
> - Change RT PULL
> - Change DL PULL
> - Add migrate_disable() tracer; exactly like preempt/irqoff, except
>measuring task-runtime instead of cpu-time.
> - Add a mode that measures actual interference.
> -
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev14)
URL : https://patchwork.freedesktop.org/series/69290/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9048_full -> Patchwork_18562_full
Summary
---
== Series Details ==
Series: series starting with [1/3] drm/i915: Nuke lspcon_downsampling
URL : https://patchwork.freedesktop.org/series/82067/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9050 -> Patchwork_18565
Summary
== Series Details ==
Series: series starting with [1/3] drm/i915: Nuke lspcon_downsampling
URL : https://patchwork.freedesktop.org/series/82067/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
On Thu, 24 Sep 2020 19:55:10 +0200
Thomas Gleixner wrote:
> On Thu, Sep 24 2020 at 08:32, Steven Rostedt wrote:
> > On Thu, 24 Sep 2020 08:57:52 +0200
> > Thomas Gleixner wrote:
> >
> >> > Now as for migration disabled nesting, at least now we would have
> >> > groupings of this, and perhaps
On Thu, Sep 24, 2020 at 09:48:02PM +0300, Imre Deak wrote:
> To prepare for a follow-up LTTPR change factor out a helper to disable
> the training pattern in DPCD. We'll need to do this for each LTTPR
> (without programming the port to output the idle pattern) when training
> in LTTPR
From: Ville Syrjälä
Reduce this maintenance nightmare a bit by converting the plane
min/max width/height stuff into vfuncs.
Now, if I could just think of a nice way to also use this for
intel_mode_valid_max_plane_size()...
Signed-off-by: Ville Syrjälä
---
Add the helpers and register definitions needed to read out the common
and per-PHY LTTPR capabilities and perform link training in the LTTPR
non-transparent mode.
v2:
- Add drm_dp_dpcd_read_phy_link_status() and DP_PHY_LTTPR() here instead
of adding these to i915. (Ville)
Cc:
By default LTTPRs should be in transparent link training mode,
nevertheless in this patch we switch to this default mode explicitly.
The DP Standard recommends this, supposedly because an LTTPR may be left
in the non-transparent mode (by BIOS, previous kernel, or after reset
due to a firmware
The DP Standard's recommendation is to use the LTTPR non-transparent
mode link training if LTTPRs are detected, so let's do this.
Besides power-saving, the advantages of this are that the maximum number
of LTTPRs can only be used in non-transparent mode (the limit is 5-8 in
transparent mode), and
This patchset is v2 of [1], addressing the comments from Ville and an
issue in the last patch with the per-PHY capability readout (needs to be
done after switching to non-transparent mode).
[1] https://patchwork.freedesktop.org/series/81968/
Cc: dri-de...@lists.freedesktop.org
Cc: Ville Syrjälä
To prepare for a follow-up LTTPR change factor out a helper to disable
the training pattern in DPCD. We'll need to do this for each LTTPR
(without programming the port to output the idle pattern) when training
in LTTPR non-transparent mode.
While at it also move the disable-link-training logic
An LTTPR can be trained with training pattern 4 even if the DPCD
revision is < 1.4, but drm_dp_training_pattern_mask() would change
pattern 4 to pattern 3 on those DPCD revisions.
Since intel_dp_training_pattern() makes already sure that the proper
training pattern is used, all that needs to be
Split the prepare, link training, fallback-handling steps into their own
functions for clarity and as a preparation for the upcoming LTTPR
changes.
While at it also:
- Unexport and inline intel_dp_set_idle_link_train(), which is used at a
single place.
- Add some documentation to functions that
From: Maarten Lankhorst
Dump debugfs and planar links as well, this will make it easier to debug
when things go wrong.
v4:
* Rebase
Changes since v1:
- Report planar slaves as such, now that we have the plane_state switch.
Changes since v2:
- Rebase on top of the new plane format dumping
From: Maarten Lankhorst
With bigjoiner, there will be 2 pipes driving 2 halfs of 1 transcoder,
because of this, we need a pipe_mode for various calculations, including
for example watermarks, plane clipping, etc.
v6:
* renaming in separate function, only pipe_mode here (Ville)
* Add description
From: Maarten Lankhorst
Unfortunately I have no way to test this, but it should be correct
if the bios sets up bigjoiner in a sane way.
Skip iterating over bigjoiner slaves, only the master has the state we
care about.
Add the width of the bigjoiner slave to the reconstructed fb.
Hide the
From: Maarten Lankhorst
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
Also update timestamping constants, because slave crtc's are not
updated in drm_atomic_helper_update_legacy_modeset_state().
This should be enough
From: Maarten Lankhorst
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
eDP does not support bigjoiner, so do not expose bigjoiner only
modes on the eDP port.
v7:
* Add can_bigjoiner() helper
From: Maarten Lankhorst
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied
From: Maarten Lankhorst
Make sure that when a plane is set in a bigjoiner mode, we will add
their counterpart to the atomic state as well. This will allow us to
make sure all state is available when planes are checked.
Because of the funny interactions with bigjoiner and planar YUV
formats,
From: Maarten Lankhorst
We need to look at hw.fb for the framebuffer, and add the translation
for the slave_plane_state. With these changes we set the correct
rectangle on the bigjoiner slave, and don't set incorrect
src/dst/visibility on the slave plane.
v2:
* Manual rebase (Manasi)
From: Maarten Lankhorst
Enabling is done in a special sequence and so should plane updates
be. Ideally the end user never notices the second pipe is used,
so use the vblank evasion to cover both pipes.
This way ideally everything will be tear free, and updates are
really atomic as userspace
From: Maarten Lankhorst
DSC is available on the display emulator, but not set in DPCD.
Override the entries to allow bigjoiner testing.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_dp_helper.c | 4 ++--
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+), 2
No functional changes in this patch.
With Bigjoiner, there are 2 pipes driving 2 halfs of 1
transcoder. The transcoder_mode has the full timings, and is used
for configuring the transcoder with the intended mode after
joining the 2 halves.
To clear the confusion, we rename intel_set_pipe_timings
From: Ville Syrjälä
intel_dp_ycbcr420_config() is rather pointless. Just inline it
directly into intel_dp_compute_config(). This gets rid of the
ugly double assignment of output_format.
Not really sure what the best policy would be when the user
supplies a mode classiefied by the display as
From: Ville Syrjälä
crtc_state->lspcon_downsampling isn't particularly useful at
the moment since we can't even do proper readout for it.
Let's get rid of it. Will help with unifying the LSPCON with
the regular DFP YCbCr output support.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
Remove the lspcon special case from intel_dp_compute_config() and
just treat it like any other DFP than can do 4:4:4->4:2:0 conversion.
The only difference between the two codepaths was that the lspcon
code tried to already halve port_clock. That was just total nonsense
as
== Series Details ==
Series: series starting with [v4,1/3] drm/i915/display: Ignore
IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
URL : https://patchwork.freedesktop.org/series/82066/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9050 -> Patchwork_18564
On Thu, Sep 24 2020 at 08:32, Steven Rostedt wrote:
> On Thu, 24 Sep 2020 08:57:52 +0200
> Thomas Gleixner wrote:
>
>> > Now as for migration disabled nesting, at least now we would have
>> > groupings of this, and perhaps the theorists can handle that. I mean,
>> > how is this much different
> -Original Message-
> From: Ville Syrjälä
> Sent: Thursday, September 24, 2020 3:46 AM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
>
> On Thu, Sep 24, 2020 at 12:37:47AM +, Srivatsa, Anusha
For platforms without selective fetch this register is reserved so
do not write 0 to it.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Due to the debugfs flag, has_psr2 in CRTC state could have a different
value than psr.psr2_enabled and it was causing PSR2 subfeatures(DC3CO
and selective fetch) to be set to not a expected state.
So here only taking in consideration the parameter and debugfs flag
when computing PSR state, this
Another step towards PSR2 selective fetch, here programming plane
selective fetch registers and MAN_TRK_CTL enabling selective fetch but
for now it is fetching the whole area of the planes.
The damaged area calculation will come as next and final step.
v2:
- removed warn on when no plane is
On Thu, 2020-09-24 at 14:27 +0100, Mun, Gwan-gyeong wrote:
> On Wed, 2020-09-23 at 10:09 -0700, Souza, Jose wrote:
> > On Wed, 2020-09-23 at 10:10 -0700, José Roberto de Souza wrote:
> > > On Wed, 2020-09-23 at 14:02 +0100, Mun, Gwan-gyeong wrote:
> > > > On Thu, 2020-09-17 at 18:02 -0700, José
Hi Chris,
Okay to push this series?
Thanks,
Umesh
On Thu, Aug 20, 2020 at 11:01:56AM -0700, Umesh Nerlige Ramappa wrote:
Allow user to map the OA buffer and also trigger reports into it.
CI fixes:
v1: Fixes a memory corruption due to addition of OA whitelist on demand.
v2: Spinlock when
== Series Details ==
Series: series starting with [01/11] mm: update the documentation for vfree
URL : https://patchwork.freedesktop.org/series/82063/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9049 -> Patchwork_18563
== Series Details ==
Series: series starting with [01/11] mm: update the documentation for vfree
URL : https://patchwork.freedesktop.org/series/82063/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5e88ddacdd34 mm: update the documentation for vfree
90f3c1ba13d1 mm: add a
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev14)
URL : https://patchwork.freedesktop.org/series/69290/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9048 -> Patchwork_18562
Summary
---
On 16/09/2020 10:42, Chris Wilson wrote:
Verify that if a context is active at the time it is closed, that it is
either persistent and preemptible (with hangcheck running) or it shall
be removed from execution.
Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs")
Testcase:
== Series Details ==
Series: drm/i915: Uninitialized variable in i915_gem_object_map_page()
URL : https://patchwork.freedesktop.org/series/82060/
State : failure
== Summary ==
Applying: drm/i915: Uninitialized variable in i915_gem_object_map_page()
Using index info to reconstruct a base
Hi Andrew,
this series removes alloc_vm_area, which was left over from the big
vmalloc interface rework. It is a rather arkane interface, basicaly
the equivalent of get_vm_area + actually faulting in all PTEs in
the allocated area. It was originally addeds for Xen (which isn't
modular to start
Add a flag so that vmap takes ownership of the passed in page array.
When vfree is called on such an allocation it will put one reference
on each page, and free the page array itself.
Signed-off-by: Christoph Hellwig
---
include/linux/vmalloc.h | 1 +
mm/vmalloc.c| 9 +++--
2
i915_gem_object_map implements fairly low-level vmap functionality in
a driver. Split it into two helpers, one for remapping kernel memory
which can use vmap, and one for I/O memory that uses vmap_pfn.
The only practical difference is that alloc_vm_area prefeaults the
vmalloc area PTEs, which
From: "Matthew Wilcox (Oracle)"
* Document that you can call vfree() on an address returned from vmap()
* Remove the note about the minimum size -- the minimum size of a vmalloc
allocation is one page
* Add a Context: section
* Fix capitalisation
* Reword the prohibition on calling from
Replacing alloc_vm_area with get_vm_area_caller + apply_page_range
allows to fill put the phys_addr values directly instead of doing
another loop over all addresses.
Signed-off-by: Christoph Hellwig
---
drivers/xen/xenbus/xenbus_client.c | 30 --
1 file changed, 16
Add a proper helper to remap PFNs into kernel virtual space so that
drivers don't have to abuse alloc_vm_area and open coded PTE
manipulation for it.
Signed-off-by: Christoph Hellwig
---
include/linux/vmalloc.h | 1 +
mm/Kconfig | 3 +++
mm/vmalloc.c| 45
shmem_pin_map somewhat awkwardly reimplements vmap using
alloc_vm_area and manual pte setup. The only practical difference
is that alloc_vm_area prefeaults the vmalloc area PTEs, which doesn't
seem to be required here (and could be added to vmap using a flag if
actually required). Switch to use
Replace the last call to alloc_vm_area with an open coded version using
an iterator in struct gnttab_vm_area instead of the triple indirection
magic in alloc_vm_area.
Signed-off-by: Christoph Hellwig
---
arch/x86/xen/grant-table.c | 27 ---
1 file changed, 20
On Thu, Sep 24, 2020 at 09:51:38AM -0400, Steven Rostedt wrote:
> > It turns out, that getting selected for pull-balance is exactly that
> > condition, and clearly a migrate_disable() task cannot be pulled, but we
> > can use that signal to try and pull away the running task that's in the
> >
Just manually pre-fault the PTEs using apply_to_page_range.
Co-developed-by: Minchan Kim
Signed-off-by: Christoph Hellwig
---
mm/zsmalloc.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
index c36fdff9a37131..918c7b019b3d78 100644
All users are gone now.
Signed-off-by: Christoph Hellwig
---
include/linux/vmalloc.h | 5 +
mm/nommu.c | 7 --
mm/vmalloc.c| 48 -
3 files changed, 1 insertion(+), 59 deletions(-)
diff --git a/include/linux/vmalloc.h
Besides calling the callback on each page, apply_to_page_range also has
the effect of pre-faulting all PTEs for the range. To support callers
that only need the pre-faulting, make the callback optional.
Based on a patch from Minchan Kim .
Signed-off-by: Christoph Hellwig
---
mm/memory.c | 16
kmap for !PageHighmem is just a convoluted way to say page_address,
and kunmap is a no-op in that case.
Signed-off-by: Christoph Hellwig
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git
On Thu, 24 Sep 2020 14:42:41 +0200
Peter Zijlstra wrote:
> On Thu, Sep 24, 2020 at 08:32:41AM -0400, Steven Rostedt wrote:
> > Anyway, instead of blocking. What about having a counter of number of
> > migrate disabled tasks per cpu, and when taking a migrate_disable(), and
> > there's
> >
On 16/09/2020 10:42, Chris Wilson wrote:
Currently, we check we can send a pulse prior to disabling the
heartbeat to verify that we can change the heartbeat, but since we may
re-evaluate execution upon changing the heartbeat interval we need another
pulse afterwards to refresh execution.
On 16/09/2020 10:42, Chris Wilson wrote:
We only allow persistent requests to remain on the GPU past the closure
of their containing context (and process) so long as they are continuously
checked for hangs or allow other requests to preempt them, as we need to
ensure forward progress of the
On 16/09/2020 10:42, Chris Wilson wrote:
We have to be very careful while walking the timeline->requests list
under the RCU guard, as the requests (and so rq->link) use
SLAB_TYPESAFE_BY_RCU and so the requests may be reallocated within an
rcu grace period. As the requests are reallocated, they
On Wed, 2020-09-23 at 10:09 -0700, Souza, Jose wrote:
> On Wed, 2020-09-23 at 10:10 -0700, José Roberto de Souza wrote:
> > On Wed, 2020-09-23 at 14:02 +0100, Mun, Gwan-gyeong wrote:
> > > On Thu, 2020-09-17 at 18:02 -0700, José Roberto de Souza wrote:
> > > > Another step towards PSR2 selective
On Thu, Sep 24, 2020 at 01:22:35PM +0100, Tvrtko Ursulin wrote:
> CI says series looks good from the i915 perspective (*).
>
> I don't know how will you handle it logistically, but when you have final
> version I am happy to re-read and r-b the i915 patches.
I'll resend the series later today,
On 15/09/2020 10:30, Chris Wilson wrote:
The reordering and rebasing of commit 2e4c6c1a9db5 ("drm/i915: Remove
i915_request.lock requirement for execution callbacks") caused it to
revert an earlier correction. Let us restore commit 99f0a640d464
("drm/i915: Remove requirement for holding
Configure TE interrupt as part of the vblank
enable call flow.
v2: Hide the private flags check inside configure_te (Jani)
v3: Fix the position of masking de_port_masked for DSI_TE.
v4: Simplify the caller of configure_te (Jani)
v5: Clear IIR, remove the usage of private_flags
v6: including
In TE Gate mode or TE NO_GATE mode on every flip
we need to set the frame update request bit.
After this bit is set transcoder hardware will
automatically send the frame data to the panel
in case of TE NO_GATE mode, where it sends after
it receives the TE event in case of TE_GATE mode.
Once the
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
Vandita Kulkarni (5):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE interrupt for cmd mode
drm/i915/dsi: Add TE handler for dsi cmd mode.
drm/i915/dsi: Initiate
In case of dual link, we get the TE on slave.
So clear the TE on slave DSI IIR.
If we are operating in TE_GATE mode, after we do
a frame update, the transcoder will send the frame data
to the panel, after it receives a TE. Whereas if we
are operating in NO_GATE mode then the transcoder will
In case of DSI cmd mode, we get hw vblank counter
updated after the TE comes in, if we try to read
the hw vblank counter in te handler we wouldnt have
the udpated vblank counter yet.
This will lead to a state where we would send the
vblank event to the user space in the next te,
though the frame
On Thu, Sep 24, 2020 at 08:32:41AM -0400, Steven Rostedt wrote:
> Anyway, instead of blocking. What about having a counter of number of
> migrate disabled tasks per cpu, and when taking a migrate_disable(), and
> there's
> already another task with migrate_disabled() set, and the current task has
On Thu, 24 Sep 2020 08:57:52 +0200
Thomas Gleixner wrote:
> > Now as for migration disabled nesting, at least now we would have
> > groupings of this, and perhaps the theorists can handle that. I mean,
> > how is this much different that having a bunch of tasks blocked on a
> > mutex with the
The "i" iterator is never set to zero. This probably doesn't affect
testing because GCC sometimes initializes variables and also we have a
new pluggin to initialize stack variables to zero.
Fixes: 7edd32a9e614 ("drm/i915: use vmap in i915_gem_object_map")
Signed-off-by: Dan Carpenter
---
Hi
On 23/09/2020 15:44, Christoph Hellwig wrote:
On Wed, Sep 23, 2020 at 02:58:43PM +0100, Tvrtko Ursulin wrote:
Series did not get a CI run from our side because of a different base so I
don't know if you would like to have a run there? If so you would need to
rebase against
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, September 23, 2020 4:03 PM
> To: Kulkarni, Vandita
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> Subject: Re: [V13 4/5] drm/i915/dsi: Initiate fame request in cmd mode
>
> On Wed, Sep 23, 2020 at 10:02:49AM +,
On Thu, Sep 24, 2020 at 01:13:17PM +0200, Daniel Vetter wrote:
> On Thu, Sep 24, 2020 at 1:01 PM Ville Syrjälä
> wrote:
> >
> > On Thu, Sep 24, 2020 at 01:10:56PM +0300, Pekka Paalanen wrote:
> > > On Thu, 24 Sep 2020 10:04:12 +0200
> > > Daniel Vetter wrote:
> > >
> > > > On Thu, Sep 24, 2020
On Thu, Sep 24, 2020 at 1:01 PM Ville Syrjälä
wrote:
>
> On Thu, Sep 24, 2020 at 01:10:56PM +0300, Pekka Paalanen wrote:
> > On Thu, 24 Sep 2020 10:04:12 +0200
> > Daniel Vetter wrote:
> >
> > > On Thu, Sep 24, 2020 at 9:41 AM Pekka Paalanen
> > > wrote:
> > > >
> > > > On Wed, 23 Sep 2020
On Thu, Sep 24, 2020 at 01:10:56PM +0300, Pekka Paalanen wrote:
> On Thu, 24 Sep 2020 10:04:12 +0200
> Daniel Vetter wrote:
>
> > On Thu, Sep 24, 2020 at 9:41 AM Pekka Paalanen wrote:
> > >
> > > On Wed, 23 Sep 2020 22:01:25 +0200
> > > Daniel Vetter wrote:
> > >
> > > > On Wed, Sep 23, 2020
On Thu, Sep 24, 2020 at 12:49:13AM +, Srivatsa, Anusha wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of Ville
> > Syrjala
> > Sent: Thursday, July 16, 2020 10:21 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL
drm-misc-fixes-2020-09-24:
drm-misc-fixes for v5.9:
- Single null pointer deref fix for dma-buf.
The following changes since commit 74ea06164cda81dc80e97790164ca533fd7e3087:
drm/sun4i: mixer: Extend regmap max_register (2020-09-10 13:08:48 +0200)
are available in the Git repository at:
On Thu, Sep 24, 2020 at 12:37:47AM +, Srivatsa, Anusha wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of Ville
> > Syrjala
> > Sent: Thursday, July 16, 2020 10:21 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL
On 2020-09-23 at 18:54:33 +0530, Anshuman Gupta wrote:
> Rebased of a older series which has been pending to merge.
> original series : https://patchwork.freedesktop.org/series/73345/
Thanks for the review and rebasing. Pushed into dinq.
Ram.
>
> Ramalingam C (2):
> drm/i915: terminate reauth
On Thu, 24 Sep 2020 10:04:12 +0200
Daniel Vetter wrote:
> On Thu, Sep 24, 2020 at 9:41 AM Pekka Paalanen wrote:
> >
> > On Wed, 23 Sep 2020 22:01:25 +0200
> > Daniel Vetter wrote:
> >
> > > On Wed, Sep 23, 2020 at 9:17 PM Marius Vlad
> > > wrote:
> > > >
> > > > On Wed, Sep 23, 2020 at
Hi Dave & Daniel -
Just a couple of simple fixes.
With Daniel's irc ack I backmerged Linus' tree at an arbitrary commit
due to a build failure in v5.9-rc6 that blocked CI.
drm-intel-fixes-2020-09-24:
drm/i915 fixes for v5.9-rc7:
- Fix selftest reference to stack data out of scope
- Fix GVT
On Wed, 23 Sep 2020 at 12:42, Chris Wilson wrote:
>
> In generating the reference LRC, we want a page-aligned address for
> simplicity in computing the offsets within. This then shares the
> computation for the HW LRC which is mapped and so page aligned, making
> the comparison straightforward.
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