[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake
== Series Details == Series: drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake URL : https://patchwork.freedesktop.org/series/88673/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9925_full -> Patchwork_19890_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19890_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19890_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19890_full: ### IGT changes ### Possible regressions * igt@gem_linear_blits@interruptible: - shard-kbl: NOTRUN -> [DMESG-WARN][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl3/igt@gem_linear_bl...@interruptible.html Warnings * igt@runner@aborted: - shard-kbl: ([FAIL][2], [FAIL][3], [FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2505] / [i915#3002] / [i915#92]) -> ([FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl6/igt@run...@aborted.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@run...@aborted.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl7/igt@run...@aborted.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@run...@aborted.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@run...@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl7/igt@run...@aborted.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@run...@aborted.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@run...@aborted.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl7/igt@run...@aborted.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl1/igt@run...@aborted.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl7/igt@run...@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl1/igt@run...@aborted.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl1/igt@run...@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl3/igt@run...@aborted.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl1/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_19890_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][17] ([i915#3002]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-skl7/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#1099]) +4 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-snb7/igt@gem_ctx_persiste...@clone.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][19] -> [FAIL][20] ([i915#2842]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][21] -> [FAIL][22] ([i915#2842]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html - shard-glk: [PASS][23] -> [FAIL][24] ([i915#2842]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk7/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][25] ([i915#2842]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/shard-iclb4/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-iclb: [PASS][26] -> [FAIL][27] ([i915#2842]) [26]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display/psr: Disable DC3CO when the PSR2 is used.
== Series Details == Series: drm/i915/display/psr: Disable DC3CO when the PSR2 is used. URL : https://patchwork.freedesktop.org/series/88672/ State : success == Summary == CI Bug Log - changes from CI_DRM_9925_full -> Patchwork_19889_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19889_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-kbl: NOTRUN -> [DMESG-WARN][1] ([i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-kbl4/igt@gem_cre...@create-massive.html - shard-skl: NOTRUN -> [DMESG-WARN][2] ([i915#3002]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-skl10/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-snb5/igt@gem_ctx_persiste...@clone.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][4] -> [TIMEOUT][5] ([i915#2369] / [i915#2481] / [i915#3070]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@gem_...@unwedge-stress.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-iclb7/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +3 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk7/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-kbl: [PASS][12] -> [SKIP][13] ([fdo#109271]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@gem_exec_fair@basic-p...@vcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-kbl1/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@gem_exec_fair@basic-p...@vecs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-iclb7/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271]) +125 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-snb6/igt@gem_exec_fl...@basic-batch-kernel-default-cmd.html * igt@gem_exec_reloc@basic-many-active@bcs0: - shard-apl: NOTRUN -> [FAIL][17] ([i915#2389]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-apl2/igt@gem_exec_reloc@basic-many-act...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@vcs1: - shard-iclb: NOTRUN -> [FAIL][18] ([i915#2389]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-iclb1/igt@gem_exec_reloc@basic-wide-act...@vcs1.html * igt@gem_exec_suspend@basic-s3: - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl6/igt@gem_exec_susp...@basic-s3.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-kbl7/igt@gem_exec_susp...@basic-s3.html * igt@gem_mmap_gtt@big-copy-xy: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#307]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl10/igt@gem_mmap_...@big-copy-xy.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-skl3/igt@gem_mmap_...@big-copy-xy.html * igt@gem_userptr_blits@dmabuf-sync: - shard-kbl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3323]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/shard-kbl7/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-apl: NOTRUN -> [DMESG-WARN][24] ([i915#3002]) [24]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add Wa_14010733141
== Series Details == Series: drm/i915: Add Wa_14010733141 URL : https://patchwork.freedesktop.org/series/88670/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9925_full -> Patchwork_19888_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19888_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19888_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19888_full: ### IGT changes ### Possible regressions * igt@perf_pmu@busy-accuracy-98@bcs0: - shard-skl: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl3/igt@perf_pmu@busy-accuracy...@bcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl3/igt@perf_pmu@busy-accuracy...@bcs0.html Warnings * igt@kms_vblank@pipe-d-query-idle: - shard-skl: [SKIP][3] ([fdo#109271]) -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl1/igt@kms_vbl...@pipe-d-query-idle.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl4/igt@kms_vbl...@pipe-d-query-idle.html Known issues Here are the changes found in Patchwork_19888_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-clear: - shard-glk: [PASS][5] -> [FAIL][6] ([i915#1888] / [i915#3160]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk1/igt@gem_cre...@create-clear.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk2/igt@gem_cre...@create-clear.html * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][7] ([i915#3002]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl4/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1099]) +3 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-snb2/igt@gem_ctx_persiste...@clone.html * igt@gem_ctx_persistence@legacy-engines-hang@render: - shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2410]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb1/igt@gem_ctx_persistence@legacy-engines-h...@render.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb2/igt@gem_ctx_persistence@legacy-engines-h...@render.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][11] -> [TIMEOUT][12] ([i915#2369] / [i915#2481] / [i915#3070]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@gem_...@unwedge-stress.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_...@unwedge-stress.html * igt@gem_exec_capture@pi@rcs0: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([i915#2369]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl7/igt@gem_exec_capture@p...@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl1/igt@gem_exec_capture@p...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][15] -> [FAIL][16] ([i915#2842]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-kbl: [PASS][17] -> [FAIL][18] ([i915#2842]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl3/igt@gem_exec_fair@basic-pace-s...@rcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl4/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][19] ([i915#2842]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-iclb: [PASS][20] -> [FAIL][21] ([i915#2842]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@gem_exec_fair@basic-p...@vecs0.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - shard-snb: NOTRUN -> [SKIP][22] ([fdo#109271]) +330 similar issues [22]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Uninit the DMC FW loader state during shutdown
== Series Details == Series: drm/i915: Uninit the DMC FW loader state during shutdown URL : https://patchwork.freedesktop.org/series/87883/ State : success == Summary == CI Bug Log - changes from CI_DRM_9849_full -> Patchwork_19781_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19781_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-iclb: NOTRUN -> [DMESG-WARN][1] ([i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-iclb1/igt@gem_cre...@create-massive.html - shard-skl: NOTRUN -> [DMESG-WARN][2] ([i915#3002]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-skl2/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-snb5/igt@gem_ctx_persiste...@clone.html * igt@gem_ctx_persistence@many-contexts: - shard-iclb: [PASS][4] -> [INCOMPLETE][5] ([i915#3057]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-iclb8/igt@gem_ctx_persiste...@many-contexts.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-iclb6/igt@gem_ctx_persiste...@many-contexts.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][6] ([i915#2846]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-skl9/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-tglb1/igt@gem_exec_fair@basic-f...@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-tglb3/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-iclb7/igt@gem_exec_fair@basic-none-sh...@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-iclb6/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-kbl: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-kbl2/igt@gem_exec_fair@basic-n...@vecs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-kbl2/igt@gem_exec_fair@basic-n...@vecs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-glk5/igt@gem_exec_fair@basic-throt...@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-glk6/igt@gem_exec_fair@basic-throt...@rcs0.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][15] ([i915#2389]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-apl1/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][16] ([i915#2389]) +2 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-snb5/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_exec_whisper@basic-fds-forked: - shard-glk: [PASS][17] -> [DMESG-WARN][18] ([i915#118] / [i915#95]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-glk1/igt@gem_exec_whis...@basic-fds-forked.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-glk5/igt@gem_exec_whis...@basic-fds-forked.html * igt@gem_huc_copy@huc-copy: - shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-apl8/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_offset@clear: - shard-skl: NOTRUN -> [FAIL][20] ([i915#3160]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-skl7/igt@gem_mmap_off...@clear.html * igt@gem_pwrite@basic-exhaustion: - shard-snb: NOTRUN -> [WARN][21] ([i915#2658]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-snb5/igt@gem_pwr...@basic-exhaustion.html - shard-apl: NOTRUN -> [WARN][22] ([i915#2658]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-apl1/igt@gem_pwr...@basic-exhaustion.html * igt@gem_render_copy@linear-to-vebox-y-tiled: - shard-iclb: NOTRUN -> [SKIP][23] ([i915#768]) [23]:
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Uninit the DMC FW loader state during shutdown
On Thu, Mar 11, 2021 at 05:42:07PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Uninit the DMC FW loader state during shutdown > URL : https://patchwork.freedesktop.org/series/87883/ > State : failure Thanks for the reports testing and review, patch pushed to -din. One unrelated failure, see below. > > == Summary == > > CI Bug Log - changes from CI_DRM_9849_full -> Patchwork_19781_full > > > Summary > --- > > **FAILURE** > > Serious unknown changes coming with Patchwork_19781_full absolutely need to > be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_19781_full, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives in CI. > > > > Possible new issues > --- > > Here are the unknown changes that may have been introduced in > Patchwork_19781_full: > > ### IGT changes ### > > Possible regressions > > * igt@perf_pmu@rc6-suspend: > - shard-tglb: [PASS][1] -> [INCOMPLETE][2] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-tglb5/igt@perf_...@rc6-suspend.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-tglb8/igt@perf_...@rc6-suspend.html The changes in the patch have an effect only during shutdown and reboot so can't be related to the above failure. > Warnings > > * igt@gem_exec_reloc@basic-parallel: > - shard-kbl: [TIMEOUT][3] ([i915#1729]) -> [TIMEOUT][4] >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-kbl6/igt@gem_exec_re...@basic-parallel.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-kbl6/igt@gem_exec_re...@basic-parallel.html > - shard-tglb: [TIMEOUT][5] ([i915#1729]) -> [TIMEOUT][6] >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-tglb7/igt@gem_exec_re...@basic-parallel.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-tglb5/igt@gem_exec_re...@basic-parallel.html > - shard-skl: [TIMEOUT][7] ([i915#1729]) -> [TIMEOUT][8] >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-skl4/igt@gem_exec_re...@basic-parallel.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-skl6/igt@gem_exec_re...@basic-parallel.html > - shard-apl: [TIMEOUT][9] ([i915#1729]) -> [TIMEOUT][10] >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-apl2/igt@gem_exec_re...@basic-parallel.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-apl3/igt@gem_exec_re...@basic-parallel.html > - shard-iclb: [TIMEOUT][11] ([i915#1729]) -> [TIMEOUT][12] >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-iclb5/igt@gem_exec_re...@basic-parallel.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-iclb3/igt@gem_exec_re...@basic-parallel.html > - shard-glk: [TIMEOUT][13] ([i915#1729]) -> [TIMEOUT][14] >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-glk7/igt@gem_exec_re...@basic-parallel.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-glk8/igt@gem_exec_re...@basic-parallel.html > > > Known issues > > > Here are the changes found in Patchwork_19781_full that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_create@create-massive: > - shard-iclb: NOTRUN -> [DMESG-WARN][15] ([i915#3002]) >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-iclb1/igt@gem_cre...@create-massive.html > - shard-skl: NOTRUN -> [DMESG-WARN][16] ([i915#3002]) >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-skl2/igt@gem_cre...@create-massive.html > > * igt@gem_ctx_persistence@clone: > - shard-snb: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#1099]) > +4 similar issues >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-snb5/igt@gem_ctx_persiste...@clone.html > > * igt@gem_ctx_persistence@many-contexts: > - shard-iclb: [PASS][18] -> [INCOMPLETE][19] ([i915#3057]) >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9849/shard-iclb8/igt@gem_ctx_persiste...@many-contexts.html >[19]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-iclb6/igt@gem_ctx_persiste...@many-contexts.html > > * igt@gem_exec_fair@basic-deadline: > - shard-skl: NOTRUN -> [FAIL][20] ([i915#2846]) >[20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19781/shard-skl9/igt@gem_exec_f...@basic-deadline.html > > * igt@gem_exec_fair@basic-flow@rcs0: > - shard-tglb: [PASS][21] -> [FAIL][22] ([i915#2842]) >[21]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915: Extract intel_adjusted_rate() (rev2)
== Series Details == Series: series starting with [v2,1/2] drm/i915: Extract intel_adjusted_rate() (rev2) URL : https://patchwork.freedesktop.org/series/88592/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9923_full -> Patchwork_19887_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19887_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19887_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19887_full: ### IGT changes ### Possible regressions * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-glk: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-glk3/igt@kms_cursor_...@pipe-c-cursor-suspend.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-glk6/igt@kms_cursor_...@pipe-c-cursor-suspend.html Known issues Here are the changes found in Patchwork_19887_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-clear: - shard-iclb: [PASS][3] -> [FAIL][4] ([i915#3160]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-iclb5/igt@gem_cre...@create-clear.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-iclb7/igt@gem_cre...@create-clear.html * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][5] ([i915#3002]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-skl6/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-snb7/igt@gem_ctx_persiste...@clone.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#3063]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-tglb2/igt@gem_...@unwedge-stress.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-tglb1/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][9] ([i915#2846]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-apl2/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-tglb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-tglb7/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-glk8/igt@gem_exec_fair@basic-n...@vcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-glk1/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-kbl: [PASS][14] -> [FAIL][15] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-kbl3/igt@gem_exec_fair@basic-pace-s...@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-kbl6/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_reloc@basic-many-active@vcs1: - shard-iclb: NOTRUN -> [FAIL][16] ([i915#2389]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-iclb2/igt@gem_exec_reloc@basic-many-act...@vcs1.html * igt@gem_exec_whisper@basic-contexts-all: - shard-glk: [PASS][17] -> [DMESG-WARN][18] ([i915#118] / [i915#95]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-glk8/igt@gem_exec_whis...@basic-contexts-all.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-glk2/igt@gem_exec_whis...@basic-contexts-all.html * igt@gem_huc_copy@huc-copy: - shard-kbl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-kbl7/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_gtt@big-copy: - shard-iclb: [PASS][20] -> [FAIL][21] ([i915#307]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/shard-iclb1/igt@gem_mmap_...@big-copy.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/shard-iclb7/igt@gem_mmap_...@big-copy.html * igt@gem_mmap_gtt@cpuset-big-copy-xy: - shard-iclb: [PASS][22] -> [FAIL][23]
Re: [Intel-gfx] [PATCH] drm/atomic: Add the crtc to affected crtc only if uapi.enable = true
On Fri, Mar 26, 2021 at 06:15:22PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 25, 2021 at 03:01:29PM -0700, Navare, Manasi wrote:
> > On Fri, Mar 19, 2021 at 11:27:59PM +0200, Ville Syrjälä wrote:
> > > On Fri, Mar 19, 2021 at 02:26:24PM -0700, Navare, Manasi wrote:
> > > > On Fri, Mar 19, 2021 at 11:12:41PM +0200, Ville Syrjälä wrote:
> > > > > On Fri, Mar 19, 2021 at 01:54:13PM -0700, Navare, Manasi wrote:
> > > > > > On Fri, Mar 19, 2021 at 04:56:24PM +0200, Ville Syrjälä wrote:
> > > > > > > On Thu, Mar 18, 2021 at 04:01:26PM -0700, Navare, Manasi wrote:
> > > > > > > > So basically we see this warning only in case of bigjoiner when
> > > > > > > > drm_atomic_check gets called without setting the
> > > > > > > > state->allow_modeset flag.
> > > > > > >
> > > > > > > Considering the code is 'WARN(!state->allow_modeset, ...' that
> > > > > > > fact should be rather obvious.
> > > > > > >
> > > > > > > >
> > > > > > > > So do you think that in i915, in intel_atomic_check_bigjoiner()
> > > > > > > > we should only
> > > > > > > > steal the crtc when allow_modeset flag is set in state?
> > > > > > >
> > > > > > > No. If you fully read drm_atomic_check_only() you will observe
> > > > > > > that it will reject any commit w/ allow_modeset==false which
> > > > > > > needs a modeset. And it does that before the WARN.
> > > > > > >
> > > > > > > So you're barking up the wrong tree here. The problem I think
> > > > > > > is that you're just computing requested_crtcs wrong.
> > > > > >
> > > > > > So here in this case, requested CRTC = 0x1 since it requests
> > > > > > modeset on CRTC 0
> > > > > > Now in teh atomic check, it steals the slave CRTC 1 and hence
> > > > > > affected CRTC comes out
> > > > > > as 0x3 and hence the mismatch.
> > > > >
> > > > > Hmm. How can it be 0x3 if we filtered out the uapi.enable==false case?
> > > > >
> > > >
> > > > Yes if I add that condition like in this patch then it correctly
> > > > calculates
> > > > the affected crtc bitmask as only 0x1 since it doesnt include the slave
> > > > crtc.
> > > > So with this patch, requested crtc = 0x 1, affected crtc = 0x1
> > > >
> > > > If this looks good then this fixes our bigjoiner warnings.
> > > > Does this patch look good to you as is then?
> > >
> > > I think you still need to fix the requested_crtcs calculation.
> >
> > We calculate requested crtc at the beginning :
> > for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)
> > requested_crtc |= drm_crtc_mask(crtc);
> >
> > Are you suggesting adding this to after:
> > if (config->funcs->atomic_check) {
> > ret = config->funcs->atomic_check(state->dev, state);
> >
> > if (ret) {
> > DRM_DEBUG_ATOMIC("atomic driver check for %p
> > failed: %d\n",
> > state, ret);
> > return ret;
> > }
> > requested_crtc |= drm_crtc_mask(crtc);// Here it will have
> > requested crtc = 0x11
> > }
> >
> > in this case here the state should already have master crtc 0 and slave
> > crtc 1
> > and that requested crtc should already be 0x11
> >
> > Then in that case we dont need any special check for calculating affected
> > crtc, that also will be 0x11
>
> All I'm saying is that you're currently calculating requested_crtcs and
> affected_crtcs differently. So I'm not at all surprised that they might
> not match.
>
I dont get your point yet.
requested crtc is calculated before the atomic check call and we dont check for
crtc uapi.enable to be true.
And hence requested crtc = CRTC 0 = 0x2
After I added the check in this patch where affected crtc will include only the
crtcs that have uapi.enable = true
then it perfectly matches the requested crtc and return 0x2 but without this
check when the calculation of
requested and affected crtc is the same is where we see the affected crtc =
CRTC 0 and 1 = 0x3
So when the calculation is different infcat we dont see the mismatch
What is your point here?
Manasi
> --
> Ville Syrjälä
> Intel
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake
== Series Details == Series: drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake URL : https://patchwork.freedesktop.org/series/88673/ State : success == Summary == CI Bug Log - changes from CI_DRM_9925 -> Patchwork_19890 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/index.html Known issues Here are the changes found in Patchwork_19890 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-snb-2600:NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html * igt@core_hotunplug@unbind-rebind: - fi-bdw-5557u: NOTRUN -> [WARN][3] ([i915#2283]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html * igt@debugfs_test@read_all_entries: - fi-tgl-y: [PASS][4] -> [DMESG-WARN][5] ([i915#402]) +1 similar issue [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@debugfs_test@read_all_entries.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-tgl-y/igt@debugfs_test@read_all_entries.html * igt@i915_selftest@live@execlists: - fi-bsw-nick:[PASS][6] -> [INCOMPLETE][7] ([i915#2782] / [i915#2940]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-bsw-nick/igt@i915_selftest@l...@execlists.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-bsw-nick/igt@i915_selftest@l...@execlists.html * igt@kms_chamelium@dp-crc-fast: - fi-bdw-5557u: NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +8 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([i915#2411] / [i915#402]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-tgl-y/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html * igt@runner@aborted: - fi-bsw-nick:NOTRUN -> [FAIL][11] ([i915#1436]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-bsw-nick/igt@run...@aborted.html Possible fixes * igt@gem_flink_basic@double-flink: - fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_flink_ba...@double-flink.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-tgl-y/igt@gem_flink_ba...@double-flink.html * igt@i915_selftest@live@hangcheck: - fi-snb-2600:[INCOMPLETE][14] ([i915#2782]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-icl-u2: [DMESG-WARN][16] ([i915#2868]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19890/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283 [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411 [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782 [i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868 [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (47 -> 42) -- Missing(5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes - * Linux: CI_DRM_9925 -> Patchwork_19890 CI-20190529: 20190529 CI_DRM_9925: 44fed14ddf3ab2d108508846f385377082948d76 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6056: 84e6a7e19ccc7fafc46f372e756cad9d4aa093f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19890:
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake
== Series Details == Series: drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake URL : https://patchwork.freedesktop.org/series/88673/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 13/16] drm/i915/pxp: User interface for Protected buffer
On 4/1/2021 5:05 AM, Lionel Landwerlin wrote:
On 29/03/2021 01:57, Daniele Ceraolo Spurio wrote:
From: Bommu Krishnaiah
This api allow user mode to create Protected buffers. Only contexts
marked as protected are allowed to operate on protected buffers.
We only allow setting the flags at creation time.
All protected objects that have backing storage will be considered
invalid when the session is destroyed and they won't be usable anymore.
This is a rework of the original code by Bommu Krishnaiah. I've
authorship unchanged since significant chunks have not been modified.
v2: split context changes, fix defines and improve documentation
(Chris),
add object invalidation logic
v3: fix spinlock definition and usage, only validate objects when
they're first added to a context lut, only remove them once
(Chris),
make protected context flag not mandatory in protected object
execbuf
to avoid abuse (Lionel)
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Daniele Ceraolo Spurio
Cc: Telukuntla Sreedhar
Cc: Kondapally Kalyan
Cc: Gupta Anshuman
Cc: Huang Sean Z
Cc: Chris Wilson
Cc: Lionel Landwerlin
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 27 ++--
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 16
drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 +++
drivers/gpu/drm/i915/gem/i915_gem_object.h | 12 ++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 13 ++
drivers/gpu/drm/i915/pxp/intel_pxp.c | 41 +++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 13 ++
drivers/gpu/drm/i915/pxp/intel_pxp_types.h | 5 +++
include/uapi/drm/i915_drm.h | 20 +
9 files changed, 150 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 3ad3413c459f..d02e5938afbe 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -5,6 +5,7 @@
#include "gem/i915_gem_ioctls.h"
#include "gem/i915_gem_region.h"
+#include "pxp/intel_pxp.h"
#include "i915_drv.h"
#include "i915_user_extensions.h"
@@ -13,7 +14,8 @@ static int
i915_gem_create(struct drm_file *file,
struct intel_memory_region *mr,
u64 *size_p,
- u32 *handle_p)
+ u32 *handle_p,
+ u64 user_flags)
{
struct drm_i915_gem_object *obj;
u32 handle;
@@ -35,12 +37,17 @@ i915_gem_create(struct drm_file *file,
GEM_BUG_ON(size != obj->base.size);
+ obj->user_flags = user_flags;
+
ret = drm_gem_handle_create(file, >base, );
/* drop reference from allocate - handle holds it now */
i915_gem_object_put(obj);
if (ret)
return ret;
+ if (user_flags & I915_GEM_OBJECT_PROTECTED)
+ intel_pxp_object_add(obj);
+
*handle_p = handle;
*size_p = size;
return 0;
@@ -89,11 +96,12 @@ i915_gem_dumb_create(struct drm_file *file,
return i915_gem_create(file,
intel_memory_region_by_type(to_i915(dev),
mem_type),
- >size, >handle);
+ >size, >handle, 0);
}
struct create_ext {
struct drm_i915_private *i915;
+ unsigned long user_flags;
};
static int __create_setparam(struct drm_i915_gem_object_param *args,
@@ -104,6 +112,19 @@ static int __create_setparam(struct
drm_i915_gem_object_param *args,
return -EINVAL;
}
+ switch (lower_32_bits(args->param)) {
+ case I915_OBJECT_PARAM_PROTECTED_CONTENT:
+ if (!intel_pxp_is_enabled(_data->i915->gt.pxp))
+ return -ENODEV;
+ if (args->size) {
+ return -EINVAL;
+ } else if (args->data) {
+ ext_data->user_flags |= I915_GEM_OBJECT_PROTECTED;
+ return 0;
+ }
+ break;
+ }
+
return -EINVAL;
}
@@ -148,5 +169,5 @@ i915_gem_create_ioctl(struct drm_device *dev,
void *data,
return i915_gem_create(file,
intel_memory_region_by_type(i915,
INTEL_MEMORY_SYSTEM),
- >size, >handle);
+ >size, >handle, ext_data.user_flags);
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 72c2470fcfe6..2fb6579ad301 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -20,6 +20,7 @@
#include "gt/intel_gt_buffer_pool.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_ring.h"
+#include "pxp/intel_pxp.h"
#include "pxp/intel_pxp.h"
@@ -839,6 +840,21 @@ static struct i915_vma *eb_lookup_vma(struct
i915_execbuffer *eb, u32 handle)
if (unlikely(!obj))
return ERR_PTR(-ENOENT);
+ /*
+ * If the user has opted-in for protected-object tracking, make
+ * sure the object encryption can be used.
+
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake
== Series Details == Series: drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake URL : https://patchwork.freedesktop.org/series/88673/ State : warning == Summary == $ dim checkpatch origin/drm-tip 35268f22aac5 drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake -:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #13: IO buffer wake lines = ROUNDUP(PSR2 IO wake time / total line time in microseconds) -:147: WARNING:LONG_LINE: line length of 116 exceeds 100 columns #147: FILE: drivers/gpu/drm/i915/display/intel_psr.c:822: + io_buffer_wake < EDP_PSR2_IO_BUFFER_WAKE_DEFAULT ? EDP_PSR2_IO_BUFFER_WAKE_DEFAULT : io_buffer_wake; total: 0 errors, 2 warnings, 0 checks, 129 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/psr: Disable DC3CO when the PSR2 is used.
== Series Details == Series: drm/i915/display/psr: Disable DC3CO when the PSR2 is used. URL : https://patchwork.freedesktop.org/series/88672/ State : success == Summary == CI Bug Log - changes from CI_DRM_9925 -> Patchwork_19889 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/index.html Known issues Here are the changes found in Patchwork_19889 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html * igt@core_hotunplug@unbind-rebind: - fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html * igt@debugfs_test@read_all_entries: - fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@debugfs_test@read_all_entries.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-tgl-y/igt@debugfs_test@read_all_entries.html * igt@kms_chamelium@dp-crc-fast: - fi-bdw-5557u: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +8 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html Possible fixes * igt@gem_exec_suspend@basic-s3: - fi-tgl-y: [DMESG-WARN][6] ([i915#2411] / [i915#402]) -> [PASS][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_exec_susp...@basic-s3.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-tgl-y/igt@gem_exec_susp...@basic-s3.html * igt@gem_flink_basic@double-flink: - fi-tgl-y: [DMESG-WARN][8] ([i915#402]) -> [PASS][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_flink_ba...@double-flink.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-tgl-y/igt@gem_flink_ba...@double-flink.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-icl-u2: [DMESG-WARN][10] ([i915#2868]) -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283 [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411 [i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (47 -> 42) -- Missing(5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes - * Linux: CI_DRM_9925 -> Patchwork_19889 CI-20190529: 20190529 CI_DRM_9925: 44fed14ddf3ab2d108508846f385377082948d76 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6056: 84e6a7e19ccc7fafc46f372e756cad9d4aa093f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19889: 7c6537d2324d12c9b5c5817a0c45dc1f57c50200 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 7c6537d2324d drm/i915/display/psr: Disable DC3CO when the PSR2 is used. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19889/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/display/psr: Disable DC3CO when the PSR2 is used.
== Series Details == Series: drm/i915/display/psr: Disable DC3CO when the PSR2 is used. URL : https://patchwork.freedesktop.org/series/88672/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Wa_14010733141
== Series Details ==
Series: drm/i915: Add Wa_14010733141
URL : https://patchwork.freedesktop.org/series/88670/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9925 -> Patchwork_19888
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/index.html
Known issues
Here are the changes found in Patchwork_19888 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html
* igt@core_hotunplug@unbind-rebind:
- fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html
* igt@gem_flink_basic@basic:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar
issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_flink_ba...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-tgl-y/igt@gem_flink_ba...@basic.html
* igt@i915_module_load@reload:
- fi-kbl-7500u: [PASS][5] -> [DMESG-WARN][6] ([i915#2605])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-kbl-7500u/igt@i915_module_l...@reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-kbl-7500u/igt@i915_module_l...@reload.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8
similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [PASS][8] -> [DMESG-WARN][9] ([i915#165]) +15 similar
issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][10] ([i915#2411] / [i915#402]) ->
[PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_exec_susp...@basic-s3.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-tgl-y/igt@gem_exec_susp...@basic-s3.html
* igt@gem_flink_basic@double-flink:
- fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_flink_ba...@double-flink.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-tgl-y/igt@gem_flink_ba...@double-flink.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][14] ([i915#2868]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605
[i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (47 -> 41)
--
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9925 -> Patchwork_19888
CI-20190529: 20190529
CI_DRM_9925: 44fed14ddf3ab2d108508846f385377082948d76 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6056: 84e6a7e19ccc7fafc46f372e756cad9d4aa093f7 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19888: 8a3e1ee2de0cb166a174c578506fc74390ee5f62 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8a3e1ee2de0c drm/i915: Add Wa_14010733141
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Add Wa_14010733141
== Series Details == Series: drm/i915: Add Wa_14010733141 URL : https://patchwork.freedesktop.org/series/88670/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Wa_14010733141
== Series Details == Series: drm/i915: Add Wa_14010733141 URL : https://patchwork.freedesktop.org/series/88670/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8a3e1ee2de0c drm/i915: Add Wa_14010733141 -:38: WARNING:BAD_SIGN_OFF: Co-developed-by: must be immediately followed by Signed-off-by: #38: Co-developed-by: Matt Roper Cc: Tvrtko Ursulin total: 0 errors, 1 warnings, 0 checks, 279 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Extract intel_adjusted_rate() (rev2)
== Series Details == Series: series starting with [v2,1/2] drm/i915: Extract intel_adjusted_rate() (rev2) URL : https://patchwork.freedesktop.org/series/88592/ State : success == Summary == CI Bug Log - changes from CI_DRM_9923 -> Patchwork_19887 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/index.html Known issues Here are the changes found in Patchwork_19887 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +23 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html * igt@core_hotunplug@unbind-rebind: - fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html * igt@fbdev@read: - fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/fi-tgl-y/igt@fb...@read.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/fi-tgl-y/igt@fb...@read.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#2203] / [i915#2868]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html Possible fixes * igt@prime_self_import@basic-with_one_bo_two_files: - fi-tgl-y: [DMESG-WARN][7] ([i915#402]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html Warnings * igt@i915_pm_rpm@basic-pci-d3-state: - fi-glk-dsi: [DMESG-WARN][9] ([i915#3143]) -> [DMESG-WARN][10] ([i915#1982] / [i915#3143]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9923/fi-glk-dsi/igt@i915_pm_...@basic-pci-d3-state.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/fi-glk-dsi/igt@i915_pm_...@basic-pci-d3-state.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203 [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283 [i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868 [i915#3143]: https://gitlab.freedesktop.org/drm/intel/issues/3143 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (47 -> 40) -- Missing(7): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-bsw-cyan fi-ctg-p8600 fi-icl-y fi-bdw-samus Build changes - * Linux: CI_DRM_9923 -> Patchwork_19887 CI-20190529: 20190529 CI_DRM_9923: 393640bea31c5d35f268c3d3e6bf77fe0dff2bb8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6056: 84e6a7e19ccc7fafc46f372e756cad9d4aa093f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19887: 27e84a0d5d5a6854d3ea7288d517f317cdcc3cea @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 27e84a0d5d5a drm/i915: Reuse intel_adjusted_rate() for pfit pixel rate adjustment 762743906f1b drm/i915: Extract intel_adjusted_rate() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19887/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v2,1/2] drm/i915: Extract intel_adjusted_rate() (rev2)
== Series Details == Series: series starting with [v2,1/2] drm/i915: Extract intel_adjusted_rate() (rev2) URL : https://patchwork.freedesktop.org/series/88592/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix an uninitialized variable issue
== Series Details == Series: drm/i915: Fix an uninitialized variable issue URL : https://patchwork.freedesktop.org/series/88660/ State : success == Summary == CI Bug Log - changes from CI_DRM_9922_full -> Patchwork_19886_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19886_full that come from known issues: ### IGT changes ### Issues hit * igt@feature_discovery@psr2: - shard-iclb: [PASS][1] -> [SKIP][2] ([i915#658]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/shard-iclb2/igt@feature_discov...@psr2.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-iclb7/igt@feature_discov...@psr2.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-snb7/igt@gem_ctx_persiste...@clone.html * igt@gem_ctx_ringsize@active@bcs0: - shard-skl: [PASS][4] -> [INCOMPLETE][5] ([i915#3316]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/shard-skl9/igt@gem_ctx_ringsize@act...@bcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-skl3/igt@gem_ctx_ringsize@act...@bcs0.html * igt@gem_exec_fair@basic-deadline: - shard-glk: NOTRUN -> [FAIL][6] ([i915#2846]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-glk1/igt@gem_exec_f...@basic-deadline.html - shard-apl: NOTRUN -> [FAIL][7] ([i915#2846]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-apl8/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-glk: NOTRUN -> [FAIL][8] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-glk9/igt@gem_exec_fair@basic-none-r...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][9] -> [FAIL][10] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/shard-tglb3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-tglb2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-kbl: [PASS][11] -> [FAIL][12] ([i915#2842]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/shard-kbl6/igt@gem_exec_fair@basic-p...@vcs1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-kbl7/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][13] ([i915#2389]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-snb5/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_huc_copy@huc-copy: - shard-kbl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-kbl3/igt@gem_huc_c...@huc-copy.html * igt@gem_pwrite@basic-exhaustion: - shard-apl: NOTRUN -> [WARN][15] ([i915#2658]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-apl6/igt@gem_pwr...@basic-exhaustion.html * igt@gem_userptr_blits@dmabuf-sync: - shard-kbl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-kbl4/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][17] ([i915#3002]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-snb6/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@process-exit-mmap-busy@wc: - shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#1699]) +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-apl6/igt@gem_userptr_blits@process-exit-mmap-b...@wc.html * igt@gem_userptr_blits@set-cache-level: - shard-snb: NOTRUN -> [FAIL][19] ([i915#3324]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-snb7/igt@gem_userptr_bl...@set-cache-level.html - shard-apl: NOTRUN -> [FAIL][20] ([i915#3324]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-apl8/igt@gem_userptr_bl...@set-cache-level.html - shard-glk: NOTRUN -> [FAIL][21] ([i915#3324]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-glk1/igt@gem_userptr_bl...@set-cache-level.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][22] ([i915#2724]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/shard-snb6/igt@gem_userptr_bl...@vma-merge.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp: - shard-apl: NOTRUN ->
Re: [Intel-gfx] [PATCH] drm/i915/display/psr: Disable DC3CO when the PSR2 is used.
On Thu, 2021-04-01 at 20:02 +0300, Gwan-gyeong Mun wrote: > Due to the changed sequence of activating/deactivating DC3CO, disable > DC3CO until the changed dc3co activating/deactivating sequence is applied. Reviewed-by: José Roberto de Souza > > References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134 > Signed-off-by: Gwan-gyeong Mun > --- > drivers/gpu/drm/i915/display/intel_psr.c | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 1d561812fcad..32d3d56259c2 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -654,6 +654,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp > *intel_dp, > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > u32 exit_scanlines; > > > > > + /* > + * FIXME: Due to the changed sequence of activating/deactivating DC3CO, > + * disable DC3CO until the changed dc3co activating/deactivating > sequence > + * is applied. B.Specs:49196 > + */ > + return; > + > /* > * DMC's DC3CO exit mechanism has an issue with Selective Fecth > * TODO: when the issue is addressed, this restriction should be > removed. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/display/psr: Configure and Program IO buffer Wake and Fast Wake
As per b.spec 49274, the IO buffer Wake lines and Fast Wake lines can be
calculated based on the following formula.
IO buffer wake lines = ROUNDUP(PSR2 IO wake time / total line time in
microseconds)
Fast wake lines = ROUNDUP(PSR2 aux transaction time / total line time in
microseconds)
For both fields limit the minimum to 7 lines and maximum to 12 lines
PSR2 IO wake time = 50us, PSR2 aux transaction time = 32us.
It calculates IO buffer Wake and Fast Wake based on b.spec 49274 and
programs it.
v2: Address Jose's review comment.
- Do not overwrite the values.
- Move calulating and validating of io_buffer_wake/fast_wake to
intel_psr2_config_valid() from intel_psr_compute_config()
- Add macros for hardcoded values.
- Simplify and reuse the validating the io_buffer_wake/fast_wake.
v3: Rebased
Cc: José Roberto de Souza
Cc: Lee Shawn C
Signed-off-by: Gwan-gyeong Mun
---
.../drm/i915/display/intel_display_types.h| 2 +
drivers/gpu/drm/i915/display/intel_psr.c | 65 +++
drivers/gpu/drm/i915/i915_reg.h | 8 +++
3 files changed, 63 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2e707c4dff5..79df8da9b89e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1496,6 +1496,8 @@ struct intel_psr {
u16 su_x_granularity;
bool dc3co_enabled;
u32 dc3co_exit_delay;
+ u32 io_buffer_wake;
+ u32 fast_wake;
struct delayed_work dc3co_work;
struct drm_dp_vsc_sdp vsc;
};
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 54ad5c378355..a1fff724fb67 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -531,19 +531,15 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
val |= intel_psr2_get_tp_time(intel_dp);
if (DISPLAY_VER(dev_priv) >= 12) {
- /*
-* TODO: 7 lines of IO_BUFFER_WAKE and FAST_WAKE are default
-* values from BSpec. In order to setting an optimal power
-* consumption, lower than 4k resoluition mode needs to decrese
-* IO_BUFFER_WAKE and FAST_WAKE. And higher than 4K resolution
-* mode needs to increase IO_BUFFER_WAKE and FAST_WAKE.
-*/
- val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2;
- val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(7);
- val |= TGL_EDP_PSR2_FAST_WAKE(7);
+ if (intel_dp->psr.io_buffer_wake < 9 || intel_dp->psr.fast_wake
< 9)
+ val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2;
+ else
+ val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_3;
+ val |=
TGL_EDP_PSR2_IO_BUFFER_WAKE(intel_dp->psr.io_buffer_wake);
+ val |= TGL_EDP_PSR2_FAST_WAKE(intel_dp->psr.fast_wake);
} else if (DISPLAY_VER(dev_priv) >= 9) {
- val |= EDP_PSR2_IO_BUFFER_WAKE(7);
- val |= EDP_PSR2_FAST_WAKE(7);
+ val |= EDP_PSR2_IO_BUFFER_WAKE(intel_dp->psr.io_buffer_wake);
+ val |= EDP_PSR2_FAST_WAKE(intel_dp->psr.fast_wake);
}
if (intel_dp->psr.psr2_sel_fetch_enabled) {
@@ -724,7 +720,9 @@ static bool intel_psr2_config_valid(struct intel_dp
*intel_dp,
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
int crtc_hdisplay = crtc_state->hw.adjusted_mode.crtc_hdisplay;
int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay;
+ u32 io_buffer_wake, io_buffer_wake_max, io_buffer_wake_min;
int psr_max_h = 0, psr_max_v = 0, max_bpp = 0;
+ u32 fast_wake, fast_wake_max, fast_wake_min;
if (!intel_dp->psr.sink_psr2_support)
return false;
@@ -768,14 +766,26 @@ static bool intel_psr2_config_valid(struct intel_dp
*intel_dp,
psr_max_h = 5120;
psr_max_v = 3200;
max_bpp = 30;
+ io_buffer_wake_max = TGL_EDP_PSR2_IO_BUFFER_WAKE_MAX_LINES;
+ io_buffer_wake_min = TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES;
+ fast_wake_max = TGL_EDP_PSR2_FAST_WAKE_MAX_LINES;
+ fast_wake_min = TGL_EDP_PSR2_FAST_WAKE_MIN_LINES;
} else if (DISPLAY_VER(dev_priv) >= 10) {
psr_max_h = 4096;
psr_max_v = 2304;
max_bpp = 24;
+ io_buffer_wake_max = EDP_PSR2_IO_BUFFER_WAKE_MAX_LINES;
+ io_buffer_wake_min = EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES;
+ fast_wake_max = EDP_PSR2_FAST_WAKE_MAX_LINES;
+ fast_wake_min = EDP_PSR2_FAST_WAKE_MIN_LINES;
} else if (IS_DISPLAY_VER(dev_priv, 9)) {
psr_max_h = 3640;
psr_max_v = 2304;
max_bpp = 24;
+
[Intel-gfx] [PATCH] drm/i915/display/psr: Disable DC3CO when the PSR2 is used.
Due to the changed sequence of activating/deactivating DC3CO, disable DC3CO until the changed dc3co activating/deactivating sequence is applied. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134 Signed-off-by: Gwan-gyeong Mun --- drivers/gpu/drm/i915/display/intel_psr.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1d561812fcad..32d3d56259c2 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -654,6 +654,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); u32 exit_scanlines; + /* +* FIXME: Due to the changed sequence of activating/deactivating DC3CO, +* disable DC3CO until the changed dc3co activating/deactivating sequence +* is applied. B.Specs:49196 +*/ + return; + /* * DMC's DC3CO exit mechanism has an issue with Selective Fecth * TODO: when the issue is addressed, this restriction should be removed. -- 2.30.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141
The WA requires the following procedure for VDBox SFC reset:
If (MFX-SFC usage is 1) {
1.Issue a MFX-SFC forced lock
2.Wait for MFX-SFC forced lock ack
3.Check the MFX-SFC usage bit
If (MFX-SFC usage bit is 1)
Reset VDBOX and SFC
else
Reset VDBOX
Release the force lock MFX-SFC
}
else if(HCP+SFC usage is 1) {
1.Issue a VE-SFC forced lock
2.Wait for SFC forced lock ack
3.Check the VE-SFC usage bit
If (VE-SFC usage bit is 1)
Reset VDBOX
else
Reset VDBOX and SFC
Release the force lock VE-SFC.
}
else
Reset VDBOX
- Restructure: the changes to the original code flow should stay
relatively minimal; we only need to do an extra HCP check after the
usual VD-MFX check and, if true, switch the register/bit we're
performing the lock on.(MattR)
Bspec: 52890, 53509
Co-developed-by: Matt Roper
Cc: Tvrtko Ursulin
Cc: Matt Roper
Cc: Daniele Ceraolo Spurio
Cc: Lucas De Marchi
Signed-off-by: Aditya Swarup
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_reset.c | 194 +-
drivers/gpu/drm/i915/i915_reg.h | 6 +
2 files changed, 137 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index a377c4588aaa..bcb3d864db11 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -338,15 +338,69 @@ static int gen6_reset_engines(struct intel_gt *gt,
return gen6_hw_domain_reset(gt, hw_mask);
}
-static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
+static struct intel_engine_cs *find_sfc_paired_vecs_engine(struct
intel_engine_cs *engine)
+{
+ int vecs_id;
+
+ GEM_BUG_ON(engine->class != VIDEO_DECODE_CLASS);
+
+ vecs_id = _VECS((engine->instance) / 2);
+
+ return engine->gt->engine[vecs_id];
+}
+
+struct sfc_lock_data {
+ i915_reg_t lock_reg;
+ i915_reg_t ack_reg;
+ i915_reg_t usage_reg;
+ u32 lock_bit;
+ u32 ack_bit;
+ u32 usage_bit;
+ u32 reset_bit;
+};
+
+static void get_sfc_forced_lock_data(struct intel_engine_cs *engine,
+struct sfc_lock_data *sfc_lock)
+{
+ switch (engine->class) {
+ default:
+ MISSING_CASE(engine->class);
+ fallthrough;
+ case VIDEO_DECODE_CLASS:
+ sfc_lock->lock_reg = GEN11_VCS_SFC_FORCED_LOCK(engine);
+ sfc_lock->lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
+
+ sfc_lock->ack_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
+ sfc_lock->ack_bit = GEN11_VCS_SFC_LOCK_ACK_BIT;
+
+ sfc_lock->usage_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
+ sfc_lock->usage_bit = GEN11_VCS_SFC_USAGE_BIT;
+ sfc_lock->reset_bit = GEN11_VCS_SFC_RESET_BIT(engine->instance);
+
+ break;
+ case VIDEO_ENHANCEMENT_CLASS:
+ sfc_lock->lock_reg = GEN11_VECS_SFC_FORCED_LOCK(engine);
+ sfc_lock->lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
+
+ sfc_lock->ack_reg = GEN11_VECS_SFC_LOCK_ACK(engine);
+ sfc_lock->ack_bit = GEN11_VECS_SFC_LOCK_ACK_BIT;
+
+ sfc_lock->usage_reg = GEN11_VECS_SFC_USAGE(engine);
+ sfc_lock->usage_bit = GEN11_VECS_SFC_USAGE_BIT;
+ sfc_lock->reset_bit =
GEN11_VECS_SFC_RESET_BIT(engine->instance);
+
+ break;
+ }
+}
+
+static int gen11_lock_sfc(struct intel_engine_cs *engine,
+ u32 *reset_mask,
+ u32 *unlock_mask)
{
struct intel_uncore *uncore = engine->uncore;
u8 vdbox_sfc_access = engine->gt->info.vdbox_sfc_access;
- i915_reg_t sfc_forced_lock, sfc_forced_lock_ack;
- u32 sfc_forced_lock_bit, sfc_forced_lock_ack_bit;
- i915_reg_t sfc_usage;
- u32 sfc_usage_bit;
- u32 sfc_reset_bit;
+ struct sfc_lock_data sfc_lock;
+ bool lock_obtained, lock_to_other = false;
int ret;
switch (engine->class) {
@@ -354,53 +408,72 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine,
u32 *hw_mask)
if ((BIT(engine->instance) & vdbox_sfc_access) == 0)
return 0;
- sfc_forced_lock = GEN11_VCS_SFC_FORCED_LOCK(engine);
- sfc_forced_lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
-
- sfc_forced_lock_ack = GEN11_VCS_SFC_LOCK_STATUS(engine);
- sfc_forced_lock_ack_bit = GEN11_VCS_SFC_LOCK_ACK_BIT;
+ fallthrough;
+ case VIDEO_ENHANCEMENT_CLASS:
+ get_sfc_forced_lock_data(engine, _lock);
- sfc_usage = GEN11_VCS_SFC_LOCK_STATUS(engine);
- sfc_usage_bit = GEN11_VCS_SFC_USAGE_BIT;
- sfc_reset_bit =
[Intel-gfx] [PATCH v2 1/2] drm/i915: Extract intel_adjusted_rate()
From: Ville Syrjälä
Extract a small helper to calculate the downscaling
adjusted pixel rate/data rate/etc.
v2: Drop the plane visibility check and add a comment explaining why
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 36 ++-
1 file changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index c3f2962aa1eb..07fcfec58c49 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -133,25 +133,45 @@ intel_plane_destroy_state(struct drm_plane *plane,
kfree(plane_state);
}
-unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
- const struct intel_plane_state *plane_state)
+static unsigned int intel_adjusted_rate(const struct drm_rect *src,
+ const struct drm_rect *dst,
+ unsigned int rate)
{
unsigned int src_w, src_h, dst_w, dst_h;
- unsigned int pixel_rate = crtc_state->pixel_rate;
- src_w = drm_rect_width(_state->uapi.src) >> 16;
- src_h = drm_rect_height(_state->uapi.src) >> 16;
- dst_w = drm_rect_width(_state->uapi.dst);
- dst_h = drm_rect_height(_state->uapi.dst);
+ src_w = drm_rect_width(src) >> 16;
+ src_h = drm_rect_height(src) >> 16;
+ dst_w = drm_rect_width(dst);
+ dst_h = drm_rect_height(dst);
/* Downscaling limits the maximum pixel rate */
dst_w = min(src_w, dst_w);
dst_h = min(src_h, dst_h);
- return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_rate, src_w * src_h),
+ return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h),
dst_w * dst_h);
}
+unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
+ const struct intel_plane_state *plane_state)
+{
+ /*
+* Note we don't check for plane visibility here as
+* we want to use this when calculating the cursor
+* watermarks even if the cursor is fully offscreen.
+* That depends on the src/dst rectangles being
+* correctly populated whenever the watermark code
+* considers the cursor to be visible, whether or not
+* it is actually visible.
+*
+* See: intel_wm_plane_visible() and intel_check_cursor()
+*/
+
+ return intel_adjusted_rate(_state->uapi.src,
+ _state->uapi.dst,
+ crtc_state->pixel_rate);
+}
+
unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
--
2.26.2
___
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extract intel_adjusted_rate()
On Thu, Apr 01, 2021 at 05:32:20PM +0300, Ville Syrjälä wrote:
> On Thu, Apr 01, 2021 at 03:43:37PM +0300, Jani Nikula wrote:
> > On Tue, 30 Mar 2021, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Extract a small helper to calculate the downscaling
> > > adjusted pixel rate/data rate/etc.
> > >
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > .../gpu/drm/i915/display/intel_atomic_plane.c | 27 +--
> > > 1 file changed, 19 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > index c3f2962aa1eb..3f830b70b0c1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > @@ -133,25 +133,36 @@ intel_plane_destroy_state(struct drm_plane *plane,
> > > kfree(plane_state);
> > > }
> > >
> > > -unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> > > *crtc_state,
> > > - const struct intel_plane_state *plane_state)
> > > +static unsigned int intel_adjusted_rate(const struct drm_rect *src,
> > > + const struct drm_rect *dst,
> > > + unsigned int rate)
> > > {
> > > unsigned int src_w, src_h, dst_w, dst_h;
> > > - unsigned int pixel_rate = crtc_state->pixel_rate;
> > >
> > > - src_w = drm_rect_width(_state->uapi.src) >> 16;
> > > - src_h = drm_rect_height(_state->uapi.src) >> 16;
> > > - dst_w = drm_rect_width(_state->uapi.dst);
> > > - dst_h = drm_rect_height(_state->uapi.dst);
> > > + src_w = drm_rect_width(src) >> 16;
> > > + src_h = drm_rect_height(src) >> 16;
> > > + dst_w = drm_rect_width(dst);
> > > + dst_h = drm_rect_height(dst);
> > >
> > > /* Downscaling limits the maximum pixel rate */
> > > dst_w = min(src_w, dst_w);
> > > dst_h = min(src_h, dst_h);
> > >
> > > - return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_rate, src_w * src_h),
> > > + return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h),
> > > dst_w * dst_h);
> > > }
> > >
> > > +unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> > > *crtc_state,
> > > + const struct intel_plane_state *plane_state)
> > > +{
> > > + if (!plane_state->uapi.visible)
> >
> > Potential functional change not covered in the commit message? Makes
> > sense, but the rabbit hole is too deep to find out if this could
> > actually make a difference.
>
> This is fine. If the plane isn't visible then it's not
> generating any pixels anyway. I think I either had some other
> patches originally that wanted this, or I just wanted to make
> this safe to call at any point without checking for plane
> visibility in the caller. But IIRC I dropped those other
> patches and so this might not be necessary anymore. I'll double
> check and either drop this or amend the commit msg a bit.
Actually the one case where this might matter a bit is a
fully offscreen cursor plane. The watermark claculations
consider the cursor visible in that case (to avoid redundant
watermark updates when the cursor pops in and out of visibility
due to going offscreen). So in fact we want it to have a
non-zero pixel rate or else the watermarks will just come out
as zero.
Fortunately intel_check_cursor() does populate the plane
src/dst rectangles correctly even in that case. Normally
!visible implies that the src/dst rectangles don't
contain data we can use.
So I'll drop the check and toss in a comment somewhere to
remind us of the facts for the next time...
>
> >
> > If mentioned in the commit message,
> >
> > Reviewed-by: Jani Nikula
> >
> >
> > > + return 0;
> > > +
> > > + return intel_adjusted_rate(_state->uapi.src,
> > > +_state->uapi.dst,
> > > +crtc_state->pixel_rate);
> > > +}
> > > +
> > > unsigned int intel_plane_data_rate(const struct intel_crtc_state
> > > *crtc_state,
> > > const struct intel_plane_state *plane_state)
> > > {
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center
>
> --
> Ville Syrjälä
> Intel
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] intel_gpu_top: Document how to use JSON output
On Thu, 1 Apr 2021 at 15:58, Tvrtko Ursulin wrote: > > > On 01/04/2021 15:49, Matthew Auld wrote: > > On Wed, 31 Mar 2021 at 10:12, Tvrtko Ursulin > > wrote: > >> > >> From: Tvrtko Ursulin > >> > >> Put a note on how to use JSON output into the man page. > >> > >> Signed-off-by: Tvrtko Ursulin > >> References: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/issues/100 > >> --- > >> man/intel_gpu_top.rst | 5 + > >> 1 file changed, 5 insertions(+) > >> > >> diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst > >> index f6d74852558b..94fdc6520fd3 100644 > >> --- a/man/intel_gpu_top.rst > >> +++ b/man/intel_gpu_top.rst > >> @@ -81,6 +81,11 @@ Filter types: :: > >> pci pci:[vendor=%04x/name][,device=%04x][,card=%d] > >>vendor is hex number or vendor name > >> > >> +JSON OUTPUT > >> +=== > >> + > >> +To parse the JSON as output by the tool the consumer should wrap its > >> entirety into square brackets ([ ]). This will make each sample point an > >> JSON array element and will avoid "Multiple root elements" JSON validation > >> error. > >> + > > > > a JSON array element > > > > It could be argued that this should go into LIMITATIONS? > > Hm yes, 50-50 or you lean more towards limitations? Otherwise inertia > says it can also stay as is. Just keep it as-is. > > Regards, > > Tvrtko > > > Acked-by: Matthew Auld > > > >> LIMITATIONS > >> === > >> > >> -- > >> 2.27.0 > >> > >> ___ > >> igt-dev mailing list > >> igt-...@lists.freedesktop.org > >> https://lists.freedesktop.org/mailman/listinfo/igt-dev ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Uninit the DMC FW loader state during shutdown
On Thu, Mar 11, 2021 at 04:45:29PM +0200, Imre Deak wrote: > We need to wait for the DMC FW loader work to complete during shutdown, > even if it's unlikely to be still pending by that time, fix this. > > This also fixes the wakeref tracking WARN during shutdown about the > leaked reference we hold due to a missing DMC firmware. > > While at it add a TODO comment about unifying the shutdown and PM > power-off sequences and later these sequences with the driver remove and > system/runtime suspend sequences. > > Cc: Ville Syrjälä > References: > https://lore.kernel.org/lkml/20210303055517.GB2708@xsang-OptiPlex-9020 > Reported-by: kernel test robot > Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/i915_drv.c | 10 +- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 3edd5e47ad68..4a0e491e9692 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1038,10 +1038,18 @@ void i915_driver_shutdown(struct drm_i915_private > *i915) > intel_suspend_encoders(i915); > intel_shutdown_encoders(i915); > > + intel_csr_ucode_suspend(i915); > + > /* >* The only requirement is to reboot with display DC states disabled, >* for now leaving all display power wells in the INIT power domain > - * enabled matching the driver reload sequence. > + * enabled. > + * > + * TODO: > + * - unify the pci_driver::shutdown sequence here with the > + * pci_driver.driver.pm.poweroff,poweroff_late sequence. > + * - unify the driver remove and system/runtime suspend sequences with > + * the above unified shutdown/poweroff sequence. >*/ > intel_power_domains_driver_remove(i915); > enable_rpm_wakeref_asserts(>runtime_pm); > -- > 2.25.1 -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] intel_gpu_top: Document how to use JSON output
On 01/04/2021 15:49, Matthew Auld wrote: On Wed, 31 Mar 2021 at 10:12, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Put a note on how to use JSON output into the man page. Signed-off-by: Tvrtko Ursulin References: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/issues/100 --- man/intel_gpu_top.rst | 5 + 1 file changed, 5 insertions(+) diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst index f6d74852558b..94fdc6520fd3 100644 --- a/man/intel_gpu_top.rst +++ b/man/intel_gpu_top.rst @@ -81,6 +81,11 @@ Filter types: :: pci pci:[vendor=%04x/name][,device=%04x][,card=%d] vendor is hex number or vendor name +JSON OUTPUT +=== + +To parse the JSON as output by the tool the consumer should wrap its entirety into square brackets ([ ]). This will make each sample point an JSON array element and will avoid "Multiple root elements" JSON validation error. + a JSON array element It could be argued that this should go into LIMITATIONS? Hm yes, 50-50 or you lean more towards limitations? Otherwise inertia says it can also stay as is. Regards, Tvrtko Acked-by: Matthew Auld LIMITATIONS === -- 2.27.0 ___ igt-dev mailing list igt-...@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix an uninitialized variable issue
== Series Details == Series: drm/i915: Fix an uninitialized variable issue URL : https://patchwork.freedesktop.org/series/88660/ State : success == Summary == CI Bug Log - changes from CI_DRM_9922 -> Patchwork_19886 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/index.html Known issues Here are the changes found in Patchwork_19886 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +23 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html * igt@core_hotunplug@unbind-rebind: - fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html * igt@vgem_basic@setversion: - fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/fi-tgl-y/igt@vgem_ba...@setversion.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/fi-tgl-y/igt@vgem_ba...@setversion.html Possible fixes * igt@gem_exec_suspend@basic-s3: - fi-tgl-y: [DMESG-WARN][5] ([i915#2411] / [i915#402]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/fi-tgl-y/igt@gem_exec_susp...@basic-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/fi-tgl-y/igt@gem_exec_susp...@basic-s3.html * igt@gem_flink_basic@bad-flink: - fi-tgl-y: [DMESG-WARN][7] ([i915#402]) -> [PASS][8] +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9922/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283 [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (47 -> 41) -- Missing(6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y fi-bdw-samus Build changes - * Linux: CI_DRM_9922 -> Patchwork_19886 CI-20190529: 20190529 CI_DRM_9922: 1efd71dc44e4f4a02ee7d2019f0c6149c9afd3a9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6054: 03905dc18a28978d1ca7430ca2c3de96411bdc48 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19886: 00035d57539232c6bbcd043f37a83d08ac9958f4 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 00035d575392 drm/i915: Fix an uninitialized variable issue == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19886/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reuse intel_adjusted_rate() for pfit pixel rate adjustment
On Thu, 01 Apr 2021, Ville Syrjälä wrote:
> On Thu, Apr 01, 2021 at 03:55:20PM +0300, Jani Nikula wrote:
>> On Tue, 30 Mar 2021, Ville Syrjala wrote:
>> > From: Ville Syrjälä
>> >
>> > Replace the hand rolled pfit downscale calculations with
>> > intel_adjusted_rate().
>> >
>> > Signed-off-by: Ville Syrjälä
>> > ---
>> > .../gpu/drm/i915/display/intel_atomic_plane.c | 6 ++---
>> > .../gpu/drm/i915/display/intel_atomic_plane.h | 4
>> > drivers/gpu/drm/i915/display/intel_display.c | 23 +--
>> > 3 files changed, 13 insertions(+), 20 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> > index 3f830b70b0c1..5f0a5ea474eb 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> > @@ -133,9 +133,9 @@ intel_plane_destroy_state(struct drm_plane *plane,
>> >kfree(plane_state);
>> > }
>> >
>> > -static unsigned int intel_adjusted_rate(const struct drm_rect *src,
>> > - const struct drm_rect *dst,
>> > - unsigned int rate)
>> > +unsigned int intel_adjusted_rate(const struct drm_rect *src,
>> > + const struct drm_rect *dst,
>> > + unsigned int rate)
>> > {
>> >unsigned int src_w, src_h, dst_w, dst_h;
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> > index 5c78a087ed86..dc4d05e75e1c 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> > @@ -10,6 +10,7 @@
>> >
>> > struct drm_plane;
>> > struct drm_property;
>> > +struct drm_rect;
>> > struct intel_atomic_state;
>> > struct intel_crtc;
>> > struct intel_crtc_state;
>> > @@ -18,6 +19,9 @@ struct intel_plane_state;
>> >
>> > extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
>> >
>> > +unsigned int intel_adjusted_rate(const struct drm_rect *src,
>> > + const struct drm_rect *dst,
>> > + unsigned int rate);
>> > unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
>> > *crtc_state,
>> >const struct intel_plane_state
>> > *plane_state);
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> > b/drivers/gpu/drm/i915/display/intel_display.c
>> > index d74b263c5f4e..472e691286c6 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_display.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> > @@ -3978,7 +3978,7 @@ static bool intel_crtc_supports_double_wide(const
>> > struct intel_crtc *crtc)
>> > static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
>> > {
>> >u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;
>> > - unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
>> > + struct drm_rect src;
>> >
>> >/*
>> > * We only use IF-ID interlacing. If we ever use
>> > @@ -3988,23 +3988,12 @@ static u32 ilk_pipe_pixel_rate(const struct
>> > intel_crtc_state *crtc_state)
>> >if (!crtc_state->pch_pfit.enabled)
>> >return pixel_rate;
>> >
>> > - pipe_w = crtc_state->pipe_src_w;
>> > - pipe_h = crtc_state->pipe_src_h;
>> > + drm_rect_init(, 0, 0,
>> > +crtc_state->pipe_src_w << 16,
>> > +crtc_state->pipe_src_h << 16);
>> >
>> > - pfit_w = drm_rect_width(_state->pch_pfit.dst);
>> > - pfit_h = drm_rect_height(_state->pch_pfit.dst);
>> > -
>> > - if (pipe_w < pfit_w)
>> > - pipe_w = pfit_w;
>>
>> So this is src_w = max(src_w, dst_w) and gets turned into dst_w =
>> min(src_w, dst_w) instead? Ditto for _h. Does it end up being the same
>> thing after the division?
>
> Yes. The min/max just gets rid of the upscaling case,
> ie. causes the division to be just x/x==1 when dst>src.
> Doesn't matter if we use the min or max approach to
> achieve that result.
Ok, thanks.
Reviewed-by: Jani Nikula
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] intel_gpu_top: Document how to use JSON output
On Wed, 31 Mar 2021 at 10:12, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > Put a note on how to use JSON output into the man page. > > Signed-off-by: Tvrtko Ursulin > References: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/issues/100 > --- > man/intel_gpu_top.rst | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst > index f6d74852558b..94fdc6520fd3 100644 > --- a/man/intel_gpu_top.rst > +++ b/man/intel_gpu_top.rst > @@ -81,6 +81,11 @@ Filter types: :: > pci pci:[vendor=%04x/name][,device=%04x][,card=%d] > vendor is hex number or vendor name > > +JSON OUTPUT > +=== > + > +To parse the JSON as output by the tool the consumer should wrap its > entirety into square brackets ([ ]). This will make each sample point an JSON > array element and will avoid "Multiple root elements" JSON validation error. > + a JSON array element It could be argued that this should go into LIMITATIONS? Acked-by: Matthew Auld > LIMITATIONS > === > > -- > 2.27.0 > > ___ > igt-dev mailing list > igt-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
== Series Details == Series: drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915 URL : https://patchwork.freedesktop.org/series/88657/ State : success == Summary == CI Bug Log - changes from CI_DRM_9921_full -> Patchwork_19885_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19885_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][1] ([i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-apl7/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@legacy-engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +3 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-mixed-process.html * igt@gem_eio@in-flight-contexts-10ms: - shard-tglb: [PASS][3] -> [TIMEOUT][4] ([i915#3063]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-tglb8/igt@gem_...@in-flight-contexts-10ms.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-tglb8/igt@gem_...@in-flight-contexts-10ms.html * igt@gem_eio@unwedge-stress: - shard-skl: [PASS][5] -> [TIMEOUT][6] ([i915#2369] / [i915#2771] / [i915#3063]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-skl7/igt@gem_...@unwedge-stress.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-skl6/igt@gem_...@unwedge-stress.html - shard-iclb: [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#2481] / [i915#3070]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-iclb2/igt@gem_...@unwedge-stress.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-iclb7/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2846]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-kbl3/igt@gem_exec_f...@basic-deadline.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-kbl6/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-tglb6/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-glk9/igt@gem_exec_fair@basic-p...@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-glk5/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2842]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/shard-iclb7/igt@gem_exec_fair@basic-p...@vcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-iclb2/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][17] ([i915#2842]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-iclb2/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_params@no-vebox: - shard-skl: NOTRUN -> [SKIP][18] ([fdo#109271]) +49 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-skl9/igt@gem_exec_par...@no-vebox.html * igt@gem_huc_copy@huc-copy: - shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-apl2/igt@gem_huc_c...@huc-copy.html * igt@gem_pread@exhaustion: - shard-snb: NOTRUN -> [WARN][20] ([i915#2658]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-snb2/igt@gem_pr...@exhaustion.html - shard-kbl: NOTRUN -> [WARN][21] ([i915#2658]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-kbl2/igt@gem_pr...@exhaustion.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][22] ([i915#3318]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-apl6/igt@gem_userptr_bl...@vma-merge.html * igt@gem_workarounds@suspend-resume: - shard-apl: NOTRUN -> [DMESG-WARN][23] ([i915#180]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/shard-apl1/igt@gem_workarou...@suspend-resume.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [PASS][24] -> [DMESG-WARN][25] ([i915#1436] / [i915#716]) [24]:
[Intel-gfx] [RFC PATCH i-g-t 6/6] tests/core_hotunplug: Add 'GEM spin' variants
Verify if a device with a GEM spin batch job still running on a GPU can
be hot-unbound/unplugged cleanly and released.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 124 +
1 file changed, 124 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 0cb1267ae..f93545402 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -35,6 +35,7 @@
#include "i915/gem_vm.h"
#include "igt.h"
#include "igt_device_scan.h"
+#include "igt_dummyload.h"
#include "igt_kmod.h"
#include "igt_sysfs.h"
#include "sw_sync.h"
@@ -440,6 +441,37 @@ static int local_gem_close(int fd, uint32_t handle)
return igt_ioctl(fd, DRM_IOCTL_GEM_CLOSE, _bo) ? -errno : 0;
}
+static int local_bo_busy(int fd, uint32_t handle)
+{
+ struct drm_i915_gem_busy busy = { .handle = handle, };
+
+ return igt_ioctl(fd, DRM_IOCTL_I915_GEM_BUSY, ) ? -errno : 0;
+}
+
+static void local_spin_free(struct hotunplug *priv, igt_spin_t *spin)
+{
+ igt_spin_end(spin);
+
+ spin->poll_handle = 0;
+ spin->handle = 0;
+
+ if (spin->poll) {
+ void *ptr = spin->poll;
+
+ spin->poll = NULL;
+ igt_assert(!gem_munmap(ptr, 4096));
+ }
+
+ if (spin->batch) {
+ void *ptr = spin->poll;
+
+ spin->batch = NULL;
+ igt_assert(!gem_munmap(ptr, 4096));
+ }
+
+ igt_spin_free(priv->fd.drm, spin);
+}
+
/* Subtests */
static void unbind_rebind(struct hotunplug *priv)
@@ -862,6 +894,74 @@ static void prime_hotunplug_lateclose(struct hotunplug
*priv)
igt_assert_eq(dmabuf, -1);
}
+static void spin_hotunbind_lateclose(struct hotunplug *priv)
+{
+ igt_spin_t *spin;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unbind");
+
+ local_debug("%s\n", "running dummy load");
+ spin = igt_spin_new(priv->fd.drm, .flags = IGT_SPIN_POLL_RUN);
+ igt_spin_busywait_until_started(spin);
+
+ driver_unbind(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late query the dummy load related GEM
object status");
+ igt_assert_eq(local_bo_busy(priv->fd.drm, spin->handle), -ENODEV);
+ local_debug("%s\n", "trying to late close the dummy load related GEM
objects");
+ igt_assert_eq(local_gem_close(priv->fd.drm, spin->poll_handle),
-ENODEV);
+ igt_assert_eq(local_gem_close(priv->fd.drm, spin->handle), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "unbound ");
+ igt_assert_eq(priv->fd.drm, -1);
+
+ local_debug("%s\n", "trying to late free the dummy load");
+ local_spin_free(priv, spin);
+}
+
+static void spin_hotunplug_lateclose(struct hotunplug *priv)
+{
+ igt_spin_t *spin;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unplug");
+
+ local_debug("%s\n", "running dummy load");
+ spin = igt_spin_new(priv->fd.drm, .flags = IGT_SPIN_POLL_RUN);
+ igt_spin_busywait_until_started(spin);
+
+ device_unplug(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late query the dummy load related GEM
object status");
+ igt_assert_eq(local_bo_busy(priv->fd.drm, spin->handle), -ENODEV);
+ local_debug("%s\n", "trying to late close the dummy load related GEM
objects");
+ igt_assert_eq(local_gem_close(priv->fd.drm, spin->poll_handle),
-ENODEV);
+ igt_assert_eq(local_gem_close(priv->fd.drm, spin->handle), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "removed ");
+ igt_assert_eq(priv->fd.drm, -1);
+
+ local_debug("%s\n", "trying to late free the dummy load");
+ local_spin_free(priv, spin);
+}
+
/* Main */
igt_main
@@ -1119,6 +1219,30 @@ igt_main
recover();
}
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly unbound from a
device with a still running spin batch, then released");
+ igt_subtest("spin-hotunbind-lateclose")
+ spin_hotunbind_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+
[Intel-gfx] [RFC PATCH i-g-t 5/6] tests/core_hotunplug: Add 'PRIME handle' variants
Even if all device file descriptors are closed on device hotunbind /
hotunplug, PRIME exported objects may still exists, referenced by still
open dma-buf file descriptors. Add subtests that keep such descriptor
open on device hotunbind / hotunplug.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 104 +
1 file changed, 104 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 6f3b3b3d3..0cb1267ae 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -782,6 +782,86 @@ static void userptr_hotunplug_lateclose(struct hotunplug
*priv)
igt_fail_on_f(munmap(ptr, 4096), "Userptr unmap failure!");
}
+static void prime_hotunbind_lateclose(struct hotunplug *priv)
+{
+ uint32_t handle;
+ int dmabuf, ret;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unbind");
+
+ local_debug("%s\n", "creating and PRIME-exporting a GEM object");
+ handle = gem_create(priv->fd.drm, 4096);
+ dmabuf = prime_handle_to_fd(priv->fd.drm, handle);
+
+ ret = local_gem_close(priv->fd.drm, handle);
+ priv->fd.drm = close_device(priv->fd.drm, "", "exported ");
+
+ if (priv->fd.drm != -1) {
+ igt_ignore_warn(close(dmabuf));
+ igt_assert_eq(priv->fd.drm, -1);
+ }
+
+ /* once device close succeeds, take care of open dmabuf like if it was
a device fd */
+ priv->fd.drm = dmabuf;
+ igt_assert_f(!ret, "gem_close failed with errno %d\n", ret);
+
+ driver_unbind(priv, "hot ", 0);
+
+ igt_debug("late closing the PRIME file descriptor\n");
+ dmabuf = local_close(dmabuf, "PRIME file descriptor late close
failure");
+ priv->fd.drm = dmabuf;
+ igt_assert_eq(dmabuf, -1);
+}
+
+static void prime_hotunplug_lateclose(struct hotunplug *priv)
+{
+ uint32_t handle;
+ int dmabuf, ret;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unplug");
+
+ local_debug("%s\n", "creating and PRIME-exporting a GEM object");
+ handle = gem_create(priv->fd.drm, 4096);
+ dmabuf = prime_handle_to_fd(priv->fd.drm, handle);
+
+ ret = local_gem_close(priv->fd.drm, handle);
+ priv->fd.drm = close_device(priv->fd.drm, "", "exported ");
+
+ if (priv->fd.drm != -1) {
+ igt_ignore_warn(close(dmabuf));
+ igt_assert_eq(priv->fd.drm, -1);
+ }
+
+ /* once device close succeeds, take care of open dmabuf like if it was
a device fd */
+ priv->fd.drm = dmabuf;
+ igt_assert_f(!ret, "gem_close failed with errno %d\n", ret);
+
+ device_unplug(priv, "hot ", 0);
+
+ igt_debug("late closing the PRIME file descriptor\n");
+ dmabuf = local_close(dmabuf, "PRIME file descriptor late close
failure");
+ priv->fd.drm = dmabuf;
+ igt_assert_eq(dmabuf, -1);
+}
+
/* Main */
igt_main
@@ -1015,6 +1095,30 @@ igt_main
recover();
}
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly unbound from a
device with a still open PRIME-exported object, then released");
+ igt_subtest("prime-hotunbind-lateclose")
+ prime_hotunbind_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if a device with a still open
PRIME-exported object can be cleanly unplugged, then released");
+ igt_subtest("prime-hotunplug-lateclose")
+ prime_hotunplug_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
igt_fixture {
post_healthcheck();
--
2.25.1
___
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[Intel-gfx] [RFC PATCH i-g-t 4/6] tests/core_hotunplug: Add 'userptr GEM object' variants
Verify if userptr GM objects are cleaned up equally well as regular
GEM objects on device hotunbind / hotunplug.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 90 ++
1 file changed, 90 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 7f61b4446..6f3b3b3d3 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -716,6 +716,72 @@ static void gem_hotunplug_lateclose(struct hotunplug *priv)
igt_assert_eq(priv->fd.drm, -1);
}
+static void userptr_hotunbind_lateclose(struct hotunplug *priv)
+{
+ uint32_t handle;
+ void *ptr;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ igt_assert_eq(posix_memalign(, 4096, 4096), 0);
+ igt_require(!__gem_userptr(priv->fd.drm, ptr, 4096, 0, 0, ));
+ gem_close(priv->fd.drm, handle);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unbind");
+
+ local_debug("%s\n", "creating a userptr GEM object");
+ gem_userptr(priv->fd.drm, ptr, 4096, 0, 0, );
+
+ driver_unbind(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late remove the object");
+ igt_assert_eq(local_gem_close(priv->fd.drm, handle), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "unbound ");
+ igt_assert_eq(priv->fd.drm, -1);
+
+ igt_fail_on_f(munmap(ptr, 4096), "Userptr unmap failure!");
+}
+
+static void userptr_hotunplug_lateclose(struct hotunplug *priv)
+{
+ uint32_t handle;
+ void *ptr;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ igt_assert_eq(posix_memalign(, 4096, 4096), 0);
+ igt_require(!__gem_userptr(priv->fd.drm, ptr, 4096, 0, 0, ));
+ gem_close(priv->fd.drm, handle);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unplug");
+
+ local_debug("%s\n", "creating a userptr GEM object");
+ gem_userptr(priv->fd.drm, ptr, 4096, 0, 0, );
+
+ device_unplug(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late remove the object");
+ igt_assert_eq(local_gem_close(priv->fd.drm, handle), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "removed ");
+ igt_assert_eq(priv->fd.drm, -1);
+
+ igt_fail_on_f(munmap(ptr, 4096), "Userptr unmap failure!");
+}
+
/* Main */
igt_main
@@ -925,6 +991,30 @@ igt_main
recover();
}
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly unbound from a
device with a still open userptr GEM object, then released");
+ igt_subtest("userptr-hotunbind-lateclose")
+ userptr_hotunbind_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if a device with a still open userptr GEM
object can be cleanly unplugged, then released");
+ igt_subtest("userptr-hotunplug-lateclose")
+ userptr_hotunplug_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
igt_fixture {
post_healthcheck();
--
2.25.1
___
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[Intel-gfx] [RFC PATCH i-g-t 3/6] tests/core_hotunplug: Add 'GEM object' variants
GEM objects belonging to user file descriptors still open on device
hotunbind / hotunplug may exhibit still more driver issues. Add
subtests that implements these scenarios.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 85 ++
1 file changed, 85 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index decfcdfda..7f61b4446 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -433,6 +433,13 @@ static void set_filter_from_device(int fd)
igt_assert_eq(igt_device_filter_add(filter), 1);
}
+static int local_gem_close(int fd, uint32_t handle)
+{
+ struct drm_gem_close close_bo = { .handle = handle, };
+
+ return igt_ioctl(fd, DRM_IOCTL_GEM_CLOSE, _bo) ? -errno : 0;
+}
+
/* Subtests */
static void unbind_rebind(struct hotunplug *priv)
@@ -655,6 +662,60 @@ static void vm_hotunplug_lateclose(struct hotunplug *priv)
igt_assert_eq(priv->fd.drm, -1);
}
+static void gem_hotunbind_lateclose(struct hotunplug *priv)
+{
+ uint32_t handle;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unbind");
+
+ local_debug("%s\n", "creating a GEM user object");
+ handle = gem_create(priv->fd.drm, 4096);
+
+ driver_unbind(priv, "hot", 0);
+
+ local_debug("%s\n", "trying to late remove the object");
+ igt_assert_eq(local_gem_close(priv->fd.drm, handle), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "unbound ");
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
+static void gem_hotunplug_lateclose(struct hotunplug *priv)
+{
+ uint32_t handle;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ igt_require_gem(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unplug");
+
+ local_debug("%s\n", "creating a GEM user object");
+ handle = gem_create(priv->fd.drm, 4096);
+
+ device_unplug(priv, "hot", 0);
+
+ local_debug("%s\n", "trying to late remove the object");
+ igt_assert_eq(local_gem_close(priv->fd.drm, handle), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "removed ");
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
/* Main */
igt_main
@@ -840,6 +901,30 @@ igt_main
recover();
}
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly unbound from a
device with a still open GEM object, then released");
+ igt_subtest("gem-hotunbind-lateclose")
+ gem_hotunbind_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if a device with a still open GEM object
can be cleanly unplugged, then released");
+ igt_subtest("gem-hotunplug-lateclose")
+ gem_hotunplug_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
igt_fixture {
post_healthcheck();
--
2.25.1
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC PATCH i-g-t 1/6] tests/core_hotunplug: Add 'GEM context' variants
Verify if an additional context associated with an open device file
descriptor is cleaned up correctly on device hotunbind / hotunplug.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 79 ++
1 file changed, 79 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 56a88fefd..4f6c4f625 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -31,6 +31,7 @@
#include
#include "i915/gem.h"
+#include "i915/gem_context.h"
#include "igt.h"
#include "igt_device_scan.h"
#include "igt_kmod.h"
@@ -545,6 +546,60 @@ static void hotreplug_lateclose(struct hotunplug *priv)
igt_assert_f(healthcheck(priv, false), "%s\n", priv->failure);
}
+static void ctx_hotunbind_lateclose(struct hotunplug *priv)
+{
+ uint32_t ctx;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ gem_require_contexts(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unbind");
+
+ local_debug("%s\n", "creating additional GEM user context");
+ ctx = gem_context_create(priv->fd.drm);
+
+ driver_unbind(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late destroy the context");
+ igt_assert_eq(__gem_context_destroy(priv->fd.drm, ctx), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "unbound ");
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
+static void ctx_hotunplug_lateclose(struct hotunplug *priv)
+{
+ uint32_t ctx;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ gem_require_contexts(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unplug");
+
+ local_debug("%s\n", "creating additional GEM user context");
+ ctx = gem_context_create(priv->fd.drm);
+
+ device_unplug(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late destroy the context");
+ igt_assert_eq(__gem_context_destroy(priv->fd.drm, ctx), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "removed ");
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
/* Main */
igt_main
@@ -682,6 +737,30 @@ igt_main
recover();
}
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly unbound for a
still open device with extra GEM context, then released");
+ igt_subtest("ctx-hotunbind-lateclose")
+ ctx_hotunbind_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if a still open device with extra GEM
context can be cleanly unplugged, then released");
+ igt_subtest("ctx-hotunplug-lateclose")
+ ctx_hotunplug_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
igt_fixture {
post_healthcheck();
--
2.25.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC PATCH i-g-t 2/6] tests/core_hotunplug: Add 'GEM address space' variants
Verify if an additional address space associated with an open device
file descriptor is cleaned up correctly on device hotunbind / hotunplug.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 79 ++
1 file changed, 79 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 4f6c4f625..decfcdfda 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -32,6 +32,7 @@
#include "i915/gem.h"
#include "i915/gem_context.h"
+#include "i915/gem_vm.h"
#include "igt.h"
#include "igt_device_scan.h"
#include "igt_kmod.h"
@@ -600,6 +601,60 @@ static void ctx_hotunplug_lateclose(struct hotunplug *priv)
igt_assert_eq(priv->fd.drm, -1);
}
+static void vm_hotunbind_lateclose(struct hotunplug *priv)
+{
+ int vm;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ gem_require_vm(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unbind");
+
+ local_debug("%s\n", "creating additional GEM user address space");
+ vm = gem_vm_create(priv->fd.drm);
+
+ driver_unbind(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late remove the address space");
+ igt_assert_eq(__gem_vm_destroy(priv->fd.drm, vm), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "removed ");
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
+static void vm_hotunplug_lateclose(struct hotunplug *priv)
+{
+ int vm;
+
+ igt_require(priv->fd.drm = -1);
+ priv->fd.drm = local_drm_open_driver(false, "pre-", " for prerequisites
check");
+
+ igt_require_intel(priv->fd.drm);
+ gem_require_vm(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm, "", "pre-checked ");
+
+ pre_check(priv);
+
+ priv->fd.drm = local_drm_open_driver(false, "", " for hot unplug");
+
+ local_debug("%s\n", "creating additional GEM user address space");
+ vm = gem_vm_create(priv->fd.drm);
+
+ device_unplug(priv, "hot ", 0);
+
+ local_debug("%s\n", "trying to late remove the address space");
+ igt_assert_eq(__gem_vm_destroy(priv->fd.drm, vm), -ENODEV);
+
+ priv->fd.drm = close_device(priv->fd.drm, "late ", "unbound ");
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
/* Main */
igt_main
@@ -761,6 +816,30 @@ igt_main
recover();
}
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly unboound form
a still open device with extra GEM address space, then released");
+ igt_subtest("vm-hotunbind-lateclose")
+ vm_hotunbind_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
+ igt_fixture
+ post_healthcheck();
+
+ igt_subtest_group {
+ igt_describe("Check if a still open device with extra GEM
address space can be cleanly unplugged, then released");
+ igt_subtest("vm-hotunplug-lateclose")
+ vm_hotunplug_lateclose();
+
+ igt_fixture
+ recover();
+ }
+
igt_fixture {
post_healthcheck();
--
2.25.1
___
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extract intel_adjusted_rate()
On Thu, Apr 01, 2021 at 03:43:37PM +0300, Jani Nikula wrote:
> On Tue, 30 Mar 2021, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Extract a small helper to calculate the downscaling
> > adjusted pixel rate/data rate/etc.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > .../gpu/drm/i915/display/intel_atomic_plane.c | 27 +--
> > 1 file changed, 19 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > index c3f2962aa1eb..3f830b70b0c1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > @@ -133,25 +133,36 @@ intel_plane_destroy_state(struct drm_plane *plane,
> > kfree(plane_state);
> > }
> >
> > -unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> > *crtc_state,
> > - const struct intel_plane_state *plane_state)
> > +static unsigned int intel_adjusted_rate(const struct drm_rect *src,
> > + const struct drm_rect *dst,
> > + unsigned int rate)
> > {
> > unsigned int src_w, src_h, dst_w, dst_h;
> > - unsigned int pixel_rate = crtc_state->pixel_rate;
> >
> > - src_w = drm_rect_width(_state->uapi.src) >> 16;
> > - src_h = drm_rect_height(_state->uapi.src) >> 16;
> > - dst_w = drm_rect_width(_state->uapi.dst);
> > - dst_h = drm_rect_height(_state->uapi.dst);
> > + src_w = drm_rect_width(src) >> 16;
> > + src_h = drm_rect_height(src) >> 16;
> > + dst_w = drm_rect_width(dst);
> > + dst_h = drm_rect_height(dst);
> >
> > /* Downscaling limits the maximum pixel rate */
> > dst_w = min(src_w, dst_w);
> > dst_h = min(src_h, dst_h);
> >
> > - return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_rate, src_w * src_h),
> > + return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h),
> > dst_w * dst_h);
> > }
> >
> > +unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> > *crtc_state,
> > + const struct intel_plane_state *plane_state)
> > +{
> > + if (!plane_state->uapi.visible)
>
> Potential functional change not covered in the commit message? Makes
> sense, but the rabbit hole is too deep to find out if this could
> actually make a difference.
This is fine. If the plane isn't visible then it's not
generating any pixels anyway. I think I either had some other
patches originally that wanted this, or I just wanted to make
this safe to call at any point without checking for plane
visibility in the caller. But IIRC I dropped those other
patches and so this might not be necessary anymore. I'll double
check and either drop this or amend the commit msg a bit.
>
> If mentioned in the commit message,
>
> Reviewed-by: Jani Nikula
>
>
> > + return 0;
> > +
> > + return intel_adjusted_rate(_state->uapi.src,
> > + _state->uapi.dst,
> > + crtc_state->pixel_rate);
> > +}
> > +
> > unsigned int intel_plane_data_rate(const struct intel_crtc_state
> > *crtc_state,
> >const struct intel_plane_state *plane_state)
> > {
>
> --
> Jani Nikula, Intel Open Source Graphics Center
--
Ville Syrjälä
Intel
___
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[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix an uninitialized variable issue
== Series Details == Series: drm/i915: Fix an uninitialized variable issue URL : https://patchwork.freedesktop.org/series/88660/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reuse intel_adjusted_rate() for pfit pixel rate adjustment
On Thu, Apr 01, 2021 at 03:55:20PM +0300, Jani Nikula wrote:
> On Tue, 30 Mar 2021, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Replace the hand rolled pfit downscale calculations with
> > intel_adjusted_rate().
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > .../gpu/drm/i915/display/intel_atomic_plane.c | 6 ++---
> > .../gpu/drm/i915/display/intel_atomic_plane.h | 4
> > drivers/gpu/drm/i915/display/intel_display.c | 23 +--
> > 3 files changed, 13 insertions(+), 20 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > index 3f830b70b0c1..5f0a5ea474eb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > @@ -133,9 +133,9 @@ intel_plane_destroy_state(struct drm_plane *plane,
> > kfree(plane_state);
> > }
> >
> > -static unsigned int intel_adjusted_rate(const struct drm_rect *src,
> > - const struct drm_rect *dst,
> > - unsigned int rate)
> > +unsigned int intel_adjusted_rate(const struct drm_rect *src,
> > +const struct drm_rect *dst,
> > +unsigned int rate)
> > {
> > unsigned int src_w, src_h, dst_w, dst_h;
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > index 5c78a087ed86..dc4d05e75e1c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > @@ -10,6 +10,7 @@
> >
> > struct drm_plane;
> > struct drm_property;
> > +struct drm_rect;
> > struct intel_atomic_state;
> > struct intel_crtc;
> > struct intel_crtc_state;
> > @@ -18,6 +19,9 @@ struct intel_plane_state;
> >
> > extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
> >
> > +unsigned int intel_adjusted_rate(const struct drm_rect *src,
> > +const struct drm_rect *dst,
> > +unsigned int rate);
> > unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> > *crtc_state,
> > const struct intel_plane_state
> > *plane_state);
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index d74b263c5f4e..472e691286c6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -3978,7 +3978,7 @@ static bool intel_crtc_supports_double_wide(const
> > struct intel_crtc *crtc)
> > static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
> > {
> > u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;
> > - unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
> > + struct drm_rect src;
> >
> > /*
> > * We only use IF-ID interlacing. If we ever use
> > @@ -3988,23 +3988,12 @@ static u32 ilk_pipe_pixel_rate(const struct
> > intel_crtc_state *crtc_state)
> > if (!crtc_state->pch_pfit.enabled)
> > return pixel_rate;
> >
> > - pipe_w = crtc_state->pipe_src_w;
> > - pipe_h = crtc_state->pipe_src_h;
> > + drm_rect_init(, 0, 0,
> > + crtc_state->pipe_src_w << 16,
> > + crtc_state->pipe_src_h << 16);
> >
> > - pfit_w = drm_rect_width(_state->pch_pfit.dst);
> > - pfit_h = drm_rect_height(_state->pch_pfit.dst);
> > -
> > - if (pipe_w < pfit_w)
> > - pipe_w = pfit_w;
>
> So this is src_w = max(src_w, dst_w) and gets turned into dst_w =
> min(src_w, dst_w) instead? Ditto for _h. Does it end up being the same
> thing after the division?
Yes. The min/max just gets rid of the upscaling case,
ie. causes the division to be just x/x==1 when dst>src.
Doesn't matter if we use the min or max approach to
achieve that result.
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal
Hi,
Static analysis with Coverity on Linux-next has detected a potential
issue with the following commit:
commit 480ae79537b28f30ef6e07b7de69a9ae2599daa7
Author: Maarten Lankhorst
Date: Tue Mar 23 16:50:49 2021 +0100
drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal
The analysis by Coverity is as follows:
145 static int igt_ppgtt_alloc(void *arg)
146 {
147struct drm_i915_private *dev_priv = arg;
148struct i915_ppgtt *ppgtt;
1. var_decl: Declaring variable ww without initializer.
149struct i915_gem_ww_ctx ww;
150u64 size, last, limit;
151int err = 0;
152
153/* Allocate a ppggt and try to fill the entire range */
154
2. Condition !(dev_priv->__info.ppgtt_type != INTEL_PPGTT_NONE),
taking false branch.
155if (!HAS_PPGTT(dev_priv))
156return 0;
157
158ppgtt = i915_ppgtt_create(_priv->gt);
3. Condition IS_ERR(ppgtt), taking false branch.
159if (IS_ERR(ppgtt))
160return PTR_ERR(ppgtt);
161
4. Condition !ppgtt->vm.allocate_va_range, taking true branch.
162if (!ppgtt->vm.allocate_va_range)
5. Jumping to label err_ppgtt_cleanup.
163goto err_ppgtt_cleanup;
164
165/*
166 * While we only allocate the page tables here and so we could
167 * address a much larger GTT than we could actually fit into
168 * RAM, a practical limit is the amount of physical pages in
the system.
169 * This should ensure that we do not run into the oomkiller
during
170 * the test and take down the machine wilfully.
171 */
172limit = totalram_pages() << PAGE_SHIFT;
173limit = min(ppgtt->vm.total, limit);
174
175i915_gem_ww_ctx_init(, false);
176retry:
177err = i915_vm_lock_objects(>vm, );
178if (err)
179goto err_ppgtt_cleanup;
180
181/* Check we can allocate the entire range */
182for (size = 4096; size <= limit; size <<= 2) {
183struct i915_vm_pt_stash stash = {};
184
185err = i915_vm_alloc_pt_stash(>vm, , size);
186if (err)
187goto err_ppgtt_cleanup;
188
189err = i915_vm_pin_pt_stash(>vm, );
190if (err) {
191i915_vm_free_pt_stash(>vm, );
192goto err_ppgtt_cleanup;
193}
194
195ppgtt->vm.allocate_va_range(>vm, , 0, size);
196cond_resched();
197
198ppgtt->vm.clear_range(>vm, 0, size);
199
200i915_vm_free_pt_stash(>vm, );
201}
202
203/* Check we can incrementally allocate the entire range */
204for (last = 0, size = 4096; size <= limit; last = size, size
<<= 2) {
205struct i915_vm_pt_stash stash = {};
206
207err = i915_vm_alloc_pt_stash(>vm, , size
- last);
208if (err)
209goto err_ppgtt_cleanup;
210
211err = i915_vm_pin_pt_stash(>vm, );
212if (err) {
213i915_vm_free_pt_stash(>vm, );
214goto err_ppgtt_cleanup;
215}
216
217ppgtt->vm.allocate_va_range(>vm, ,
218last, size - last);
219cond_resched();
220
221i915_vm_free_pt_stash(>vm, );
222}
223
224 err_ppgtt_cleanup:
6. Condition err == -35, taking false branch.
225if (err == -EDEADLK) {
226err = i915_gem_ww_ctx_backoff();
227if (!err)
228goto retry;
229}
7. uninit_use_in_call: Using uninitialized value ww.contended when
calling i915_gem_ww_ctx_fini.
Uninitialized pointer read (UNINIT)
8. uninit_use_in_call: Using uninitialized value ww.ctx.acquired when
calling i915_gem_ww_ctx_fini.
230i915_gem_ww_ctx_fini();
231
232i915_vm_put(>vm);
233return err;
234 }
Coverity is reporting use of uninitialized values in (lines 230. Not
sure what the best fix is for this, so I'm reporting this as a potential
issue.
Colin
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Re: [Intel-gfx] [PATCH v2 00/20] drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers
On Fri, 26 Mar 2021, Lyude Paul wrote:
> Since it's been asked quite a few times on some of the various DP
> related patch series I've submitted to use the new DRM printk helpers,
> and it technically wasn't really trivial to do this before due to the
> lack of a consistent way to find a drm_device for an AUX channel, this
> patch series aims to address this. In this series we:
>
> * Clean-up potentially erroneous usages of drm_dp_aux_init() and
> drm_dp_aux_register() so that actual AUX registration doesn't happen
> until we have an associated DRM device
> * Clean-up any obvious errors in drivers we find along the way
> * Add a backpointer to the respective drm_device for an AUX channel in
> drm_dp_aux.drm_dev, and hook it up in every driver with an AUX channel
> across the tree
> * Add a new ratelimited print helper we'll need for converting the DP
> helpers over to using the new DRM printk helpers
> * Fix any inconsistencies with logging in drm_dp_helper.c so we always
> have the aux channel name printed
> * Prepare the various DP helpers so they can find the correct drm_device
> to use for logging
> * And finally, convert all of the DP helpers over to using drm_dbg_*()
> and drm_err().
>
> Series-wide changes in v2:
> * Address most checkpatch issues ('most' as in all except for one line
> going two chars over 100 in "drm/dp_mst: Pass drm_dp_mst_topology_mgr
> to drm_dp_get_vc_payload_bw()" as this was the style in use
> previously, and 2 chars over the limit looks nicer then trying to
> line-wrap this
> * Don't rewrap comments
For anything touching i915, and for merging via whichever tree or branch
seems best,
Acked-by: Jani Nikula
That said, gut feeling says there will be conflicts before latest
drm-misc-next and drm-intel-next have been merged to drm-next, and
drm-next has been backmerged to drm-misc-next and drm-intel-next.
It just might be a good idea to wait for those (as well as other driver
feature pulls) to settle, do a topic branch with a common ancestor
between drm-next and drm-misc-next, apply there, merge the topic branch
to drm-misc-next, and let all drivers merge the topic branch as
needed. Due to the timing, otherwise we might have to carry the
conflicts for quite a while.
BR,
Jani.
>
> Lyude Paul (20):
> drm/dp: Fixup kernel docs for struct drm_dp_aux
> drm/tegra: Don't register DP AUX channels before connectors
> drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace
> drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late
> register/early unregister
> drm/dp: Add backpointer to drm_device in drm_dp_aux
> drm/dp: Clarify DP AUX registration time
> drm/print: Fixup DRM_DEBUG_KMS_RATELIMITED()
> drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
> drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
> drm/dp: Always print aux channel name in logs
> drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()
> drm/dp_dual_mode: Pass drm_device to
> drm_dp_dual_mode_set_tmds_output()
> drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_max_tmds_clock()
> drm/dp_dual_mode: Pass drm_device to
> drm_dp_dual_mode_get_tmds_output()
> drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()
> drm/dp_mst: Pass drm_dp_mst_topology_mgr to drm_dp_get_vc_payload_bw()
> drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()
> drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using
> drm_err/drm_dbg_kms()
> drm/dp_mst: Drop DRM_ERROR() on kzalloc() fail in
> drm_dp_mst_handle_up_req()
> drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()
>
> drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 5 +-
> .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 1 +
> .../drm/bridge/analogix/analogix-anx6345.c| 1 +
> .../drm/bridge/analogix/analogix-anx78xx.c| 1 +
> .../drm/bridge/analogix/analogix_dp_core.c| 1 +
> .../drm/bridge/cadence/cdns-mhdp8546-core.c | 12 +-
> drivers/gpu/drm/bridge/tc358767.c | 1 +
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 1 +
> drivers/gpu/drm/drm_dp_aux_dev.c | 6 +
> drivers/gpu/drm/drm_dp_dual_mode_helper.c | 68 ++--
> drivers/gpu/drm/drm_dp_helper.c | 181 +
> drivers/gpu/drm/drm_dp_mst_topology.c | 381 +-
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 1 +
> .../drm/i915/display/intel_dp_link_training.c | 6 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 7 +-
> drivers/gpu/drm/i915/display/intel_lspcon.c | 17 +-
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 6 +-
> drivers/gpu/drm/msm/edp/edp.h | 3 +-
> drivers/gpu/drm/msm/edp/edp_aux.c | 5 +-
> drivers/gpu/drm/msm/edp/edp_ctrl.c| 8 +-
> drivers/gpu/drm/nouveau/nouveau_connector.c | 27 +-
>
Re: [Intel-gfx] [PATCH v2 05/20] drm/dp: Add backpointer to drm_device in drm_dp_aux
On Fri, 26 Mar 2021, Lyude Paul wrote:
> * The @dev field should be set to a pointer to the device that implements
> the
> - * AUX channel.
> + * AUX channel. As well, the @drm_dev field should be set to the _device
> + * that will be using this AUX channel as early as possible. For many
> graphics
> + * drivers this should happen before drm_dp_aux_init(), however it's
> perfectly
> + * fine to set this field later so long as it's assigned before calling
> + * drm_dp_aux_register().
Perhaps add a follow-up patch to actually ensure this is the case in
drm_dp_aux_register()?
> *
> * The @name field may be used to specify the name of the I2C adapter. If
> set to
> * %NULL, dev_name() of @dev will be used.
> @@ -1877,6 +1883,7 @@ struct drm_dp_aux {
> const char *name;
> struct i2c_adapter ddc;
> struct device *dev;
> + struct drm_device *drm_dev;
Bikeshed, I would probably have called it just drm for brevity, but no
strong feelings.
BR,
Jani.
--
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] scripts/trace.pl: Remove the tool
On Mon, 22 Mar 2021 at 14:12, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > Tool has been broken for a while after changes to tracepoint format an format and? > behaviour. Although I have patches somewhere to mostly fix it, it seems > that it has outlived its usefulness and could be deleted just as well. > > Signed-off-by: Tvrtko Ursulin Acked-by: Matthew Auld ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] intel_gpu_top: Do not print client header if no client stats
On Wed, 31 Mar 2021 at 09:57, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > Add a check if client stats are present to init_clients() so that the > returned clients data can be null from the start. This prevents the client > stats header to be printed on old kernels. > > Signed-off-by: Tvrtko Ursulin Reviewed-by: Matthew Auld ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Split out glk_plane_min_cdclk()
On Tue, 30 Mar 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Split the glk+ stuff into it's own version of the .min_cdclk()
> vfunc.
>
> Signed-off-by: Ville Syrjälä
For the series,
Reviewed-by: Jani Nikula
> ---
> .../drm/i915/display/skl_universal_plane.c| 53 ---
> 1 file changed, 35 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 7ffd7b570b54..5127489a0446 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -287,21 +287,41 @@ bool icl_is_hdr_plane(struct drm_i915_private
> *dev_priv, enum plane_id plane_id)
> }
>
> static void
> -skl_plane_ratio(const struct intel_crtc_state *crtc_state,
> - const struct intel_plane_state *plane_state,
> +glk_plane_ratio(const struct intel_plane_state *plane_state,
> unsigned int *num, unsigned int *den)
> {
> - struct drm_i915_private *dev_priv =
> to_i915(plane_state->uapi.plane->dev);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
>
> if (fb->format->cpp[0] == 8) {
> - if (DISPLAY_VER(dev_priv) >= 10) {
> - *num = 10;
> - *den = 8;
> - } else {
> - *num = 9;
> - *den = 8;
> - }
> + *num = 10;
> + *den = 8;
> + } else {
> + *num = 1;
> + *den = 1;
> + }
> +}
> +
> +static int glk_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
> +const struct intel_plane_state *plane_state)
> +{
> + unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state,
> plane_state);
> + unsigned int num, den;
> +
> + glk_plane_ratio(plane_state, , );
> +
> + /* two pixels per clock */
> + return DIV_ROUND_UP(pixel_rate * num, 2 * den);
> +}
> +
> +static void
> +skl_plane_ratio(const struct intel_plane_state *plane_state,
> + unsigned int *num, unsigned int *den)
> +{
> + const struct drm_framebuffer *fb = plane_state->hw.fb;
> +
> + if (fb->format->cpp[0] == 8) {
> + *num = 9;
> + *den = 8;
> } else {
> *num = 1;
> *den = 1;
> @@ -311,15 +331,10 @@ skl_plane_ratio(const struct intel_crtc_state
> *crtc_state,
> static int skl_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state)
> {
> - struct drm_i915_private *dev_priv =
> to_i915(plane_state->uapi.plane->dev);
> - unsigned int num, den;
> unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state,
> plane_state);
> + unsigned int num, den;
>
> - skl_plane_ratio(crtc_state, plane_state, , );
> -
> - /* two pixels per clock on glk+ */
> - if (DISPLAY_VER(dev_priv) >= 10)
> - den *= 2;
> + skl_plane_ratio(plane_state, , );
>
> return DIV_ROUND_UP(pixel_rate * num, den);
> }
> @@ -1965,12 +1980,15 @@ skl_universal_plane_create(struct drm_i915_private
> *dev_priv,
> plane->min_width = icl_plane_min_width;
> plane->max_width = icl_plane_max_width;
> plane->max_height = icl_plane_max_height;
> + plane->min_cdclk = glk_plane_min_cdclk;
> } else if (DISPLAY_VER(dev_priv) >= 10) {
> plane->max_width = glk_plane_max_width;
> plane->max_height = skl_plane_max_height;
> + plane->min_cdclk = glk_plane_min_cdclk;
> } else {
> plane->max_width = skl_plane_max_width;
> plane->max_height = skl_plane_max_height;
> + plane->min_cdclk = skl_plane_min_cdclk;
> }
>
> plane->max_stride = skl_plane_max_stride;
> @@ -1978,7 +1996,6 @@ skl_universal_plane_create(struct drm_i915_private
> *dev_priv,
> plane->disable_plane = skl_disable_plane;
> plane->get_hw_state = skl_plane_get_hw_state;
> plane->check_plane = skl_plane_check;
> - plane->min_cdclk = skl_plane_min_cdclk;
>
> if (plane_id == PLANE_PRIMARY) {
> plane->need_async_flip_disable_wa = IS_DISPLAY_RANGE(dev_priv,
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
== Series Details ==
Series: drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
URL : https://patchwork.freedesktop.org/series/88657/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9921 -> Patchwork_19885
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/index.html
Known issues
Here are the changes found in Patchwork_19885 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-skl-guc: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-skl-guc/igt@gem_huc_c...@huc-copy.html
* igt@kms_chamelium@dp-crc-fast:
- fi-skl-guc: NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#111827]) +8
similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-skl-guc/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-guc: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#533])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-skl-guc/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_mmap_gtt:
- fi-skl-guc: NOTRUN -> [SKIP][4] ([fdo#109271]) +26 similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-skl-guc/igt@kms_psr@primary_mmap_gtt.html
* igt@prime_self_import@basic-with_one_bo_two_files:
- fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([i915#402]) +1 similar
issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
* igt@runner@aborted:
- fi-bdw-5557u: NOTRUN -> [FAIL][7] ([i915#1602] / [i915#2029])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-bdw-5557u/igt@run...@aborted.html
Possible fixes
* igt@prime_vgem@basic-gtt:
- fi-tgl-y: [DMESG-WARN][8] ([i915#402]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9921/fi-tgl-y/igt@prime_v...@basic-gtt.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/fi-tgl-y/igt@prime_v...@basic-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3276]: https://gitlab.freedesktop.org/drm/intel/issues/3276
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3278]: https://gitlab.freedesktop.org/drm/intel/issues/3278
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (43 -> 40)
--
Additional (2): fi-skl-guc fi-rkl-11500t
Missing(5): fi-kbl-soraka fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9921 -> Patchwork_19885
CI-20190529: 20190529
CI_DRM_9921: 803306c8496d8269b49debd0bccb37a3c7cf4070 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6052: 936f871d305762f10f3bd87622a6128236893291 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19885: 73a2e75022379df0b4cefda029b7cbb7cfd1d895 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
73a2e7502237 drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19885/index.html
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reuse intel_adjusted_rate() for pfit pixel rate adjustment
On Tue, 30 Mar 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replace the hand rolled pfit downscale calculations with
> intel_adjusted_rate().
>
> Signed-off-by: Ville Syrjälä
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 6 ++---
> .../gpu/drm/i915/display/intel_atomic_plane.h | 4
> drivers/gpu/drm/i915/display/intel_display.c | 23 +--
> 3 files changed, 13 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 3f830b70b0c1..5f0a5ea474eb 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -133,9 +133,9 @@ intel_plane_destroy_state(struct drm_plane *plane,
> kfree(plane_state);
> }
>
> -static unsigned int intel_adjusted_rate(const struct drm_rect *src,
> - const struct drm_rect *dst,
> - unsigned int rate)
> +unsigned int intel_adjusted_rate(const struct drm_rect *src,
> + const struct drm_rect *dst,
> + unsigned int rate)
> {
> unsigned int src_w, src_h, dst_w, dst_h;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 5c78a087ed86..dc4d05e75e1c 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -10,6 +10,7 @@
>
> struct drm_plane;
> struct drm_property;
> +struct drm_rect;
> struct intel_atomic_state;
> struct intel_crtc;
> struct intel_crtc_state;
> @@ -18,6 +19,9 @@ struct intel_plane_state;
>
> extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
>
> +unsigned int intel_adjusted_rate(const struct drm_rect *src,
> + const struct drm_rect *dst,
> + unsigned int rate);
> unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> *crtc_state,
> const struct intel_plane_state
> *plane_state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d74b263c5f4e..472e691286c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3978,7 +3978,7 @@ static bool intel_crtc_supports_double_wide(const
> struct intel_crtc *crtc)
> static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
> {
> u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;
> - unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
> + struct drm_rect src;
>
> /*
>* We only use IF-ID interlacing. If we ever use
> @@ -3988,23 +3988,12 @@ static u32 ilk_pipe_pixel_rate(const struct
> intel_crtc_state *crtc_state)
> if (!crtc_state->pch_pfit.enabled)
> return pixel_rate;
>
> - pipe_w = crtc_state->pipe_src_w;
> - pipe_h = crtc_state->pipe_src_h;
> + drm_rect_init(, 0, 0,
> + crtc_state->pipe_src_w << 16,
> + crtc_state->pipe_src_h << 16);
>
> - pfit_w = drm_rect_width(_state->pch_pfit.dst);
> - pfit_h = drm_rect_height(_state->pch_pfit.dst);
> -
> - if (pipe_w < pfit_w)
> - pipe_w = pfit_w;
So this is src_w = max(src_w, dst_w) and gets turned into dst_w =
min(src_w, dst_w) instead? Ditto for _h. Does it end up being the same
thing after the division?
BR,
Jani.
> - if (pipe_h < pfit_h)
> - pipe_h = pfit_h;
> -
> - if (drm_WARN_ON(crtc_state->uapi.crtc->dev,
> - !pfit_w || !pfit_h))
> - return pixel_rate;
> -
> - return div_u64(mul_u32_u32(pixel_rate, pipe_w * pipe_h),
> -pfit_w * pfit_h);
> + return intel_adjusted_rate(, _state->pch_pfit.dst,
> +pixel_rate);
> }
>
> static void intel_mode_from_crtc_timings(struct drm_display_mode *mode,
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] [PATCH][next] drm/i915: Fix an uninitialized variable issue
From: Colin Ian King
Currently there is a while loop that contains a handful of continue
statements that can skip over the assignment of the variable err. At
the end of the loop there is a potiential for err to be unassigned
and possibly causing issues when err is checked for a non-zero value.
Fix this by setting err to zero before the while loop starts.
Addresses-Coverity: ("Uninitialized scalar variable")
Fixes: cf41a8f1dc1e ("drm/i915: Finally remove obj->mm.lock.")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 3e248d3bd869..1e24ba872029 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -180,6 +180,7 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
* the unbound/bound list until actually freed.
*/
spin_lock_irqsave(>mm.obj_lock, flags);
+ err = 0;
while (count < target &&
(obj = list_first_entry_or_null(phase->list,
typeof(*obj),
@@ -202,7 +203,6 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
spin_unlock_irqrestore(>mm.obj_lock, flags);
- err = 0;
if (unsafe_drop_pages(obj, shrink)) {
/* May arrive from get_pages on another bo */
if (!ww) {
--
2.30.2
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[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
== Series Details == Series: drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915 URL : https://patchwork.freedesktop.org/series/88657/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extract intel_adjusted_rate()
On Tue, 30 Mar 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Extract a small helper to calculate the downscaling
> adjusted pixel rate/data rate/etc.
>
> Signed-off-by: Ville Syrjälä
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 27 +--
> 1 file changed, 19 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index c3f2962aa1eb..3f830b70b0c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -133,25 +133,36 @@ intel_plane_destroy_state(struct drm_plane *plane,
> kfree(plane_state);
> }
>
> -unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> *crtc_state,
> - const struct intel_plane_state *plane_state)
> +static unsigned int intel_adjusted_rate(const struct drm_rect *src,
> + const struct drm_rect *dst,
> + unsigned int rate)
> {
> unsigned int src_w, src_h, dst_w, dst_h;
> - unsigned int pixel_rate = crtc_state->pixel_rate;
>
> - src_w = drm_rect_width(_state->uapi.src) >> 16;
> - src_h = drm_rect_height(_state->uapi.src) >> 16;
> - dst_w = drm_rect_width(_state->uapi.dst);
> - dst_h = drm_rect_height(_state->uapi.dst);
> + src_w = drm_rect_width(src) >> 16;
> + src_h = drm_rect_height(src) >> 16;
> + dst_w = drm_rect_width(dst);
> + dst_h = drm_rect_height(dst);
>
> /* Downscaling limits the maximum pixel rate */
> dst_w = min(src_w, dst_w);
> dst_h = min(src_h, dst_h);
>
> - return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_rate, src_w * src_h),
> + return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h),
> dst_w * dst_h);
> }
>
> +unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> *crtc_state,
> + const struct intel_plane_state *plane_state)
> +{
> + if (!plane_state->uapi.visible)
Potential functional change not covered in the commit message? Makes
sense, but the rabbit hole is too deep to find out if this could
actually make a difference.
If mentioned in the commit message,
Reviewed-by: Jani Nikula
> + return 0;
> +
> + return intel_adjusted_rate(_state->uapi.src,
> +_state->uapi.dst,
> +crtc_state->pixel_rate);
> +}
> +
> unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state)
> {
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH v3 00/16] Introduce Intel PXP
On 29/03/2021 01:56, Daniele Ceraolo Spurio wrote: PXP (Protected Xe Path) is an i915 component, available on GEN12+, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. Lots of minor changes and fixes, but the main changes in v3 are: - Using a protected object with a context not appropriately marked does no longer result in an execbuf failure. This is to avoid apps maliciously sharing protected/invalid objects to other apps and causing them to fail. - All the termination work now goes through the same worker function, which allows i915 to drop the mutex lock entirely. Cc: Gaurav Kumar Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen Cc: Juston Li Cc: Alan Previn Cc: Lionel Landwerlin I updated the Mesa MR to use this new version : - Iris: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092 - Anv: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8064 No issue with this current iteration : Tested-by: Lionel Landwerlin Anshuman Gupta (2): drm/i915/pxp: Add plane decryption support drm/i915/pxp: black pixels on pxp disabled Bommu Krishnaiah (2): drm/i915/uapi: introduce drm_i915_gem_create_ext drm/i915/pxp: User interface for Protected buffer Daniele Ceraolo Spurio (6): drm/i915/pxp: Define PXP component interface drm/i915/pxp: define PXP device flag and kconfig drm/i915/pxp: allocate a vcs context for pxp usage drm/i915/pxp: set KCR reg init drm/i915/pxp: interface for marking contexts as using protected content drm/i915/pxp: enable PXP for integrated Gen12 Huang, Sean Z (5): drm/i915/pxp: Implement funcs to create the TEE channel drm/i915/pxp: Create the arbitrary session after boot drm/i915/pxp: Implement arb session teardown drm/i915/pxp: Implement PXP irq handler drm/i915/pxp: Enable PXP power management Vitaly Lubart (1): mei: pxp: export pavp client to me client bus drivers/gpu/drm/i915/Kconfig | 11 + drivers/gpu/drm/i915/Makefile | 9 + .../drm/i915/display/skl_universal_plane.c| 50 +++- drivers/gpu/drm/i915/gem/i915_gem_context.c | 59 +++- drivers/gpu/drm/i915/gem/i915_gem_context.h | 18 ++ .../gpu/drm/i915/gem/i915_gem_context_types.h | 2 + drivers/gpu/drm/i915/gem/i915_gem_create.c| 68 - .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 34 +++ drivers/gpu/drm/i915/gem/i915_gem_object.c| 6 + drivers/gpu/drm/i915/gem/i915_gem_object.h| 12 + .../gpu/drm/i915/gem/i915_gem_object_types.h | 13 + drivers/gpu/drm/i915/gt/intel_engine.h| 12 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 32 ++- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 22 +- drivers/gpu/drm/i915/gt/intel_gt.c| 5 + drivers/gpu/drm/i915/gt/intel_gt_irq.c| 7 + drivers/gpu/drm/i915/gt/intel_gt_pm.c | 14 +- drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + drivers/gpu/drm/i915/i915_drv.c | 4 +- drivers/gpu/drm/i915/i915_drv.h | 4 + drivers/gpu/drm/i915/i915_pci.c | 2 + drivers/gpu/drm/i915/i915_reg.h | 48 drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.c | 262 ++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 65 + drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 140 ++ drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h | 15 + drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 100 +++ drivers/gpu/drm/i915/pxp/intel_pxp_irq.h | 32 +++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 37 +++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 23 ++ drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 172 drivers/gpu/drm/i915/pxp/intel_pxp_session.h | 15 + drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 182 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 17 ++ drivers/gpu/drm/i915/pxp/intel_pxp_types.h| 43 +++ drivers/misc/mei/Kconfig | 2 + drivers/misc/mei/Makefile | 1 + drivers/misc/mei/pxp/Kconfig | 13 + drivers/misc/mei/pxp/Makefile | 7 + drivers/misc/mei/pxp/mei_pxp.c| 233 drivers/misc/mei/pxp/mei_pxp.h| 18 ++ include/drm/i915_component.h | 1 + include/drm/i915_pxp_tee_interface.h | 45 +++ include/uapi/drm/i915_drm.h | 96 +++ 45 files changed, 1931 insertions(+), 24 deletions(-) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h create mode 100644
Re: [Intel-gfx] [PATCH v3 11/16] drm/i915/pxp: interface for marking contexts as using protected content
On 29/03/2021 01:57, Daniele Ceraolo Spurio wrote:
Extra tracking and checks around protected objects, coming in a follow-up
patch, will be enabled only for contexts that opt in. Contexts can only be
marked as using protected content at creation time and they must be both
bannable and not recoverable.
When a PXP teardown occurs, all gem contexts marked this way that
have been used at least once will be marked as invalid and all new
submissions using them will be rejected. All intel contexts within the
invalidated gem contexts will be marked banned.
A new flag has been added to the RESET_STATS ioctl to report the
invalidation to userspace.
v2: split to its own patch and improve doc (Chris), invalidate contexts
on teardown
v3: improve doc, use -EACCES for execbuf fail (Chris), make protected
context flag not mandatory in protected object execbuf to avoid
abuse (Lionel)
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: Lionel Landwerlin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 59 ++-
drivers/gpu/drm/i915/gem/i915_gem_context.h | 18 ++
.../gpu/drm/i915/gem/i915_gem_context_types.h | 2 +
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 18 ++
drivers/gpu/drm/i915/pxp/intel_pxp.c | 48 +++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 3 +
include/uapi/drm/i915_drm.h | 26
8 files changed, 172 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index fd8ee52e17a4..f3fd302682bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -76,6 +76,8 @@
#include "gt/intel_gpu_commands.h"
#include "gt/intel_ring.h"
+#include "pxp/intel_pxp.h"
+
#include "i915_gem_context.h"
#include "i915_globals.h"
#include "i915_trace.h"
@@ -1972,6 +1974,40 @@ static int set_priority(struct i915_gem_context *ctx,
return 0;
}
+static int set_protected(struct i915_gem_context *ctx,
+const struct drm_i915_gem_context_param *args)
+{
+ int ret = 0;
+
+ if (!intel_pxp_is_enabled(>i915->gt.pxp))
+ ret = -ENODEV;
+ else if (ctx->file_priv) /* can't change this after creation! */
+ ret = -EEXIST;
+ else if (args->size)
+ ret = -EINVAL;
+ else if (!args->value)
+ clear_bit(UCONTEXT_PROTECTED, >user_flags);
+ else if (i915_gem_context_is_recoverable(ctx) ||
+!i915_gem_context_is_bannable(ctx))
+ ret = -EPERM;
+ else
+ set_bit(UCONTEXT_PROTECTED, >user_flags);
+
+ return ret;
+}
+
+static int get_protected(struct i915_gem_context *ctx,
+struct drm_i915_gem_context_param *args)
+{
+ if (!intel_pxp_is_enabled(>i915->gt.pxp))
+ return -ENODEV;
+
+ args->size = 0;
+ args->value = i915_gem_context_uses_protected_content(ctx);
+
+ return 0;
+}
+
static int ctx_setparam(struct drm_i915_file_private *fpriv,
struct i915_gem_context *ctx,
struct drm_i915_gem_context_param *args)
@@ -2004,6 +2040,8 @@ static int ctx_setparam(struct drm_i915_file_private
*fpriv,
ret = -EPERM;
else if (args->value)
i915_gem_context_set_bannable(ctx);
+ else if (i915_gem_context_uses_protected_content(ctx))
+ ret = -EPERM; /* can't clear this for protected
contexts */
else
i915_gem_context_clear_bannable(ctx);
break;
@@ -2011,10 +2049,12 @@ static int ctx_setparam(struct drm_i915_file_private
*fpriv,
case I915_CONTEXT_PARAM_RECOVERABLE:
if (args->size)
ret = -EINVAL;
- else if (args->value)
- i915_gem_context_set_recoverable(ctx);
- else
+ else if (!args->value)
i915_gem_context_clear_recoverable(ctx);
+ else if (i915_gem_context_uses_protected_content(ctx))
+ ret = -EPERM; /* can't set this for protected contexts
*/
+ else
+ i915_gem_context_set_recoverable(ctx);
break;
case I915_CONTEXT_PARAM_PRIORITY:
@@ -2041,6 +2081,10 @@ static int ctx_setparam(struct drm_i915_file_private
*fpriv,
ret = set_ringsize(ctx, args);
break;
+ case I915_CONTEXT_PARAM_PROTECTED_CONTENT:
+ ret = set_protected(ctx, args);
+ break;
+
case I915_CONTEXT_PARAM_BAN_PERIOD:
default:
ret = -EINVAL;
@@ -2494,6 +2538,10 @@ int i915_gem_context_getparam_ioctl(struct drm_device
*dev, void *data,
Re: [Intel-gfx] [PATCH v3 13/16] drm/i915/pxp: User interface for Protected buffer
On 29/03/2021 01:57, Daniele Ceraolo Spurio wrote:
From: Bommu Krishnaiah
This api allow user mode to create Protected buffers. Only contexts
marked as protected are allowed to operate on protected buffers.
We only allow setting the flags at creation time.
All protected objects that have backing storage will be considered
invalid when the session is destroyed and they won't be usable anymore.
This is a rework of the original code by Bommu Krishnaiah. I've
authorship unchanged since significant chunks have not been modified.
v2: split context changes, fix defines and improve documentation (Chris),
add object invalidation logic
v3: fix spinlock definition and usage, only validate objects when
they're first added to a context lut, only remove them once (Chris),
make protected context flag not mandatory in protected object execbuf
to avoid abuse (Lionel)
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Daniele Ceraolo Spurio
Cc: Telukuntla Sreedhar
Cc: Kondapally Kalyan
Cc: Gupta Anshuman
Cc: Huang Sean Z
Cc: Chris Wilson
Cc: Lionel Landwerlin
---
drivers/gpu/drm/i915/gem/i915_gem_create.c| 27 ++--
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 16
drivers/gpu/drm/i915/gem/i915_gem_object.c| 6 +++
drivers/gpu/drm/i915/gem/i915_gem_object.h| 12 ++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 13 ++
drivers/gpu/drm/i915/pxp/intel_pxp.c | 41 +++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 13 ++
drivers/gpu/drm/i915/pxp/intel_pxp_types.h| 5 +++
include/uapi/drm/i915_drm.h | 20 +
9 files changed, 150 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 3ad3413c459f..d02e5938afbe 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -5,6 +5,7 @@
#include "gem/i915_gem_ioctls.h"
#include "gem/i915_gem_region.h"
+#include "pxp/intel_pxp.h"
#include "i915_drv.h"
#include "i915_user_extensions.h"
@@ -13,7 +14,8 @@ static int
i915_gem_create(struct drm_file *file,
struct intel_memory_region *mr,
u64 *size_p,
- u32 *handle_p)
+ u32 *handle_p,
+ u64 user_flags)
{
struct drm_i915_gem_object *obj;
u32 handle;
@@ -35,12 +37,17 @@ i915_gem_create(struct drm_file *file,
GEM_BUG_ON(size != obj->base.size);
+ obj->user_flags = user_flags;
+
ret = drm_gem_handle_create(file, >base, );
/* drop reference from allocate - handle holds it now */
i915_gem_object_put(obj);
if (ret)
return ret;
+ if (user_flags & I915_GEM_OBJECT_PROTECTED)
+ intel_pxp_object_add(obj);
+
*handle_p = handle;
*size_p = size;
return 0;
@@ -89,11 +96,12 @@ i915_gem_dumb_create(struct drm_file *file,
return i915_gem_create(file,
intel_memory_region_by_type(to_i915(dev),
mem_type),
- >size, >handle);
+ >size, >handle, 0);
}
struct create_ext {
struct drm_i915_private *i915;
+ unsigned long user_flags;
};
static int __create_setparam(struct drm_i915_gem_object_param *args,
@@ -104,6 +112,19 @@ static int __create_setparam(struct
drm_i915_gem_object_param *args,
return -EINVAL;
}
+ switch (lower_32_bits(args->param)) {
+ case I915_OBJECT_PARAM_PROTECTED_CONTENT:
+ if (!intel_pxp_is_enabled(_data->i915->gt.pxp))
+ return -ENODEV;
+ if (args->size) {
+ return -EINVAL;
+ } else if (args->data) {
+ ext_data->user_flags |= I915_GEM_OBJECT_PROTECTED;
+ return 0;
+ }
+ break;
+ }
+
return -EINVAL;
}
@@ -148,5 +169,5 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
return i915_gem_create(file,
intel_memory_region_by_type(i915,
INTEL_MEMORY_SYSTEM),
- >size, >handle);
+ >size, >handle, ext_data.user_flags);
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 72c2470fcfe6..2fb6579ad301 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -20,6 +20,7 @@
#include "gt/intel_gt_buffer_pool.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_ring.h"
+#include "pxp/intel_pxp.h"
#include "pxp/intel_pxp.h"
@@ -839,6 +840,21 @@ static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb,
Re: [Intel-gfx] [PATCH i-g-t] gem_watchdog: Fix autotools build
On Thu, Apr 01, 2021 at 12:43:16PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Correcting a brain malfunction while typing in Makefile.sources. > > Signed-off-by: Tvrtko Ursulin Reviewed-by: Petri Latvala > --- > tests/Makefile.sources | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tests/Makefile.sources b/tests/Makefile.sources > index e992285fedc5..194df8e27dd0 100644 > --- a/tests/Makefile.sources > +++ b/tests/Makefile.sources > @@ -464,7 +464,7 @@ TESTS_progs += gem_wait > gem_wait_SOURCES = i915/gem_wait.c > > TESTS_progs += gem_watchdog > -gem_exec_watchdog_SOURCES = i915/gem_watchdog.c > +gem_watchdog_SOURCES = i915/gem_watchdog.c > > TESTS_progs += gem_workarounds > gem_workarounds_SOURCES = i915/gem_workarounds.c > -- > 2.27.0 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
Prefer i915 over drm pointer.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index d69f0a6dc26d..26877be7696d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -51,21 +51,20 @@
#include "intel_lspcon.h"
#include "intel_panel.h"
-static struct drm_device *intel_hdmi_to_dev(struct intel_hdmi *intel_hdmi)
+static struct drm_i915_private *intel_hdmi_to_i915(struct intel_hdmi
*intel_hdmi)
{
- return hdmi_to_dig_port(intel_hdmi)->base.base.dev;
+ return to_i915(hdmi_to_dig_port(intel_hdmi)->base.base.dev);
}
static void
assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi)
{
- struct drm_device *dev = intel_hdmi_to_dev(intel_hdmi);
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = intel_hdmi_to_i915(intel_hdmi);
u32 enabled_bits;
enabled_bits = HAS_DDI(dev_priv) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE;
- drm_WARN(dev,
+ drm_WARN(_priv->drm,
intel_de_read(dev_priv, intel_hdmi->hdmi_reg) & enabled_bits,
"HDMI port enabled, expecting disabled\n");
}
@@ -1241,7 +1240,7 @@ static void hsw_set_infoframes(struct intel_encoder
*encoder,
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
{
- struct drm_i915_private *dev_priv = to_i915(intel_hdmi_to_dev(hdmi));
+ struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);
struct i2c_adapter *adapter =
intel_gmbus_get_adapter(dev_priv, hdmi->ddc_bus);
@@ -1828,7 +1827,7 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,
int clock, bool respect_downstream_limits,
bool has_hdmi_sink)
{
- struct drm_i915_private *dev_priv = to_i915(intel_hdmi_to_dev(hdmi));
+ struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);
if (clock < 25000)
return MODE_CLOCK_LOW;
@@ -1866,8 +1865,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
struct intel_hdmi *hdmi =
intel_attached_hdmi(to_intel_connector(connector));
- struct drm_device *dev = intel_hdmi_to_dev(hdmi);
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);
enum drm_mode_status status;
int clock = mode->clock;
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
--
2.20.1
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[Intel-gfx] [PATCH i-g-t] gem_watchdog: Fix autotools build
From: Tvrtko Ursulin Correcting a brain malfunction while typing in Makefile.sources. Signed-off-by: Tvrtko Ursulin --- tests/Makefile.sources | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/Makefile.sources b/tests/Makefile.sources index e992285fedc5..194df8e27dd0 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -464,7 +464,7 @@ TESTS_progs += gem_wait gem_wait_SOURCES = i915/gem_wait.c TESTS_progs += gem_watchdog -gem_exec_watchdog_SOURCES = i915/gem_watchdog.c +gem_watchdog_SOURCES = i915/gem_watchdog.c TESTS_progs += gem_workarounds gem_workarounds_SOURCES = i915/gem_workarounds.c -- 2.27.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/pmu: Check actual RC6 status
On 01/04/2021 11:24, Tamminen, Eero T wrote: Hi, On Thu, 2021-04-01 at 05:54 -0400, Rodrigo Vivi wrote: On Thu, Apr 01, 2021 at 10:38:11AM +0100, Tvrtko Ursulin wrote: ... I think it is possible to argue both ways. 1) HAS_RC6 means hardware has RC6 so if we view PMU as very low level we can say always export it. If i915 had to turn it off (rc6->supported == false) due firmware or GVT-g, then we could say reporting zero RC6 is accurate in that sense. Only the reason "why it is zero" is missing for PMU users. 2) Or if we go with this patch we could say that presence of the PMU metric means RC6 is active and enabled, while absence means it is either not supported due platform (or firmware) or how the platform is getting used (GVT-g). yeap, these 2 cases described well my mental conflict... So I think patch is a bit better. I don't see it is adding more confusion. As I said on the other patch I have no strong position on which is better, but if you and Eero feel that this works better for the current case, let's do it... IMHO seeing case 1) i.e. zero RC6 could be slightly better from user point of view than not seeing RC6 at all, because: A) user then knows that GPU is not entering RC6, and B) then the question is why it's not going to RC6 => one can see from sysfs that it has been disabled Whereas in case 2), the question is why there's no RC6 info, and user doesn't know whether GPU is suspended or not (i.e. why GPU power consumption is higher than expected). It would help if i-g-t could show e.g. "RC6 OFF" in that case. So many options.. :) It can be handle on the "presentation" layer (intel_gpu_top). If we go with this patch but different errnos it could indeed distinguish and either not show RC6 or say "RC6 OFF". If we go with the other patch (https://patchwork.freedesktop.org/patch/426589/?series=88580=1) then intel_gpu_top could really still do the same by looking at /sys/class/drm/card0/power/rc6_enable. So strictly no i915 patch is even needed to provide clarity in intel_gpu_top. But still one of those two i915 patches is required to improve how low-level Perf/PMU RC6 counter gets exposed (or not exposed). I don't have a strong preference which one to take either. :) Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-misc-next
Hi Dave, Daniel, It's still a fairly quiet week, but here's what should be our last drm-misc-next PR for 5.13 Maxime drm-misc-next-2021-04-01: drm-misc-next for 5.13: UAPI Changes: Cross-subsystem Changes: Core Changes: - mst: Improve topology logging - edid: Rework and improvements for displayid Driver Changes: - anx7625: Regulators support - bridge: Support for the Chipone ICN6211, Lontium LT8912B - lt9611: Fix 4k panels handling The following changes since commit 51c3b916a4d7e24b4918925965867fdd9bd8dd59: Merge tag 'drm-misc-next-2021-03-03' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2021-03-16 17:08:46 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2021-04-01 for you to fetch changes up to 6c744983004ebc66756e582294672f8b991288d5: drm/bridge: anx7625: disable regulators when power off (2021-04-01 10:38:02 +0200) drm-misc-next for 5.13: UAPI Changes: Cross-subsystem Changes: Core Changes: - mst: Improve topology logging - edid: Rework and improvements for displayid Driver Changes: - anx7625: Regulators support - bridge: Support for the Chipone ICN6211, Lontium LT8912B - lt9611: Fix 4k panels handling Adrien Grassein (2): dt-bindings: display: bridge: Add documentation for LT8912B drm/bridge: Introduce LT8912B DSI to HDMI bridge Arnd Bergmann (3): fbdev: omapfb: avoid -Wempty-body warning vgaarb: avoid -Wempty-body warnings drm/omap: fix misleading indentation in pixinc() Bhaskar Chowdhury (2): drm: Few typo fixes drm/meson: Fix few typo Christian König (9): drm/sched: select new rq even if there is only one v3 drm/qxl: clean up qxl_bo_move_notify drm/nouveau: clean up nouveau_bo_move_ntfy drm/vmwgfx: clean up vmw_move_notify v2 drm/ttm: move swapout logic around v3 drm/ttm: remove swap LRU v3 drm/ttm: switch to per device LRU lock drm/ttm: fix invalid NULL deref drm/ttm: switch back to static allocation limits for now Dafna Hirschfeld (1): drm: Fix 3 typos in the inline doc Daniel Vetter (1): dma-fence: Document recoverable page fault implications Dario Binacchi (3): drm/tilcdc: rename req_rate to pclk_rate drm/tilcdc: fix LCD pixel clock setting drm/tilcdc: fix pixel clock setting warning message Dmitry Vyukov (1): drm/vkms: fix misuse of WARN_ON Douglas Anderson (6): drm/panel-simple: Undo enable if HPD never asserts drm/panel-simple: Don't wait longer for HPD than hpd_absent_delay drm/panel-simple: Retry if we timeout waiting for HPD dt-bindings: dt-bindings: display: simple: Add N116BCA-EA1 drm/panel-simple: Add N116BCA-EA1 drm: panel: simple: Set enable delay for BOE NV110WTM-N61 Eryk Brol (1): drm/mst: Enhance MST topology logging Hsin-Yi Wang (2): dt-bindings: drm/bridge: anx7625: Add power supplies drm/bridge: anx7625: disable regulators when power off Jagan Teki (3): drm/stm: ltdc: Use simple encoder dt-bindings: display: bridge: Add Chipone ICN6211 bindings drm: bridge: Add Chipone ICN6211 MIPI-DSI to RGB bridge Jani Nikula (8): drm/edid: make a number of functions, parameters and variables const drm/displayid: add separate drm_displayid.c drm/displayid: add new displayid section/block iterators drm/edid: use the new displayid iterator for detailed modes drm/edid: use the new displayid iterator for finding CEA extension drm/edid: use the new displayid iterator for tile info drm/displayid: allow data blocks with 0 payload length drm/displayid: rename displayid_hdr to displayid_header Jianhui Zhao (1): docs: gpu: fix typo Jiapeng Chong (1): drm: bridge: convert sysfs sprintf/snprintf family to sysfs_emit Linus Walleij (1): drm/mcde/panel: Inverse misunderstood flag Lyude Paul (9): drm/bridge/tc358767: Don't register DP AUX channel until bridge is attached drm/bridge/ti-sn65dsi86: (Un)register aux device on bridge attach/detach drm/bridge/analogix/anx78xx: Add missing drm_dp_aux_unregister() call drm/bridge/analogix/anx78xx: Setup encoder before registering connector drm/bridge/analogix/anx78xx: Cleanup on error in anx78xx_bridge_attach() drm/bridge/analogix/anx6345: Add missing drm_dp_aux_unregister() call drm/bridge/analogix/anx6345: Don't link encoder until after connector registration drm/bridge/analogix/anx6345: Cleanup on errors in anx6345_bridge_attach() drm/bridge/analogix/dp_core: Unregister DP AUX channel on error in analogix_dp_probe() Matthew Wilcox (Oracle) (1): fb_defio: Remove custom address_space_operations Maxime Ripard (2): Merge drm/drm-next into drm-misc-next
Re: [Intel-gfx] [PATCH] drm/i915/pmu: Check actual RC6 status
Hi, On Thu, 2021-04-01 at 05:54 -0400, Rodrigo Vivi wrote: > On Thu, Apr 01, 2021 at 10:38:11AM +0100, Tvrtko Ursulin wrote: ... > > I think it is possible to argue both ways. > > > > 1) > > HAS_RC6 means hardware has RC6 so if we view PMU as very low level > > we can > > say always export it. > > > > If i915 had to turn it off (rc6->supported == false) due firmware or > > GVT-g, > > then we could say reporting zero RC6 is accurate in that sense. Only > > the > > reason "why it is zero" is missing for PMU users. > > > > 2) > > Or if we go with this patch we could say that presence of the PMU > > metric > > means RC6 is active and enabled, while absence means it is either > > not > > supported due platform (or firmware) or how the platform is getting > > used > > (GVT-g). > > > > yeap, these 2 cases described well my mental conflict... > > > So I think patch is a bit better. I don't see it is adding more > > confusion. > > As I said on the other patch I have no strong position on which is > better, > but if you and Eero feel that this works better for the current case, > let's do it... IMHO seeing case 1) i.e. zero RC6 could be slightly better from user point of view than not seeing RC6 at all, because: A) user then knows that GPU is not entering RC6, and B) then the question is why it's not going to RC6 => one can see from sysfs that it has been disabled Whereas in case 2), the question is why there's no RC6 info, and user doesn't know whether GPU is suspended or not (i.e. why GPU power consumption is higher than expected). It would help if i-g-t could show e.g. "RC6 OFF" in that case. - Eero ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/pmu: Check actual RC6 status
On Thu, Apr 01, 2021 at 10:38:11AM +0100, Tvrtko Ursulin wrote:
>
> On 01/04/2021 10:19, Rodrigo Vivi wrote:
> > On Wed, Mar 31, 2021 at 11:18:50AM +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> > > RC6 support cannot be simply established by looking at the static device
> > > HAS_RC6() flag. There are cases which disable RC6 at driver load time so
> > > use the status of those check when deciding whether to enumerate the rc6
> > > counter.
> > >
> > > Signed-off-by: Tvrtko Ursulin
> > > Reported-by: Eero T Tamminen
> > > ---
> > > drivers/gpu/drm/i915/i915_pmu.c | 4 +++-
> > > 1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c
> > > b/drivers/gpu/drm/i915/i915_pmu.c
> > > index 41651ac255fa..a75cd1db320b 100644
> > > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > > @@ -476,6 +476,8 @@ engine_event_status(struct intel_engine_cs *engine,
> > > static int
> > > config_status(struct drm_i915_private *i915, u64 config)
> > > {
> > > + struct intel_gt *gt = >gt;
> > > +
> > > switch (config) {
> > > case I915_PMU_ACTUAL_FREQUENCY:
> > > if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> > > @@ -489,7 +491,7 @@ config_status(struct drm_i915_private *i915, u64
> > > config)
> > > case I915_PMU_INTERRUPTS:
> > > break;
> > > case I915_PMU_RC6_RESIDENCY:
> > > - if (!HAS_RC6(i915))
> > > + if (!gt->rc6.supported)
> >
> > Is this really going to remove any confusion?
> > Right now it is there but with residency 0, but after this change the event
> > is
> > not there anymore so I wonder if we are not just changing to a different
> > kind
> > of confusion on users.
>
> I think it is possible to argue both ways.
>
> 1)
> HAS_RC6 means hardware has RC6 so if we view PMU as very low level we can
> say always export it.
>
> If i915 had to turn it off (rc6->supported == false) due firmware or GVT-g,
> then we could say reporting zero RC6 is accurate in that sense. Only the
> reason "why it is zero" is missing for PMU users.
>
> 2)
> Or if we go with this patch we could say that presence of the PMU metric
> means RC6 is active and enabled, while absence means it is either not
> supported due platform (or firmware) or how the platform is getting used
> (GVT-g).
>
yeap, these 2 cases described well my mental conflict...
> So I think patch is a bit better. I don't see it is adding more confusion.
As I said on the other patch I have no strong position on which is better,
but if you and Eero feel that this works better for the current case,
let's do it...
>
> >
> > > return -ENODEV;
> >
> > would a different return help somehow?
>
> Like distinguishing between not theoretically possible to support on this
> GPU, versus not active? Perhaps.. suggest an errno? :)
ENODATA? or EIDRM?
But only if it helps somehow... otherwise don't bother and move with
this as is:
Reviewed-by: Rodrigo Vivi
>
> Regards,
>
> Tvrtko
>
> >
> > > break;
> > > case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
> > > --
> > > 2.27.0
> > >
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Re: [Intel-gfx] [PATCH] drm/i915/pmu: Check actual RC6 status
On 01/04/2021 10:19, Rodrigo Vivi wrote:
On Wed, Mar 31, 2021 at 11:18:50AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
RC6 support cannot be simply established by looking at the static device
HAS_RC6() flag. There are cases which disable RC6 at driver load time so
use the status of those check when deciding whether to enumerate the rc6
counter.
Signed-off-by: Tvrtko Ursulin
Reported-by: Eero T Tamminen
---
drivers/gpu/drm/i915/i915_pmu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 41651ac255fa..a75cd1db320b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -476,6 +476,8 @@ engine_event_status(struct intel_engine_cs *engine,
static int
config_status(struct drm_i915_private *i915, u64 config)
{
+ struct intel_gt *gt = >gt;
+
switch (config) {
case I915_PMU_ACTUAL_FREQUENCY:
if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
@@ -489,7 +491,7 @@ config_status(struct drm_i915_private *i915, u64 config)
case I915_PMU_INTERRUPTS:
break;
case I915_PMU_RC6_RESIDENCY:
- if (!HAS_RC6(i915))
+ if (!gt->rc6.supported)
Is this really going to remove any confusion?
Right now it is there but with residency 0, but after this change the event is
not there anymore so I wonder if we are not just changing to a different kind
of confusion on users.
I think it is possible to argue both ways.
1)
HAS_RC6 means hardware has RC6 so if we view PMU as very low level we
can say always export it.
If i915 had to turn it off (rc6->supported == false) due firmware or
GVT-g, then we could say reporting zero RC6 is accurate in that sense.
Only the reason "why it is zero" is missing for PMU users.
2)
Or if we go with this patch we could say that presence of the PMU metric
means RC6 is active and enabled, while absence means it is either not
supported due platform (or firmware) or how the platform is getting used
(GVT-g).
So I think patch is a bit better. I don't see it is adding more confusion.
return -ENODEV;
would a different return help somehow?
Like distinguishing between not theoretically possible to support on
this GPU, versus not active? Perhaps.. suggest an errno? :)
Regards,
Tvrtko
break;
case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
--
2.27.0
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Re: [Intel-gfx] [PATCH] drm/i915: Fix docbook header for __intel_runtime_pm_get_if_active()
On Tue, Mar 30, 2021 at 06:01:18PM +0300, Imre Deak wrote:
> Fix the
>
> Documentation/gpu/i915:22: /drivers/gpu/drm/i915/intel_runtime_pm.c:423:
> WARNING: Inline strong start-string without end-string.
>
> warning from the htmldocs build.
>
> Fixes: 9d58aa46291d ("drm/i915: Fix the GT fence revocation runtime PM logic")
> Reported-by: Stephen Rothwell
> Cc: Chris Wilson
> Signed-off-by: Imre Deak
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index dba8df1ff5a9e..eaf7688f517d0 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -420,7 +420,7 @@ intel_wakeref_t intel_runtime_pm_get(struct
> intel_runtime_pm *rpm)
> * already active and ensures that it is powered up. It is illegal to try
> * and access the HW should intel_runtime_pm_get_if_active() report failure.
> *
> - * If @ignore_usecount=true, a reference will be acquired even if there is no
> + * If @ignore_usecount is true, a reference will be acquired even if there
> is no
> * user requiring the device to be powered up (dev->power.usage_count == 0).
> * If the function returns false in this case then it's guaranteed that the
> * device's runtime suspend hook has been called already or that it will be
> --
> 2.27.0
>
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Re: [Intel-gfx] [PATCH] drm/i915/pmu: Do not report 100% RC6 if not supported
On Tue, Mar 30, 2021 at 04:06:37PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> We use GT parked status to estimate RC6 while not in use, however if RC6
> is not supported to start with that does not work very well and produces a
> false 100% RC6 readout.
oh! I had missed this one...
>
> Fix by not advancing the estimated RC6 counter when feature is not
> supported.
either this or the other proposal, consider both as
Reviewed-by: Rodrigo Vivi
I prefer this, but I don't have strong opinions on which one.
you (or Eero) pick one...
>
> Signed-off-by: Tvrtko Ursulin
> Fixes: 1fe699e30113 ("drm/i915/pmu: Fix sleep under atomic in RC6 readout")
> Reported-by: Eero T Tamminen
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 41651ac255fa..02fe0d22c470 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -191,7 +191,10 @@ static u64 get_rc6(struct intel_gt *gt)
>* on top of the last known real value, as the approximated RC6
>* counter value.
>*/
> - val = ktime_since_raw(pmu->sleep_last);
> + if (gt->rc6.supported)
> + val = ktime_since_raw(pmu->sleep_last);
> + else
> + val = 0;
> val += pmu->sample[__I915_SAMPLE_RC6].cur;
> }
>
> --
> 2.27.0
>
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Re: [Intel-gfx] [PATCH] drm/i915/pmu: Check actual RC6 status
On Wed, Mar 31, 2021 at 11:18:50AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> RC6 support cannot be simply established by looking at the static device
> HAS_RC6() flag. There are cases which disable RC6 at driver load time so
> use the status of those check when deciding whether to enumerate the rc6
> counter.
>
> Signed-off-by: Tvrtko Ursulin
> Reported-by: Eero T Tamminen
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 41651ac255fa..a75cd1db320b 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -476,6 +476,8 @@ engine_event_status(struct intel_engine_cs *engine,
> static int
> config_status(struct drm_i915_private *i915, u64 config)
> {
> + struct intel_gt *gt = >gt;
> +
> switch (config) {
> case I915_PMU_ACTUAL_FREQUENCY:
> if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> @@ -489,7 +491,7 @@ config_status(struct drm_i915_private *i915, u64 config)
> case I915_PMU_INTERRUPTS:
> break;
> case I915_PMU_RC6_RESIDENCY:
> - if (!HAS_RC6(i915))
> + if (!gt->rc6.supported)
Is this really going to remove any confusion?
Right now it is there but with residency 0, but after this change the event is
not there anymore so I wonder if we are not just changing to a different kind
of confusion on users.
> return -ENODEV;
would a different return help somehow?
> break;
> case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
> --
> 2.27.0
>
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[Intel-gfx] [PULL] drm-intel-next
Hi Dave & Daniel - The final drm-intel-next feature pull for v5.13. Or, truthfully, a pull request of refactoring both to clean up and prepare for future. Joonas will still send a drm-intel-gt-next pull request, probably next week due to easter holidays. We'll do backmerges to sync up after everything's in drm-next. BR, Jani. drm-intel-next-2021-04-01: Features: - Add support for FBs requiring a power-of-two stride padding (Imre) Refactoring: - Disassociate display version from gen (Matt) - Refactor legacy DP and HDMI code to separate files (Ville) - Refactor FB plane code to a separate file (Imre) - Refactor VBT child device info parsing and usage (Jani) - Refactor KBL/TGL/ADL-S display and gt stepping schemes (Jani) Fixes: - DP Link-Training Tunable PHY Repeaters (LTTPR) fixes (Imre) - HDCP fixes (Anshuman) - DP 2.0 HDMI 2.1 PCON Fixed Rate Link (FRL) fixes (Ankit) - Set HDA link parameters in driver (Kai) - Fix enabled_planes bitmask (Ville) - Fix transposed arguments to skl_plane_wm_level() (Ville) - Stop adding planes to the commit needlessly (Ville) BR, Jani. The following changes since commit 2b25fb31a38d4fe8e745754036052ef8b16fe712: Merge tag 'gvt-next-2021-03-16' of https://github.com/intel/gvt-linux into drm-intel-next (2021-03-16 13:42:33 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2021-04-01 for you to fetch changes up to 81f1f8f1e1489c0bf051d5241ec10da07869b911: drm/i915: Fix docbook header for __intel_runtime_pm_get_if_active() (2021-03-31 16:57:33 +0300) Features: - Add support for FBs requiring a power-of-two stride padding (Imre) Refactoring: - Disassociate display version from gen (Matt) - Refactor legacy DP and HDMI code to separate files (Ville) - Refactor FB plane code to a separate file (Imre) - Refactor VBT child device info parsing and usage (Jani) - Refactor KBL/TGL/ADL-S display and gt stepping schemes (Jani) Fixes: - DP Link-Training Tunable PHY Repeaters (LTTPR) fixes (Imre) - HDCP fixes (Anshuman) - DP 2.0 HDMI 2.1 PCON Fixed Rate Link (FRL) fixes (Ankit) - Set HDA link parameters in driver (Kai) - Fix enabled_planes bitmask (Ville) - Fix transposed arguments to skl_plane_wm_level() (Ville) - Stop adding planes to the commit needlessly (Ville) Ankit Nautiyal (3): drm/i915/display: Remove FRL related code from disable DP sequence for older platforms drm/dp_helper: Define options for FRL training for HDMI2.1 PCON drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is available Anshuman Gupta (6): drm/i915/hdcp: mst streams type1 capability check drm/i915/hdcp: HDCP2.2 MST Link failure recovery drm/i915/hdcp: link hdcp2 recovery on link enc stopped drm/i915/hdcp: return correct error code drm/i915/hdcp: Add DP HDCP2.2 timeout to read entire msg drm/hdcp: DP HDCP2.2 errata LC_Send_L_Prime=16 Bhaskar Chowdhury (1): drm/i915/display: Fix a typo Imre Deak (29): drm/i915/ilk-glk: Fix link training on links with LTTPRs drm/i915: Disable LTTPR support when the DPCD rev < 1.4 drm/i915: Disable LTTPR support when the LTTPR rev < 1.4 drm/i915: Fix the GT fence revocation runtime PM logic drm/i915: Fix rotation setup during plane HW readout drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt() drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt() drm/i915: Make sure i915_ggtt_view is inited when creating an FB drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap() drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c drm/i915/intel_fb: Pull FB plane functions from intel_display.c drm/i915/intel_fb: Unexport intel_fb_check_stride() drm/i915/intel_fb: s/dev_priv/i915/ drm/i915/intel_fb: Factor out convert_plane_offset_to_xy() drm/i915/intel_fb: Factor out calc_plane_aligned_offset() drm/i915/intel_fb: Factor out calc_plane_normal_size() drm/i915: Unify the FB and plane state view information into one struct drm/i915: Store the normal view FB pitch in FB's intel_fb_view drm/i915: Simplify copying the FB view state to the plane state drm/i915/intel_fb: Factor out calc_plane_remap_info() drm/i915: Shrink the size of intel_remapped_plane_info struct drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap() drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct drm/i915: Add support for FBs requiring a POT stride
Re: [Intel-gfx] [PATCH V2] drm/i915/display: Disable PSR2 on Gen12/12+
> -Original Message-
> From: Intel-gfx On Behalf Of Tejas
> Upadhyay
> Sent: Monday, March 22, 2021 4:37 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Pandey, Hariom
> Subject: [Intel-gfx] [PATCH V2] drm/i915/display: Disable PSR2 on Gen12/12+
>
> In light of PSR2 can be enabled only on BOM9 platform team has requested to
> disable PSR2 by default in driver, starting with gfx-driver-ci-master-7517.
> Disabling it
> for all gen12/12+.
>
> Changes since V1 :
> - Added check for GEN12/12+
> - Modified commit message accoringly
>
Nack on this change.
This is not right, please abandon and drop this change.
> Signed-off-by: Tejas Upadhyay
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index cd434285e3b7..df55799c53da 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -727,7 +727,7 @@ static bool intel_psr2_config_valid(struct intel_dp
> *intel_dp,
> return false;
>
> /* JSL and EHL only supports eDP 1.3 */
> - if (IS_JSL_EHL(dev_priv)) {
> + if (IS_JSL_EHL(dev_priv) || INTEL_GEN(dev_priv) >= 12) {
> drm_dbg_kms(_priv->drm, "PSR2 not supported by phy\n");
> return false;
> }
> --
> 2.30.0
>
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