Re: [Intel-gfx] [PATCH 2/4] drm/i915/dp: Fix UHBR link M/N values
On Tue, Nov 14, 2023 at 05:29:35AM +0200, Murthy, Arun R wrote:
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of Imre
> > Deak
> > Sent: Tuesday, November 14, 2023 1:41 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 2/4] drm/i915/dp: Fix UHBR link M/N values
> >
> > The link M/N ratio is the data rate / link symbol clock rate, fix things up
> > accordingly. On DP 1.4 this ratio was correct as the link symbol clock rate
> > in
> > that case matched the link data rate (in bytes/sec units, the symbol size
> > being 8
> > bits), however it wasn't correct for UHBR rates where the symbol size is 32
> > bits.
> >
> > Signed-off-by: Imre Deak
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 16 -
> > drivers/gpu/drm/i915/display/intel_dp.c | 24
> > drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
> > 3 files changed, 36 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 24aebdb715e7d..c059eb0170a5b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -2411,6 +2411,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int
> > nlanes,
> > struct intel_link_m_n *m_n)
> > {
> > u32 data_clock = bits_per_pixel * pixel_clock;
> > + u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
> > u32 data_m;
> > u32 data_n;
> >
> > @@ -2431,7 +2432,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int
> > nlanes,
> > 0x800);
> >
> > compute_m_n(_n->link_m, _n->link_n,
> > - pixel_clock, link_clock,
> > + pixel_clock, link_symbol_clock,
> > 0x8);
> > }
> Better if this can be moved to intel_dp.c
The function is also used by non-DP outputs, so not sure. In any case
it would need to be a separate change.
> Also per the spec the constant N values is 0x80
For the link M/N values I can't see this in the spec. It's mentioned in
the context of calculating data M/N. Changing that - if it makes sense -
should be in a separate patch.
> The calculation of data M has dependency with DP symbol
> >
> > @@ -3943,20 +3944,23 @@ int intel_dotclock_calculate(int link_freq,
> >const struct intel_link_m_n *m_n) {
> > /*
> > - * The calculation for the data clock is:
> > + * The calculation for the data clock -> pixel clock is:
> >* pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
> >* But we want to avoid losing precison if possible, so:
> >* pixel_clock = ((m * link_clock * nr_lanes)/(n*bpp))
> >*
> > - * and the link clock is simpler:
> > - * link_clock = (m * link_clock) / n
> > + * and for link freq (10kbs units) -> pixel clock it is:
> > + * link_symbol_clock = link_freq * 10 / link_symbol_size
> > + * pixel_clock = (m * link_symbol_clock) / n
> > + *or for more precision:
> > + * pixel_clock = (m * link_freq * 10) / (n * link_symbol_size)
> >*/
> >
> > if (!m_n->link_n)
> > return 0;
> >
> > - return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq),
> > - m_n->link_n);
> > + return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq *
> > 10),
> > + m_n->link_n *
> > intel_dp_link_symbol_size(link_freq));
> > }
> >
> > int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config) diff
> > --git
> > a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index f662d1ce5f72c..80e1e887432fa 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -132,6 +132,30 @@ bool intel_dp_is_uhbr(const struct intel_crtc_state
> > *crtc_state)
> > return intel_dp_is_uhbr_rate(crtc_state->port_clock);
> > }
> >
> > +/**
> > + * intel_dp_link_symbol_size - get the link symbol size for a given
> > +link rate
> > + * @rate: link rate in 10kbit/s units
> > + *
> > + * Returns the link symbol size in bits/symbol units depending on the
> > +link
> > + * rate -> channel coding.
> > + */
> > +int intel_dp_link_symbol_size(int rate) {
> > + return intel_dp_is_uhbr_rate(rate) ? 32 : 10; }
> As per the spec this DP symbol is 32 for DP2.0 and 8 for DP1.4
On DP1.4 before the 8b/10b conversion the symbol size is 8 bits, after
the conversion (which is what @rate describes and for which the symbol
size is returned for) it's 10 bits.
>
> Thanks and Regards,
> Arun R Murthy
>
> > +
> > +/**
> > + * intel_dp_link_symbol_clock - convert link rate to link symbol clock
> > + * @rate: link rate in 10kbit/s units
> > + *
> > + * Returns the link symbol clock frequency in kHz units depending on
> > +the
> > + * link rate and
Re: [Intel-gfx] [PATCH 2/4] drm/i915/dp: Fix UHBR link M/N values
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Tuesday, November 14, 2023 1:41 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 2/4] drm/i915/dp: Fix UHBR link M/N values
>
> The link M/N ratio is the data rate / link symbol clock rate, fix things up
> accordingly. On DP 1.4 this ratio was correct as the link symbol clock rate in
> that case matched the link data rate (in bytes/sec units, the symbol size
> being 8
> bits), however it wasn't correct for UHBR rates where the symbol size is 32
> bits.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 16 -
> drivers/gpu/drm/i915/display/intel_dp.c | 24
> drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
> 3 files changed, 36 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 24aebdb715e7d..c059eb0170a5b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2411,6 +2411,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int
> nlanes,
> struct intel_link_m_n *m_n)
> {
> u32 data_clock = bits_per_pixel * pixel_clock;
> + u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
> u32 data_m;
> u32 data_n;
>
> @@ -2431,7 +2432,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int
> nlanes,
> 0x800);
>
> compute_m_n(_n->link_m, _n->link_n,
> - pixel_clock, link_clock,
> + pixel_clock, link_symbol_clock,
> 0x8);
> }
Better if this can be moved to intel_dp.c
Also per the spec the constant N values is 0x80
The calculation of data M has dependency with DP symbol
>
> @@ -3943,20 +3944,23 @@ int intel_dotclock_calculate(int link_freq,
>const struct intel_link_m_n *m_n) {
> /*
> - * The calculation for the data clock is:
> + * The calculation for the data clock -> pixel clock is:
>* pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
>* But we want to avoid losing precison if possible, so:
>* pixel_clock = ((m * link_clock * nr_lanes)/(n*bpp))
>*
> - * and the link clock is simpler:
> - * link_clock = (m * link_clock) / n
> + * and for link freq (10kbs units) -> pixel clock it is:
> + * link_symbol_clock = link_freq * 10 / link_symbol_size
> + * pixel_clock = (m * link_symbol_clock) / n
> + *or for more precision:
> + * pixel_clock = (m * link_freq * 10) / (n * link_symbol_size)
>*/
>
> if (!m_n->link_n)
> return 0;
>
> - return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq),
> - m_n->link_n);
> + return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq *
> 10),
> + m_n->link_n *
> intel_dp_link_symbol_size(link_freq));
> }
>
> int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config) diff
> --git
> a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index f662d1ce5f72c..80e1e887432fa 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -132,6 +132,30 @@ bool intel_dp_is_uhbr(const struct intel_crtc_state
> *crtc_state)
> return intel_dp_is_uhbr_rate(crtc_state->port_clock);
> }
>
> +/**
> + * intel_dp_link_symbol_size - get the link symbol size for a given
> +link rate
> + * @rate: link rate in 10kbit/s units
> + *
> + * Returns the link symbol size in bits/symbol units depending on the
> +link
> + * rate -> channel coding.
> + */
> +int intel_dp_link_symbol_size(int rate) {
> + return intel_dp_is_uhbr_rate(rate) ? 32 : 10; }
As per the spec this DP symbol is 32 for DP2.0 and 8 for DP1.4
Thanks and Regards,
Arun R Murthy
> +
> +/**
> + * intel_dp_link_symbol_clock - convert link rate to link symbol clock
> + * @rate: link rate in 10kbit/s units
> + *
> + * Returns the link symbol clock frequency in kHz units depending on
> +the
> + * link rate and channel coding.
> + */
> +int intel_dp_link_symbol_clock(int rate) {
> + return DIV_ROUND_CLOSEST(rate * 10,
> intel_dp_link_symbol_size(rate));
> +}
> +
> static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp) {
> intel_dp->sink_rates[0] = 162000;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index e80da67554196..64dbf8f192708 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -82,6 +82,8 @@ bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
> bool intel_dp_is_edp(struct intel_dp *intel_dp); bool
> intel_dp_is_uhbr_rate(int
> rate); bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
>
[Intel-gfx] linux-next: build warning after merge of the drm-intel tree
Hi all,
After merging the drm-intel tree, today's linux-next build (htmldocs)
produced this warning:
Documentation/gpu/drm-kms-helpers:296:
drivers/gpu/drm/display/drm_dp_mst_topology.c:5484: ERROR: Unexpected
indentation.
Documentation/gpu/drm-kms-helpers:296:
drivers/gpu/drm/display/drm_dp_mst_topology.c:5488: WARNING: Block quote ends
without a blank line; unexpected unindent.
Introduced by commit
1cd0a5ea4279 ("drm/dp_mst: Factor out a helper to check the atomic state of a
topology manager")
--
Cheers,
Stephen Rothwell
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Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc tree
Hi Luben, BTW, cherry picking commits does not avoid conflicts - in fact it can cause conflicts if there are further changes to the files affected by the cherry picked commit in either the tree/branch the commit was cheery picked from or the destination tree/branch (I have to deal with these all the time when merging the drm trees in linux-next). Much better is to cross merge the branches so that the patch only appears once or have a shared branches that are merged by any other branch that needs the changes. I understand that things are not done like this in the drm trees :-( -- Cheers, Stephen Rothwell pgpiyOLMv2tOn.pgp Description: OpenPGP digital signature
Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc tree
On 2023-11-13 21:45, Stephen Rothwell wrote:
> Hi Luben,
>
> On Mon, 13 Nov 2023 20:32:40 -0500 Luben Tuikov wrote:
>>
>> On 2023-11-13 20:08, Luben Tuikov wrote:
>>> On 2023-11-13 15:55, Stephen Rothwell wrote:
Hi all,
Commit
0da611a87021 ("dma-buf: add dma_fence_timestamp helper")
is missing a Signed-off-by from its committer.
>>>
>>> In order to merge the scheduler changes necessary for the Xe driver, those
>>> changes
>>> were based on drm-tip, which included this change from drm-misc-fixes, but
>>> which
>>> wasn't present in drm-misc-next.
>>>
>>> I didn't want to create a merge conflict between drm-misc-next and
>>> drm-misc-fixes,
>>> when pulling that change from drm-misc-next to drm-misc-fixes, so that I
>>> can apply
>>
>> ... when pulling that change from from drm-misc-fixes into drm-misc-next, so
>> that I can apply...
>>
>>> the Xe scheduler changes on top of drm-misc-next.
>>
>> The change in drm-misc-fixes is b83ce9cb4a465b. The latter is contained
>> in linus-master, and in drm-misc-fixes, while the former is in drm-misc-next.
>> When we merge linus-master/drm-misc-fixes into drm-misc-next, or whichever
>> way
>> it happens, I'd like to avoid a merge conflict, but wanted to expedite the
>> changes
>> for Xe.
>
> None of that is relevant ... if you commit a patch to a tree that will
> be in the linux kernel tree, you must add your Signed-off-by to the commit.
Hi Stephen,
Noted!
So I always do this when I do git-am and such, but wasn't sure for this one
single cherry-pick whose
original author was the committer in drm-misc-fixes, but will add my
Signed-off-by in those
rare circumstances.
Thanks for the clarification!
--
Regards,
Luben
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Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc tree
Hi Luben,
On Mon, 13 Nov 2023 20:32:40 -0500 Luben Tuikov wrote:
>
> On 2023-11-13 20:08, Luben Tuikov wrote:
> > On 2023-11-13 15:55, Stephen Rothwell wrote:
> >> Hi all,
> >>
> >> Commit
> >>
> >> 0da611a87021 ("dma-buf: add dma_fence_timestamp helper")
> >>
> >> is missing a Signed-off-by from its committer.
> >>
> >
> > In order to merge the scheduler changes necessary for the Xe driver, those
> > changes
> > were based on drm-tip, which included this change from drm-misc-fixes, but
> > which
> > wasn't present in drm-misc-next.
> >
> > I didn't want to create a merge conflict between drm-misc-next and
> > drm-misc-fixes,
> > when pulling that change from drm-misc-next to drm-misc-fixes, so that I
> > can apply
>
> ... when pulling that change from from drm-misc-fixes into drm-misc-next, so
> that I can apply...
>
> > the Xe scheduler changes on top of drm-misc-next.
>
> The change in drm-misc-fixes is b83ce9cb4a465b. The latter is contained
> in linus-master, and in drm-misc-fixes, while the former is in drm-misc-next.
> When we merge linus-master/drm-misc-fixes into drm-misc-next, or whichever way
> it happens, I'd like to avoid a merge conflict, but wanted to expedite the
> changes
> for Xe.
None of that is relevant ... if you commit a patch to a tree that will
be in the linux kernel tree, you must add your Signed-off-by to the commit.
--
Cheers,
Stephen Rothwell
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[Intel-gfx] ✗ Fi.CI.BAT: failure for Selftest for FAST_REQUEST feature (rev2)
== Series Details ==
Series: Selftest for FAST_REQUEST feature (rev2)
URL : https://patchwork.freedesktop.org/series/126044/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13871 -> Patchwork_126044v2
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_126044v2 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_126044v2, please notify your bug team
(lgci.bug.fil...@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/index.html
Participating hosts (35 -> 34)
--
Missing(1): fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126044v2:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gt_pm:
- fi-hsw-4770:[PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13871/fi-hsw-4770/igt@i915_selftest@live@gt_pm.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/fi-hsw-4770/igt@i915_selftest@live@gt_pm.html
Known issues
Here are the changes found in Patchwork_126044v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@debugfs_test@basic-hwmon:
- bat-jsl-3: NOTRUN -> [SKIP][3] ([i915#9318])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@debugfs_t...@basic-hwmon.html
* igt@gem_huc_copy@huc-copy:
- bat-jsl-3: NOTRUN -> [SKIP][4] ([i915#2190])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- bat-jsl-3: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@gem_lmem_swapp...@basic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-3: NOTRUN -> [SKIP][6] ([i915#4103]) +1 other test skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-3: NOTRUN -> [SKIP][7] ([fdo#109285])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@kms_force_connector_ba...@force-load-detect.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-3: NOTRUN -> [SKIP][8] ([i915#3555]) +1 other test skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@kms_setm...@basic-clone-single-crtc.html
Possible fixes
* igt@debugfs_test@read_all_entries:
- bat-jsl-3: [INCOMPLETE][9] -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13871/bat-jsl-3/igt@debugfs_test@read_all_entries.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-jsl-3/igt@debugfs_test@read_all_entries.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][11] ([IGT#3]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13871/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][13] ([i915#8668]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13871/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126044v2/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
Build changes
-
* Linux: CI_DRM_13871 -> Patchwork_126044v2
CI-20190529: 20190529
CI_DRM_13871: 811507c09ec3722450601b3642c47ab63830112b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7584: 30e6ded90039edde8aa6c435001f8d63159356bb @
Re: [Intel-gfx] [PATCH 1/4] drm/i915/dp: Account for channel coding efficiency on UHBR links
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Tuesday, November 14, 2023 1:41 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/4] drm/i915/dp: Account for channel coding
> efficiency on UHBR links
>
> Apply the correct BW allocation overhead and channel coding efficiency on
> UHBR link rates, similarly to DP1.4 link rates.
>
> Signed-off-by: Imre Deak
Reviewed-by: Arun R Murthy
Thanks and Regards,
Arun R Murthy
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10 --
> 1 file changed, 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 3effafcbb411a..24aebdb715e7d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2398,16 +2398,6 @@ add_bw_alloc_overhead(int link_clock, int
> bw_overhead,
> int ch_coding_efficiency =
> drm_dp_bw_channel_coding_efficiency(is_uhbr);
>
> - /*
> - * TODO: adjust for actual UHBR channel coding efficiency and BW
> - * overhead.
> - */
> - if (is_uhbr) {
> - *data_m = pixel_data_rate;
> - *data_n = link_data_rate * 8 / 10;
> - return;
> - }
> -
> *data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate,
> bw_overhead),
> 100);
> *data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate,
> ch_coding_efficiency),
> --
> 2.39.2
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Selftest for FAST_REQUEST feature (rev2)
== Series Details == Series: Selftest for FAST_REQUEST feature (rev2) URL : https://patchwork.freedesktop.org/series/126044/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH] drm/i915/huc: Stop printing about unsupported HuC on MTL
On 11/13/2023 07:36, Daniele Ceraolo Spurio wrote: On 11/9/2023 6:06 PM, John Harrison wrote: On 11/9/2023 15:54, Daniele Ceraolo Spurio wrote: On MTL, the HuC is only supported on the media GT, so our validation check on the module parameter detects an inconsistency on the root GT (the modparams asks to enable HuC, but the support is not there) and prints the following info message: [drm] GT0: Incompatible option enable_guc=3 - HuC is not supported! This can be confusing to the user and make them think that something is wrong when it isn't, so we need to silence it. Given that any platform that supports HuC also supports GuC, if a user tries to enable HuC on a platform that really doesn't support it they'll already see a message about GuC not being supported, so instead of just silencing the HuC message on newer platforms we can just get rid of it entirely. Not following this argument. Someone might attempt to enable HuC only and do so on a older platform that supports neither HuC nor GuC. There would be no GuC warning because GuC was not requested. But now there would also be no HuC warning either. Enabling HuC also enabled GuC loading, because the latter is needed to auth the former. The message about GuC not being supported is printed for all values of enable_guc that are not zero. Daniele This would indeed appear to be the case. So... Reviewed-by: John Harrison John. Signed-off-by: Daniele Ceraolo Spurio Cc: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 27f6561dd731..3872d309ed31 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c @@ -106,11 +106,6 @@ static void __confirm_options(struct intel_uc *uc) gt_info(gt, "Incompatible option enable_guc=%d - %s\n", i915->params.enable_guc, "GuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC && - !intel_uc_supports_huc(uc)) - gt_info(gt, "Incompatible option enable_guc=%d - %s\n", - i915->params.enable_guc, "HuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_SUBMISSION && !intel_uc_supports_guc_submission(uc)) gt_info(gt, "Incompatible option enable_guc=%d - %s\n",
Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc tree
On 2023-11-13 20:08, Luben Tuikov wrote:
> On 2023-11-13 15:55, Stephen Rothwell wrote:
>> Hi all,
>>
>> Commit
>>
>> 0da611a87021 ("dma-buf: add dma_fence_timestamp helper")
>>
>> is missing a Signed-off-by from its committer.
>>
>
> In order to merge the scheduler changes necessary for the Xe driver, those
> changes
> were based on drm-tip, which included this change from drm-misc-fixes, but
> which
> wasn't present in drm-misc-next.
>
> I didn't want to create a merge conflict between drm-misc-next and
> drm-misc-fixes,
> when pulling that change from drm-misc-next to drm-misc-fixes, so that I can
> apply
... when pulling that change from from drm-misc-fixes into drm-misc-next, so
that I can apply...
> the Xe scheduler changes on top of drm-misc-next.
The change in drm-misc-fixes is b83ce9cb4a465b. The latter is contained
in linus-master, and in drm-misc-fixes, while the former is in drm-misc-next.
When we merge linus-master/drm-misc-fixes into drm-misc-next, or whichever way
it happens, I'd like to avoid a merge conflict, but wanted to expedite the
changes
for Xe.
--
Regards,
Luben
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Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc tree
On 2023-11-13 15:55, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> 0da611a87021 ("dma-buf: add dma_fence_timestamp helper")
>
> is missing a Signed-off-by from its committer.
>
In order to merge the scheduler changes necessary for the Xe driver, those
changes
were based on drm-tip, which included this change from drm-misc-fixes, but which
wasn't present in drm-misc-next.
I didn't want to create a merge conflict between drm-misc-next and
drm-misc-fixes,
when pulling that change from drm-misc-next to drm-misc-fixes, so that I can
apply
the Xe scheduler changes on top of drm-misc-next.
--
Regards,
Luben
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[Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Fix for potential false positives in GuC hang selftest
From: John Harrison
Noticed that the hangcheck selftest is submitting a non-preemptoble
spinner. That means that even if the GuC does not die, the heartbeat
will still kick in and trigger a reset. Which is rather defeating the
purpose of the test - to verify that the heartbeat will kick in if the
GuC itself has died. The test is deliberately killing the GuC, so it
should never hit the case of a non-dead GuC. But it is not impossible
that the kill might fail at some future point due to other driver
re-work.
So, make the spinner pre-emptible. That way the heartbeat can get
through if the GuC is alive and context switching. Thus a reset only
happens if the GuC dies. Thus, if the kill should stop working the
test will now fail rather than claim to pass.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
b/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
index 34b5d952e2bcb..26fdc392fce6c 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
@@ -74,7 +74,7 @@ static int intel_hang_guc(void *arg)
goto err;
}
- rq = igt_spinner_create_request(, ce, MI_NOOP);
+ rq = igt_spinner_create_request(, ce, MI_ARB_CHECK);
intel_context_put(ce);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
--
2.41.0
[Intel-gfx] [PATCH v2 2/2] drm/i915/guc: Add a selftest for FAST_REQUEST errors
From: John Harrison
There is a mechanism for reporting errors from fire and forget H2G
messages. This is the only way to find out about almost any error in
the GuC backend submission path. So it would be useful to know that it
is working.
v2: Fix some dumb over-complications and a couple of typos - review
feedback from Daniele.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 4 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 ++
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 115 ++
3 files changed, 128 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 2b6dfe62c8f2a..e22c12ce245ad 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -297,6 +297,10 @@ struct intel_guc {
* @number_guc_id_stolen: The number of guc_ids that have been stolen
*/
int number_guc_id_stolen;
+ /**
+* @fast_response_selftest: Backdoor to CT handler for fast response
selftest
+*/
+ u32 fast_response_selftest;
#endif
};
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 89e314b3756bb..ed6ce73ef3b07 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -1076,6 +1076,15 @@ static int ct_handle_response(struct intel_guc_ct *ct,
struct ct_incoming_msg *r
found = true;
break;
}
+
+#ifdef CONFIG_DRM_I915_SELFTEST
+ if (!found && ct_to_guc(ct)->fast_response_selftest) {
+ CT_DEBUG(ct, "Assuming unsolicited response due to FAST_REQUEST
selftest\n");
+ ct_to_guc(ct)->fast_response_selftest++;
+ found = true;
+ }
+#endif
+
if (!found) {
CT_ERROR(ct, "Unsolicited response message: len %u, data %#x
(fence %u, last %u)\n",
len, hxg[0], fence, ct->requests.last_fence);
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
index bfb72143566f6..c900aac85adba 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
@@ -286,11 +286,126 @@ static int intel_guc_steal_guc_ids(void *arg)
return ret;
}
+/*
+ * Send a context schedule H2G message with an invalid context id.
+ * This should generate a GUC_RESULT_INVALID_CONTEXT response.
+ */
+static int bad_h2g(struct intel_guc *guc)
+{
+ u32 action[] = {
+ INTEL_GUC_ACTION_SCHED_CONTEXT,
+ 0x12345678,
+ };
+
+ return intel_guc_send_nb(guc, action, ARRAY_SIZE(action), 0);
+}
+
+/*
+ * Set a spinner running to make sure the system is alive and active,
+ * then send a bad but asynchronous H2G command and wait to see if an
+ * error response is returned. If no response is received or if the
+ * spinner dies then the test will fail.
+ */
+#define FAST_RESPONSE_TIMEOUT_MS 1000
+static int intel_guc_fast_request(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_context *ce;
+ struct igt_spinner spin;
+ struct i915_request *rq;
+ intel_wakeref_t wakeref;
+ struct intel_engine_cs *engine = intel_selftest_find_any_engine(gt);
+ bool spinning = false;
+ int ret = 0;
+
+ if (!engine)
+ return 0;
+
+ wakeref = intel_runtime_pm_get(gt->uncore->rpm);
+
+ ce = intel_context_create(engine);
+ if (IS_ERR(ce)) {
+ ret = PTR_ERR(ce);
+ gt_err(gt, "Failed to create spinner request: %pe\n", ce);
+ goto err_pm;
+ }
+
+ ret = igt_spinner_init(, engine->gt);
+ if (ret) {
+ gt_err(gt, "Failed to create spinner: %pe\n", ERR_PTR(ret));
+ goto err_pm;
+ }
+ spinning = true;
+
+ rq = igt_spinner_create_request(, ce, MI_ARB_CHECK);
+ intel_context_put(ce);
+ if (IS_ERR(rq)) {
+ ret = PTR_ERR(rq);
+ gt_err(gt, "Failed to create spinner request: %pe\n", rq);
+ goto err_spin;
+ }
+
+ ret = request_add_spin(rq, );
+ if (ret) {
+ gt_err(gt, "Failed to add Spinner request: %pe\n",
ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ gt->uc.guc.fast_response_selftest = 1;
+
+ ret = bad_h2g(>uc.guc);
+ if (ret) {
+ gt_err(gt, "Failed to send H2G: %pe\n", ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ ret = wait_for(gt->uc.guc.fast_response_selftest != 1 ||
i915_request_completed(rq),
+ FAST_RESPONSE_TIMEOUT_MS);
+ if (ret) {
+ gt_err(gt, "Request wait failed: %pe\n", ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ if (i915_request_completed(rq)) {
+ gt_err(gt, "Spinner died waiting for fast request error!\n");
+
[Intel-gfx] [PATCH v2 0/2] Selftest for FAST_REQUEST feature
From: John Harrison Add a selftest to verify that the FAST_REQUEST mechanism (getting errors back from fire-and-forget H2G commands) is functional. Also fix up a potential false positive in the GuC hang selftest. v2: Fix some dumb over-complications and typos - review feedback from Daniele. Signed-off-by: John Harrison John Harrison (2): drm/i915/guc: Fix for potential false positives in GuC hang selftest drm/i915/guc: Add a selftest for FAST_REQUEST errors drivers/gpu/drm/i915/gt/uc/intel_guc.h| 4 + drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 ++ drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 115 ++ .../drm/i915/gt/uc/selftest_guc_hangcheck.c | 2 +- 4 files changed, 129 insertions(+), 1 deletion(-) -- 2.41.0
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Skip pxp init if gt is wedged (rev3)
== Series Details == Series: drm/i915: Skip pxp init if gt is wedged (rev3) URL : https://patchwork.freedesktop.org/series/125658/ State : success == Summary == CI Bug Log - changes from CI_DRM_13870 -> Patchwork_125658v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/index.html Participating hosts (34 -> 34) -- Additional (2): fi-kbl-soraka bat-dg2-8 Missing(2): bat-mtlp-8 fi-snb-2520m Known issues Here are the changes found in Patchwork_125658v3 that come from known issues: ### IGT changes ### Issues hit * igt@core_hotunplug@unbind-rebind: - fi-apl-guc: [PASS][1] -> [ABORT][2] ([i915#8213] / [i915#8668]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/fi-apl-guc/igt@core_hotunp...@unbind-rebind.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/fi-apl-guc/igt@core_hotunp...@unbind-rebind.html * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][3] -> [INCOMPLETE][4] ([i915#9275]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4083]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6621]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_heartbeat: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][11] ([i915#5334] / [i915#7872]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#6645]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#5190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4215] / [i915#5190]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][16] ([i915#4212]) +6 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#4212] / [i915#5608]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-kbl-soraka: NOTRUN -> [SKIP][19] ([fdo#109271]) +9 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125658v3/fi-kbl-soraka/igt@kms_...@dsc-basic.html *
[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/tests/drm_mm_test.c
between commit:
2ba157983974 ("drm/tests: Fix incorrect argument in drm_test_mm_insert_range")
from Linus' tree and commit:
078a5b498d6a ("drm/tests: Remove slow tests")
from the drm-misc tree.
I fixed it up (the latter removed the code updated by the former, so I
did that) and can carry the fix as necessary. This is now fixed as far as
linux-next is concerned, but any non trivial conflicts should be mentioned
to your upstream maintainer when your tree is submitted for merging.
You may also want to consider cooperating with the maintainer of the
conflicting tree to minimise any particularly complex conflicts.
--
Cheers,
Stephen Rothwell
pgp6cGcJ1wa21.pgp
Description: OpenPGP digital signature
[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/accel/ivpu/ivpu_job.c
between commit:
6309727ef271 ("kthread: add kthread_stop_put")
from Linus' tree and commit:
57c7e3e4800a ("accel/ivpu: Stop job_done_thread on suspend")
from the drm-misc tree.
I fixed it up (I just used the latter version) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging. You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.
--
Cheers,
Stephen Rothwell
pgpYZZTKt7FPq.pgp
Description: OpenPGP digital signature
[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/accel/ivpu/ivpu_ipc.c
between commit:
b0873eead1d1 ("accel/ivpu: Do not use wait event interruptible")
from Linus' tree and commit:
57c7e3e4800a ("accel/ivpu: Stop job_done_thread on suspend")
from the drm-misc tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/accel/ivpu/ivpu_ipc.c
index a4ca40b184d4,618dbc17df80..
--- a/drivers/accel/ivpu/ivpu_ipc.c
+++ b/drivers/accel/ivpu/ivpu_ipc.c
@@@ -210,10 -227,9 +227,9 @@@ int ivpu_ipc_receive(struct ivpu_devic
struct ivpu_ipc_rx_msg *rx_msg;
int wait_ret, ret = 0;
- wait_ret = wait_event_interruptible_timeout(cons->rx_msg_wq,
-
ivpu_ipc_rx_need_wakeup(cons),
-
msecs_to_jiffies(timeout_ms));
+ wait_ret = wait_event_timeout(cons->rx_msg_wq,
- (IS_KTHREAD() && kthread_should_stop()) ||
- !list_empty(>rx_msg_list),
++ivpu_ipc_rx_need_wakeup(cons),
+msecs_to_jiffies(timeout_ms));
if (IS_KTHREAD() && kthread_should_stop())
return -EINTR;
pgpt1Ic8l_eCr.pgp
Description: OpenPGP digital signature
[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/accel/ivpu/ivpu_drv.c
between commit:
828d63042aec ("accel/ivpu: Don't enter d0i3 during FLR")
from Linus' tree and commit:
57c7e3e4800a ("accel/ivpu: Stop job_done_thread on suspend")
from the drm-misc tree.
I fixed it up (I think - see below) and can carry the fix as necessary.
This is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/accel/ivpu/ivpu_drv.c
index 790603017653,51fa60b6254c..
--- a/drivers/accel/ivpu/ivpu_drv.c
+++ b/drivers/accel/ivpu/ivpu_drv.c
@@@ -389,13 -390,7 +388,14 @@@ void ivpu_prepare_for_reset(struct ivpu
disable_irq(vdev->irq);
ivpu_ipc_disable(vdev);
ivpu_mmu_disable(vdev);
+ ivpu_job_done_thread_disable(vdev);
+}
+
+int ivpu_shutdown(struct ivpu_device *vdev)
+{
+ int ret;
+
+ ivpu_prepare_for_reset(vdev);
ret = ivpu_hw_power_down(vdev);
if (ret)
pgp9IevgnMrgJ.pgp
Description: OpenPGP digital signature
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Initialize residency registers earlier (rev2)
== Series Details == Series: drm/i915: Initialize residency registers earlier (rev2) URL : https://patchwork.freedesktop.org/series/125780/ State : success == Summary == CI Bug Log - changes from CI_DRM_13870 -> Patchwork_125780v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/index.html Participating hosts (34 -> 36) -- Additional (3): bat-dg2-8 bat-kbl-2 fi-hsw-4770 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_125780v2 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1849]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-kbl-2/igt@fb...@info.html * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-8: NOTRUN -> [INCOMPLETE][2] ([i915#9275]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@gem_exec_suspend@basic...@smem.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271]) +24 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@gem_render_tiled_bl...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][6] ([fdo#109271]) +12 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@gem_tiled_fence_blits@basic: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@gem_tiled_fence_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@mman: - fi-hsw-4770:NOTRUN -> [INCOMPLETE][9] ([i915#9527]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/fi-hsw-4770/igt@i915_selftest@l...@mman.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6645]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#4212]) +6 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - fi-hsw-4770:NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#5190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#5190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4215] / [i915#5190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4212] / [i915#5608]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][16] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][17] ([fdo#109285]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125780v2/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#5274]) [18]:
Re: [Intel-gfx] [PATCH v3] drm/i915: Skip pxp init if gt is wedged
On Mon, 2023-11-13 at 14:49 -0800, Zhanjun Dong wrote: > The gt wedged could be triggered by missing guc firmware file, HW not > working, etc. Once triggered, it means all gt usage is dead, therefore we > can't enable pxp under this fatal error condition. > > alan:skip alan: this looks good (as per our offline review/discussion), we dont mess with the current driver startup sequence (i.e. pxp failures can never pull down the driver probing and will not generate warnings or errors). Also, if something does break for PXP, we only do a drm_debug if the failure returned is not -ENODEV (since -ENODEV can happen on the majority of cases with legacy products or with non-PXP kernel configs): Reviewed-by: Alan Previn
Re: [Intel-gfx] [PATCH] drm/i915: Initialize residency registers earlier
On Mon, 2023-10-30 at 16:45 -0700, Belgaumkar, Vinay wrote:
alan:skip
> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> @@ -608,11 +608,13 @@ void intel_rc6_init(struct intel_rc6 *rc6)
> /* Disable runtime-pm until we can save the GPU state with rc6 pctx */
> rpm_get(rc6);
>
> - if (!rc6_supported(rc6))
> - return;
> -
> rc6_res_reg_init(rc6);
>
> + if (!rc6_supported(rc6)) {
> + rpm_put(rc6);
> + return;
> + }
> +
> if (IS_CHERRYVIEW(i915))
> err = chv_rc6_init(rc6);
> else if (IS_VALLEYVIEW(i915))
alan: as far as the bug this patch is addressing (i.e. ensuring that
intel_rc6_print_residency has valid rc6.res_reg values for correct dprc
debugfs output when rc6 is disabled) and release the rpm, this looks good
to me.
However, when looking at the other code flows around the intel_rc6_init/fini
and intel_rc6_enable/disable, i must point out that the calls to rpm_get
and rpm_put from these functions don't seem to be designed with proper
mirror-ing. For example during driver startup, intel_rc6_init (which is called
by intel_gt_pm_init) calls rpm_get at the start but doesn't call rpm_put
before it returns. But back up the callstack in intel_gt_init,
after intel_gt_pm_init, a couple of subsystems get intialized before
intel_gt_resume
is called - which in turn calls intel_rc6_enable which does the rpm_put at its
end.
However before that get and put, i see several error paths that trigger cleanups
(leading eventually to driver load failure), but i think some cases are
completely
missing the put_rpm that intel_rc6_init took. Additionally, the function names
of
rc6_init and __get_rc6 inside i915_pmu.c seems to be confusing although static.
I wish those were named pmu_rc6_init and __pmu_rc6_init and etc.
Anyways, as per offline conversation, we are not trying to solve every
bug and design gap in this patch but just one specific bug fix. So as
per the agreed condition that we create a separate internal issue
to address this "lack of a clean mirrored-function design of rpm_get/put
across the rc6 startup sequences", here is my rb:
Reviewed-by: Alan Previn
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/display: Separate xe and i915 common dpt code into own file
== Series Details == Series: series starting with [1/3] drm/i915/display: Separate xe and i915 common dpt code into own file URL : https://patchwork.freedesktop.org/series/126352/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/display: Separate xe and i915 common dpt code into own file
== Series Details == Series: series starting with [1/3] drm/i915/display: Separate xe and i915 common dpt code into own file URL : https://patchwork.freedesktop.org/series/126352/ State : warning == Summary == Error: dim checkpatch failed e709bd08c34c drm/i915/display: Separate xe and i915 common dpt code into own file Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:97: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #97: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 85 lines checked 97f7a69edb40 drm/i915/display: in skl_surf_address check for dpt-vma f5e660c6b2e1 drm/i915/display: In intel_framebuffer_init switch to use intel_bo_to_drm_bo
Re: [Intel-gfx] [PATCH 4/4] drm/dp_mst: Fix PBN divider calculation for UHBR rates
Hi Imre,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-i915-dp-Fix-UHBR-link-M-N-values/20231114-043135
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231113201110.510724-4-imre.deak%40intel.com
patch subject: [PATCH 4/4] drm/dp_mst: Fix PBN divider calculation for UHBR
rates
config: i386-randconfig-002-20231114
(https://download.01.org/0day-ci/archive/20231114/202311140621.sw31vg8m-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20231114/202311140621.sw31vg8m-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202311140621.sw31vg8m-...@intel.com/
All errors (new ones prefixed by >>):
ld: drivers/gpu/drm/display/drm_dp_mst_topology.o: in function
`drm_dp_get_vc_payload_bw':
>> drivers/gpu/drm/display/drm_dp_mst_topology.c:3598: undefined reference to
>> `__udivdi3'
vim +3598 drivers/gpu/drm/display/drm_dp_mst_topology.c
3570
3571 /**
3572 * drm_dp_get_vc_payload_bw - get the VC payload BW for an MST link
3573 * @mgr: The _dp_mst_topology_mgr to use
3574 * @link_rate: link rate in 10kbits/s units
3575 * @link_lane_count: lane count
3576 *
3577 * Calculate the total bandwidth of a MultiStream Transport link. The
returned
3578 * value is in units of PBNs/(timeslots/1 MTP). This value can be used
to
3579 * convert the number of PBNs required for a given stream to the number
of
3580 * timeslots this stream requires in each MTP.
3581 */
3582 int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
3583 int link_rate, int link_lane_count)
3584 {
3585 int ret;
3586
3587 if (link_rate == 0 || link_lane_count == 0)
3588 drm_dbg_kms(mgr->dev, "invalid link rate/lane count:
(%d / %d)\n",
3589 link_rate, link_lane_count);
3590
3591 /* See DP v2.0 2.6.4.2, 2.7.6.3
VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
3592 /*
3593 * TODO: Return the value with a higher precision, allowing a
better
3594 * slots per MTP allocation granularity. With the current
returned
3595 * value +1 slot/MTP can get allocated on UHBR links.
3596 */
3597 ret = mul_u32_u32(link_rate * link_lane_count,
> 3598
> drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate))) /
3599(100ULL * 8 * 5400);
3600
3601 return ret;
3602 }
3603 EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
3604
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [Intel-gfx] [PATCH 4/4] drm/dp_mst: Fix PBN divider calculation for UHBR rates
Hi Imre, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-i915-dp-Fix-UHBR-link-M-N-values/20231114-043135 base: git://anongit.freedesktop.org/drm/drm-tip drm-tip patch link: https://lore.kernel.org/r/20231113201110.510724-4-imre.deak%40intel.com patch subject: [PATCH 4/4] drm/dp_mst: Fix PBN divider calculation for UHBR rates config: i386-buildonly-randconfig-002-20231114 (https://download.01.org/0day-ci/archive/20231114/202311140620.1ghqrb4g-...@intel.com/config) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231114/202311140620.1ghqrb4g-...@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202311140620.1ghqrb4g-...@intel.com/ All errors (new ones prefixed by >>): ld: drivers/gpu/drm/display/drm_dp_mst_topology.o: in function `drm_dp_get_vc_payload_bw': >> drm_dp_mst_topology.c:(.text+0x931): undefined reference to `__udivdi3' -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/dp: Account for channel coding efficiency on UHBR links
== Series Details ==
Series: series starting with [1/4] drm/i915/dp: Account for channel coding
efficiency on UHBR links
URL : https://patchwork.freedesktop.org/series/126350/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13870 -> Patchwork_126350v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_126350v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_126350v1, please notify your bug team
(lgci.bug.fil...@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/index.html
Participating hosts (34 -> 34)
--
Additional (2): fi-hsw-4770 bat-kbl-2
Missing(2): bat-dg2-9 fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126350v1:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gem:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/fi-hsw-4770/igt@i915_selftest@l...@gem.html
Known issues
Here are the changes found in Patchwork_126350v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@info:
- bat-kbl-2: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1849])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/bat-kbl-2/igt@fb...@info.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271]) +24 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@i915_module_load@load:
- bat-adlp-6: [PASS][4] -> [DMESG-WARN][5] ([i915#8449])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-adlp-6/igt@i915_module_l...@load.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/bat-adlp-6/igt@i915_module_l...@load.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][6] -> [DMESG-FAIL][7] ([i915#5334])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@hangcheck:
- fi-skl-guc: [PASS][8] -> [DMESG-FAIL][9] ([i915#9549])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#5190])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271]) +12 other tests
skip
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-kbl-2: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1845]) +14
other tests skip
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/bat-kbl-2/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc@pipe-c-dp-5:
- bat-adlp-11:[PASS][13] -> [DMESG-WARN][14] ([i915#4309])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-adlp-11/igt@kms_pipe_crc_basic@read-...@pipe-c-dp-5.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-...@pipe-c-dp-5.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#1072]) +3
other tests skip
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@i915_selftest@live@dmabuf:
- bat-mtlp-8: [DMESG-FAIL][16] -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-mtlp-8/igt@i915_selftest@l...@dmabuf.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126350v1/bat-mtlp-8/igt@i915_selftest@l...@dmabuf.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]:
[Intel-gfx] [PATCH v3] drm/i915: Skip pxp init if gt is wedged
The gt wedged could be triggered by missing guc firmware file, HW not working, etc. Once triggered, it means all gt usage is dead, therefore we can't enable pxp under this fatal error condition. v2: Updated commit message. v3: Updated return code check. Signed-off-by: Zhanjun Dong --- drivers/gpu/drm/i915/i915_driver.c | 4 +++- drivers/gpu/drm/i915/pxp/intel_pxp.c | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 80e85cadb9a2..b74977ceb455 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -804,7 +804,9 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto out_cleanup_modeset2; - intel_pxp_init(i915); + ret = intel_pxp_init(i915); + if (ret != -ENODEV) + drm_dbg(>drm, "pxp init failed with %d\n", ret); ret = intel_display_driver_probe(i915); if (ret) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index dc327cf40b5a..3e33b7de1dfd 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -199,6 +199,9 @@ int intel_pxp_init(struct drm_i915_private *i915) struct intel_gt *gt; bool is_full_feature = false; + if (intel_gt_is_wedged(to_gt(i915))) + return -ENOTCONN; + /* * NOTE: Get the ctrl_gt before checking intel_pxp_is_supported since * we still need it if PXP's backend tee transport is needed. -- 2.34.1
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/dp: Account for channel coding efficiency on UHBR links
== Series Details == Series: series starting with [1/4] drm/i915/dp: Account for channel coding efficiency on UHBR links URL : https://patchwork.freedesktop.org/series/126350/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: move *_crtc_clock_get() to intel_dpll.c
== Series Details ==
Series: series starting with [1/4] drm/i915: move *_crtc_clock_get() to
intel_dpll.c
URL : https://patchwork.freedesktop.org/series/126345/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13870 -> Patchwork_126345v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_126345v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_126345v1, please notify your bug team
(lgci.bug.fil...@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/index.html
Participating hosts (34 -> 33)
--
Additional (2): fi-kbl-soraka fi-hsw-4770
Missing(3): bat-mtlp-8 bat-dg2-9 fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126345v1:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@coherency:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-hsw-4770/igt@i915_selftest@l...@coherency.html
* igt@i915_selftest@live@ring_submission:
- fi-kbl-soraka: NOTRUN -> [ABORT][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-kbl-soraka/igt@i915_selftest@live@ring_submission.html
Known issues
Here are the changes found in Patchwork_126345v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3
other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][5] ([i915#1886])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#5190])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271]) +9 other tests skip
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-kbl-soraka/igt@kms_...@dsc-basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271]) +12 other tests
skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [PASS][9] -> [ABORT][10] ([i915#8668])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1072]) +3
other tests skip
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126345v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
Build changes
-
* Linux: CI_DRM_13870 -> Patchwork_126345v1
CI-20190529: 20190529
CI_DRM_13870: 30cf0be8023394a90d58bcff7803d427909de6d8 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7584: 30e6ded90039edde8aa6c435001f8d63159356bb @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_126345v1: 30cf0be8023394a90d58bcff7803d427909de6d8 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
8dd6b814 drm/i915: move sideband regs to vlv_sideband_reg.h
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: move *_crtc_clock_get() to intel_dpll.c
== Series Details == Series: series starting with [1/4] drm/i915: move *_crtc_clock_get() to intel_dpll.c URL : https://patchwork.freedesktop.org/series/126345/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: move *_crtc_clock_get() to intel_dpll.c
== Series Details ==
Series: series starting with [1/4] drm/i915: move *_crtc_clock_get() to
intel_dpll.c
URL : https://patchwork.freedesktop.org/series/126345/
State : warning
== Summary ==
Error: dim checkpatch failed
55d6d32443b1 drm/i915: move *_crtc_clock_get() to intel_dpll.c
-:342: CHECK:BRACES: braces {} should be used on all arms of this statement
#342: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:458:
+ if (dpll & PLL_P1_DIVIDE_BY_TWO)
[...]
+ else {
[...]
-:344: CHECK:BRACES: Unbalanced braces around else statement
#344: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:460:
+ else {
total: 0 errors, 0 warnings, 2 checks, 424 lines checked
efebb37b3248 drm/i915: add vlv_pipe_to_phy() helper to replace DPIO_PHY()
-:53: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#53: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:120:
}
+static inline enum dpio_phy vlv_pipe_to_phy(enum pipe pipe)
total: 0 errors, 0 warnings, 1 checks, 71 lines checked
8ab424cf9c80 drm/i915: convert vlv_dpio_read()/write() from pipe to phy
-:356: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#356: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.c:953:
+ vlv_dpio_write(dev_priv, phy, CHV_TX_DW14(ch, i),
data << DPIO_UPAR_SHIFT);
-:431: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#431: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.c:1062:
+ vlv_dpio_write(dev_priv, phy, VLV_TX_DW2(port),
uniqtranscale_reg_value);
-:460: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#460: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.c:1088:
+ vlv_dpio_write(dev_priv, phy, VLV_PCS_DW0(port),
DPIO_PCS_TX_LANE2_RESET |
-:464: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#464: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.c:1091:
+ vlv_dpio_write(dev_priv, phy, VLV_PCS_DW1(port),
DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
-:664: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#664: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1899:
+ vlv_dpio_write(dev_priv, phy, VLV_PLL_DW10(pipe),
0x009f0003);
-:668: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#668: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1902:
+ vlv_dpio_write(dev_priv, phy, VLV_PLL_DW10(pipe),
0x00df);
-:675: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#675: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1908:
+ vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),
0x0df4);
-:679: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#679: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1911:
+ vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),
0x0df7);
-:685: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#685: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1916:
+ vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),
0x0df7);
-:689: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#689: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1919:
+ vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(pipe),
0x0df4);
-:719: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#719: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1997:
+ vlv_dpio_write(dev_priv, phy, CHV_CMN_DW13(port),
5 << DPIO_CHV_S1_DIV_SHIFT |
-:731: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#731: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:2007:
+ vlv_dpio_write(dev_priv, phy, CHV_PLL_DW1(port),
DPIO_CHV_M1_DIV_BY_2 |
-:779: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#779: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:2062:
+ vlv_dpio_write(dev_priv, phy, CHV_CMN_DW14(port),
+ vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(port)) |
total: 0 errors, 0 warnings, 13 checks, 807 lines checked
b0ffb7a14cd9 drm/i915: move sideband regs to vlv_sideband_reg.h
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Tune down FEC detection timeout error message
== Series Details == Series: drm/i915/dp: Tune down FEC detection timeout error message URL : https://patchwork.freedesktop.org/series/126340/ State : success == Summary == CI Bug Log - changes from CI_DRM_13870 -> Patchwork_126340v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/index.html Participating hosts (34 -> 33) -- Additional (2): bat-dg2-8 bat-kbl-2 Missing(3): fi-bsw-nick fi-snb-2520m fi-pnv-d510 Known issues Here are the changes found in Patchwork_126340v1 that come from known issues: ### CI changes ### Issues hit * boot: - bat-adlp-11:[PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-adlp-11/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-adlp-11/boot.html ### IGT changes ### Issues hit * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1849]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-kbl-2/igt@fb...@info.html * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][4] -> [INCOMPLETE][5] ([i915#9275]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][6] ([fdo#109271]) +24 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4083]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6621]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_heartbeat: - fi-apl-guc: [PASS][11] -> [DMESG-FAIL][12] ([i915#5334]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13870/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#6645]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#5190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4215] / [i915#5190]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][16] ([i915#4212]) +6 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#4212] / [i915#5608]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][19] ([fdo#109285]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126340v1/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][20] ([i915#5274]) [20]:
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Audio fastset, and some fixes (rev2)
== Series Details ==
Series: drm/i915: Audio fastset, and some fixes (rev2)
URL : https://patchwork.freedesktop.org/series/126041/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/126041/revisions/2/mbox/ not
applied
Applying: drm/i915: Check pipe active state in {planes, vrr}_{enabling,
disabling}()
Applying: drm/i915: Call intel_pre_plane_updates() also for pipes getting
enabled
Applying: drm/i915: Polish some RMWs
Applying: drm/i915: Push audio enable/disable further out
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/display/intel_ddi.c
M drivers/gpu/drm/i915/display/intel_dp_mst.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/display/intel_dp_mst.c
CONFLICT (content): Merge conflict in
drivers/gpu/drm/i915/display/intel_dp_mst.c
Auto-merging drivers/gpu/drm/i915/display/intel_ddi.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0004 drm/i915: Push audio enable/disable further out
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced
Re: [Intel-gfx] [PATCH 00/20] remove I2C_CLASS_DDC support
> We're not in a hurry. It's just my experience with patch series' affecting > multiple subsystems that typically the decision was to apply the full > series via one tree. Also to avoid inquires from maintainers like: > Shall I take it or are you going to take it? > Of course there may be different opinions. Please advise. Ok, then this turns out to be a negotation thing between the drm/fbdev maintainers and me. I *can* take all the patches, of course. But since the number of patches touching the non-i2c subsystems is high, I'd like to hear their preference, too. signature.asc Description: PGP signature
Re: [Intel-gfx] [PATCH 00/20] remove I2C_CLASS_DDC support
On 13.11.2023 18:49, Wolfram Sang wrote: > >> Preferably this series should be applied via the i2c tree. > > Are we in a hurry here, i.e. does it block further development of the > i801 smbus driver? My gut feeling says the patches should rather go via > drm and fbdev trees, but I may be convinced otherwise. > We're not in a hurry. It's just my experience with patch series' affecting multiple subsystems that typically the decision was to apply the full series via one tree. Also to avoid inquires from maintainers like: Shall I take it or are you going to take it? Of course there may be different opinions. Please advise.
Re: [Intel-gfx] [PATCH 15/20] drivers/gpu/drm/i915/display: remove I2C_CLASS_DDC support
On 13.11.2023 18:50, Jani Nikula wrote:
> On Mon, 13 Nov 2023, Heiner Kallweit wrote:
>> On 13.11.2023 13:17, Jani Nikula wrote:
>>> On Mon, 13 Nov 2023, Heiner Kallweit wrote:
After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in
olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC.
Class-based device auto-detection is a legacy mechanism and shouldn't
be used in new code. So we can remove this class completely now.
>>>
>>> So this is copy-pasted to all commits and the cover letter, but please
>>> do explain why there are no functional changes here (or are there?),
>>> without me having to go through the i2c stack and try to find the
>>> commits alluded to in "After removal of the legacy ...".
>>>
>> Legacy eeprom driver was marked deprecated 4 yrs ago with:
>> 3079b54aa9a0 ("eeprom: Warn that the driver is deprecated")
>> Now it has been removed with:
>> 0113a99b8a75 ("eeprom: Remove deprecated legacy eeprom driver")
>>
>> Declaration of I2C_CLASS_DDC support is a no-op now, so there's
>> no functional change in this patch.
>>
>> If loaded manually, the legacy eeprom driver exposed the DDC EEPROM
>> to userspace. If this functionality is needed, then now the DDC
>> EEPROM has to be explicitly instantiated using at24.
>>
>> See also:
>> https://docs.kernel.org/i2c/instantiating-devices.html
>
> I'll take your word for it. Though none of the documentation I can find
> say that setting the class is legacy or deprecated or should be
> avoided. *shrug*.
>
I have to agree that it's not obvious that class-based instantiation
is considered a legacy mechanism. The commit message of this 9 yrs old
commit provides an explanation.
0c176170089c ("i2c: add deprecation warning for class based instantiation")
> Acked-by: Jani Nikula
>
Thanks
>
>>
>>
>>> What does this mean?
>>>
>>>
>>> BR,
>>> Jani.
>>>
>> Heiner
>>
>>>
Preferably this series should be applied via the i2c tree.
Signed-off-by: Heiner Kallweit
---
drivers/gpu/drm/i915/display/intel_gmbus.c |1 -
drivers/gpu/drm/i915/display/intel_sdvo.c |1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 40d7b6f3f..e9e4dcf34 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -899,7 +899,6 @@ int intel_gmbus_setup(struct drm_i915_private *i915)
}
bus->adapter.owner = THIS_MODULE;
- bus->adapter.class = I2C_CLASS_DDC;
snprintf(bus->adapter.name,
sizeof(bus->adapter.name),
"i915 gmbus %s", gmbus_pin->name);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index a636f42ce..5e64d1baf 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -3311,7 +3311,6 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
ddc->ddc_bus = ddc_bus;
ddc->ddc.owner = THIS_MODULE;
- ddc->ddc.class = I2C_CLASS_DDC;
snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d",
port_name(sdvo->base.port), ddc_bus);
ddc->ddc.dev.parent = >dev;
>>>
>>
>
Re: [Intel-gfx] [PATCH 00/20] remove I2C_CLASS_DDC support
> Preferably this series should be applied via the i2c tree. Are we in a hurry here, i.e. does it block further development of the i801 smbus driver? My gut feeling says the patches should rather go via drm and fbdev trees, but I may be convinced otherwise. signature.asc Description: PGP signature
[Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-misc tree
Hi all,
Commit
0da611a87021 ("dma-buf: add dma_fence_timestamp helper")
is missing a Signed-off-by from its committer.
--
Cheers,
Stephen Rothwell
pgpVEQIISTHPP.pgp
Description: OpenPGP digital signature
[Intel-gfx] [PATCH 3/3] drm/i915/display: In intel_framebuffer_init switch to use intel_bo_to_drm_bo
Use intel_bo_to_drm_bo instead of >base. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index c1777ea35761..6d48aa3af95a 100644 --- a/drivers/gpu/drm/i915/display/intel_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fb.c @@ -2093,7 +2093,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb, } } - fb->obj[i] = >base; + fb->obj[i] = intel_bo_to_drm_bo(obj); } ret = intel_fill_fb_info(dev_priv, intel_fb); -- 2.25.1
[Intel-gfx] [PATCH 2/3] drm/i915/display: in skl_surf_address check for dpt-vma
touch dpt_vma->node only if dpt-vma is not NULL
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 39499a0ec6c0..f5c77a018e10 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1006,7 +1006,8 @@ static u32 skl_surf_address(const struct
intel_plane_state *plane_state,
* The DPT object contains only one vma, so the VMA's offset
* within the DPT is always 0.
*/
- drm_WARN_ON(>drm, plane_state->dpt_vma->node.start);
+ drm_WARN_ON(>drm, plane_state->dpt_vma &&
+ plane_state->dpt_vma->node.start);
drm_WARN_ON(>drm, offset & 0x1f);
return offset >> 9;
} else {
--
2.25.1
[Intel-gfx] [PATCH 1/3] drm/i915/display: Separate xe and i915 common dpt code into own file
Here created intel_dpt_common.c to hold intel_dpt_configure which is
needed for both xe and i915.
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/i915/display/intel_dpt.c | 26 --
drivers/gpu/drm/i915/display/intel_dpt.h | 2 --
.../gpu/drm/i915/display/intel_dpt_common.c | 34 +++
.../gpu/drm/i915/display/intel_dpt_common.h | 13 +++
6 files changed, 49 insertions(+), 28 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dpt_common.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dpt_common.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 239da40a401f..c18a20c47265 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -275,6 +275,7 @@ i915-y += \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
display/intel_dpt.o \
+ display/intel_dpt_common.o \
display/intel_drrs.o \
display/intel_dsb.o \
display/intel_fb.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3effafcbb411..12c163203658 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -77,6 +77,7 @@
#include "intel_dpll.h"
#include "intel_dpll_mgr.h"
#include "intel_dpt.h"
+#include "intel_dpt_common.h"
#include "intel_drrs.h"
#include "intel_dsb.h"
#include "intel_dsi.h"
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c
b/drivers/gpu/drm/i915/display/intel_dpt.c
index 2b067cb952f0..b29bceff73f2 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.c
+++ b/drivers/gpu/drm/i915/display/intel_dpt.c
@@ -9,8 +9,6 @@
#include "gt/gen8_ppgtt.h"
#include "i915_drv.h"
-#include "i915_reg.h"
-#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dpt.h"
#include "intel_fb.h"
@@ -318,27 +316,3 @@ void intel_dpt_destroy(struct i915_address_space *vm)
i915_vm_put(>vm);
}
-void intel_dpt_configure(struct intel_crtc *crtc)
-{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-
- if (DISPLAY_VER(i915) == 14) {
- enum pipe pipe = crtc->pipe;
- enum plane_id plane_id;
-
- for_each_plane_id_on_crtc(crtc, plane_id) {
- if (plane_id == PLANE_CURSOR)
- continue;
-
- intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
-PLANE_CHICKEN_DISABLE_DPT,
-i915->display.params.enable_dpt ? 0 :
-PLANE_CHICKEN_DISABLE_DPT);
- }
- } else if (DISPLAY_VER(i915) == 13) {
- intel_de_rmw(i915, CHICKEN_MISC_2,
-CHICKEN_MISC_DISABLE_DPT,
-i915->display.params.enable_dpt ? 0 :
-CHICKEN_MISC_DISABLE_DPT);
- }
-}
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.h
b/drivers/gpu/drm/i915/display/intel_dpt.h
index d9a166550185..e18a9f767b11 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.h
+++ b/drivers/gpu/drm/i915/display/intel_dpt.h
@@ -10,7 +10,6 @@ struct drm_i915_private;
struct i915_address_space;
struct i915_vma;
-struct intel_crtc;
struct intel_framebuffer;
void intel_dpt_destroy(struct i915_address_space *vm);
@@ -20,6 +19,5 @@ void intel_dpt_suspend(struct drm_i915_private *i915);
void intel_dpt_resume(struct drm_i915_private *i915);
struct i915_address_space *
intel_dpt_create(struct intel_framebuffer *fb);
-void intel_dpt_configure(struct intel_crtc *crtc);
#endif /* __INTEL_DPT_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dpt_common.c
b/drivers/gpu/drm/i915/display/intel_dpt_common.c
new file mode 100644
index ..cdba47165c04
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dpt_common.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "i915_reg.h"
+#include "intel_de.h"
+#include "intel_display_types.h"
+#include "intel_dpt_common.h"
+
+void intel_dpt_configure(struct intel_crtc *crtc)
+{
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+
+ if (DISPLAY_VER(i915) == 14) {
+ enum pipe pipe = crtc->pipe;
+ enum plane_id plane_id;
+
+ for_each_plane_id_on_crtc(crtc, plane_id) {
+ if (plane_id == PLANE_CURSOR)
+ continue;
+
+ intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
+PLANE_CHICKEN_DISABLE_DPT,
+i915->display.params.enable_dpt ? 0 :
+PLANE_CHICKEN_DISABLE_DPT);
+ }
+ } else if
Re: [Intel-gfx] [PATCH] drm/i915: eliminate warnings
On Mon, Nov 13, 2023 at 11:36:13AM +0800, heminhong wrote:
> Current, the dewake_scanline variable is defined as unsigned int,
> an unsigned int variable that is always greater than or equal to 0.
> when _intel_dsb_commit function is called by intel_dsb_commit function,
> the dewake_scanline variable may have an int value.
> So the dewake_scanline variable is necessary to defined as an int.
A good catch. But this patch deserves a better commit subject since
it is not just fixing 'warnings' but the behavior of this function
accounts on the -1 that is explicitly given as input in some cases.
>
> Signed-off-by: heminhong
also perhaps:
Fixes: f83b94d23770 ("drm/i915/dsb: Use DEwake to combat PkgC latency")
Cc: Ville Syrjälä
Cc: Uma Shankar
?
> ---
> drivers/gpu/drm/i915/display/intel_dsb.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 78b6fe24dcd8..7fd6280c54a7 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -340,7 +340,7 @@ static int intel_dsb_dewake_scanline(const struct
> intel_crtc_state *crtc_state)
> }
>
> static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
> - unsigned int dewake_scanline)
> + int dewake_scanline)
> {
> struct intel_crtc *crtc = dsb->crtc;
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> --
> 2.25.1
>
[Intel-gfx] [PATCH 3/4] drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
Atm the allocated MST PBN value is calculated from the TU size (number
of allocated MTP slots) as
PBN = TU * pbn_div
pbn_div being the link BW for each MTP slot. For DP 1.4 link rates this
worked, as pbn_div there is guraranteed to be an integer number, however
on UHBR this isn't the case. To get a PBN, TU pair where TU is a
properly rounded-up value covering all the BW corresponding to PBN,
calculate first PBN and from PBN the TU value.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b943dbf394a22..a32ab0b4fc9d7 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -170,6 +170,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
struct intel_link_m_n remote_m_n;
+ int alloc_tu;
int link_bpp;
drm_dbg_kms(>drm, "Trying bpp %d\n", bpp);
@@ -200,9 +201,14 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
* crtc_state->dp_m_n.tu), provided that the driver doesn't
* enable SSC on the corresponding link.
*/
+ crtc_state->pbn =
DIV_ROUND_UP_ULL(mul_u32_u32(mst_state->pbn_div * 64,
+
remote_m_n.data_m),
+ remote_m_n.data_n);
+
+ alloc_tu = DIV_ROUND_UP_ULL(crtc_state->pbn,
mst_state->pbn_div);
+ drm_WARN_ON(>drm, alloc_tu < remote_m_n.tu);
drm_WARN_ON(>drm, remote_m_n.tu < crtc_state->dp_m_n.tu);
- crtc_state->dp_m_n.tu = remote_m_n.tu;
- crtc_state->pbn = remote_m_n.tu * mst_state->pbn_div;
+ crtc_state->dp_m_n.tu = alloc_tu;
slots = drm_dp_atomic_find_time_slots(state, _dp->mst_mgr,
connector->port,
--
2.39.2
[Intel-gfx] [PATCH 4/4] drm/dp_mst: Fix PBN divider calculation for UHBR rates
The current way of calculating the pbn_div value, the link BW per each
MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
rates calculating with the correct channel coding efficiency based on
the link rate.
On UHBR the resulting pbn_div value is not an integer (vs. DP 1.4 where
the value is always an integer), so ideally a scaled value containing
the fractional part should be returned, so that the PBN -> MTP slot
count (aka TU size) conversion can be done with less error. For now
return a rounded-down value - which can result in +1 excess MTP slot
getting allocated on UHBR links.
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Imre Deak
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 15 +--
include/drm/display/drm_dp_helper.h | 13 +
2 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 4d72c9a32026e..940a9fc0d0244 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3582,12 +3582,23 @@ static int drm_dp_send_up_ack_reply(struct
drm_dp_mst_topology_mgr *mgr,
int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
int link_rate, int link_lane_count)
{
+ int ret;
+
if (link_rate == 0 || link_lane_count == 0)
drm_dbg_kms(mgr->dev, "invalid link rate/lane count: (%d /
%d)\n",
link_rate, link_lane_count);
- /* See DP v2.0 2.6.4.2,
VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
- return link_rate * link_lane_count / 54000;
+ /* See DP v2.0 2.6.4.2, 2.7.6.3
VCPayload_Bandwidth_for_OneTimeSlotPer_MTP_Allocation */
+ /*
+* TODO: Return the value with a higher precision, allowing a better
+* slots per MTP allocation granularity. With the current returned
+* value +1 slot/MTP can get allocated on UHBR links.
+*/
+ ret = mul_u32_u32(link_rate * link_lane_count,
+
drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate))) /
+ (100ULL * 8 * 5400);
+
+ return ret;
}
EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
diff --git a/include/drm/display/drm_dp_helper.h
b/include/drm/display/drm_dp_helper.h
index caee29d28463c..18ff6af0b5a31 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -251,6 +251,19 @@ drm_edp_backlight_supported(const u8
edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])
return !!(edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP);
}
+/**
+ * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
+ * @link_rate: link rate in 10kbits/s units
+ *
+ * Determine if the provided link rate is an UHBR rate.
+ *
+ * Returns: %True if @link_rate is an UHBR rate.
+ */
+static inline bool drm_dp_is_uhbr_rate(int link_rate)
+{
+ return link_rate >= 100;
+}
+
/*
* DisplayPort AUX channel
*/
--
2.39.2
[Intel-gfx] [PATCH 1/4] drm/i915/dp: Account for channel coding efficiency on UHBR links
Apply the correct BW allocation overhead and channel coding efficiency
on UHBR link rates, similarly to DP1.4 link rates.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3effafcbb411a..24aebdb715e7d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2398,16 +2398,6 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead,
int ch_coding_efficiency =
drm_dp_bw_channel_coding_efficiency(is_uhbr);
- /*
-* TODO: adjust for actual UHBR channel coding efficiency and BW
-* overhead.
-*/
- if (is_uhbr) {
- *data_m = pixel_data_rate;
- *data_n = link_data_rate * 8 / 10;
- return;
- }
-
*data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead),
100);
*data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate,
ch_coding_efficiency),
--
2.39.2
[Intel-gfx] [PATCH 2/4] drm/i915/dp: Fix UHBR link M/N values
The link M/N ratio is the data rate / link symbol clock rate, fix things
up accordingly. On DP 1.4 this ratio was correct as the link symbol clock
rate in that case matched the link data rate (in bytes/sec units, the
symbol size being 8 bits), however it wasn't correct for UHBR rates
where the symbol size is 32 bits.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 16 -
drivers/gpu/drm/i915/display/intel_dp.c | 24
drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
3 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 24aebdb715e7d..c059eb0170a5b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2411,6 +2411,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int nlanes,
struct intel_link_m_n *m_n)
{
u32 data_clock = bits_per_pixel * pixel_clock;
+ u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
u32 data_m;
u32 data_n;
@@ -2431,7 +2432,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int nlanes,
0x800);
compute_m_n(_n->link_m, _n->link_n,
- pixel_clock, link_clock,
+ pixel_clock, link_symbol_clock,
0x8);
}
@@ -3943,20 +3944,23 @@ int intel_dotclock_calculate(int link_freq,
const struct intel_link_m_n *m_n)
{
/*
-* The calculation for the data clock is:
+* The calculation for the data clock -> pixel clock is:
* pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
* But we want to avoid losing precison if possible, so:
* pixel_clock = ((m * link_clock * nr_lanes)/(n*bpp))
*
-* and the link clock is simpler:
-* link_clock = (m * link_clock) / n
+* and for link freq (10kbs units) -> pixel clock it is:
+* link_symbol_clock = link_freq * 10 / link_symbol_size
+* pixel_clock = (m * link_symbol_clock) / n
+*or for more precision:
+* pixel_clock = (m * link_freq * 10) / (n * link_symbol_size)
*/
if (!m_n->link_n)
return 0;
- return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq),
- m_n->link_n);
+ return DIV_ROUND_UP_ULL(mul_u32_u32(m_n->link_m, link_freq * 10),
+ m_n->link_n *
intel_dp_link_symbol_size(link_freq));
}
int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index f662d1ce5f72c..80e1e887432fa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -132,6 +132,30 @@ bool intel_dp_is_uhbr(const struct intel_crtc_state
*crtc_state)
return intel_dp_is_uhbr_rate(crtc_state->port_clock);
}
+/**
+ * intel_dp_link_symbol_size - get the link symbol size for a given link rate
+ * @rate: link rate in 10kbit/s units
+ *
+ * Returns the link symbol size in bits/symbol units depending on the link
+ * rate -> channel coding.
+ */
+int intel_dp_link_symbol_size(int rate)
+{
+ return intel_dp_is_uhbr_rate(rate) ? 32 : 10;
+}
+
+/**
+ * intel_dp_link_symbol_clock - convert link rate to link symbol clock
+ * @rate: link rate in 10kbit/s units
+ *
+ * Returns the link symbol clock frequency in kHz units depending on the
+ * link rate and channel coding.
+ */
+int intel_dp_link_symbol_clock(int rate)
+{
+ return DIV_ROUND_CLOSEST(rate * 10, intel_dp_link_symbol_size(rate));
+}
+
static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp)
{
intel_dp->sink_rates[0] = 162000;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
b/drivers/gpu/drm/i915/display/intel_dp.h
index e80da67554196..64dbf8f192708 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -82,6 +82,8 @@ bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
bool intel_dp_is_edp(struct intel_dp *intel_dp);
bool intel_dp_is_uhbr_rate(int rate);
bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
+int intel_dp_link_symbol_size(int rate);
+int intel_dp_link_symbol_clock(int rate);
bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
bool long_hpd);
--
2.39.2
[Intel-gfx] ✓ Fi.CI.BAT: success for Fuse submount_lookup needs to be initialized
== Series Details ==
Series: Fuse submount_lookup needs to be initialized
URL : https://patchwork.freedesktop.org/series/126336/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13869 -> Patchwork_126336v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126336v1/index.html
Participating hosts (35 -> 32)
--
Missing(3): fi-hsw-4770 bat-kbl-2 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_126336v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][1] ([i915#1845] / [i915#9197])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126336v1/bat-dg2-11/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html
Possible fixes
* igt@i915_selftest@live@mman:
- bat-dg2-9: [DMESG-WARN][2] -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/bat-dg2-9/igt@i915_selftest@l...@mman.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126336v1/bat-dg2-9/igt@i915_selftest@l...@mman.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][4] ([i915#8668]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126336v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
Build changes
-
* Linux: CI_DRM_13869 -> Patchwork_126336v1
CI-20190529: 20190529
CI_DRM_13869: 3d1e36691e73b3946b4a9ca8132a34f0319ff984 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7584: 30e6ded90039edde8aa6c435001f8d63159356bb @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_126336v1: 3d1e36691e73b3946b4a9ca8132a34f0319ff984 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
d0a74b2b695e fuse: share lookup state between submount and its parent
9f62ff284751 fuse: ensure submount_lookup is initialized on alloc
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126336v1/index.html
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fuse submount_lookup needs to be initialized
== Series Details == Series: Fuse submount_lookup needs to be initialized URL : https://patchwork.freedesktop.org/series/126336/ State : warning == Summary == Error: dim checkpatch failed 919b794dcf31 fuse: ensure submount_lookup is initialized on alloc 75bb4ac3057d fuse: share lookup state between submount and its parent -:41: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line #41: FILE: fs/fuse/fuse_i.h:72: +* and kernel */ -:72: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*sl)...) over kzalloc(sizeof(struct fuse_submount_lookup)...) #72: FILE: fs/fuse/inode.c:75: + sl = kzalloc(sizeof(struct fuse_submount_lookup), GFP_KERNEL_ACCOUNT); total: 0 errors, 1 warnings, 1 checks, 163 lines checked
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: eliminate warnings
== Series Details == Series: drm/i915: eliminate warnings URL : https://patchwork.freedesktop.org/series/126338/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13869 -> Patchwork_126338v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126338v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126338v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/index.html Participating hosts (35 -> 34) -- Additional (1): bat-dg1-5 Missing(2): fi-snb-2520m fi-pnv-d510 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126338v1: ### IGT changes ### Possible regressions * igt@i915_selftest@live@gt_heartbeat: - fi-apl-guc: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html * igt@vgem_basic@unload: - fi-hsw-4770:[PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/fi-hsw-4770/igt@vgem_ba...@unload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/fi-hsw-4770/igt@vgem_ba...@unload.html Known issues Here are the changes found in Patchwork_126338v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][5] ([i915#4083]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][7] ([i915#4079]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s2idle-without-i915: - fi-tgl-1115g4: [PASS][9] -> [ABORT][10] ([i915#8213]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/fi-tgl-1115g4/igt@i915_susp...@basic-s2idle-without-i915.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/fi-tgl-1115g4/igt@i915_susp...@basic-s2idle-without-i915.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#4212]) +7 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#4215]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-5: NOTRUN -> [SKIP][13] ([i915#4103] / [i915#4213]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-5: NOTRUN -> [SKIP][14] ([i915#3555] / [i915#3840]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-5: NOTRUN -> [SKIP][15] ([fdo#109285]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-5: NOTRUN -> [SKIP][16] ([i915#433]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_psr@sprite_plane_onoff: - bat-dg1-5: NOTRUN -> [SKIP][17] ([i915#1072] / [i915#4078]) +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126338v1/bat-dg1-5/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg1-5: NOTRUN -> [SKIP][18] ([i915#3555]) [18]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/ttm: replace busy placement with flags v3
== Series Details == Series: drm/ttm: replace busy placement with flags v3 URL : https://patchwork.freedesktop.org/series/126330/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13869 -> Patchwork_126330v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126330v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126330v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/index.html Participating hosts (35 -> 35) -- Additional (1): bat-dg1-5 Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126330v1: ### IGT changes ### Possible regressions * igt@kms_flip@basic-flip-vs-modeset@b-dp1: - bat-adlp-9: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/bat-adlp-9/igt@kms_flip@basic-flip-vs-mode...@b-dp1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-adlp-9/igt@kms_flip@basic-flip-vs-mode...@b-dp1.html Known issues Here are the changes found in Patchwork_126330v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][3] ([i915#4083]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#6621]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@late_gt_pm: - fi-hsw-4770:NOTRUN -> [INCOMPLETE][7] ([i915#9527]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/fi-hsw-4770/igt@i915_selftest@live@late_gt_pm.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4212]) +7 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4215]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#4103] / [i915#4213]) +1 other test skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#3555] / [i915#3840]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_...@dsc-basic.html * igt@kms_flip@basic-flip-vs-modeset@c-dp1: - bat-adlp-9: [PASS][12] -> [FAIL][13] ([i915#6121]) +1 other test fail [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/bat-adlp-9/igt@kms_flip@basic-flip-vs-mode...@c-dp1.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-adlp-9/igt@kms_flip@basic-flip-vs-mode...@c-dp1.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-5: NOTRUN -> [SKIP][14] ([fdo#109285]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-5: NOTRUN -> [SKIP][15] ([i915#433]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_psr@sprite_plane_onoff: - bat-dg1-5: NOTRUN -> [SKIP][16] ([i915#1072] / [i915#4078]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg1-5: NOTRUN -> [SKIP][17] ([i915#3555]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126330v1/bat-dg1-5/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-read:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/ttm: replace busy placement with flags v3
== Series Details == Series: drm/ttm: replace busy placement with flags v3 URL : https://patchwork.freedesktop.org/series/126330/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/ttm: replace busy placement with flags v3
== Series Details == Series: drm/ttm: replace busy placement with flags v3 URL : https://patchwork.freedesktop.org/series/126330/ State : warning == Summary == Error: dim checkpatch failed ecd11ffa98ca drm/ttm: replace busy placement with flags v3 -:296: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int *' to bare use of 'unsigned *' #296: FILE: drivers/gpu/drm/nouveau/nouveau_bo.c:434: + unsigned *n = >placement.num_placement; -:628: CHECK:LINE_SPACING: Please don't use multiple blank lines #628: FILE: drivers/gpu/drm/vmwgfx/vmwgfx_bo.c:182: + -:831: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Somalapuram Amaranath ' total: 1 errors, 1 warnings, 1 checks, 698 lines checked
Re: [Intel-gfx] [PATCH v4 3/3] drm/i915/gt: Timeout when waiting for idle in suspending
On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote: > On 04/10/2023 18:59, Teres Alexis, Alan Previn wrote: > > On Thu, 2023-09-28 at 13:46 +0100, Tvrtko Ursulin wrote: > > > On 27/09/2023 17:36, Teres Alexis, Alan Previn wrote: alan:snip > > > It is not possible to wait for lost G2H in something like > > > intel_uc_suspend() and simply declare "bad things happened" if it times > > > out there, and forcibly clean it all up? (Which would include releasing > > > all the abandoned pm refs, so this patch wouldn't be needed.) > > > > > alan: I'm not sure if intel_uc_suspend should be held up by gt-level wakeref > > check unless huc/guc/gsc-uc are the only ones ever taking a gt wakeref. > > > > As we already know, what we do know from a uc-perspective: > > - ensure the outstanding guc related workers is flushed which we didnt > > before > > (addressed by patch #1). > > - any further late H2G-SchedDisable is not leaking wakerefs when calling H2G > > and not realizing it failed (addressed by patch #2). > > - (we already), "forcibly clean it all up" at the end of the > > intel_uc_suspend > > when we do the guc reset and cleanup all guc-ids. (pre-existing upstream > > code) > > - we previously didnt have a coherrent guarantee that "this is the end" > > i.e. no > > more new request after intel_uc_suspend. I mean by code logic, we thought > > we did > > (thats why intel_uc_suspend ends wth a guc reset), but we now know > > otherwise. > > So we that fix by adding the additional rcu_barrier (also part of patch #2). > > It is not clear to me from the above if that includes cleaning up the > outstanding CT replies or no. But anyway.. alan: Apologies, i should have made it clearer by citing the actual function name calling out the steps of interest: So if you look at the function "intel_gt_suspend_late", it calls "intel_uc_suspend" which in turn calls "intel_guc_suspend" which does a soft reset onto guc firmware - so after that we can assume all outstanding G2Hs are done. Going back up the stack, intel_gt_suspend_late finally calls gt_sanitize which calls "intel_uc_reset_prepare" which calls "intel_guc_submission_reset_prepare" which calls "scrub_guc_desc_for_outstanding_g2h" which does what we are looking for for all types of outstanding G2H. As per prior review comments, besides closing the race condition, we were missing an rcu_barrier (which caused new requests to come in way late). So we have resolved both in Patch #2. > > That said, patch-3 is NOT fixing a bug in guc -its about "if we ever have > > a future racy gt-wakeref late-leak somewhere - no matter which subsystem > > took it (guc is not the only subsystem taking gt wakerefs), we at > > least don't hang forever in this code. Ofc, based on that, even without > > patch-3 i am confident the issue is resolved anyway. > > So we could just drop patch-3 is you prefer? > > .. given this it does sound to me that if you are confident patch 3 > isn't fixing anything today that it should be dropped. alan: I won't say its NOT fixing anything - i am saying it's not fixing this specific bug where we have the outstanding G2H from a context destruction operation that got dropped. I am okay with dropping this patch in the next rev but shall post a separate stand alone version of Patch3 - because I believe all other i915 subsystems that take runtime-pm's DO NOT wait forever when entering suspend - but GT is doing this. This means if there ever was a bug introduced, it would require serial port or ramoops collection to debug. So i think such a patch, despite not fixing this specific bug will be very helpful for debuggability of future issues. After all, its better to fail our suspend when we have a bug rather than to hang the kernel forever.
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Remove dead code around intel_atomic_helper->free_list (rev3)
== Series Details == Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list (rev3) URL : https://patchwork.freedesktop.org/series/126250/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13869 -> Patchwork_126250v3 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126250v3 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126250v3, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/index.html Participating hosts (35 -> 33) -- Additional (1): bat-dg1-5 Missing(3): bat-mtlp-8 fi-snb-2520m fi-pnv-d510 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126250v3: ### IGT changes ### Possible regressions * igt@i915_selftest@live@gtt: - fi-hsw-4770:NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/fi-hsw-4770/igt@i915_selftest@l...@gtt.html Known issues Here are the changes found in Patchwork_126250v3 that come from known issues: ### CI changes ### Issues hit * boot: - bat-adlp-11:[PASS][2] -> [FAIL][3] ([i915#8293]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13869/bat-adlp-11/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-adlp-11/boot.html ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][5] ([i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4079]) +1 other test skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-5: NOTRUN -> [SKIP][7] ([i915#6621]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4212]) +7 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4215]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#4103] / [i915#4213]) +1 other test skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#3555] / [i915#3840]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-5: NOTRUN -> [SKIP][12] ([fdo#109285]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-5: NOTRUN -> [SKIP][13] ([i915#433]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@nonblocking-crc: - bat-dg2-11: NOTRUN -> [SKIP][14] ([i915#1845] / [i915#9197]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc.html * igt@kms_psr@sprite_plane_onoff: - bat-dg1-5: NOTRUN -> [SKIP][15] ([i915#1072] / [i915#4078]) +3 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg1-5: NOTRUN -> [SKIP][16] ([i915#3555]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v3/bat-dg1-5/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-read: - bat-dg1-5: NOTRUN -> [SKIP][17] ([i915#3708]) +3 other tests skip [17]:
Re: [Intel-gfx] [PATCH v2] Remove custom dumb_map_offset implementations in i915 driver
On Sat, 11 Nov 2023, Dipam Turkar wrote:
> Making i915 use drm_gem_create_mmap_offset() instead of its custom
> implementations for associating GEM object with a fake offset.
It would probably help a lot if your commit messages explained what you
are trying to achieve and, especially, why. This only describes the
patch in English.
BR,
Jani.
>
> Signed-off-by: Dipam Turkar
> ---
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 -
> drivers/gpu/drm/i915/gem/i915_gem_mman.h | 4
> drivers/gpu/drm/i915/i915_driver.c | 3 ++-
> 3 files changed, 2 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index aa4d842d4c5a..71d621a1f249 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -771,27 +771,6 @@ __assign_mmap_offset_handle(struct drm_file *file,
> return err;
> }
>
> -int
> -i915_gem_dumb_mmap_offset(struct drm_file *file,
> - struct drm_device *dev,
> - u32 handle,
> - u64 *offset)
> -{
> - struct drm_i915_private *i915 = to_i915(dev);
> - enum i915_mmap_type mmap_type;
> -
> - if (HAS_LMEM(to_i915(dev)))
> - mmap_type = I915_MMAP_TYPE_FIXED;
> - else if (pat_enabled())
> - mmap_type = I915_MMAP_TYPE_WC;
> - else if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
> - return -ENODEV;
> - else
> - mmap_type = I915_MMAP_TYPE_GTT;
> -
> - return __assign_mmap_offset_handle(file, handle, mmap_type, offset);
> -}
> -
> /**
> * i915_gem_mmap_offset_ioctl - prepare an object for GTT mmap'ing
> * @dev: DRM device
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> index 196417fd0f5c..253435795caf 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> @@ -20,10 +20,6 @@ struct mutex;
> int i915_gem_mmap_gtt_version(void);
> int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma);
>
> -int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
> - struct drm_device *dev,
> - u32 handle, u64 *offset);
> -
> void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
> void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> index d50347e5773a..48d7e53c49d6 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -42,6 +42,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -1826,7 +1827,7 @@ static const struct drm_driver i915_drm_driver = {
> .gem_prime_import = i915_gem_prime_import,
>
> .dumb_create = i915_gem_dumb_create,
> - .dumb_map_offset = i915_gem_dumb_mmap_offset,
> + .dumb_map_offset = drm_gem_dumb_map_offset,
>
> .ioctls = i915_ioctls,
> .num_ioctls = ARRAY_SIZE(i915_ioctls),
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 15/20] drivers/gpu/drm/i915/display: remove I2C_CLASS_DDC support
On Mon, 13 Nov 2023, Heiner Kallweit wrote:
> On 13.11.2023 13:17, Jani Nikula wrote:
>> On Mon, 13 Nov 2023, Heiner Kallweit wrote:
>>> After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in
>>> olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC.
>>> Class-based device auto-detection is a legacy mechanism and shouldn't
>>> be used in new code. So we can remove this class completely now.
>>
>> So this is copy-pasted to all commits and the cover letter, but please
>> do explain why there are no functional changes here (or are there?),
>> without me having to go through the i2c stack and try to find the
>> commits alluded to in "After removal of the legacy ...".
>>
> Legacy eeprom driver was marked deprecated 4 yrs ago with:
> 3079b54aa9a0 ("eeprom: Warn that the driver is deprecated")
> Now it has been removed with:
> 0113a99b8a75 ("eeprom: Remove deprecated legacy eeprom driver")
>
> Declaration of I2C_CLASS_DDC support is a no-op now, so there's
> no functional change in this patch.
>
> If loaded manually, the legacy eeprom driver exposed the DDC EEPROM
> to userspace. If this functionality is needed, then now the DDC
> EEPROM has to be explicitly instantiated using at24.
>
> See also:
> https://docs.kernel.org/i2c/instantiating-devices.html
I'll take your word for it. Though none of the documentation I can find
say that setting the class is legacy or deprecated or should be
avoided. *shrug*.
Acked-by: Jani Nikula
>
>
>> What does this mean?
>>
>>
>> BR,
>> Jani.
>>
> Heiner
>
>>
>>>
>>> Preferably this series should be applied via the i2c tree.
>>>
>>> Signed-off-by: Heiner Kallweit
>>>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_gmbus.c |1 -
>>> drivers/gpu/drm/i915/display/intel_sdvo.c |1 -
>>> 2 files changed, 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
>>> b/drivers/gpu/drm/i915/display/intel_gmbus.c
>>> index 40d7b6f3f..e9e4dcf34 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
>>> @@ -899,7 +899,6 @@ int intel_gmbus_setup(struct drm_i915_private *i915)
>>> }
>>>
>>> bus->adapter.owner = THIS_MODULE;
>>> - bus->adapter.class = I2C_CLASS_DDC;
>>> snprintf(bus->adapter.name,
>>> sizeof(bus->adapter.name),
>>> "i915 gmbus %s", gmbus_pin->name);
>>> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
>>> b/drivers/gpu/drm/i915/display/intel_sdvo.c
>>> index a636f42ce..5e64d1baf 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
>>> @@ -3311,7 +3311,6 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
>>> ddc->ddc_bus = ddc_bus;
>>>
>>> ddc->ddc.owner = THIS_MODULE;
>>> - ddc->ddc.class = I2C_CLASS_DDC;
>>> snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d",
>>> port_name(sdvo->base.port), ddc_bus);
>>> ddc->ddc.dev.parent = >dev;
>>>
>>
>
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 0/4] drm/i915: Fix LUT rounding
On Fri, 13 Oct 2023, Ville Syrjala wrote: > From: Ville Syrjälä > > The current LUT rounding is generating weird results. Adjust > it to follow the OpenGL int<->float conversion rules. Reviewed-by: Jani Nikula > > Ville Syrjälä (4): > drm: Fix color LUT rounding > drm/i915: Adjust LUT rounding rules > drm/i915: s/clamp()/min()/ in i965_lut_11p6_max_pack() > drm/i915: Fix glk+ degamma LUT conversions > > drivers/gpu/drm/i915/display/intel_color.c | 70 +++--- > include/drm/drm_color_mgmt.h | 18 +++--- > 2 files changed, 42 insertions(+), 46 deletions(-) -- Jani Nikula, Intel
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: Remove dead code around intel_atomic_helper->free_list (rev3)
== Series Details == Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list (rev3) URL : https://patchwork.freedesktop.org/series/126250/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH] drm/i915/dp: Tune down FEC detection timeout error message
On Mon, 13 Nov 2023, Imre Deak wrote: > At least a Realtek DP branch device with the > > OUI 00-e0-4c dev-ID Dp1.4 HW-rev 1.0 SW-rev 131.1 > > device identification doesn't report detecting the FEC decoding start > symbol. Tune down the corresponding error to a debug message. > > Signed-off-by: Imre Deak Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 0712a5200ad35..f70af660dfcfa 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -2257,8 +2257,8 @@ static void wait_for_fec_detected(struct drm_dp_aux > *aux, bool enabled) > return; > > if (err == -ETIMEDOUT) > - drm_err(>drm, "Timeout waiting for FEC %s to get > detected\n", > - str_enabled_disabled(enabled)); > + drm_dbg_kms(>drm, "Timeout waiting for FEC %s to get > detected\n", > + str_enabled_disabled(enabled)); > else > drm_dbg_kms(>drm, "FEC detected status read error: %d\n", > status); > } -- Jani Nikula, Intel
[Intel-gfx] [PATCH 4/4] drm/i915: move sideband regs to vlv_sideband_reg.h
Move the VLV/CHV sideband doorbell and data/addr MMIO registers as well as the DPIO register definitions to vlv_sideband_reg.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_reg.h | 374 --- drivers/gpu/drm/i915/vlv_sideband_reg.h | 377 2 files changed, 377 insertions(+), 374 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 27dc903f0553..cd3974127b66 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -158,386 +158,12 @@ #define DEBUG_RESET_RENDER(1 << 8) #define DEBUG_RESET_DISPLAY (1 << 9) -/* - * IOSF sideband - */ -#define VLV_IOSF_DOORBELL_REQ _MMIO(VLV_DISPLAY_BASE + 0x2100) -#define IOSF_DEVFN_SHIFT 24 -#define IOSF_OPCODE_SHIFT16 -#define IOSF_PORT_SHIFT 8 -#define IOSF_BYTE_ENABLES_SHIFT 4 -#define IOSF_BAR_SHIFT 1 -#define IOSF_SB_BUSY (1 << 0) -#define IOSF_PORT_BUNIT 0x03 -#define IOSF_PORT_PUNIT 0x04 -#define IOSF_PORT_NC 0x11 -#define IOSF_PORT_DPIO 0x12 -#define IOSF_PORT_GPIO_NC0x13 -#define IOSF_PORT_CCK0x14 -#define IOSF_PORT_DPIO_2 0x1a -#define IOSF_PORT_FLISDSI0x1b -#define IOSF_PORT_GPIO_SC0x48 -#define IOSF_PORT_GPIO_SUS 0xa8 -#define IOSF_PORT_CCU0xa9 -#define CHV_IOSF_PORT_GPIO_N 0x13 -#define CHV_IOSF_PORT_GPIO_SE0x48 -#define CHV_IOSF_PORT_GPIO_E 0xa8 -#define CHV_IOSF_PORT_GPIO_SW0xb2 -#define VLV_IOSF_DATA _MMIO(VLV_DISPLAY_BASE + 0x2104) -#define VLV_IOSF_ADDR _MMIO(VLV_DISPLAY_BASE + 0x2108) - -/* DPIO registers */ -#define DPIO_DEVFN 0 - #define DPIO_CTL _MMIO(VLV_DISPLAY_BASE + 0x2110) #define DPIO_MODSEL1 (1 << 3) /* if ref clk b == 27 */ #define DPIO_MODSEL0 (1 << 2) /* if ref clk a == 27 */ #define DPIO_SFR_BYPASS (1 << 1) #define DPIO_CMNRST (1 << 0) -/* - * Per pipe/PLL DPIO regs - */ -#define _VLV_PLL_DW3_CH0 0x800c -#define DPIO_POST_DIV_SHIFT (28) /* 3 bits */ -#define DPIO_POST_DIV_DAC0 -#define DPIO_POST_DIV_HDMIDP 1 /* DAC 225-400M rate */ -#define DPIO_POST_DIV_LVDS1 2 -#define DPIO_POST_DIV_LVDS2 3 -#define DPIO_K_SHIFT (24) /* 4 bits */ -#define DPIO_P1_SHIFT(21) /* 3 bits */ -#define DPIO_P2_SHIFT(16) /* 5 bits */ -#define DPIO_N_SHIFT (12) /* 4 bits */ -#define DPIO_ENABLE_CALIBRATION (1 << 11) -#define DPIO_M1DIV_SHIFT (8) /* 3 bits */ -#define DPIO_M2DIV_MASK 0xff -#define _VLV_PLL_DW3_CH1 0x802c -#define VLV_PLL_DW3(ch) _PIPE(ch, _VLV_PLL_DW3_CH0, _VLV_PLL_DW3_CH1) - -#define _VLV_PLL_DW5_CH0 0x8014 -#define DPIO_REFSEL_OVERRIDE 27 -#define DPIO_PLL_MODESEL_SHIFT 24 /* 3 bits */ -#define DPIO_BIAS_CURRENT_CTL_SHIFT 21 /* 3 bits, always 0x7 */ -#define DPIO_PLL_REFCLK_SEL_SHIFT16 /* 2 bits */ -#define DPIO_PLL_REFCLK_SEL_MASK 3 -#define DPIO_DRIVER_CTL_SHIFT12 /* always set to 0x8 */ -#define DPIO_CLK_BIAS_CTL_SHIFT 8 /* always set to 0x5 */ -#define _VLV_PLL_DW5_CH1 0x8034 -#define VLV_PLL_DW5(ch) _PIPE(ch, _VLV_PLL_DW5_CH0, _VLV_PLL_DW5_CH1) - -#define _VLV_PLL_DW7_CH0 0x801c -#define _VLV_PLL_DW7_CH1 0x803c -#define VLV_PLL_DW7(ch) _PIPE(ch, _VLV_PLL_DW7_CH0, _VLV_PLL_DW7_CH1) - -#define _VLV_PLL_DW8_CH0 0x8040 -#define _VLV_PLL_DW8_CH1 0x8060 -#define VLV_PLL_DW8(ch) _PIPE(ch, _VLV_PLL_DW8_CH0, _VLV_PLL_DW8_CH1) - -#define VLV_PLL_DW9_BCAST 0xc044 -#define _VLV_PLL_DW9_CH0 0x8044 -#define _VLV_PLL_DW9_CH1 0x8064 -#define VLV_PLL_DW9(ch) _PIPE(ch, _VLV_PLL_DW9_CH0, _VLV_PLL_DW9_CH1) - -#define _VLV_PLL_DW10_CH0 0x8048 -#define _VLV_PLL_DW10_CH1 0x8068 -#define VLV_PLL_DW10(ch) _PIPE(ch, _VLV_PLL_DW10_CH0, _VLV_PLL_DW10_CH1) - -#define _VLV_PLL_DW11_CH0 0x804c -#define _VLV_PLL_DW11_CH1 0x806c -#define VLV_PLL_DW11(ch) _PIPE(ch, _VLV_PLL_DW11_CH0, _VLV_PLL_DW11_CH1) - -/* Spec for ref block start counts at DW10 */ -#define VLV_REF_DW13 0x80ac - -#define VLV_CMN_DW00x8100 - -/* - * Per DDI channel DPIO regs - */ - -#define _VLV_PCS_DW0_CH0
[Intel-gfx] [PATCH 3/4] drm/i915: convert vlv_dpio_read()/write() from pipe to phy
vlv_dpio_read() and vlv_dpio_write() really operate on the phy, not
pipe. Passing the pipe instead of the phy as parameter is supposed to be
a convenience, but when the caller has the phy, it becomes an
inconvenience. See e.g. chv_dpio_cmn_power_well_enable() and
assert_chv_phy_powergate().
Figure out the phy in the callers, and pass phy to the dpio functions.
Signed-off-by: Jani Nikula
---
.../i915/display/intel_display_power_well.c | 23 +--
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 160 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 106 ++--
drivers/gpu/drm/i915/vlv_sideband.c | 10 +-
drivers/gpu/drm/i915/vlv_sideband.h | 6 +-
5 files changed, 152 insertions(+), 153 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 07d650050099..47cd6bb04366 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -1400,20 +1400,16 @@ static void chv_dpio_cmn_power_well_enable(struct
drm_i915_private *dev_priv,
{
enum i915_power_well_id id = i915_power_well_instance(power_well)->id;
enum dpio_phy phy;
- enum pipe pipe;
u32 tmp;
drm_WARN_ON_ONCE(_priv->drm,
id != VLV_DISP_PW_DPIO_CMN_BC &&
id != CHV_DISP_PW_DPIO_CMN_D);
- if (id == VLV_DISP_PW_DPIO_CMN_BC) {
- pipe = PIPE_A;
+ if (id == VLV_DISP_PW_DPIO_CMN_BC)
phy = DPIO_PHY0;
- } else {
- pipe = PIPE_C;
+ else
phy = DPIO_PHY1;
- }
/* since ref/cri clock was enabled */
udelay(1); /* >10ns for cmnreset, >0ns for sidereset */
@@ -1428,24 +1424,24 @@ static void chv_dpio_cmn_power_well_enable(struct
drm_i915_private *dev_priv,
vlv_dpio_get(dev_priv);
/* Enable dynamic power down */
- tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW28);
+ tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW28);
tmp |= DPIO_DYNPWRDOWNEN_CH0 | DPIO_CL1POWERDOWNEN |
DPIO_SUS_CLK_CONFIG_GATE_CLKREQ;
- vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW28, tmp);
+ vlv_dpio_write(dev_priv, phy, CHV_CMN_DW28, tmp);
if (id == VLV_DISP_PW_DPIO_CMN_BC) {
- tmp = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW6_CH1);
+ tmp = vlv_dpio_read(dev_priv, phy, _CHV_CMN_DW6_CH1);
tmp |= DPIO_DYNPWRDOWNEN_CH1;
- vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW6_CH1, tmp);
+ vlv_dpio_write(dev_priv, phy, _CHV_CMN_DW6_CH1, tmp);
} else {
/*
* Force the non-existing CL2 off. BXT does this
* too, so maybe it saves some power even though
* CL2 doesn't exist?
*/
- tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30);
+ tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW30);
tmp |= DPIO_CL2_LDOFUSE_PWRENB;
- vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW30, tmp);
+ vlv_dpio_write(dev_priv, phy, CHV_CMN_DW30, tmp);
}
vlv_dpio_put(dev_priv);
@@ -1499,7 +1495,6 @@ static void chv_dpio_cmn_power_well_disable(struct
drm_i915_private *dev_priv,
static void assert_chv_phy_powergate(struct drm_i915_private *dev_priv, enum
dpio_phy phy,
enum dpio_channel ch, bool override,
unsigned int mask)
{
- enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C;
u32 reg, val, expected, actual;
/*
@@ -1518,7 +1513,7 @@ static void assert_chv_phy_powergate(struct
drm_i915_private *dev_priv, enum dpi
reg = _CHV_CMN_DW6_CH1;
vlv_dpio_get(dev_priv);
- val = vlv_dpio_read(dev_priv, pipe, reg);
+ val = vlv_dpio_read(dev_priv, phy, reg);
vlv_dpio_put(dev_priv);
/*
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index d6af46e33424..32886c0ec2cc 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -703,50 +703,50 @@ void chv_set_phy_signal_level(struct intel_encoder
*encoder,
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum dpio_channel ch = vlv_dig_port_to_channel(dig_port);
- enum pipe pipe = crtc->pipe;
+ enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);
u32 val;
int i;
vlv_dpio_get(dev_priv);
/* Clear calc init */
- val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));
+ val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW10(ch));
val &= ~(DPIO_PCS_SWING_CALC_TX0_TX2 | DPIO_PCS_SWING_CALC_TX1_TX3);
val &=
[Intel-gfx] [PATCH 2/4] drm/i915: add vlv_pipe_to_phy() helper to replace DPIO_PHY()
Add a helper with better typing and handing for bogus input, and better
in line with vlv_dig_port_to_channel(), vlv_dig_port_to_phy(), and
vlv_pipe_to_channel().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 14 ++
drivers/gpu/drm/i915/display/intel_dpio_phy.h | 5 +
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 2 --
drivers/gpu/drm/i915/vlv_sideband.c | 6 --
5 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index 62b93d097e44..d6af46e33424 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -666,6 +666,20 @@ enum dpio_phy vlv_dig_port_to_phy(struct
intel_digital_port *dig_port)
}
}
+enum dpio_phy vlv_pipe_to_phy(enum pipe pipe)
+{
+ switch (pipe) {
+ default:
+ MISSING_CASE(pipe);
+ fallthrough;
+ case PIPE_A:
+ case PIPE_B:
+ return DPIO_PHY0;
+ case PIPE_C:
+ return DPIO_PHY1;
+ }
+}
+
enum dpio_channel vlv_pipe_to_channel(enum pipe pipe)
{
switch (pipe) {
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.h
b/drivers/gpu/drm/i915/display/intel_dpio_phy.h
index 4d43dbbdf81c..9adc4e8c1738 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.h
@@ -44,6 +44,7 @@ u8 bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder
*encoder);
enum dpio_channel vlv_dig_port_to_channel(struct intel_digital_port *dig_port);
enum dpio_phy vlv_dig_port_to_phy(struct intel_digital_port *dig_port);
+enum dpio_phy vlv_pipe_to_phy(enum pipe pipe);
enum dpio_channel vlv_pipe_to_channel(enum pipe pipe);
void chv_set_phy_signal_level(struct intel_encoder *encoder,
@@ -116,6 +117,10 @@ static inline enum dpio_phy vlv_dig_port_to_phy(struct
intel_digital_port *dig_p
{
return DPIO_PHY0;
}
+static inline enum dpio_phy vlv_pipe_to_phy(enum pipe pipe)
+{
+ return DPIO_PHY0;
+}
static inline enum dpio_channel vlv_pipe_to_channel(enum pipe pipe)
{
return DPIO_CH0;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 73f0f1714b37..a8fa3a20990e 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -90,7 +90,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum pipe pipe = intel_dp->pps.pps_pipe;
bool pll_enabled, release_cl_override = false;
- enum dpio_phy phy = DPIO_PHY(pipe);
+ enum dpio_phy phy = vlv_pipe_to_phy(pipe);
enum dpio_channel ch = vlv_pipe_to_channel(pipe);
u32 DP;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 135e8d8dbdf0..27dc903f0553 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -195,8 +195,6 @@
#define DPIO_SFR_BYPASS (1 << 1)
#define DPIO_CMNRST (1 << 0)
-#define DPIO_PHY(pipe) ((pipe) >> 1)
-
/*
* Per pipe/PLL DPIO regs
*/
diff --git a/drivers/gpu/drm/i915/vlv_sideband.c
b/drivers/gpu/drm/i915/vlv_sideband.c
index b98dec3ad817..f7df55217845 100644
--- a/drivers/gpu/drm/i915/vlv_sideband.c
+++ b/drivers/gpu/drm/i915/vlv_sideband.c
@@ -229,7 +229,8 @@ static u32 vlv_dpio_phy_iosf_port(struct drm_i915_private
*i915, enum dpio_phy p
u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg)
{
- u32 port = vlv_dpio_phy_iosf_port(i915, DPIO_PHY(pipe));
+ enum dpio_phy phy = vlv_pipe_to_phy(pipe);
+ u32 port = vlv_dpio_phy_iosf_port(i915, phy);
u32 val = 0;
vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MRD_NP, reg, );
@@ -248,7 +249,8 @@ u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe
pipe, int reg)
void vlv_dpio_write(struct drm_i915_private *i915,
enum pipe pipe, int reg, u32 val)
{
- u32 port = vlv_dpio_phy_iosf_port(i915, DPIO_PHY(pipe));
+ enum dpio_phy phy = vlv_pipe_to_phy(pipe);
+ u32 port = vlv_dpio_phy_iosf_port(i915, phy);
vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MWR_NP, reg, );
}
--
2.39.2
[Intel-gfx] [PATCH 1/4] drm/i915: move *_crtc_clock_get() to intel_dpll.c
Considering what the functions do, intel_dpll.c is a more suitable
location, and lets us make some functions static while at it.
This also means intel_display.c no longer does any DPIO access.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 171 -
drivers/gpu/drm/i915/display/intel_display.h | 2 -
drivers/gpu/drm/i915/display/intel_dpll.c | 175 +-
drivers/gpu/drm/i915/display/intel_dpll.h | 9 +-
.../gpu/drm/i915/display/intel_pch_display.c | 1 +
5 files changed, 181 insertions(+), 177 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3effafcbb411..09056232483c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -73,7 +73,6 @@
#include "intel_dp.h"
#include "intel_dp_link_training.h"
#include "intel_dp_mst.h"
-#include "intel_dpio_phy.h"
#include "intel_dpll.h"
#include "intel_dpll_mgr.h"
#include "intel_dpt.h"
@@ -2859,67 +2858,6 @@ static void i9xx_get_pfit_config(struct intel_crtc_state
*crtc_state)
intel_de_read(dev_priv, PFIT_PGM_RATIOS);
}
-static void vlv_crtc_clock_get(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
-{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- enum pipe pipe = crtc->pipe;
- struct dpll clock;
- u32 mdiv;
- int refclk = 10;
-
- /* In case of DSI, DPLL will not be used */
- if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0)
- return;
-
- vlv_dpio_get(dev_priv);
- mdiv = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW3(pipe));
- vlv_dpio_put(dev_priv);
-
- clock.m1 = (mdiv >> DPIO_M1DIV_SHIFT) & 7;
- clock.m2 = mdiv & DPIO_M2DIV_MASK;
- clock.n = (mdiv >> DPIO_N_SHIFT) & 0xf;
- clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
- clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
-
- pipe_config->port_clock = vlv_calc_dpll_params(refclk, );
-}
-
-static void chv_crtc_clock_get(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
-{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- enum pipe pipe = crtc->pipe;
- enum dpio_channel port = vlv_pipe_to_channel(pipe);
- struct dpll clock;
- u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3;
- int refclk = 10;
-
- /* In case of DSI, DPLL will not be used */
- if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0)
- return;
-
- vlv_dpio_get(dev_priv);
- cmn_dw13 = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW13(port));
- pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port));
- pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port));
- pll_dw2 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW2(port));
- pll_dw3 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port));
- vlv_dpio_put(dev_priv);
-
- clock.m1 = (pll_dw1 & 0x7) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0;
- clock.m2 = (pll_dw0 & 0xff) << 22;
- if (pll_dw3 & DPIO_CHV_FRAC_DIV_EN)
- clock.m2 |= pll_dw2 & 0x3f;
- clock.n = (pll_dw1 >> DPIO_CHV_N_DIV_SHIFT) & 0xf;
- clock.p1 = (cmn_dw13 >> DPIO_CHV_P1_DIV_SHIFT) & 0x7;
- clock.p2 = (cmn_dw13 >> DPIO_CHV_P2_DIV_SHIFT) & 0x1f;
-
- pipe_config->port_clock = chv_calc_dpll_params(refclk, );
-}
-
static enum intel_output_format
bdw_get_pipe_misc_output_format(struct intel_crtc *crtc)
{
@@ -3840,115 +3778,6 @@ bool intel_crtc_get_pipe_config(struct intel_crtc_state
*crtc_state)
return true;
}
-static int i9xx_pll_refclk(struct drm_device *dev,
- const struct intel_crtc_state *pipe_config)
-{
- struct drm_i915_private *dev_priv = to_i915(dev);
- u32 dpll = pipe_config->dpll_hw_state.dpll;
-
- if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
- return dev_priv->display.vbt.lvds_ssc_freq;
- else if (HAS_PCH_SPLIT(dev_priv))
- return 12;
- else if (DISPLAY_VER(dev_priv) != 2)
- return 96000;
- else
- return 48000;
-}
-
-/* Returns the clock of the currently programmed mode of the given pipe. */
-void i9xx_crtc_clock_get(struct intel_crtc *crtc,
-struct intel_crtc_state *pipe_config)
-{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- u32 dpll = pipe_config->dpll_hw_state.dpll;
- u32 fp;
- struct dpll clock;
- int port_clock;
- int refclk = i9xx_pll_refclk(dev, pipe_config);
-
- if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
- fp = pipe_config->dpll_hw_state.fp0;
- else
-
Re: [Intel-gfx] [PATCH] drm/i915/gsc: Assign a uabi class number to the GSC CS
On 13/11/2023 15:51, Daniele Ceraolo Spurio wrote:
On 11/10/2023 4:00 AM, Tvrtko Ursulin wrote:
On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote:
The GSC CS is not exposed to the user, so we skipped assigning a uabi
class number for it. However, the trace logs use the uabi class and
instance to identify the engine, so leaving uabi class unset makes the
GSC CS show up as the RCS in those logs.
Given that the engine is not exposed to the user, we can't add a new
case in the uabi enum, so we insted internally define a kernel
reserved class using the next free number.
Fixes: 194babe26bdc ("drm/i915/mtl: don't expose GSC command streamer
to the user")
Signed-off-by: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Alan Previn
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 17 -
drivers/gpu/drm/i915/gt/intel_engine_user.h | 4
drivers/gpu/drm/i915/i915_drm_client.h | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
4 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 118164ddbb2e..3fd32bedd6e7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -47,6 +47,7 @@ static const u8 uabi_classes[] = {
[VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
[VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
[COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
+ [OTHER_CLASS] = I915_KERNEL_RSVD_CLASS,
Could we set it to -1 (aka no uabi class) to avoid needing to maintain
the new macros?
And then just teach intel_engines_driver_register to skip -1. Would
also need teaching engine_rename to handle -1.
Might end up a smaller and more maintainable patch - worth a try do
you think?
That was my initial idea as well, but the issue with this approach is
the engine_uabi_class_count[] array, which is sized based on the number
of uabi classes, so having class -1 would needlessly increase its size a
lot even when using a u8. I thought about limiting the class entry to 3
I was thinking the -1 entry wouldn't be in that array since -1 is not
uabi class by its very definition. It is not reachable from the outside
so no need to be there.
bits so the array would max out at 8 entries, but that seemed to be
getting a bit too convoluted. I can give it a go if you think it's be
cleaner overall.
I had a feeling it would be, but without trying it out I won't claim 100%.
Note that this patch does not introduce any new macros that would need
to be maintained. I915_LAST_UABI_ENGINE_CLASS already existed (I just
moved it from one file to another) and is the only one that changes when
a new "real" uabi class is added; the other defines are based on this
one. This also implies that if a new uabi class is added then
I915_KERNEL_RSVD_CLASS would be bumped to the next free number, which
would cause the GSC to show as a different uabi class in newer logs;
considering that i915 is on its way out, a new class seems very unlikely
so I thought it'd be an acceptable compromise to keep things simple.
};
static int engine_cmp(void *priv, const struct list_head *A,
@@ -138,7 +139,7 @@ const char *intel_engine_class_repr(u8 class)
[COPY_ENGINE_CLASS] = "bcs",
[VIDEO_DECODE_CLASS] = "vcs",
[VIDEO_ENHANCEMENT_CLASS] = "vecs",
- [OTHER_CLASS] = "other",
+ [OTHER_CLASS] = "gsc",
Maybe unrelated?
no. Before this patch, we hardcoded "gsc" below when calling
engine_rename() for it. With this patch, we use the name from this
array, so it needs to be updated. The GEM_WARN_ON below was added to
make sure we don't get different engines in OTHER_CLASS that might not
match the "gsc" naming.
Ah okay, one special casing for another, a wash I guess.
Regards,
Tvrtko
Regards,
Tvrtko
[COMPUTE_CLASS] = "ccs",
};
@@ -216,14 +217,8 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
if (intel_gt_has_unrecoverable_error(engine->gt))
continue; /* ignore incomplete engines */
- /*
- * We don't want to expose the GSC engine to the users, but we
- * still rename it so it is easier to identify in the debug
logs
- */
- if (engine->id == GSC0) {
- engine_rename(engine, "gsc", 0);
- continue;
- }
+ /* The only engine we expect in OTHER_CLASS is GSC0 */
+ GEM_WARN_ON(engine->class == OTHER_CLASS && engine->id !=
GSC0);
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
@@ -238,6 +233,10 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
intel_engine_class_repr(engine->class),
engine->uabi_instance);
+ /* We don't want to expose the GSC engine to the
Re: [Intel-gfx] [PATCH 11/11] drm/i915: Implement audio fastset
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> There's no real why we'd need a full modeset for audio changes.
+reason
Reviewed-by: Jani Nikula
> So let's allow audio to be toggled during fastset. In case the
> ELD changes while has_audio isn't changing state we force both
> audio disable and enable so the new ELD gets propagated to the
> audio driver.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 32 ++--
> 1 file changed, 10 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 98d4fcd28073..a87a9ac63c4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -996,7 +996,9 @@ static bool audio_enabling(const struct intel_crtc_state
> *old_crtc_state,
> if (!new_crtc_state->hw.active)
> return false;
>
> - return is_enabling(has_audio, old_crtc_state, new_crtc_state);
> + return is_enabling(has_audio, old_crtc_state, new_crtc_state) ||
> + (new_crtc_state->has_audio &&
> + memcmp(old_crtc_state->eld, new_crtc_state->eld,
> MAX_ELD_BYTES) != 0);
> }
>
> static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
> @@ -1005,7 +1007,9 @@ static bool audio_disabling(const struct
> intel_crtc_state *old_crtc_state,
> if (!old_crtc_state->hw.active)
> return false;
>
> - return is_disabling(has_audio, old_crtc_state, new_crtc_state);
> + return is_disabling(has_audio, old_crtc_state, new_crtc_state) ||
> + (old_crtc_state->has_audio &&
> + memcmp(old_crtc_state->eld, new_crtc_state->eld,
> MAX_ELD_BYTES) != 0);
> }
>
> #undef is_disabling
> @@ -5123,23 +5127,6 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> } \
> } while (0)
>
> -/*
> - * Checks state where we only read out the enabling, but not the entire
> - * state itself (like full infoframes or ELD for audio). These states
> - * require a full modeset on bootup to fix up.
> - */
> -#define PIPE_CONF_CHECK_BOOL_INCOMPLETE(name) do { \
> - if (!fixup_inherited || (!current_config->name && !pipe_config->name))
> { \
> - PIPE_CONF_CHECK_BOOL(name); \
> - } else { \
> - pipe_config_mismatch(fastset, crtc, __stringify(name), \
> - "unable to verify whether state matches
> exactly, forcing modeset (expected %s, found %s)", \
> - str_yes_no(current_config->name), \
> - str_yes_no(pipe_config->name)); \
> - ret = false; \
> - } \
> -} while (0)
> -
> #define PIPE_CONF_CHECK_P(name) do { \
> if (current_config->name != pipe_config->name) { \
> pipe_config_mismatch(fastset, crtc, __stringify(name), \
> @@ -5327,8 +5314,10 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> PIPE_CONF_CHECK_BOOL(enhanced_framing);
> PIPE_CONF_CHECK_BOOL(fec_enable);
>
> - PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
> - PIPE_CONF_CHECK_BUFFER(eld, MAX_ELD_BYTES);
> + if (!fastset) {
> + PIPE_CONF_CHECK_BOOL(has_audio);
> + PIPE_CONF_CHECK_BUFFER(eld, MAX_ELD_BYTES);
> + }
>
> PIPE_CONF_CHECK_X(gmch_pfit.control);
> /* pfit ratios are autocomputed by the hw on gen4+ */
> @@ -5498,7 +5487,6 @@ intel_pipe_config_compare(const struct intel_crtc_state
> *current_config,
> #undef PIPE_CONF_CHECK_X
> #undef PIPE_CONF_CHECK_I
> #undef PIPE_CONF_CHECK_BOOL
> -#undef PIPE_CONF_CHECK_BOOL_INCOMPLETE
> #undef PIPE_CONF_CHECK_P
> #undef PIPE_CONF_CHECK_FLAGS
> #undef PIPE_CONF_CHECK_COLOR_LUT
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH] drm/i915/gsc: Assign a uabi class number to the GSC CS
On 11/10/2023 4:00 AM, Tvrtko Ursulin wrote:
On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote:
The GSC CS is not exposed to the user, so we skipped assigning a uabi
class number for it. However, the trace logs use the uabi class and
instance to identify the engine, so leaving uabi class unset makes the
GSC CS show up as the RCS in those logs.
Given that the engine is not exposed to the user, we can't add a new
case in the uabi enum, so we insted internally define a kernel
reserved class using the next free number.
Fixes: 194babe26bdc ("drm/i915/mtl: don't expose GSC command streamer
to the user")
Signed-off-by: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Alan Previn
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 17 -
drivers/gpu/drm/i915/gt/intel_engine_user.h | 4
drivers/gpu/drm/i915/i915_drm_client.h | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
4 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 118164ddbb2e..3fd32bedd6e7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -47,6 +47,7 @@ static const u8 uabi_classes[] = {
[VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
[VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
[COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
+ [OTHER_CLASS] = I915_KERNEL_RSVD_CLASS,
Could we set it to -1 (aka no uabi class) to avoid needing to maintain
the new macros?
And then just teach intel_engines_driver_register to skip -1. Would
also need teaching engine_rename to handle -1.
Might end up a smaller and more maintainable patch - worth a try do
you think?
That was my initial idea as well, but the issue with this approach is
the engine_uabi_class_count[] array, which is sized based on the number
of uabi classes, so having class -1 would needlessly increase its size a
lot even when using a u8. I thought about limiting the class entry to 3
bits so the array would max out at 8 entries, but that seemed to be
getting a bit too convoluted. I can give it a go if you think it's be
cleaner overall.
Note that this patch does not introduce any new macros that would need
to be maintained. I915_LAST_UABI_ENGINE_CLASS already existed (I just
moved it from one file to another) and is the only one that changes when
a new "real" uabi class is added; the other defines are based on this
one. This also implies that if a new uabi class is added then
I915_KERNEL_RSVD_CLASS would be bumped to the next free number, which
would cause the GSC to show as a different uabi class in newer logs;
considering that i915 is on its way out, a new class seems very unlikely
so I thought it'd be an acceptable compromise to keep things simple.
};
static int engine_cmp(void *priv, const struct list_head *A,
@@ -138,7 +139,7 @@ const char *intel_engine_class_repr(u8 class)
[COPY_ENGINE_CLASS] = "bcs",
[VIDEO_DECODE_CLASS] = "vcs",
[VIDEO_ENHANCEMENT_CLASS] = "vecs",
- [OTHER_CLASS] = "other",
+ [OTHER_CLASS] = "gsc",
Maybe unrelated?
no. Before this patch, we hardcoded "gsc" below when calling
engine_rename() for it. With this patch, we use the name from this
array, so it needs to be updated. The GEM_WARN_ON below was added to
make sure we don't get different engines in OTHER_CLASS that might not
match the "gsc" naming.
Daniele
Regards,
Tvrtko
[COMPUTE_CLASS] = "ccs",
};
@@ -216,14 +217,8 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
if (intel_gt_has_unrecoverable_error(engine->gt))
continue; /* ignore incomplete engines */
- /*
- * We don't want to expose the GSC engine to the users, but we
- * still rename it so it is easier to identify in the debug
logs
- */
- if (engine->id == GSC0) {
- engine_rename(engine, "gsc", 0);
- continue;
- }
+ /* The only engine we expect in OTHER_CLASS is GSC0 */
+ GEM_WARN_ON(engine->class == OTHER_CLASS && engine->id !=
GSC0);
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
@@ -238,6 +233,10 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
intel_engine_class_repr(engine->class),
engine->uabi_instance);
+ /* We don't want to expose the GSC engine to the users */
+ if (engine->id == GSC0)
+ continue;
+
rb_link_node(>uabi_node, prev, p);
rb_insert_color(>uabi_node, >uabi_engines);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.h
b/drivers/gpu/drm/i915/gt/intel_engine_user.h
index 3dc7e8ab9fbc..dd31805b2a5a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.h
+++
Re: [Intel-gfx] [PATCH 10/11] drm/i915: Push audio_{enable, disable}() to the pre/post pane update stage
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Relocate the audio enable/disable from the full modeset hooks into
> the common pre/post plane update stage of the commit. Audio fastset
> is within easy reach now.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 31 +++-
> 1 file changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d606befa007c..98d4fcd28073 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -990,6 +990,24 @@ static bool vrr_disabling(const struct intel_crtc_state
> *old_crtc_state,
> vrr_params_changed(old_crtc_state, new_crtc_state)));
> }
>
> +static bool audio_enabling(const struct intel_crtc_state *old_crtc_state,
> +const struct intel_crtc_state *new_crtc_state)
> +{
> + if (!new_crtc_state->hw.active)
> + return false;
Makes me wonder if these check should've been added to the
is_enabling/is_disabling macros instead. *shrug*
Reviewed-by: Jani Nikula
> +
> + return is_enabling(has_audio, old_crtc_state, new_crtc_state);
> +}
> +
> +static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
> + const struct intel_crtc_state *new_crtc_state)
> +{
> + if (!old_crtc_state->hw.active)
> + return false;
> +
> + return is_disabling(has_audio, old_crtc_state, new_crtc_state);
> +}
> +
> #undef is_disabling
> #undef is_enabling
>
> @@ -1030,6 +1048,9 @@ static void intel_post_plane_update(struct
> intel_atomic_state *state,
>
> if (intel_crtc_needs_color_update(new_crtc_state))
> intel_color_post_update(new_crtc_state);
> +
> + if (audio_enabling(old_crtc_state, new_crtc_state))
> + intel_encoders_audio_enable(state, crtc);
> }
>
> static void intel_crtc_enable_flip_done(struct intel_atomic_state *state,
> @@ -1113,6 +1134,9 @@ static void intel_pre_plane_update(struct
> intel_atomic_state *state,
> intel_crtc_update_active_timings(old_crtc_state, false);
> }
>
> + if (audio_disabling(old_crtc_state, new_crtc_state))
> + intel_encoders_audio_disable(state, crtc);
> +
> intel_drrs_deactivate(old_crtc_state);
>
> intel_psr_pre_plane_update(state, crtc);
> @@ -1503,7 +1527,6 @@ static void ilk_crtc_enable(struct intel_atomic_state
> *state,
> intel_crtc_vblank_on(new_crtc_state);
>
> intel_encoders_enable(state, crtc);
> - intel_encoders_audio_enable(state, crtc);
>
> if (HAS_PCH_CPT(dev_priv))
> intel_wait_for_pipe_scanline_moving(crtc);
> @@ -1677,7 +1700,6 @@ static void hsw_crtc_enable(struct intel_atomic_state
> *state,
> intel_crtc_vblank_on(new_crtc_state);
>
> intel_encoders_enable(state, crtc);
> - intel_encoders_audio_enable(state, crtc);
>
> if (psl_clkgate_wa) {
> intel_crtc_wait_for_next_vblank(crtc);
> @@ -1729,7 +1751,6 @@ static void ilk_crtc_disable(struct intel_atomic_state
> *state,
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>
> - intel_encoders_audio_disable(state, crtc);
> intel_encoders_disable(state, crtc);
>
> intel_crtc_vblank_off(old_crtc_state);
> @@ -1764,7 +1785,6 @@ static void hsw_crtc_disable(struct intel_atomic_state
> *state,
>* Need care with mst->ddi interactions.
>*/
> if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) {
> - intel_encoders_audio_disable(state, crtc);
> intel_encoders_disable(state, crtc);
> intel_encoders_post_disable(state, crtc);
> }
> @@ -2034,7 +2054,6 @@ static void valleyview_crtc_enable(struct
> intel_atomic_state *state,
> intel_crtc_vblank_on(new_crtc_state);
>
> intel_encoders_enable(state, crtc);
> - intel_encoders_audio_enable(state, crtc);
> }
>
> static void i9xx_crtc_enable(struct intel_atomic_state *state,
> @@ -2076,7 +2095,6 @@ static void i9xx_crtc_enable(struct intel_atomic_state
> *state,
> intel_crtc_vblank_on(new_crtc_state);
>
> intel_encoders_enable(state, crtc);
> - intel_encoders_audio_enable(state, crtc);
>
> /* prevents spurious underruns */
> if (DISPLAY_VER(dev_priv) == 2)
> @@ -2113,7 +2131,6 @@ static void i9xx_crtc_disable(struct intel_atomic_state
> *state,
> if (DISPLAY_VER(dev_priv) == 2)
> intel_crtc_wait_for_next_vblank(crtc);
>
> - intel_encoders_audio_disable(state, crtc);
> intel_encoders_disable(state, crtc);
>
> intel_crtc_vblank_off(old_crtc_state);
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 09/11] drm/i915: Hoist the encoder->audio_{enable, disable}() calls higher up
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Push he encoder->audio_{enable,disable}() calls out from the
*the
> encoder->{enable,disable}() hooks. Moving towards audio fastset.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c| 2 -
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 10
> drivers/gpu/drm/i915/display/intel_ddi.c | 3 --
> drivers/gpu/drm/i915/display/intel_display.c | 49
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 --
> 5 files changed, 49 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 96232af42db2..dfe0b07a122d 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -516,8 +516,6 @@ static void intel_disable_dp(struct intel_atomic_state
> *state,
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_dp->link_trained = false;
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 26a0981102ff..8096492b3fad 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -273,8 +273,6 @@ static void g4x_enable_hdmi(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state)
> {
> g4x_hdmi_enable_port(encoder, pipe_config);
> -
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void ibx_enable_hdmi(struct intel_atomic_state *state,
> @@ -322,8 +320,6 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> }
> -
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void cpt_enable_hdmi(struct intel_atomic_state *state,
> @@ -373,8 +369,6 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
> intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
>TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
> }
> -
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void vlv_enable_hdmi(struct intel_atomic_state *state,
> @@ -382,7 +376,6 @@ static void vlv_enable_hdmi(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void intel_disable_hdmi(struct intel_atomic_state *state,
> @@ -449,8 +442,6 @@ static void g4x_disable_hdmi(struct intel_atomic_state
> *state,
>const struct intel_crtc_state *old_crtc_state,
>const struct drm_connector_state *old_conn_state)
> {
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_disable_hdmi(state, encoder, old_crtc_state, old_conn_state);
> }
>
> @@ -459,7 +450,6 @@ static void pch_disable_hdmi(struct intel_atomic_state
> *state,
>const struct intel_crtc_state *old_crtc_state,
>const struct drm_connector_state *old_conn_state)
> {
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> }
>
> static void pch_post_disable_hdmi(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 2e4920d70105..97569423f430 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3266,7 +3266,6 @@ static void intel_enable_ddi(struct intel_atomic_state
> *state,
>
> intel_hdcp_enable(state, encoder, crtc_state, conn_state);
>
> - encoder->audio_enable(encoder, crtc_state, conn_state);
> }
>
> static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> @@ -3308,8 +3307,6 @@ static void intel_disable_ddi(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state *old_conn_state)
> {
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_tc_port_link_cancel_reset_work(enc_to_dig_port(encoder));
>
> intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index ec76006b1756..d606befa007c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -889,6 +889,48 @@ static bool
Re: [Intel-gfx] [PATCH 09/11] drm/i915: Hoist the encoder->audio_{enable, disable}() calls higher up
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Push he encoder->audio_{enable,disable}() calls out from the
> encoder->{enable,disable}() hooks. Moving towards audio fastset.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c| 2 -
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 10
> drivers/gpu/drm/i915/display/intel_ddi.c | 3 --
> drivers/gpu/drm/i915/display/intel_display.c | 49
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 --
> 5 files changed, 49 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 96232af42db2..dfe0b07a122d 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -516,8 +516,6 @@ static void intel_disable_dp(struct intel_atomic_state
> *state,
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_dp->link_trained = false;
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 26a0981102ff..8096492b3fad 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -273,8 +273,6 @@ static void g4x_enable_hdmi(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state)
> {
> g4x_hdmi_enable_port(encoder, pipe_config);
> -
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void ibx_enable_hdmi(struct intel_atomic_state *state,
> @@ -322,8 +320,6 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> }
> -
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void cpt_enable_hdmi(struct intel_atomic_state *state,
> @@ -373,8 +369,6 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
> intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
>TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
> }
> -
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void vlv_enable_hdmi(struct intel_atomic_state *state,
> @@ -382,7 +376,6 @@ static void vlv_enable_hdmi(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void intel_disable_hdmi(struct intel_atomic_state *state,
> @@ -449,8 +442,6 @@ static void g4x_disable_hdmi(struct intel_atomic_state
> *state,
>const struct intel_crtc_state *old_crtc_state,
>const struct drm_connector_state *old_conn_state)
> {
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_disable_hdmi(state, encoder, old_crtc_state, old_conn_state);
> }
>
> @@ -459,7 +450,6 @@ static void pch_disable_hdmi(struct intel_atomic_state
> *state,
>const struct intel_crtc_state *old_crtc_state,
>const struct drm_connector_state *old_conn_state)
> {
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> }
>
> static void pch_post_disable_hdmi(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 2e4920d70105..97569423f430 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3266,7 +3266,6 @@ static void intel_enable_ddi(struct intel_atomic_state
> *state,
>
> intel_hdcp_enable(state, encoder, crtc_state, conn_state);
>
> - encoder->audio_enable(encoder, crtc_state, conn_state);
> }
>
> static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> @@ -3308,8 +3307,6 @@ static void intel_disable_ddi(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state *old_conn_state)
> {
> - encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_tc_port_link_cancel_reset_work(enc_to_dig_port(encoder));
>
> intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index ec76006b1756..d606befa007c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -889,6 +889,48 @@
Re: [Intel-gfx] [PATCH 08/11] drm/i915: Convert audio enable/disable into encoder vfuncs
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add encoder vfuncs for audio enable/disable. This will enable
> audio to be enable/disabe during fastsets. An encoder hook
*enabled/disabled
Reviewed-by: Jani Nikula
> is necessary as on pre-hsw platforms different encoder types
> implement audio in different ways.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 8 ---
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 14 ++-
> drivers/gpu/drm/i915/display/intel_ddi.c | 6 +++--
> .../drm/i915/display/intel_display_types.h| 6 +
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++--
> drivers/gpu/drm/i915/display/intel_sdvo.c | 23 ++-
> 6 files changed, 44 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 266cb594d793..96232af42db2 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -516,7 +516,7 @@ static void intel_disable_dp(struct intel_atomic_state
> *state,
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - g4x_dp_audio_disable(encoder, old_crtc_state, old_conn_state);
> + encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
>
> intel_dp->link_trained = false;
>
> @@ -719,7 +719,7 @@ static void g4x_enable_dp(struct intel_atomic_state
> *state,
> {
> intel_enable_dp(state, encoder, pipe_config, conn_state);
> intel_edp_backlight_on(pipe_config, conn_state);
> - g4x_dp_audio_enable(encoder, pipe_config, conn_state);
> + encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void vlv_enable_dp(struct intel_atomic_state *state,
> @@ -728,7 +728,7 @@ static void vlv_enable_dp(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state)
> {
> intel_edp_backlight_on(pipe_config, conn_state);
> - g4x_dp_audio_enable(encoder, pipe_config, conn_state);
> + encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void g4x_pre_enable_dp(struct intel_atomic_state *state,
> @@ -1357,6 +1357,8 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
> intel_encoder->disable = g4x_disable_dp;
> intel_encoder->post_disable = g4x_post_disable_dp;
> }
> + intel_encoder->audio_enable = g4x_dp_audio_enable;
> + intel_encoder->audio_disable = g4x_dp_audio_disable;
>
> if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
> (HAS_PCH_CPT(dev_priv) && port != PORT_A))
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index beda6b480bf1..26a0981102ff 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -274,7 +274,7 @@ static void g4x_enable_hdmi(struct intel_atomic_state
> *state,
> {
> g4x_hdmi_enable_port(encoder, pipe_config);
>
> - g4x_hdmi_audio_enable(encoder, pipe_config, conn_state);
> + encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void ibx_enable_hdmi(struct intel_atomic_state *state,
> @@ -323,7 +323,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> }
>
> - g4x_hdmi_audio_enable(encoder, pipe_config, conn_state);
> + encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void cpt_enable_hdmi(struct intel_atomic_state *state,
> @@ -374,7 +374,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
>TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
> }
>
> - g4x_hdmi_audio_enable(encoder, pipe_config, conn_state);
> + encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void vlv_enable_hdmi(struct intel_atomic_state *state,
> @@ -382,7 +382,7 @@ static void vlv_enable_hdmi(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - g4x_hdmi_audio_enable(encoder, pipe_config, conn_state);
> + encoder->audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void intel_disable_hdmi(struct intel_atomic_state *state,
> @@ -449,7 +449,7 @@ static void g4x_disable_hdmi(struct intel_atomic_state
> *state,
>const struct intel_crtc_state *old_crtc_state,
>const struct drm_connector_state *old_conn_state)
> {
> - g4x_hdmi_audio_disable(encoder, old_crtc_state, old_conn_state);
> + encoder->audio_disable(encoder, old_crtc_state, old_conn_state);
>
> intel_disable_hdmi(state, encoder, old_crtc_state, old_conn_state);
> }
> @@ -459,7 +459,7 @@ static void
Re: [Intel-gfx] [PATCH 07/11] drm/i915: Split g4x+ HDMI audio presence detect from port enable
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Follow the hsw+ approach toggle the audio presence detect
> when we set up the ELD, instead of doing it when turning the
> port on/off.
>
> This will facilitate audio enable/disable to happen during
> fastsets instead of requiring a full modeset.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 18 +++---
> 1 file changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 9c70245d8b0a..beda6b480bf1 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -228,8 +228,6 @@ static void g4x_hdmi_enable_port(struct intel_encoder
> *encoder,
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
> - if (pipe_config->has_audio)
> - temp |= HDMI_AUDIO_ENABLE;
>
> intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> @@ -240,12 +238,16 @@ static void g4x_hdmi_audio_enable(struct intel_encoder
> *encoder,
> const struct drm_connector_state *conn_state)
> {
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
>
> if (!crtc_state->has_audio)
> return;
>
> drm_WARN_ON(>drm, !crtc_state->has_hdmi_sink);
>
> + /* Enable audio presence detect */
> + intel_de_rmw(i915, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
> +
> intel_audio_codec_enable(encoder, crtc_state, conn_state);
> }
>
> @@ -253,10 +255,16 @@ static void g4x_hdmi_audio_disable(struct intel_encoder
> *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
> +
> if (!old_crtc_state->has_audio)
> return;
>
> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> +
> + /* Disable audio presence detect */
> + intel_de_rmw(i915, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
> }
>
> static void g4x_enable_hdmi(struct intel_atomic_state *state,
> @@ -282,8 +290,6 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
> - if (pipe_config->has_audio)
> - temp |= HDMI_AUDIO_ENABLE;
>
> /*
>* HW workaround, need to write this twice for issue
> @@ -335,8 +341,6 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
> - if (pipe_config->has_audio)
> - temp |= HDMI_AUDIO_ENABLE;
>
> /*
>* WaEnableHDMI8bpcBefore12bpc:snb,ivb
> @@ -396,7 +400,7 @@ static void intel_disable_hdmi(struct intel_atomic_state
> *state,
>
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> - temp &= ~(SDVO_ENABLE | HDMI_AUDIO_ENABLE);
> + temp &= ~SDVO_ENABLE;
> intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 06/11] drm/i915: Split g4x+ DP audio presence detect from port enable
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Follow the hsw+ approach toggle the audio presence detect
> when we set up the ELD, instead of doing it when turning the
> port on/off.
>
> This will facilitate audio enable/disable to happen during
> fastsets instead of requiring a full modeset.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 18 +++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index ecc2ec866424..266cb594d793 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -432,7 +432,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
> intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);
> intel_de_posting_read(dev_priv, intel_dp->output_reg);
>
> - intel_dp->DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE);
> + intel_dp->DP &= ~DP_PORT_EN;
> intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);
> intel_de_posting_read(dev_priv, intel_dp->output_reg);
>
> @@ -479,9 +479,16 @@ static void g4x_dp_audio_enable(struct intel_encoder
> *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> if (!crtc_state->has_audio)
> return;
>
> + /* Enable audio presence detect */
> + intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
> + intel_de_write(i915, intel_dp->output_reg, intel_dp->DP);
> +
> intel_audio_codec_enable(encoder, crtc_state, conn_state);
> }
>
> @@ -489,10 +496,17 @@ static void g4x_dp_audio_disable(struct intel_encoder
> *encoder,
>const struct intel_crtc_state *old_crtc_state,
>const struct drm_connector_state
> *old_conn_state)
> {
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> if (!old_crtc_state->has_audio)
> return;
>
> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> +
> + /* Disable audio presence detect */
> + intel_dp->DP &= ~DP_AUDIO_OUTPUT_ENABLE;
> + intel_de_write(i915, intel_dp->output_reg, intel_dp->DP);
> }
>
> static void intel_disable_dp(struct intel_atomic_state *state,
> @@ -651,8 +665,6 @@ static void intel_dp_enable_port(struct intel_dp
> *intel_dp,
>* fail when the power sequencer is freshly used for this port.
>*/
> intel_dp->DP |= DP_PORT_EN;
> - if (crtc_state->has_audio)
> - intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
>
> intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);
> intel_de_posting_read(dev_priv, intel_dp->output_reg);
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 05/11] drm/i915: Wrap g4x+ DP/HDMI audio enable/disable
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Put a wrapper around the intel_audio_codec_{enable,disable}()
> calls in the g4x+ DP/HDMI code. We shall move the presence
> detect enable/disable into the wrappers later.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 26 --
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 48 +++--
> 2 files changed, 53 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 79ef2b435beb..ecc2ec866424 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -475,6 +475,26 @@ intel_dp_link_down(struct intel_encoder *encoder,
> }
> }
>
> +static void g4x_dp_audio_enable(struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> +{
> + if (!crtc_state->has_audio)
> + return;
> +
> + intel_audio_codec_enable(encoder, crtc_state, conn_state);
> +}
> +
> +static void g4x_dp_audio_disable(struct intel_encoder *encoder,
> + const struct intel_crtc_state *old_crtc_state,
> + const struct drm_connector_state
> *old_conn_state)
> +{
> + if (!old_crtc_state->has_audio)
> + return;
> +
> + intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> +}
> +
> static void intel_disable_dp(struct intel_atomic_state *state,
>struct intel_encoder *encoder,
>const struct intel_crtc_state *old_crtc_state,
> @@ -482,7 +502,7 @@ static void intel_disable_dp(struct intel_atomic_state
> *state,
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> + g4x_dp_audio_disable(encoder, old_crtc_state, old_conn_state);
>
> intel_dp->link_trained = false;
>
> @@ -687,7 +707,7 @@ static void g4x_enable_dp(struct intel_atomic_state
> *state,
> {
> intel_enable_dp(state, encoder, pipe_config, conn_state);
> intel_edp_backlight_on(pipe_config, conn_state);
> - intel_audio_codec_enable(encoder, pipe_config, conn_state);
> + g4x_dp_audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void vlv_enable_dp(struct intel_atomic_state *state,
> @@ -696,7 +716,7 @@ static void vlv_enable_dp(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state)
> {
> intel_edp_backlight_on(pipe_config, conn_state);
> - intel_audio_codec_enable(encoder, pipe_config, conn_state);
> + g4x_dp_audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void g4x_pre_enable_dp(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 45e044b4a88d..9c70245d8b0a 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -235,18 +235,38 @@ static void g4x_hdmi_enable_port(struct intel_encoder
> *encoder,
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> }
>
> +static void g4x_hdmi_audio_enable(struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + if (!crtc_state->has_audio)
> + return;
> +
> + drm_WARN_ON(>drm, !crtc_state->has_hdmi_sink);
> +
> + intel_audio_codec_enable(encoder, crtc_state, conn_state);
> +}
> +
> +static void g4x_hdmi_audio_disable(struct intel_encoder *encoder,
> +const struct intel_crtc_state
> *old_crtc_state,
> +const struct drm_connector_state
> *old_conn_state)
> +{
> + if (!old_crtc_state->has_audio)
> + return;
> +
> + intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> +}
> +
> static void g4x_enable_hdmi(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -
> g4x_hdmi_enable_port(encoder, pipe_config);
>
> - drm_WARN_ON(_priv->drm, pipe_config->has_audio &&
> - !pipe_config->has_hdmi_sink);
> - intel_audio_codec_enable(encoder, pipe_config, conn_state);
> + g4x_hdmi_audio_enable(encoder, pipe_config, conn_state);
> }
>
> static void ibx_enable_hdmi(struct intel_atomic_state
Re: [Intel-gfx] [PATCH] drm/i915/huc: Stop printing about unsupported HuC on MTL
On 11/9/2023 6:06 PM, John Harrison wrote: On 11/9/2023 15:54, Daniele Ceraolo Spurio wrote: On MTL, the HuC is only supported on the media GT, so our validation check on the module parameter detects an inconsistency on the root GT (the modparams asks to enable HuC, but the support is not there) and prints the following info message: [drm] GT0: Incompatible option enable_guc=3 - HuC is not supported! This can be confusing to the user and make them think that something is wrong when it isn't, so we need to silence it. Given that any platform that supports HuC also supports GuC, if a user tries to enable HuC on a platform that really doesn't support it they'll already see a message about GuC not being supported, so instead of just silencing the HuC message on newer platforms we can just get rid of it entirely. Not following this argument. Someone might attempt to enable HuC only and do so on a older platform that supports neither HuC nor GuC. There would be no GuC warning because GuC was not requested. But now there would also be no HuC warning either. Enabling HuC also enabled GuC loading, because the latter is needed to auth the former. The message about GuC not being supported is printed for all values of enable_guc that are not zero. Daniele John. Signed-off-by: Daniele Ceraolo Spurio Cc: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 27f6561dd731..3872d309ed31 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c @@ -106,11 +106,6 @@ static void __confirm_options(struct intel_uc *uc) gt_info(gt, "Incompatible option enable_guc=%d - %s\n", i915->params.enable_guc, "GuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC && - !intel_uc_supports_huc(uc)) - gt_info(gt, "Incompatible option enable_guc=%d - %s\n", - i915->params.enable_guc, "HuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_SUBMISSION && !intel_uc_supports_guc_submission(uc)) gt_info(gt, "Incompatible option enable_guc=%d - %s\n",
Re: [Intel-gfx] [PATCH 04/11] drm/i915: Push audio enable/disable further out
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Push the audio enable/disable to be the last/first thing
> respectively that is done in the encoder enable/disable hooks.
> The goal is to move it further out of these encoder hooks entirely.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 8
> drivers/gpu/drm/i915/display/intel_ddi.c| 12
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 8
> 3 files changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index e8ee0a08947e..79ef2b435beb 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -482,10 +482,10 @@ static void intel_disable_dp(struct intel_atomic_state
> *state,
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - intel_dp->link_trained = false;
> -
> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
>
> + intel_dp->link_trained = false;
> +
> /*
>* Make sure the panel is off before trying to change the mode.
>* But also ensure that we have vdd while we switch off the panel.
> @@ -686,8 +686,8 @@ static void g4x_enable_dp(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state)
> {
> intel_enable_dp(state, encoder, pipe_config, conn_state);
> - intel_audio_codec_enable(encoder, pipe_config, conn_state);
> intel_edp_backlight_on(pipe_config, conn_state);
> + intel_audio_codec_enable(encoder, pipe_config, conn_state);
> }
>
> static void vlv_enable_dp(struct intel_atomic_state *state,
> @@ -695,8 +695,8 @@ static void vlv_enable_dp(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - intel_audio_codec_enable(encoder, pipe_config, conn_state);
> intel_edp_backlight_on(pipe_config, conn_state);
> + intel_audio_codec_enable(encoder, pipe_config, conn_state);
> }
>
> static void g4x_pre_enable_dp(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c75fd00e360a..3c2360e2fa43 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3110,8 +3110,6 @@ static void intel_enable_ddi_dp(struct
> intel_atomic_state *state,
> if (!dig_port->lspcon.active || intel_dp_has_hdmi_sink(_port->dp))
> intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
>
> - intel_audio_codec_enable(encoder, crtc_state, conn_state);
> -
> trans_port_sync_stop_link_train(state, encoder, crtc_state);
> }
>
> @@ -3242,8 +3240,6 @@ static void intel_enable_ddi_hdmi(struct
> intel_atomic_state *state,
> intel_de_write(dev_priv, DDI_BUF_CTL(port), buf_ctl);
>
> intel_wait_ddi_buf_active(dev_priv, port);
> -
> - intel_audio_codec_enable(encoder, crtc_state, conn_state);
> }
>
> static void intel_enable_ddi(struct intel_atomic_state *state,
> @@ -3269,6 +3265,8 @@ static void intel_enable_ddi(struct intel_atomic_state
> *state,
> intel_enable_ddi_dp(state, encoder, crtc_state, conn_state);
>
> intel_hdcp_enable(state, encoder, crtc_state, conn_state);
> +
> + intel_audio_codec_enable(encoder, crtc_state, conn_state);
> }
>
> static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> @@ -3280,8 +3278,6 @@ static void intel_disable_ddi_dp(struct
> intel_atomic_state *state,
>
> intel_dp->link_trained = false;
>
> - intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> -
> intel_psr_disable(intel_dp, old_crtc_state);
> intel_edp_backlight_off(old_conn_state);
> /* Disable the decompression in DP Sink */
> @@ -3300,8 +3296,6 @@ static void intel_disable_ddi_hdmi(struct
> intel_atomic_state *state,
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> struct drm_connector *connector = old_conn_state->connector;
>
> - intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> -
> if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
> false, false))
> drm_dbg_kms(>drm,
> @@ -3314,6 +3308,8 @@ static void intel_disable_ddi(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state *old_conn_state)
> {
> + intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
> +
> intel_tc_port_link_cancel_reset_work(enc_to_dig_port(encoder));
>
>
Re: [Intel-gfx] [PATCH 03/11] drm/i915: Polish some RMWs
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Doing the if-else around RMWs is kinda silly. Just set/clear the
> apporiate bits with a single RMW.
>
> Also unify the coding style a bit icl_wa_cursorclkgating() while at it.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 19 ---
> 1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index dad8dac0ebbe..ec76006b1756 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -194,12 +194,9 @@ static bool is_hdr_mode(const struct intel_crtc_state
> *crtc_state)
> static void
> skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable)
> {
> - if (enable)
> - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe),
> - 0, DUPS1_GATING_DIS | DUPS2_GATING_DIS);
> - else
> - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe),
> - DUPS1_GATING_DIS | DUPS2_GATING_DIS, 0);
> + intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe),
> + DUPS1_GATING_DIS | DUPS2_GATING_DIS,
> + enable ? DUPS1_GATING_DIS | DUPS2_GATING_DIS : 0);
> }
>
> /* Wa_2006604312:icl,ehl */
> @@ -207,10 +204,9 @@ static void
> icl_wa_scalerclkgating(struct drm_i915_private *dev_priv, enum pipe pipe,
> bool enable)
> {
> - if (enable)
> - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), 0,
> DPFR_GATING_DIS);
> - else
> - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), DPFR_GATING_DIS,
> 0);
> + intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe),
> + DPFR_GATING_DIS,
> + enable ? DPFR_GATING_DIS : 0);
> }
>
> /* Wa_1604331009:icl,jsl,ehl */
> @@ -218,7 +214,8 @@ static void
> icl_wa_cursorclkgating(struct drm_i915_private *dev_priv, enum pipe pipe,
> bool enable)
> {
> - intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), CURSOR_GATING_DIS,
> + intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe),
> + CURSOR_GATING_DIS,
>enable ? CURSOR_GATING_DIS : 0);
> }
--
Jani Nikula, Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mtl: Use int for entry setup frames
== Series Details == Series: drm/i915/mtl: Use int for entry setup frames URL : https://patchwork.freedesktop.org/series/126325/ State : success == Summary == CI Bug Log - changes from CI_DRM_13868 -> Patchwork_126325v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/index.html Participating hosts (34 -> 34) -- Additional (2): fi-kbl-soraka bat-adlp-11 Missing(2): fi-hsw-4770 fi-snb-2520m Known issues Here are the changes found in Patchwork_126325v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-adlp-11:NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-bsw-nick:[PASS][2] -> [SKIP][3] ([fdo#109271]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/fi-bsw-nick/igt@fb...@eof.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-bsw-nick/igt@fb...@eof.html * igt@fbdev@info: - fi-bsw-nick:[PASS][4] -> [SKIP][5] ([fdo#109271] / [i915#1849]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/fi-bsw-nick/igt@fb...@info.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-bsw-nick/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_tiled_pread_basic: - bat-adlp-11:NOTRUN -> [SKIP][8] ([i915#3282]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-adlp-11/igt@gem_tiled_pread_basic.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][9] ([i915#1886]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-bsw-nick:[PASS][10] -> [SKIP][11] ([fdo#109271] / [i915#1845]) +7 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/fi-bsw-nick/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-bsw-nick/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html - bat-adlp-11:NOTRUN -> [SKIP][12] ([i915#4103] / [i915#5608]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271]) +9 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-kbl-soraka/igt@kms_...@dsc-basic.html - bat-adlp-11:NOTRUN -> [SKIP][14] ([i915#3555] / [i915#3840]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-adlp-11/igt@kms_...@dsc-basic.html * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-bsw-nick:NOTRUN -> [SKIP][15] ([fdo#109271]) +5 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-bsw-nick/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-adlp-11:NOTRUN -> [SKIP][16] ([i915#4093]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-adlp-11/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_hdmi_inject@inject-audio: - bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#4369]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-adlp-11/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence: - fi-bsw-nick:NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#1845]) +6 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/fi-bsw-nick/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html Possible fixes * igt@gem_exec_suspend@basic-s0@lmem0: - bat-dg2-9: [INCOMPLETE][19] ([i915#9275]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126325v1/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1: -
Re: [Intel-gfx] [PATCH 02/11] drm/i915: Call intel_pre_plane_updates() also for pipes getting enabled
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We used to call intel_pre_plane_updates() for any pipe going through
> a modeset whether the pipe was previously enabled or not. This in
> fact needed to apply all the necessary clock gating workarounds/etc.
> Restore the correct behaviour.
>
> Fixes: 39919997322f ("drm/i915: Disable all planes before modesetting any
> pipes")
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f24c410cbd8f..dad8dac0ebbe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6856,10 +6856,11 @@ static void intel_commit_modeset_disables(struct
> intel_atomic_state *state)
> if (!intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> + intel_pre_plane_update(state, crtc);
> +
> if (!old_crtc_state->hw.active)
> continue;
>
> - intel_pre_plane_update(state, crtc);
> intel_crtc_disable_planes(state, crtc);
> }
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 01/11] drm/i915: Check pipe active state in {planes, vrr}_{enabling, disabling}()
On Mon, 06 Nov 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> {planes,vrr}_{enabling,disabling}() are supposed to indicate
> whether the specific hardware feature is supposed to be enabling
> or disabling. That can only makes sense if the pipe is active
> overall. So check for that before we go poking at the hardware.
>
> I think we're semi-safe currently on due to:
> - intel_pre_plane_update() doesn't get called when the pipe
> was not-active prior to the commit, but this is actually a bug.
> This saves vrr_disabling(), and vrr_enabling() is called from
> deeper down where we have already checked hw.active.
> - active_planes mirrors the crtc's hw.active
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 9e9c03287869..f24c410cbd8f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -902,12 +902,18 @@ static bool needs_async_flip_vtd_wa(const struct
> intel_crtc_state *crtc_state)
> static bool planes_enabling(const struct intel_crtc_state *old_crtc_state,
> const struct intel_crtc_state *new_crtc_state)
> {
> + if (!new_crtc_state->hw.active)
> + return false;
> +
> return is_enabling(active_planes, old_crtc_state, new_crtc_state);
> }
>
> static bool planes_disabling(const struct intel_crtc_state *old_crtc_state,
>const struct intel_crtc_state *new_crtc_state)
> {
> + if (!old_crtc_state->hw.active)
> + return false;
> +
> return is_disabling(active_planes, old_crtc_state, new_crtc_state);
> }
>
> @@ -924,6 +930,9 @@ static bool vrr_params_changed(const struct
> intel_crtc_state *old_crtc_state,
> static bool vrr_enabling(const struct intel_crtc_state *old_crtc_state,
>const struct intel_crtc_state *new_crtc_state)
> {
> + if (!new_crtc_state->hw.active)
> + return false;
> +
> return is_enabling(vrr.enable, old_crtc_state, new_crtc_state) ||
> (new_crtc_state->vrr.enable &&
>(new_crtc_state->update_m_n || new_crtc_state->update_lrr ||
> @@ -933,6 +942,9 @@ static bool vrr_enabling(const struct intel_crtc_state
> *old_crtc_state,
> static bool vrr_disabling(const struct intel_crtc_state *old_crtc_state,
> const struct intel_crtc_state *new_crtc_state)
> {
> + if (!old_crtc_state->hw.active)
> + return false;
> +
> return is_disabling(vrr.enable, old_crtc_state, new_crtc_state) ||
> (old_crtc_state->vrr.enable &&
>(new_crtc_state->update_m_n || new_crtc_state->update_lrr ||
--
Jani Nikula, Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Remove return type from i915_drm_client_remove_object
== Series Details == Series: series starting with [1/2] drm/i915: Remove return type from i915_drm_client_remove_object URL : https://patchwork.freedesktop.org/series/126323/ State : success == Summary == CI Bug Log - changes from CI_DRM_13868 -> Patchwork_126323v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/index.html Participating hosts (34 -> 32) -- Additional (1): bat-adlp-11 Missing(3): fi-hsw-4770 fi-snb-2520m bat-dg1-5 Known issues Here are the changes found in Patchwork_126323v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-adlp-11:NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-bsw-nick:[PASS][2] -> [SKIP][3] ([fdo#109271]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/fi-bsw-nick/igt@fb...@eof.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/fi-bsw-nick/igt@fb...@eof.html * igt@fbdev@info: - fi-bsw-nick:[PASS][4] -> [SKIP][5] ([fdo#109271] / [i915#1849]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/fi-bsw-nick/igt@fb...@info.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/fi-bsw-nick/igt@fb...@info.html * igt@gem_exec_suspend@basic-s0@smem: - bat-jsl-3: [PASS][6] -> [INCOMPLETE][7] ([i915#9275]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html * igt@gem_tiled_pread_basic: - bat-adlp-11:NOTRUN -> [SKIP][8] ([i915#3282]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-11/igt@gem_tiled_pread_basic.html * igt@i915_suspend@basic-s3-without-i915: - bat-jsl-3: [PASS][9] -> [FAIL][10] ([fdo#103375]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-bsw-nick:[PASS][11] -> [SKIP][12] ([fdo#109271] / [i915#1845]) +7 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/fi-bsw-nick/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/fi-bsw-nick/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html - bat-adlp-11:NOTRUN -> [SKIP][13] ([i915#4103] / [i915#5608]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-adlp-11:NOTRUN -> [SKIP][14] ([i915#3555] / [i915#3840]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-11/igt@kms_...@dsc-basic.html * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-bsw-nick:NOTRUN -> [SKIP][15] ([fdo#109271]) +5 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/fi-bsw-nick/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-adlp-11:NOTRUN -> [SKIP][16] ([i915#4093]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-11/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_hdmi_inject@inject-audio: - bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#4369]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-11/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-adlp-9: NOTRUN -> [SKIP][18] ([i915#1845] / [i915#3546]) +2 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence: - fi-bsw-nick:NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#1845]) +6 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126323v1/fi-bsw-nick/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html Possible fixes * igt@gem_exec_suspend@basic-s0@lmem0: - bat-dg2-9: [INCOMPLETE][20] ([i915#9275]) -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13868/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [21]:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Remove return type from i915_drm_client_remove_object
== Series Details == Series: series starting with [1/2] drm/i915: Remove return type from i915_drm_client_remove_object URL : https://patchwork.freedesktop.org/series/126323/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] [PATCH] drm/i915/dp: Tune down FEC detection timeout error message
At least a Realtek DP branch device with the OUI 00-e0-4c dev-ID Dp1.4 HW-rev 1.0 SW-rev 131.1 device identification doesn't report detecting the FEC decoding start symbol. Tune down the corresponding error to a debug message. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 0712a5200ad35..f70af660dfcfa 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2257,8 +2257,8 @@ static void wait_for_fec_detected(struct drm_dp_aux *aux, bool enabled) return; if (err == -ETIMEDOUT) - drm_err(>drm, "Timeout waiting for FEC %s to get detected\n", - str_enabled_disabled(enabled)); + drm_dbg_kms(>drm, "Timeout waiting for FEC %s to get detected\n", + str_enabled_disabled(enabled)); else drm_dbg_kms(>drm, "FEC detected status read error: %d\n", status); } -- 2.39.2
[Intel-gfx] [PATCH 15/20] drivers/gpu/drm/i915/display: remove I2C_CLASS_DDC support
After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC. Class-based device auto-detection is a legacy mechanism and shouldn't be used in new code. So we can remove this class completely now. Preferably this series should be applied via the i2c tree. Signed-off-by: Heiner Kallweit --- drivers/gpu/drm/i915/display/intel_gmbus.c |1 - drivers/gpu/drm/i915/display/intel_sdvo.c |1 - 2 files changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index 40d7b6f3f..e9e4dcf34 100644 --- a/drivers/gpu/drm/i915/display/intel_gmbus.c +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c @@ -899,7 +899,6 @@ int intel_gmbus_setup(struct drm_i915_private *i915) } bus->adapter.owner = THIS_MODULE; - bus->adapter.class = I2C_CLASS_DDC; snprintf(bus->adapter.name, sizeof(bus->adapter.name), "i915 gmbus %s", gmbus_pin->name); diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index a636f42ce..5e64d1baf 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -3311,7 +3311,6 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc, ddc->ddc_bus = ddc_bus; ddc->ddc.owner = THIS_MODULE; - ddc->ddc.class = I2C_CLASS_DDC; snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d", port_name(sdvo->base.port), ddc_bus); ddc->ddc.dev.parent = >dev;
[Intel-gfx] [v5 PATCH 2/2] fuse: share lookup state between submount and its parent
Fuse submounts do not perform a lookup for the nodeid that they inherit
from their parent. Instead, the code decrements the nlookup on the
submount's fuse_inode when it is instantiated, and no forget is
performed when a submount root is evicted.
Trouble arises when the submount's parent is evicted despite the
submount itself being in use. In this author's case, the submount was
in a container and deatched from the initial mount namespace via a
MNT_DEATCH operation. When memory pressure triggered the shrinker, the
inode from the parent was evicted, which triggered enough forgets to
render the submount's nodeid invalid.
Since submounts should still function, even if their parent goes away,
solve this problem by sharing refcounted state between the parent and
its submount. When all of the references on this shared state reach
zero, it's safe to forget the final lookup of the fuse nodeid.
Signed-off-by: Krister Johansen
Cc: sta...@vger.kernel.org
Fixes: 1866d779d5d2 ("fuse: Allow fuse_fill_super_common() for submounts")
---
Changes since v4:
- Ensure that submount_lookup is NULL initialized in fuse_alloc_inode.
(Feedback from Naresh Kamboju and Chaitanya Kumar Borah)
Changes since v3:
- Remove rcu head from lookup tracking struct along with unnecessary
kfree_rcu call. (Feedback from Miklos Szeredi)
- Make nlookup one implicitly. Remove from struct and simplify places
where it was being used. (Feedback from Miklos Szeredi)
- Remove unnecessary spinlock acquisition. (Feedback from Miklos
Szeredi)
- Add a WARN_ON if the lookup tracking cookie cannot be found during
fuse_fill_super_submount. (Feedback from Miklos Szeredi)
Changes since v2:
- Move to an approach where the lookup is shared between the submount's
parent and children. Use a reference counted lookup cookie to decide
when it is safe to perform the forget of the final reference.
(Feedback from Miklos Szeredi)
Changes since v1:
- Cleanups to pacify test robot
Changes since RFC:
- Modified fuse_fill_super_submount to always fail if dentry cannot be
revalidated. (Feedback from Bernd Schubert)
- Fixed up an edge case where looked up but subsequently declared
invalid dentries were not correctly tracking nlookup. (Error was
introduced in my RFC).
---
fs/fuse/fuse_i.h | 15 ++
fs/fuse/inode.c | 75 ++--
2 files changed, 87 insertions(+), 3 deletions(-)
diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h
index 405252bb51f2..9377c46f14c4 100644
--- a/fs/fuse/fuse_i.h
+++ b/fs/fuse/fuse_i.h
@@ -63,6 +63,19 @@ struct fuse_forget_link {
struct fuse_forget_link *next;
};
+/* Submount lookup tracking */
+struct fuse_submount_lookup {
+ /** Refcount */
+ refcount_t count;
+
+ /** Unique ID, which identifies the inode between userspace
+* and kernel */
+ u64 nodeid;
+
+ /** The request used for sending the FORGET message */
+ struct fuse_forget_link *forget;
+};
+
/** FUSE inode */
struct fuse_inode {
/** Inode data */
@@ -158,6 +171,8 @@ struct fuse_inode {
*/
struct fuse_inode_dax *dax;
#endif
+ /** Submount specific lookup tracking */
+ struct fuse_submount_lookup *submount_lookup;
};
/** FUSE inode state bits */
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 18e240c8..d7ebc322e55b 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -68,6 +68,24 @@ struct fuse_forget_link *fuse_alloc_forget(void)
return kzalloc(sizeof(struct fuse_forget_link), GFP_KERNEL_ACCOUNT);
}
+static struct fuse_submount_lookup *fuse_alloc_submount_lookup(void)
+{
+ struct fuse_submount_lookup *sl;
+
+ sl = kzalloc(sizeof(struct fuse_submount_lookup), GFP_KERNEL_ACCOUNT);
+ if (!sl)
+ return NULL;
+ sl->forget = fuse_alloc_forget();
+ if (!sl->forget)
+ goto out_free;
+
+ return sl;
+
+out_free:
+ kfree(sl);
+ return NULL;
+}
+
static struct inode *fuse_alloc_inode(struct super_block *sb)
{
struct fuse_inode *fi;
@@ -85,6 +103,7 @@ static struct inode *fuse_alloc_inode(struct super_block *sb)
fi->state = 0;
mutex_init(>mutex);
spin_lock_init(>lock);
+ fi->submount_lookup = NULL;
fi->forget = fuse_alloc_forget();
if (!fi->forget)
goto out_free;
@@ -113,6 +132,17 @@ static void fuse_free_inode(struct inode *inode)
kmem_cache_free(fuse_inode_cachep, fi);
}
+static void fuse_cleanup_submount_lookup(struct fuse_conn *fc,
+struct fuse_submount_lookup *sl)
+{
+ if (!refcount_dec_and_test(>count))
+ return;
+
+ fuse_queue_forget(fc, sl->forget, sl->nodeid, 1);
+ sl->forget = NULL;
+ kfree(sl);
+}
+
static void fuse_evict_inode(struct inode *inode)
{
struct fuse_inode *fi = get_fuse_inode(inode);
@@ -132,6 +162,11 @@ static void
[Intel-gfx] [PATCH] drm/i915: eliminate warnings
Current, the dewake_scanline variable is defined as unsigned int,
an unsigned int variable that is always greater than or equal to 0.
when _intel_dsb_commit function is called by intel_dsb_commit function,
the dewake_scanline variable may have an int value.
So the dewake_scanline variable is necessary to defined as an int.
Signed-off-by: heminhong
---
drivers/gpu/drm/i915/display/intel_dsb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 78b6fe24dcd8..7fd6280c54a7 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -340,7 +340,7 @@ static int intel_dsb_dewake_scanline(const struct
intel_crtc_state *crtc_state)
}
static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
- unsigned int dewake_scanline)
+ int dewake_scanline)
{
struct intel_crtc *crtc = dsb->crtc;
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
--
2.25.1
Re: [Intel-gfx] [PATCH 15/20] drivers/gpu/drm/i915/display: remove I2C_CLASS_DDC support
On 13.11.2023 13:17, Jani Nikula wrote:
> On Mon, 13 Nov 2023, Heiner Kallweit wrote:
>> After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in
>> olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC.
>> Class-based device auto-detection is a legacy mechanism and shouldn't
>> be used in new code. So we can remove this class completely now.
>
> So this is copy-pasted to all commits and the cover letter, but please
> do explain why there are no functional changes here (or are there?),
> without me having to go through the i2c stack and try to find the
> commits alluded to in "After removal of the legacy ...".
>
Legacy eeprom driver was marked deprecated 4 yrs ago with:
3079b54aa9a0 ("eeprom: Warn that the driver is deprecated")
Now it has been removed with:
0113a99b8a75 ("eeprom: Remove deprecated legacy eeprom driver")
Declaration of I2C_CLASS_DDC support is a no-op now, so there's
no functional change in this patch.
If loaded manually, the legacy eeprom driver exposed the DDC EEPROM
to userspace. If this functionality is needed, then now the DDC
EEPROM has to be explicitly instantiated using at24.
See also:
https://docs.kernel.org/i2c/instantiating-devices.html
> What does this mean?
>
>
> BR,
> Jani.
>
Heiner
>
>>
>> Preferably this series should be applied via the i2c tree.
>>
>> Signed-off-by: Heiner Kallweit
>>
>> ---
>> drivers/gpu/drm/i915/display/intel_gmbus.c |1 -
>> drivers/gpu/drm/i915/display/intel_sdvo.c |1 -
>> 2 files changed, 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
>> b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> index 40d7b6f3f..e9e4dcf34 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
>> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> @@ -899,7 +899,6 @@ int intel_gmbus_setup(struct drm_i915_private *i915)
>> }
>>
>> bus->adapter.owner = THIS_MODULE;
>> -bus->adapter.class = I2C_CLASS_DDC;
>> snprintf(bus->adapter.name,
>> sizeof(bus->adapter.name),
>> "i915 gmbus %s", gmbus_pin->name);
>> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
>> b/drivers/gpu/drm/i915/display/intel_sdvo.c
>> index a636f42ce..5e64d1baf 100644
>> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
>> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
>> @@ -3311,7 +3311,6 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
>> ddc->ddc_bus = ddc_bus;
>>
>> ddc->ddc.owner = THIS_MODULE;
>> -ddc->ddc.class = I2C_CLASS_DDC;
>> snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d",
>> port_name(sdvo->base.port), ddc_bus);
>> ddc->ddc.dev.parent = >dev;
>>
>
[Intel-gfx] [PATCH 00/20] remove I2C_CLASS_DDC support
After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC. Class-based device auto-detection is a legacy mechanism and shouldn't be used in new code. So we can remove this class completely now. Preferably this series should be applied via the i2c tree. Signed-off-by: Heiner Kallweit --- drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c |1 - drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |1 - drivers/gpu/drm/ast/ast_i2c.c |1 - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |1 - drivers/gpu/drm/display/drm_dp_helper.c |1 - drivers/gpu/drm/display/drm_dp_mst_topology.c |1 - drivers/gpu/drm/gma500/cdv_intel_dp.c |1 - drivers/gpu/drm/gma500/intel_gmbus.c |1 - drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c|1 - drivers/gpu/drm/gma500/psb_intel_sdvo.c |1 - drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c |1 - drivers/gpu/drm/i915/display/intel_gmbus.c|1 - drivers/gpu/drm/i915/display/intel_sdvo.c |1 - drivers/gpu/drm/loongson/lsdc_i2c.c |1 - drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c |1 - drivers/gpu/drm/mgag200/mgag200_i2c.c |1 - drivers/gpu/drm/msm/hdmi/hdmi_i2c.c |1 - drivers/gpu/drm/radeon/radeon_i2c.c |1 - drivers/gpu/drm/rockchip/inno_hdmi.c |1 - drivers/gpu/drm/rockchip/rk3066_hdmi.c|1 - drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c|1 - drivers/video/fbdev/core/fb_ddc.c |1 - drivers/video/fbdev/cyber2000fb.c |1 - drivers/video/fbdev/i740fb.c |1 - drivers/video/fbdev/intelfb/intelfb_i2c.c | 15 +-- drivers/video/fbdev/matrox/i2c-matroxfb.c | 12 drivers/video/fbdev/s3fb.c|1 - drivers/video/fbdev/tdfxfb.c |1 - drivers/video/fbdev/tridentfb.c |1 - drivers/video/fbdev/via/via_i2c.c |1 - include/linux/i2c.h |1 - 31 files changed, 9 insertions(+), 47 deletions(-)
[Intel-gfx] [PATCH 1/2] fuse: ensure submount_lookup is initialized on alloc
When introduced, the submount lookup reference tracking neglected to set
an initial value in the fuse inode as part of fuse_inode_alloc. Users
running with SLUB_DEBUG enabled caught and reported this error. Fix by
ensuring that this value is always initialized to NULL.
Signed-off-by: Krister Johansen
Cc: sta...@vger.kernel.org
Fixes: 513dfacefd71 ("fuse: share lookup state between submount and its parent")
---
fs/fuse/inode.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 243bda3cfdf6..d7ebc322e55b 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -103,6 +103,7 @@ static struct inode *fuse_alloc_inode(struct super_block
*sb)
fi->state = 0;
mutex_init(>mutex);
spin_lock_init(>lock);
+ fi->submount_lookup = NULL;
fi->forget = fuse_alloc_forget();
if (!fi->forget)
goto out_free;
--
2.25.1
[Intel-gfx] [PATCH 0/2] Fuse submount_lookup needs to be initialized
Hi Miklos,
I got a couple of bug reports[1][2] this morning from teams that are
tracking regresssions in linux-next. My patch 513dfacefd71 ("fuse:
share lookup state between submount and its parent") is causing panics
in the fuse unmount path. The reports came from users with SLUB_DEBUG
enabled, and the additional debug sanitization catches the fact that the
submount_lookup field isn't getting initialized which could lead to a
subsequently bogus attempt to access the submount_lookup structure and
adjust its refcount.
I've added SLUB_DEBUG to my testing kconfig, and have reproduced the
problem using the memfd self-test that was triggering the problem for
both reporters. With the fix that follows this e-mail, I see no more
erroneous accesses of poisoned slub memory.
I'm a bit unsure of the desired approach for fixing these kinds of
problems. I'm also away from the office on Nov 10th and Nov 13th, but
expect to be back on the console on the Nov 14th. Given the gap, I've
prepared a pair of patches, but we only need one.
The first is simply a followup fix that addresses the problem in a
subsequent one-line commit.
If you'd rather revert the entire bad patch and go again, the second
patch in the series is a v5 of the original with the submount_lookup
initialization added.
Either should do, but I wasn't sure which approach was preferable.
Thanks, and my apologies for the inconvenience.
-K
[1]
https://lore.kernel.org/linux-fsdevel/ca+g9fyue-dv7t-nrohwwgshvyboxjb2b6hpcdvde3bgg7fb...@mail.gmail.com/T/#u
[2]
https://lore.kernel.org/intel-gfx/sj1pr11mb6129508509896ad7d0e03114b9...@sj1pr11mb6129.namprd11.prod.outlook.com/T/#u
Re: [Intel-gfx] Regression on linux-next (next-20231107)
Hi Chaitanya, On Thu, Nov 09, 2023 at 05:00:09PM +, Borah, Chaitanya Kumar wrote: > Hello Krister, > > Hope you are doing well. I am Chaitanya from the linux graphics team in Intel. > > This mail is regarding a regression we are seeing in our CI runs[1] for some > machines (dg2 and adl-p) on linux-next repository. > > Since the version next-20231107 [2], we are seeing the following error > ``` > <4>[ 32.015910] stack segment: [#1] PREEMPT SMP NOPTI > <4>[ 32.021048] CPU: 15 PID: 766 Comm: fusermount Not tainted > 6.6.0-next-20231107-next-20231107-g5cd631a52568+ #1 > <4>[ 32.031135] Hardware name: Intel Corporation Raptor Lake Client > Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.4221.A00.2305271351 > 05/27/2023 > <4>[ 32.044657] RIP: 0010:fuse_evict_inode+0x61/0x150 [fuse] > ` > > Details log can be found in [3]. > > After bisecting the tree, the following patch [4] seems to be the first "bad" > commit > > > ` > 513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5 is the first bad commit > commit 513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5 > Author: Krister Johansen k...@templeofstupid.com > Date: Fri Nov 3 10:39:47 2023 -0700 > > fuse: share lookup state between submount and its parent > > Fuse submounts do not perform a lookup for the nodeid that they inherit > from their parent. Instead, the code decrements the nlookup on the > submount's fuse_inode when it is instantiated, and no forget is > performed when a submount root is evicted. > > Trouble arises when the submount's parent is evicted despite the > submount itself being in use. In this author's case, the submount was > in a container and deatched from the initial mount namespace via a > MNT_DEATCH operation. When memory pressure triggered the shrinker, the > inode from the parent was evicted, which triggered enough forgets to > render the submount's nodeid invalid. > > Since submounts should still function, even if their parent goes away, > solve this problem by sharing refcounted state between the parent and > its submount. When all of the references on this shared state reach > zero, it's safe to forget the final lookup of the fuse nodeid. > > > ` > > We also verified that if we revert the patch the issue is not seen. > > Could you please check why the patch causes this regression and provide a fix > if necessary? Apologies for the inconvenience. I've reproduced the problem, tested a fix, and am in the process of preparing patches to send to Miklos. I'll cc the people on this e-mail in that thread. > [3] > http://gfx-ci.igk.intel.com/tree/linux-next/next-20231109/bat-dg2-14/boot0.txt This link didn't resolve in DNS when I tried to access it. I needed to use intel-gfx-ci.01.org as the hostname instead. Thanks, -K
Re: [Intel-gfx] [PATCH] drm: i915: Adapt to -Walloc-size
Jani Nikula writes:
> On Tue, 07 Nov 2023, Sam James wrote:
>> GCC 14 introduces a new -Walloc-size included in -Wextra which errors out
>> like:
>> ```
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c: In function
>> ‘eb_copy_relocations’:
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1681:24: error: allocation of
>> insufficient size ‘1’ for type ‘struct drm_i915_gem_relocation_entry’ with
>> size ‘32’ [-Werror=alloc-size]
>> 1681 | relocs = kvmalloc_array(size, 1, GFP_KERNEL);
>> |^
>>
>> ```
>>
>> So, just swap the number of members and size arguments to match the
>> prototype, as
>> we're initialising 1 element of size `size`. GCC then sees we're not
>> doing anything wrong.
>>
>> Signed-off-by: Sam James
>
> The short answer,
>
> Reviewed-by: Jani Nikula
>
> but please read on.
>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> index 683fd8d3151c..45b9d9e34b8b 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> @@ -1678,7 +1678,7 @@ static int eb_copy_relocations(const struct
>> i915_execbuffer *eb)
>> urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
>> size = nreloc * sizeof(*relocs);
>>
>> -relocs = kvmalloc_array(size, 1, GFP_KERNEL);
>> +relocs = kvmalloc_array(1, size, GFP_KERNEL);
>
> Based on the patch context, we should really be calling:
>
> kvmalloc_array(nreloc, sizeof(*relocs), GFP_KERNEL);
>
> and we'd get mul overflow checks too.
>
> However, the code below also needs size, unless it's refactored to
> operate on multiples of sizeof(*relocs) and it all gets a bit annoying.
>
> Maybe there's a better way, but for the short term the patch at hand is
> no worse than what we currently have, and it'll silence the warning, so
> let's go with this.
Thanks. I have been trying to port to kvmalloc_array where I can if it's
obvious/trivial, but I admit I didn't want to take it on when it'd
require any surrounding refactoring unless someone insisted.
>
>
>> if (!relocs) {
>> err = -ENOMEM;
>> goto err;
best,
sam
Re: [Intel-gfx] [PATCH 0/2] Fuse submount_lookup needs to be initialized
On Thu, 9 Nov 2023 at 23:37, Krister Johansen wrote: > Either should do, but I wasn't sure which approach was preferable. An incremental is better in this situation. Applied and pushed. > Thanks, and my apologies for the inconvenience. Really no need to apologize, this happens and the best possible outcome is that it get fixed before being released. Thanks, Miklos
Re: [Intel-gfx] [PATCH 15/20] drivers/gpu/drm/i915/display: remove I2C_CLASS_DDC support
On Mon, 13 Nov 2023, Heiner Kallweit wrote: > After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in > olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC. > Class-based device auto-detection is a legacy mechanism and shouldn't > be used in new code. So we can remove this class completely now. So this is copy-pasted to all commits and the cover letter, but please do explain why there are no functional changes here (or are there?), without me having to go through the i2c stack and try to find the commits alluded to in "After removal of the legacy ...". What does this mean? BR, Jani. > > Preferably this series should be applied via the i2c tree. > > Signed-off-by: Heiner Kallweit > > --- > drivers/gpu/drm/i915/display/intel_gmbus.c |1 - > drivers/gpu/drm/i915/display/intel_sdvo.c |1 - > 2 files changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c > b/drivers/gpu/drm/i915/display/intel_gmbus.c > index 40d7b6f3f..e9e4dcf34 100644 > --- a/drivers/gpu/drm/i915/display/intel_gmbus.c > +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c > @@ -899,7 +899,6 @@ int intel_gmbus_setup(struct drm_i915_private *i915) > } > > bus->adapter.owner = THIS_MODULE; > - bus->adapter.class = I2C_CLASS_DDC; > snprintf(bus->adapter.name, >sizeof(bus->adapter.name), >"i915 gmbus %s", gmbus_pin->name); > diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c > b/drivers/gpu/drm/i915/display/intel_sdvo.c > index a636f42ce..5e64d1baf 100644 > --- a/drivers/gpu/drm/i915/display/intel_sdvo.c > +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c > @@ -3311,7 +3311,6 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc, > ddc->ddc_bus = ddc_bus; > > ddc->ddc.owner = THIS_MODULE; > - ddc->ddc.class = I2C_CLASS_DDC; > snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d", >port_name(sdvo->base.port), ddc_bus); > ddc->ddc.dev.parent = >dev; > -- Jani Nikula, Intel
[Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v3
Instead of a list of separate busy placement add flags which indicate
that a placement should only be used when there is room or if we need to
evict.
v2: add missing TTM_PL_FLAG_IDLE for i915
v3: fix auto build test ERROR on drm-tip/drm-tip
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 11 +--
drivers/gpu/drm/drm_gem_vram_helper.c | 2 -
drivers/gpu/drm/i915/gem/i915_gem_ttm.c| 37
drivers/gpu/drm/loongson/lsdc_ttm.c| 2 -
drivers/gpu/drm/nouveau/nouveau_bo.c | 59 +
drivers/gpu/drm/nouveau/nouveau_bo.h | 1 -
drivers/gpu/drm/qxl/qxl_object.c | 2 -
drivers/gpu/drm/qxl/qxl_ttm.c | 2 -
drivers/gpu/drm/radeon/radeon_object.c | 2 -
drivers/gpu/drm/radeon/radeon_ttm.c| 8 +-
drivers/gpu/drm/radeon/radeon_uvd.c| 1 -
drivers/gpu/drm/ttm/ttm_bo.c | 21 +++--
drivers/gpu/drm/ttm/ttm_resource.c | 73
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 3 +-
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 99 +-
include/drm/ttm/ttm_placement.h| 10 ++-
include/drm/ttm/ttm_resource.h | 8 +-
18 files changed, 160 insertions(+), 187 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index ace837cfa0a6..e4a0cace14da 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -220,9 +220,6 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo,
u32 domain)
placement->num_placement = c;
placement->placement = places;
-
- placement->num_busy_placement = c;
- placement->busy_placement = places;
}
/**
@@ -1411,8 +1408,7 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct
ttm_buffer_object *bo)
AMDGPU_GEM_DOMAIN_GTT);
/* Avoid costly evictions; only set GTT as a busy placement */
- abo->placement.num_busy_placement = 1;
- abo->placement.busy_placement = >placements[1];
+ abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
r = ttm_bo_validate(bo, >placement, );
if (unlikely(r == -EBUSY || r == -ERESTARTSYS))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 4e51dce3aab5..2d9d57d27030 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -102,23 +102,19 @@ static void amdgpu_evict_flags(struct ttm_buffer_object
*bo,
/* Don't handle scatter gather BOs */
if (bo->type == ttm_bo_type_sg) {
placement->num_placement = 0;
- placement->num_busy_placement = 0;
return;
}
/* Object isn't an AMDGPU object so ignore */
if (!amdgpu_bo_is_amdgpu_bo(bo)) {
placement->placement =
- placement->busy_placement =
placement->num_placement = 1;
- placement->num_busy_placement = 1;
return;
}
abo = ttm_to_amdgpu_bo(bo);
if (abo->flags & AMDGPU_GEM_CREATE_DISCARDABLE) {
placement->num_placement = 0;
- placement->num_busy_placement = 0;
return;
}
@@ -128,13 +124,13 @@ static void amdgpu_evict_flags(struct ttm_buffer_object
*bo,
case AMDGPU_PL_OA:
case AMDGPU_PL_DOORBELL:
placement->num_placement = 0;
- placement->num_busy_placement = 0;
return;
case TTM_PL_VRAM:
if (!adev->mman.buffer_funcs_enabled) {
/* Move to system memory */
amdgpu_bo_placement_from_domain(abo,
AMDGPU_GEM_DOMAIN_CPU);
+
} else if (!amdgpu_gmc_vram_full_visible(>gmc) &&
!(abo->flags &
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) &&
amdgpu_bo_in_cpu_visible_vram(abo)) {
@@ -149,8 +145,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
AMDGPU_GEM_DOMAIN_CPU);
abo->placements[0].fpfn = adev->gmc.visible_vram_size
>> PAGE_SHIFT;
abo->placements[0].lpfn = 0;
- abo->placement.busy_placement = >placements[1];
- abo->placement.num_busy_placement = 1;
+ abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
} else {
/* Move to GTT memory */
amdgpu_bo_placement_from_domain(abo,
AMDGPU_GEM_DOMAIN_GTT |
@@ -967,8 +962,6 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
/* allocate GART space */
placement.num_placement = 1;
placement.placement =
- placement.num_busy_placement = 1;
[Intel-gfx] [PATCH] drm/i915/mtl: Use int for entry setup frames
At least one TGL had regression when using u8 types
for entry setup frames calculation. So, let's switch
to use ints instead.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 3691f882e1c0..a4417e85f92a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1093,12 +1093,12 @@ static bool _compute_psr2_wake_times(struct intel_dp
*intel_dp,
return true;
}
-static u8 intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
- const struct drm_display_mode
*adjusted_mode)
+static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
+ const struct drm_display_mode
*adjusted_mode)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
int psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
- u8 entry_setup_frames = 0;
+ int entry_setup_frames = 0;
if (psr_setup_time < 0) {
drm_dbg_kms(>drm,
--
2.34.1
[Intel-gfx] [PATCH 2/2] drm/i915: Add __rcu annotation to cursor when iterating client objects
From: Tvrtko Ursulin
__rcu annotation is needed to avoid the sparse warnings such as:
.../i915_drm_client.c:92:9: sparse: sparse: incompatible types in comparison
expression (different address spaces):
.../i915_drm_client.c:92:9: sparse:struct list_head [noderef] __rcu *
.../i915_drm_client.c:92:9: sparse:struct list_head *
Signed-off-by: Tvrtko Ursulin
Fixes: 968853033d8a ("drm/i915: Implement fdinfo memory stats printing")
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/20230610.h0m6ydi5-...@intel.com/
Cc: Andi Shyti
Cc: Aravind Iddamsetty
---
drivers/gpu/drm/i915/i915_drm_client.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index be9acfd9410e..fa6852713bee 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -78,7 +78,7 @@ static void show_meminfo(struct drm_printer *p, struct
drm_file *file)
struct drm_i915_private *i915 = fpriv->i915;
struct drm_i915_gem_object *obj;
struct intel_memory_region *mr;
- struct list_head *pos;
+ struct list_head __rcu *pos;
unsigned int id;
/* Public objects. */
--
2.40.1
[Intel-gfx] [PATCH 1/2] drm/i915: Remove return type from i915_drm_client_remove_object
From: Tvrtko Ursulin
There is no need to return anything in the version which was merged and
also the implementation of the !CONFIG_PROC_FS wasn't returning anything,
causing a build failure there.
Signed-off-by: Tvrtko Ursulin
Fixes: e4ae85e364fc ("drm/i915: Add ability for tracking buffer objects per
client")
Cc: Aravind Iddamsetty
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/20230104.8tlhvxui-...@intel.com/
---
drivers/gpu/drm/i915/i915_drm_client.c | 6 ++
drivers/gpu/drm/i915/i915_drm_client.h | 5 +++--
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index 7efffdaa508d..be9acfd9410e 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -191,22 +191,20 @@ void i915_drm_client_add_object(struct i915_drm_client
*client,
spin_unlock_irqrestore(>objects_lock, flags);
}
-bool i915_drm_client_remove_object(struct drm_i915_gem_object *obj)
+void i915_drm_client_remove_object(struct drm_i915_gem_object *obj)
{
struct i915_drm_client *client = fetch_and_zero(>client);
unsigned long flags;
/* Object may not be associated with a client. */
if (!client)
- return false;
+ return;
spin_lock_irqsave(>objects_lock, flags);
list_del_rcu(>client_link);
spin_unlock_irqrestore(>objects_lock, flags);
i915_drm_client_put(client);
-
- return true;
}
void i915_drm_client_add_context_objects(struct i915_drm_client *client,
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
b/drivers/gpu/drm/i915/i915_drm_client.h
index 69cedfcd3d69..a439dd789936 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -70,7 +70,7 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file);
#ifdef CONFIG_PROC_FS
void i915_drm_client_add_object(struct i915_drm_client *client,
struct drm_i915_gem_object *obj);
-bool i915_drm_client_remove_object(struct drm_i915_gem_object *obj);
+void i915_drm_client_remove_object(struct drm_i915_gem_object *obj);
void i915_drm_client_add_context_objects(struct i915_drm_client *client,
struct intel_context *ce);
#else
@@ -79,7 +79,8 @@ static inline void i915_drm_client_add_object(struct
i915_drm_client *client,
{
}
-static inline bool i915_drm_client_remove_object(struct drm_i915_gem_object
*obj)
+static inline void
+i915_drm_client_remove_object(struct drm_i915_gem_object *obj)
{
}
--
2.40.1
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Remove dead code around intel_atomic_helper->free_list (rev2)
== Series Details == Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list (rev2) URL : https://patchwork.freedesktop.org/series/126250/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13867 -> Patchwork_126250v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126250v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126250v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v2/index.html Participating hosts (34 -> 29) -- Missing(5): bat-adlp-11 bat-dg2-8 bat-adlm-1 bat-dg2-9 bat-atsm-1 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126250v2: ### IGT changes ### Possible regressions * igt@gem_exec_store@basic: - bat-adls-5: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13867/bat-adls-5/igt@gem_exec_st...@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v2/bat-adls-5/igt@gem_exec_st...@basic.html Known issues Here are the changes found in Patchwork_126250v2 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:[PASS][3] -> [FAIL][4] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13867/fi-hsw-4770/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v2/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][5] -> [FAIL][6] ([IGT#3]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13867/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293 Build changes - * Linux: CI_DRM_13867 -> Patchwork_126250v2 CI-20190529: 20190529 CI_DRM_13867: 9f915320c4175ba86dfe59142b1d2a64337152d1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7582: 453b9df12fbc9fff561bdb4eb97992983e74c3d4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_126250v2: 9f915320c4175ba86dfe59142b1d2a64337152d1 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 72bb98207ca2 drm/i915/display: Remove dead code around intel_atomic_helper->free_list == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v2/index.html
