Re: [PATCH v14 4/9] drm/i915/dp: Add Read/Write support for Adaptive Sync SDP

2024-02-29 Thread Nautiyal, Ankit K



On 2/29/2024 10:09 PM, Mitul Golani wrote:

Add the necessary structures and functions to handle reading and
unpacking Adaptive Sync Secondary Data Packets. Also add support
to write and pack AS SDP.

--v2:
- Correct use of REG_BIT and REG_GENMASK. [Jani]
- Use as_sdp instead of async. [Jani]
- Remove unrelated comments and changes. [Jani]
- Correct code indent. [Jani]

--v3:
- Update definition names for AS SDP which are starting from
HSW, as these defines are applicable for ADLP+.(Ankit)

--v4:
- Remove as_sdp_mode from crtc_state.
- Drop metadata keyword.
- For consistency, update ADL_ prefix or post fix as required.

--v5:
- Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not
   return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
Signed-off-by: Mitul Golani 
---
  .../drm/i915/display/intel_display_device.h   |  1 +
  drivers/gpu/drm/i915/display/intel_dp.c   | 91 +++
  drivers/gpu/drm/i915/display/intel_hdmi.c | 12 ++-
  drivers/gpu/drm/i915/i915_reg.h   |  8 ++
  include/drm/display/drm_dp_helper.h   |  2 +-
  5 files changed, 112 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h 
b/drivers/gpu/drm/i915/display/intel_display_device.h
index fe4268813786..6399fbc6c738 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -68,6 +68,7 @@ struct drm_printer;
  #define HAS_TRANSCODER(i915, trans)   
((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
  BIT(trans)) != 0)
  #define HAS_VRR(i915) (DISPLAY_VER(i915) >= 11)
+#define HAS_AS_SDP(i915)   (DISPLAY_VER(i915) >= 13)
  #define INTEL_NUM_PIPES(i915) 
(hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
  #define I915_HAS_HOTPLUG(i915)
(DISPLAY_INFO(i915)->has_hotplug)
  #define OVERLAY_NEEDS_PHYSICAL(i915)  
(DISPLAY_INFO(i915)->overlay_needs_physical)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index e13121dc3a03..7cf849015797 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4089,6 +4089,32 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state 
*crtc_state,
return false;
  }
  
+static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *as_sdp,

+   struct dp_sdp *sdp, size_t size)
+{
+   size_t length = sizeof(struct dp_sdp);
+
+   if (size < length)
+   return -ENOSPC;
+
+   memset(sdp, 0, size);
+
+   /* Prepare AS (Adaptive Sync) SDP Header */
+   sdp->sdp_header.HB0 = 0;
+   sdp->sdp_header.HB1 = as_sdp->sdp_type;
+   sdp->sdp_header.HB2 = 0x02;
+   sdp->sdp_header.HB3 = as_sdp->length;
+
+   /* Fill AS (Adaptive Sync) SDP Payload */
+   sdp->db[0] = as_sdp->mode;
+   sdp->db[1] = as_sdp->vtotal & 0xFF;
+   sdp->db[2] = (as_sdp->vtotal >> 8) & 0xFF;
+   sdp->db[3] = as_sdp->target_rr;
+   sdp->db[4] = (as_sdp->target_rr >> 8) & 0x3;
+
+   return length;
+}
+
  static ssize_t
  intel_dp_hdr_metadata_infoframe_sdp_pack(struct drm_i915_private *i915,
 const struct hdmi_drm_infoframe 
*drm_infoframe,
@@ -4188,6 +4214,10 @@ static void intel_write_dp_sdp(struct intel_encoder 
*encoder,
   
_state->infoframes.drm.drm,
   , 
sizeof(sdp));
break;
+   case DP_SDP_ADAPTIVE_SYNC:
+   len = intel_dp_as_sdp_pack(_state->infoframes.as_sdp, ,
+  sizeof(sdp));
+   break;
default:
MISSING_CASE(type);
return;
@@ -4209,6 +4239,10 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
 VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
 VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;
+
+   if (HAS_AS_SDP(dev_priv))
+   dip_enable |= VIDEO_DIP_ENABLE_AS_ADL;
+
u32 val = intel_de_read(dev_priv, reg) & ~dip_enable;
  
  	/* TODO: Sanitize DSC enabling wrt. intel_dsc_dp_pps_write(). */

@@ -4230,6 +4264,36 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
  }
  
+static

+int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
+  const void *buffer, size_t size)
+{
+   const struct dp_sdp *sdp = buffer;
+
+   if (size < sizeof(struct dp_sdp))
+   return -EINVAL;
+
+   memset(as_sdp, 0, sizeof(*as_sdp));
+
+   if (sdp->sdp_header.HB0 != 0)
+   return 

[RFC] drm/i915/dp: Log message when limiting SST link rate MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit

2024-02-29 Thread Charlton Lin
Driver currently limits link rate up to HBR3 in SST mode. Log a
message with monitor vendor, product id, and MSTM_CAP to
help understand what monitors are being downgraded by this limit.

Cc: Ville Syrjälä 
Cc: Khaled Almahallawy 
Cc: Sean Paul 
Signed-off-by: Charlton Lin 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 6ece2c563c7a..0b2d6d88fd37 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2437,6 +2437,25 @@ intel_dp_compute_link_config(struct intel_encoder 
*encoder,
 false,
 );
 
+   if (intel_dp_max_common_rate(intel_dp) > limits.max_rate) {
+   u8 mstm_cap;
+   u32 panel_id = drm_edid_get_panel_id(_dp->aux.ddc);
+   char vend[4];
+   u16 product_id;
+
+   drm_dbg_kms(>drm,
+   "Limiting LR from max common rate %d to %d\n",
+   intel_dp_max_common_rate(intel_dp), 
limits.max_rate);
+
+   drm_edid_decode_panel_id(panel_id, vend, _id);
+
+   if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_12 &&
+   drm_dp_dpcd_readb(_dp->aux, DP_MSTM_CAP, _cap) 
== 1)
+   drm_dbg_kms(>drm,
+   "Manufacturer=%s Model=%x Sink 
MSTM_CAP=%x\n",
+   vend, product_id, mstm_cap);
+   }
+
if (!dsc_needed) {
/*
 * Optimize for slow and wide for everything, because there are 
some
-- 
2.25.1



[PATCH v6 2/3] drm/i915: Remove extra multi-gt pm-references

2024-02-29 Thread Janusz Krzysztofik
There was an attempt to fix an issue of illegal attempts to free a still
active i915 VMA object when parking a GT believed to be idle, reported by
CI on 2-GT Meteor Lake.  As a solution, an extra wakeref for a Primary GT
was acquired from i915_gem_do_execbuffer() -- see commit f56fe3e91787
("drm/i915: Fix a VMA UAF for multi-gt platform").

However, that fix occurred insufficient -- the issue was still reported by
CI.  That wakeref was released on exit from i915_gem_do_execbuffer(), then
potentially before completion of the request and deactivation of its
associated VMAs.  Moreover, CI reports indicated that single-GT platforms
also suffered sporadically from the same race.

Since the issue has now been fixed by a preceding patch "drm/i915/vma: Fix
UAF on destroy against retire race", drop the no longer useful changes
introduced by that insufficient fix.

v3: Also drop the no longer used .wakeref_gt0 field from struct
i915_execbuffer.
v2: Avoid the word "revert" in commit message (Rodrigo),
  - update commit description reusing relevant chunks dropped from the
description of the proper fix (Rodrigo).

Signed-off-by: Janusz Krzysztofik 
Cc: Nirmoy Das 
Cc: Rodrigo Vivi 
---
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 18 --
 1 file changed, 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index d3a771afb083e..3f20fe3811999 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -255,7 +255,6 @@ struct i915_execbuffer {
struct intel_context *context; /* logical state for the request */
struct i915_gem_context *gem_context; /** caller's context */
intel_wakeref_t wakeref;
-   intel_wakeref_t wakeref_gt0;
 
/** our requests to build */
struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
@@ -2686,7 +2685,6 @@ static int
 eb_select_engine(struct i915_execbuffer *eb)
 {
struct intel_context *ce, *child;
-   struct intel_gt *gt;
unsigned int idx;
int err;
 
@@ -2710,17 +2708,10 @@ eb_select_engine(struct i915_execbuffer *eb)
}
}
eb->num_batches = ce->parallel.number_children + 1;
-   gt = ce->engine->gt;
 
for_each_child(ce, child)
intel_context_get(child);
eb->wakeref = intel_gt_pm_get(ce->engine->gt);
-   /*
-* Keep GT0 active on MTL so that i915_vma_parked() doesn't
-* free VMAs while execbuf ioctl is validating VMAs.
-*/
-   if (gt->info.id)
-   eb->wakeref_gt0 = intel_gt_pm_get(to_gt(gt->i915));
 
if (!test_bit(CONTEXT_ALLOC_BIT, >flags)) {
err = intel_context_alloc_state(ce);
@@ -2759,9 +2750,6 @@ eb_select_engine(struct i915_execbuffer *eb)
return err;
 
 err:
-   if (gt->info.id)
-   intel_gt_pm_put(to_gt(gt->i915), eb->wakeref_gt0);
-
intel_gt_pm_put(ce->engine->gt, eb->wakeref);
for_each_child(ce, child)
intel_context_put(child);
@@ -2775,12 +2763,6 @@ eb_put_engine(struct i915_execbuffer *eb)
struct intel_context *child;
 
i915_vm_put(eb->context->vm);
-   /*
-* This works in conjunction with eb_select_engine() to prevent
-* i915_vma_parked() from interfering while execbuf validates vmas.
-*/
-   if (eb->gt->info.id)
-   intel_gt_pm_put(to_gt(eb->gt->i915), eb->wakeref_gt0);
intel_gt_pm_put(eb->context->engine->gt, eb->wakeref);
for_each_child(eb->context, child)
intel_context_put(child);
-- 
2.43.0



[PATCH v6 3/3] Revert "drm/i915: Wait for active retire before i915_active_fini()"

2024-02-29 Thread Janusz Krzysztofik
This reverts commit 7a2280e8dcd2f1f436db9631287c0b21cf6a92b0, obsoleted
by "drm/i915/vma: Fix UAF on destroy against retire race".

Signed-off-by: Janusz Krzysztofik 
Cc: Nirmoy Das 
---
 drivers/gpu/drm/i915/i915_vma.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index ffe81fe338f7e..00ce9e20deb2d 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -1752,8 +1752,6 @@ static void release_references(struct i915_vma *vma, 
struct intel_gt *gt,
if (vm_ddestroy)
i915_vm_resv_put(vma->vm);
 
-   /* Wait for async active retire */
-   i915_active_wait(>active);
i915_active_fini(>active);
GEM_WARN_ON(vma->resource);
i915_vma_free(vma);
-- 
2.43.0



[PATCH v6 1/3] drm/i915/vma: Fix UAF on destroy against retire race

2024-02-29 Thread Janusz Krzysztofik
Object debugging tools were sporadically reporting illegal attempts to
free a still active i915 VMA object when parking a GT believed to be idle.

[161.359441] ODEBUG: free active (active state 0) object: 88811643b958 
object type: i915_active hint: __i915_vma_active+0x0/0x50 [i915]
[161.360082] WARNING: CPU: 5 PID: 276 at lib/debugobjects.c:514 
debug_print_object+0x80/0xb0
...
[161.360304] CPU: 5 PID: 276 Comm: kworker/5:2 Not tainted 
6.5.0-rc1-CI_DRM_13375-g003f860e5577+ #1
[161.360314] Hardware name: Intel Corporation Rocket Lake Client 
Platform/RocketLake S UDIMM 6L RVP, BIOS RKLSFWI1.R00.3173.A03.2204210138 
04/21/2022
[161.360322] Workqueue: i915-unordered __intel_wakeref_put_work [i915]
[161.360592] RIP: 0010:debug_print_object+0x80/0xb0
...
[161.361347] debug_object_free+0xeb/0x110
[161.361362] i915_active_fini+0x14/0x130 [i915]
[161.361866] release_references+0xfe/0x1f0 [i915]
[161.362543] i915_vma_parked+0x1db/0x380 [i915]
[161.363129] __gt_park+0x121/0x230 [i915]
[161.363515] intel_wakeref_put_last+0x1f/0x70 [i915]

That has been tracked down to be happening when another thread is
deactivating the VMA inside __active_retire() helper, after the VMA's
active counter has been already decremented to 0, but before deactivation
of the VMA's object is reported to the object debugging tool.

We could prevent from that race by serializing i915_active_fini() with
__active_retire() via ref->tree_lock, but that wouldn't stop the VMA from
being used, e.g. from __i915_vma_retire() called at the end of
__active_retire(), after that VMA has been already freed by a concurrent
i915_vma_destroy() on return from the i915_active_fini().  Then, we should
rather fix the issue at the VMA level, not in i915_active.

Since __i915_vma_parked() is called from __gt_park() on last put of the
GT's wakeref, the issue could be addressed by holding the GT wakeref long
enough for __active_retire() to complete before that wakeref is released
and the GT parked.

I believe the issue was introduced by commit d93939730347 ("drm/i915:
Remove the vma refcount") which moved a call to i915_active_fini() from
a dropped i915_vma_release(), called on last put of the removed VMA kref,
to i915_vma_parked() processing path called on last put of a GT wakeref.
However, its visibility to the object debugging tool was suppressed by a
bug in i915_active that was fixed two weeks later with commit e92eb246feb9
("drm/i915/active: Fix missing debug object activation").

A VMA associated with a request doesn't acquire a GT wakeref by itself.
Instead, it depends on a wakeref held directly by the request's active
intel_context for a GT associated with its VM, and indirectly on that
intel_context's engine wakeref if the engine belongs to the same GT as the
VMA's VM.  Those wakerefs are released asynchronously to VMA deactivation.

Fix the issue by getting a wakeref for the VMA's GT when activating it,
and putting that wakeref only after the VMA is deactivated.  However,
exclude global GTT from that processing path, otherwise the GPU never goes
idle.  Since __i915_vma_retire() may be called from atomic contexts, use
async variant of wakeref put.  Also, to avoid circular locking dependency,
take care of acquiring the wakeref before VM mutex when both are needed.

v6: Since __i915_vma_active/retire() callbacks are not serialized, storing
a wakeref tracking handle inside struct i915_vma is not safe, and
there is no other good place for that.  Use untracked variants of
intel_gt_pm_get/put_async().
v5: Replace "tile" with "GT" across commit description (Rodrigo),
  - avoid mentioning multi-GT case in commit description (Rodrigo),
  - explain why we need to take a temporary wakeref unconditionally inside
i915_vma_pin_ww() (Rodrigo).
v4: Refresh on top of commit 5e4e06e4087e ("drm/i915: Track gt pm
wakerefs") (Andi),
  - for more easy backporting, split out removal of former insufficient
workarounds and move them to separate patches (Nirmoy).
  - clean up commit message and description a bit.
v3: Identify root cause more precisely, and a commit to blame,
  - identify and drop former workarounds,
  - update commit message and description.
v2: Get the wakeref before VM mutex to avoid circular locking dependency,
  - drop questionable Fixes: tag.

Fixes: d93939730347 ("drm/i915: Remove the vma refcount")
Closes: https://gitlab.freedesktop.org/drm/intel/issues/8875
Signed-off-by: Janusz Krzysztofik 
Cc: Thomas Hellström 
Cc: Nirmoy Das 
Cc: Andi Shyti 
Cc: Rodrigo Vivi 
Cc: sta...@vger.kernel.org # v5.19+
---
 drivers/gpu/drm/i915/i915_vma.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index d09aad34ba37f..ffe81fe338f7e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -34,6 +34,7 @@
 #include "gt/intel_engine.h"
 #include "gt/intel_engine_heartbeat.h"
 #include "gt/intel_gt.h"

[PATCH v6 0/3] drm/i915: Fix VMA UAF on destroy against deactivate race

2024-02-29 Thread Janusz Krzysztofik
Object debugging tools were sporadically reporting illegal attempts to
free a still active i915 VMA object when parking a GT believed to be idle.

[161.359441] ODEBUG: free active (active state 0) object: 88811643b958 
object type: i915_active hint: __i915_vma_active+0x0/0x50 [i915]
[161.360082] WARNING: CPU: 5 PID: 276 at lib/debugobjects.c:514 
debug_print_object+0x80/0xb0
...
[161.360304] CPU: 5 PID: 276 Comm: kworker/5:2 Not tainted 
6.5.0-rc1-CI_DRM_13375-g003f860e5577+ #1
[161.360314] Hardware name: Intel Corporation Rocket Lake Client 
Platform/RocketLake S UDIMM 6L RVP, BIOS RKLSFWI1.R00.3173.A03.2204210138 
04/21/2022
[161.360322] Workqueue: i915-unordered __intel_wakeref_put_work [i915]
[161.360592] RIP: 0010:debug_print_object+0x80/0xb0
...
[161.361347] debug_object_free+0xeb/0x110
[161.361362] i915_active_fini+0x14/0x130 [i915]
[161.361866] release_references+0xfe/0x1f0 [i915]
[161.362543] i915_vma_parked+0x1db/0x380 [i915]
[161.363129] __gt_park+0x121/0x230 [i915]
[161.363515] intel_wakeref_put_last+0x1f/0x70 [i915]

That has been tracked down to be happening when another thread is
deactivating the VMA inside __active_retire() helper, after the VMA's
active counter has been already decremented to 0, but before deactivation
of the VMA's object is reported to the object debugging tool.

We could prevent from that race by serializing i915_active_fini() with
__active_retire() via ref->tree_lock, but that wouldn't stop the VMA from
being used, e.g. from __i915_vma_retire() called at the end of
__active_retire(), after that VMA has been already freed by a concurrent
i915_vma_destroy() on return from the i915_active_fini().  Then, we should
rather fix the issue at the VMA level, not in i915_active.

Since __i915_vma_parked() is called from __gt_park() on last put of the
GT's wakeref, the issue could be addressed by holding the GT wakeref long
enough for __active_retire() to complete before that wakeref is released
and the GT parked.

A VMA associated with a request doesn't acquire a GT wakeref by itself.
Instead, it depends on a wakeref held directly by the request's active
intel_context for a GT associated with its VM, and indirectly on that
intel_context's engine wakeref if the engine belongs to the same GT as the
VMA's VM.  Those wakerefs are released asynchronously to VMA deactivation.

In case of single-GT platforms, at least one of those wakerefs is usually
held long enough for the request's VMA to be deactivated on time, before
it is destroyed on last put of its VM GT wakeref.  However, on multi-GT
platforms, a request may use a VMA from a GT other than the one that hosts
the request's engine, then it is protected only with the intel_context's
VM GT wakeref.

There was an attempt to fix the issue on 2-GT Meteor Lake by acquiring an
extra wakeref for a Primary GT from i915_gem_do_execbuffer() -- see commit
f56fe3e91787 ("drm/i915: Fix a VMA UAF for multi-gt platform").  However,
that fix occurred insufficient -- the issue was still reported by CI.
That wakeref was released on exit from i915_gem_do_execbuffer(), then
potentially before completion of the request and deactivation of its
associated VMAs.  Moreover, CI reports indicated that single-GT platforms
also suffered sporadically from the same race.

I believe the issue was introduced by commit d93939730347 ("drm/i915:
Remove the vma refcount") which moved a call to i915_active_fini() from
a dropped i915_vma_release(), called on last put of the removed VMA kref,
to i915_vma_parked() processing path called on last put of a GT wakeref.
However, its visibility to the object debugging tool was suppressed by a
bug in i915_active that was fixed two weeks later with commit e92eb246feb9
("drm/i915/active: Fix missing debug object activation").

Fix the issue by getting a wakeref for the VMA's GT when activating it,
and putting that wakeref only after the VMA is deactivated.  However,
exclude global GTT from that processing path, otherwise the GPU never goes
idle.  Since __i915_vma_retire() may be called from atomic contexts, use
async variant of wakeref put.  Also, to avoid circular locking dependency,
take care of acquiring the wakeref before VM mutex when both are needed.

Having that fixed, stop explicitly acquiring the extra GT0 wakeref from
inside i915_gem_do_execbuffer(), and also drop an extra call to
i915_active_wait(), introduced by commit 7a2280e8dcd2 ("drm/i915: Wait for
active retire before i915_active_fini()") as another insufficient fix for
this UAF race.

v6: Since __i915_vma_active/retire() callbacks are not serialized, storing
a wakeref tracking handle inside struct i915_vma is not safe, and
there is no other good place for that.  Use untracked variants of
intel_gt_pm_get/put_async(),
  - drop no longer used .wakeref_gt0 field from struct i915_execbuffer.
v5: Replace "tile" with "GT" across commit descriptions (Rodrigo),
  - reword commit message and description of patch 2 reusing relevant
chunks moved there 

✗ Fi.CI.BUILD: failure for Fixed-type GENMASK/BIT (rev3)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Fixed-type GENMASK/BIT (rev3)
URL   : https://patchwork.freedesktop.org/series/129116/
State : failure

== Summary ==

Error: patch 
https://patchwork.freedesktop.org/api/1.0/series/129116/revisions/3/mbox/ not 
applied
Applying: bits: introduce fixed-type genmasks
error: patch failed: include/linux/bits.h:22
error: include/linux/bits.h: patch does not apply
error: patch failed: lib/test_bits.c:5
error: lib/test_bits.c: patch does not apply
error: Did you hand edit your patch?
It does not apply to blobs recorded in its index.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Using index info to reconstruct a base tree...
Patch failed at 0001 bits: introduce fixed-type genmasks
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced




Re: linux-next: build failure after merge of the kunit-next tree

2024-02-29 Thread David Gow
On Thu, 29 Feb 2024 at 23:07, Shuah Khan  wrote:
>
> Hi Stephen,
>
> On 2/28/24 21:26, Stephen Rothwell wrote:
> > Hi all,
> >
> > After merging the kunit-next tree, today's linux-next build (x86_64
> > allmodconfig) failed like this:
> >
> > In file included from drivers/gpu/drm/tests/drm_buddy_test.c:7:
> > drivers/gpu/drm/tests/drm_buddy_test.c: In function 
> > 'drm_test_buddy_alloc_range_bias':
> > drivers/gpu/drm/tests/drm_buddy_test.c:191:40: error: format '%u' expects a 
> > matching 'unsigned int' argument [-Werror=format=]
> >191 |"buddy_alloc failed with 
> > bias(%x-%x), size=%u, ps=%u\n",
> >|
> > ^~~
> > include/kunit/test.h:597:37: note: in definition of macro '_KUNIT_FAILED'
> >597 | fmt,   
> > \
> >| ^~~
> > include/kunit/test.h:662:9: note: in expansion of macro 
> > 'KUNIT_UNARY_ASSERTION'
> >662 | KUNIT_UNARY_ASSERTION(test,
> > \
> >| ^
> > include/kunit/test.h:1233:9: note: in expansion of macro 
> > 'KUNIT_FALSE_MSG_ASSERTION'
> >   1233 | KUNIT_FALSE_MSG_ASSERTION(test,
> > \
> >| ^
> > drivers/gpu/drm/tests/drm_buddy_test.c:186:17: note: in expansion of macro 
> > 'KUNIT_ASSERT_FALSE_MSG'
> >186 | KUNIT_ASSERT_FALSE_MSG(test,
> >| ^~
> > drivers/gpu/drm/tests/drm_buddy_test.c:191:91: note: format string is 
> > defined here
> >191 |"buddy_alloc failed with 
> > bias(%x-%x), size=%u, ps=%u\n",
> >|
> >   ~^
> >|
> >|
> >|
> >unsigned int
> > cc1: all warnings being treated as errors
> >
> > Caused by commit
> >
> >806cb2270237 ("kunit: Annotate _MSG assertion variants with gnu printf 
> > specifiers")
> >
>
> Thank you. I did allmodconfig build on kselftest kunit branch to make
> sure all is well, before I pushed the commits.
>
> > interacting with commit
> >
> >c70703320e55 ("drm/tests/drm_buddy: add alloc_range_bias test")
>   >
> > from the drm-misc-fixes tree.
> >
> > I have applied the following patch for today (this should probably
> > actually be fixed in the drm-misc-fixes tree).
> >
>
> Danial, David,
>
> I can carry the fix through kselftest kunit if it works
> for all.

I'm happy for this to go in with the KUnit changes if that's the best
way to keep all of the printk formatting fixes together.


-- David

>
> > From: Stephen Rothwell 
> > Date: Thu, 29 Feb 2024 15:18:36 +1100
> > Subject: [PATCH] fix up for "drm/tests/drm_buddy: add alloc_range_bias test"
> >
> > Signed-off-by: Stephen Rothwell 
> > ---
> >   drivers/gpu/drm/tests/drm_buddy_test.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/tests/drm_buddy_test.c 
> > b/drivers/gpu/drm/tests/drm_buddy_test.c
> > index 1e73e3f0d278..369edf587b44 100644
> > --- a/drivers/gpu/drm/tests/drm_buddy_test.c
> > +++ b/drivers/gpu/drm/tests/drm_buddy_test.c
> > @@ -188,7 +188,7 @@ static void drm_test_buddy_alloc_range_bias(struct 
> > kunit *test)
> > bias_end, size, 
> > ps,
> > ,
> > 
> > DRM_BUDDY_RANGE_ALLOCATION),
> > -"buddy_alloc failed with bias(%x-%x), 
> > size=%u, ps=%u\n",
> > +"buddy_alloc failed with bias(%x-%x), 
> > size=%u\n",
> >  bias_start, bias_end, size);
> >   bias_rem -= size;
> >
>
> thanks,
> -- Shuah


smime.p7s
Description: S/MIME Cryptographic Signature


✓ Fi.CI.BAT: success for VBT read cleanup (rev2)

2024-02-29 Thread Patchwork
== Series Details ==

Series: VBT read cleanup (rev2)
URL   : https://patchwork.freedesktop.org/series/130528/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14370 -> Patchwork_130528v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/index.html

Participating hosts (43 -> 42)
--

  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130528v2 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-arls-3: [PASS][1] -> [FAIL][2] ([i915#10234])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-3/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-arls-3/boot.html

  
 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-jsl-1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-jsl-1:  NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- bat-jsl-1:  NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-jsl-1:  NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@kms_chamelium_edid@vga-edid-read:
- bat-dg2-13: NOTRUN -> [SKIP][8] ([Intel XE#484] / [i915#4550]) +1 
other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-dg2-13/igt@kms_chamelium_e...@vga-edid-read.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][9] ([Intel XE#484]) +1 other test 
skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-dg2-13/igt@kms_chamelium_...@dp-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1:  NOTRUN -> [SKIP][10] ([i915#4103]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-jsl-1:  NOTRUN -> [SKIP][11] ([i915#3555] / [i915#9886])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-1:  NOTRUN -> [SKIP][12] ([fdo#109285])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-1:  NOTRUN -> [SKIP][13] ([i915#3555])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-jsl-1/igt@kms_setm...@basic-clone-single-crtc.html

  
 Possible fixes 

  * igt@i915_selftest@live@dmabuf:
- bat-arls-1: [DMESG-FAIL][14] -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-1/igt@i915_selftest@l...@dmabuf.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-arls-1/igt@i915_selftest@l...@dmabuf.html

  * igt@i915_selftest@live@gt_timelines:
- {bat-arls-4}:   [INCOMPLETE][16] -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-4/igt@i915_selftest@live@gt_timelines.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130528v2/bat-arls-4/igt@i915_selftest@live@gt_timelines.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/484
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#10234]: https://gitlab.freedesktop.org/drm/intel/issues/10234
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4550]: https://gitlab.freedesktop.org/drm/intel/issues/4550
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
  [i915#9886]: https://gitlab.freedesktop.org/drm/intel/issues/9886


Build changes

Re: [PATCH v3 1/3] bits: introduce fixed-type genmasks

2024-02-29 Thread Lucas De Marchi

On Thu, Feb 29, 2024 at 08:27:30PM +0200, Andy Shevchenko wrote:

On Thu, Feb 29, 2024 at 12:21:34PM -0600, Lucas De Marchi wrote:

On Thu, Feb 29, 2024 at 12:49:57PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 28, 2024 at 05:39:21PM -0600, Lucas De Marchi wrote:
> > On Thu, Feb 22, 2024 at 06:49:59AM -0800, Yury Norov wrote:


...


> > I build-tested this in x86-64, x86-32 and arm64. I didn't like much the
> > need to fork the __GENMASK() implementation on the 2 sides of the ifdef
> > since I think the GENMASK_INPUT_CHECK() should be the one covering the
> > input checks. However to make it common we'd need to solve 2 problems:
> > the casts and the sizeof. The sizeof can be passed as arg to
> > __GENMASK(), however the casts I think would need a __CAST_U8(x)
> > or the like and sprinkle it everywhere, which would hurt readability.
> > Not pretty. Or go back to the original submission and make it less
> > horrible :-/
>
> I'm wondering if we can use _Generic() approach here.

in assembly?


Yes.


I added a _Generic() in a random .S and to my surprise the build didn't
break. Then I went to implement, and couldn't find where the _Generic()
would actually be useful. What I came up with builds for me with gcc on
x86-64, x86-32 and arm64.

I'm also adding some additional tests in lib/test_bits.c to cover the
expected values and types. Thoughts?

8<
Subject: [PATCH] bits: introduce fixed-type genmasks

Generalize __GENMASK() to support different types, and implement
fixed-types versions of GENMASK() based on it. The fixed-type version
allows more strict checks to the min/max values accepted, which is
useful for defining registers like implemented by i915 and xe drivers
with their REG_GENMASK*() macros.

The strict checks rely on shift-count-overflow compiler check to
fail the build if a number outside of the range allowed is passed.
Example:

#define FOO_MASK GENMASK_U32(33, 4)

will generate a warning like:

../include/linux/bits.h:48:23: warning: right shift count is negative 
[-Wshift-count-negative]
   48 |  (~literal(0) >> ((w) - 1 - (h)
  |   ^~

Some additional tests in lib/test_bits.c are added to cover the
expected/non-expected values and also that the result value matches the
expected type. Since those are known at build time, use static_assert()
instead of normal kunit tests.

Signed-off-by: Lucas De Marchi 
---
 include/linux/bits.h | 33 +++--
 lib/test_bits.c  | 21 +++--
 2 files changed, 42 insertions(+), 12 deletions(-)

diff --git a/include/linux/bits.h b/include/linux/bits.h
index 7c0cf5031abe8..6f089e71a195c 100644
--- a/include/linux/bits.h
+++ b/include/linux/bits.h
@@ -22,24 +22,37 @@
 #define GENMASK_INPUT_CHECK(h, l) \
(BUILD_BUG_ON_ZERO(__builtin_choose_expr( \
__is_constexpr((l) > (h)), (l) > (h), 0)))
+#define __CAST_T(t, v) ((t)v)
 #else
 /*
  * BUILD_BUG_ON_ZERO is not available in h files included from asm files,
  * disable the input check if that is the case.
  */
 #define GENMASK_INPUT_CHECK(h, l) 0
+#define __CAST_T(t, v) v
 #endif
 
-#define __GENMASK(h, l) \

-   (((~UL(0)) - (UL(1) << (l)) + 1) & \
-(~UL(0) >> (BITS_PER_LONG - 1 - (h
-#define GENMASK(h, l) \
-   (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
+/*
+ * Generate a mask for a specific type. @literal is the suffix to be used for
+ * an integer constant of that type and @width is the bits-per-type. Additional
+ * checks are made to guarantee the value returned fits in that type, relying
+ * on shift-count-overflow compiler check to detect incompatible arguments.
+ * For example, all these create build errors or warnings:
+ *
+ * - GENMASK(15, 20): wrong argument order
+ * - GENMASK(72, 15): doesn't fit unsigned long
+ * - GENMASK_U32(33, 15): doesn't fit in a u32
+ */
+#define __GENMASK(literal, w, h, l) \
+   (GENMASK_INPUT_CHECK(h, l) + \
+((~literal(0) - (literal(1) << (l)) + 1) & \
+(~literal(0) >> ((w) - 1 - (h)
 
-#define __GENMASK_ULL(h, l) \

-   (((~ULL(0)) - (ULL(1) << (l)) + 1) & \
-(~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h
-#define GENMASK_ULL(h, l) \
-   (GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))
+#define GENMASK(h, l)  __GENMASK(UL, BITS_PER_LONG, h, l)
+#define GENMASK_ULL(h, l)  __GENMASK(ULL, BITS_PER_LONG_LONG, h, l)
+#define GENMASK_U8(h, l)   __CAST_T(u8, __GENMASK(UL, 8, h, l))
+#define GENMASK_U16(h, l)  __CAST_T(u16, __GENMASK(UL, 16, h, l))
+#define GENMASK_U32(h, l)  __CAST_T(u32, __GENMASK(UL, 32, h, l))
+#define GENMASK_U64(h, l)  __CAST_T(u64, __GENMASK(ULL, 64, h, l))
 
 #endif	/* __LINUX_BITS_H */

diff --git a/lib/test_bits.c b/lib/test_bits.c
index c9368a2314e7c..e2fc1a1d38702 100644
--- a/lib/test_bits.c
+++ b/lib/test_bits.c
@@ -5,7 +5,16 @@
 
 #include 

 #include 
+#include 
 
+#define assert_type(t, x) _Generic(x, t: x, 

✗ Fi.CI.SPARSE: warning for VBT read cleanup (rev2)

2024-02-29 Thread Patchwork
== Series Details ==

Series: VBT read cleanup (rev2)
URL   : https://patchwork.freedesktop.org/series/130528/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




[PATCH v4] drm/i915: Show bios vbt when read from firmware/spi/oprom

2024-02-29 Thread Radhakrishna Sripada
Make debugfs vbt only shows valid vbt when read from ACPI opregion.
Make it work when read from firmware/spi/pci oprom cases.

v2: Extract getting vbt from different sources to its own function.
Protect sysfs write with vbt check(Jani)
v3: Fix CI error by probing bios vbt with runtime_pm wakeref

Cc: Jani Nikula 
Signed-off-by: Radhakrishna Sripada 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 62 ---
 1 file changed, 33 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index 44c9dfe86a00..3260aab63875 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3135,6 +3135,32 @@ static struct vbt_header *oprom_get_vbt(struct 
drm_i915_private *i915,
return NULL;
 }
 
+static const struct vbt_header *intel_bios_get_vbt(struct drm_i915_private 
*i915,
+  size_t *sizep)
+{
+   const struct vbt_header *vbt = NULL;
+   intel_wakeref_t wakeref;
+
+   with_intel_runtime_pm(>runtime_pm, wakeref) {
+   vbt = firmware_get_vbt(i915, sizep);
+
+   if (!vbt)
+   vbt = intel_opregion_get_vbt(i915, sizep);
+
+   /*
+* If the OpRegion does not have VBT, look in SPI flash
+* through MMIO or PCI mapping
+*/
+   if (!vbt && IS_DGFX(i915))
+   vbt = spi_oprom_get_vbt(i915, sizep);
+
+   if (!vbt)
+   vbt = oprom_get_vbt(i915, sizep);
+   }
+
+   return vbt;
+}
+
 /**
  * intel_bios_init - find VBT and initialize settings from the BIOS
  * @i915: i915 device instance
@@ -3146,7 +3172,6 @@ static struct vbt_header *oprom_get_vbt(struct 
drm_i915_private *i915,
 void intel_bios_init(struct drm_i915_private *i915)
 {
const struct vbt_header *vbt;
-   struct vbt_header *oprom_vbt = NULL;
const struct bdb_header *bdb;
 
INIT_LIST_HEAD(>display.vbt.display_devices);
@@ -3160,27 +3185,7 @@ void intel_bios_init(struct drm_i915_private *i915)
 
init_vbt_defaults(i915);
 
-   oprom_vbt = firmware_get_vbt(i915, NULL);
-   vbt = oprom_vbt;
-
-   if (!vbt) {
-   oprom_vbt = intel_opregion_get_vbt(i915, NULL);
-   vbt = oprom_vbt;
-   }
-
-   /*
-* If the OpRegion does not have VBT, look in SPI flash through MMIO or
-* PCI mapping
-*/
-   if (!vbt && IS_DGFX(i915)) {
-   oprom_vbt = spi_oprom_get_vbt(i915, NULL);
-   vbt = oprom_vbt;
-   }
-
-   if (!vbt) {
-   oprom_vbt = oprom_get_vbt(i915, NULL);
-   vbt = oprom_vbt;
-   }
+   vbt = intel_bios_get_vbt(i915, NULL);
 
if (!vbt)
goto out;
@@ -3213,7 +3218,7 @@ void intel_bios_init(struct drm_i915_private *i915)
parse_sdvo_device_mapping(i915);
parse_ddi_ports(i915);
 
-   kfree(oprom_vbt);
+   kfree(vbt);
 }
 
 static void intel_bios_init_panel(struct drm_i915_private *i915,
@@ -3743,13 +3748,12 @@ static int intel_bios_vbt_show(struct seq_file *m, void 
*unused)
const void *vbt;
size_t vbt_size;
 
-   /*
-* FIXME: VBT might originate from other places than opregion, and then
-* this would be incorrect.
-*/
-   vbt = intel_opregion_get_vbt(i915, _size);
-   if (vbt)
+   vbt = intel_bios_get_vbt(i915, _size);
+
+   if (vbt) {
seq_write(m, vbt, vbt_size);
+   kfree(vbt);
+   }
 
return 0;
 }
-- 
2.34.1



✓ Fi.CI.BAT: success for drm/i915: Add missing doc for drm_i915_reset_stats (rev2)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Add missing doc for drm_i915_reset_stats (rev2)
URL   : https://patchwork.freedesktop.org/series/130562/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14370 -> Patchwork_130562v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/index.html

Participating hosts (43 -> 41)
--

  Missing(2): bat-mtlp-8 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130562v2 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- fi-apl-guc: [PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-apl-guc/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/fi-apl-guc/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][3] ([Intel XE#484]) +1 other test 
skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/bat-dg2-13/igt@kms_chamelium_...@dp-hpd-fast.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][4] ([Intel XE#484] / [i915#4550]) +1 
other test skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/bat-dg2-13/igt@kms_chamelium_...@vga-hpd-fast.html

  
 Possible fixes 

  * igt@i915_selftest@live@dmabuf:
- bat-arls-1: [DMESG-FAIL][5] -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-1/igt@i915_selftest@l...@dmabuf.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/bat-arls-1/igt@i915_selftest@l...@dmabuf.html

  * igt@i915_selftest@live@gt_timelines:
- {bat-arls-4}:   [INCOMPLETE][7] -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-4/igt@i915_selftest@live@gt_timelines.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/bat-arls-4/igt@i915_selftest@live@gt_timelines.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/484
  [i915#4550]: https://gitlab.freedesktop.org/drm/intel/issues/4550
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293


Build changes
-

  * Linux: CI_DRM_14370 -> Patchwork_130562v2

  CI-20190529: 20190529
  CI_DRM_14370: c1a0f6caf0ffa81e77e74e04d937605a2e293774 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7738: 7738
  Patchwork_130562v2: c1a0f6caf0ffa81e77e74e04d937605a2e293774 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

b5af018b4a07 drm/i915: Add missing doc for drm_i915_reset_stats

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v2/index.html


✗ Fi.CI.SPARSE: warning for drm/i915: Add missing doc for drm_i915_reset_stats (rev2)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Add missing doc for drm_i915_reset_stats (rev2)
URL   : https://patchwork.freedesktop.org/series/130562/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




✗ Fi.CI.BAT: failure for Disable automatic load CCS load balancing (rev4)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Disable automatic load CCS load balancing (rev4)
URL   : https://patchwork.freedesktop.org/series/129951/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14370 -> Patchwork_129951v4


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_129951v4 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_129951v4, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/index.html

Participating hosts (43 -> 40)
--

  Missing(3): bat-arls-2 bat-jsl-1 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_129951v4:

### IGT changes ###

 Possible regressions 

  * igt@gem_close_race@basic-process:
- fi-blb-e6850:   [PASS][1] -> [FAIL][2] +10 other tests fail
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-blb-e6850/igt@gem_close_r...@basic-process.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/fi-blb-e6850/igt@gem_close_r...@basic-process.html
- fi-bsw-nick:[PASS][3] -> [FAIL][4] +15 other tests fail
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-bsw-nick/igt@gem_close_r...@basic-process.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/fi-bsw-nick/igt@gem_close_r...@basic-process.html
- bat-rplp-1: [PASS][5] -> [FAIL][6] +14 other tests fail
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-rplp-1/igt@gem_close_r...@basic-process.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-rplp-1/igt@gem_close_r...@basic-process.html

  * igt@gem_close_race@basic-threads:
- fi-cfl-guc: [PASS][7] -> [FAIL][8] +14 other tests fail
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-cfl-guc/igt@gem_close_r...@basic-threads.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/fi-cfl-guc/igt@gem_close_r...@basic-threads.html
- bat-jsl-3:  [PASS][9] -> [FAIL][10] +13 other tests fail
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-jsl-3/igt@gem_close_r...@basic-threads.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-jsl-3/igt@gem_close_r...@basic-threads.html

  * igt@gem_ctx_create@basic-files:
- bat-adlp-6: [PASS][11] -> [SKIP][12] +13 other tests skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-adlp-6/igt@gem_ctx_cre...@basic-files.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-adlp-6/igt@gem_ctx_cre...@basic-files.html

  * igt@gem_exec_fence@basic-await:
- bat-adlp-6: NOTRUN -> [SKIP][13] +5 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-adlp-6/igt@gem_exec_fe...@basic-await.html
- fi-rkl-11600:   NOTRUN -> [SKIP][14] +5 other tests skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/fi-rkl-11600/igt@gem_exec_fe...@basic-await.html
- bat-jsl-3:  NOTRUN -> [SKIP][15] +5 other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-jsl-3/igt@gem_exec_fe...@basic-await.html
- bat-adlp-9: NOTRUN -> [SKIP][16] +5 other tests skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-adlp-9/igt@gem_exec_fe...@basic-await.html

  * igt@gem_exec_fence@basic-wait:
- bat-adln-1: NOTRUN -> [SKIP][17] +5 other tests skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-adln-1/igt@gem_exec_fe...@basic-wait.html
- bat-adlm-1: NOTRUN -> [SKIP][18] +4 other tests skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-adlm-1/igt@gem_exec_fe...@basic-wait.html
- bat-rplp-1: NOTRUN -> [SKIP][19] +5 other tests skip
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/bat-rplp-1/igt@gem_exec_fe...@basic-wait.html
- fi-tgl-1115g4:  NOTRUN -> [SKIP][20] +5 other tests skip
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/fi-tgl-1115g4/igt@gem_exec_fe...@basic-wait.html

  * igt@gem_exec_parallel@engines@basic:
- fi-kbl-7567u:   [PASS][21] -> [FAIL][22] +13 other tests fail
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-kbl-7567u/igt@gem_exec_parallel@engi...@basic.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v4/fi-kbl-7567u/igt@gem_exec_parallel@engi...@basic.html
- bat-adln-1: [PASS][23] -> [FAIL][24] +14 other tests fail
   [23]: 

✗ Fi.CI.CHECKPATCH: warning for Disable automatic load CCS load balancing (rev4)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Disable automatic load CCS load balancing (rev4)
URL   : https://patchwork.freedesktop.org/series/129951/
State : warning

== Summary ==

Error: dim checkpatch failed
9d59a3a23381 drm/i915/gt: Refactor uabi engine class/instance list creation
-:54: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely 
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of 
BUG() or variants
#54: FILE: drivers/gpu/drm/i915/gt/intel_engine_user.c:233:
+   GEM_BUG_ON(uabi_class >= ARRAY_SIZE(class_instance));

-:70: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely 
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of 
BUG() or variants
#70: FILE: drivers/gpu/drm/i915/gt/intel_engine_user.c:247:
+   GEM_BUG_ON(uabi_class >=

total: 0 errors, 2 warnings, 0 checks, 56 lines checked
8b2b08e3b16c drm/i915/gt: Do not exposed fused off engines.
-:11: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#11: 
Requires: 4e4f77d74878 ("drm/i915/gt: Refactor uabi engine class/instance list 
creation")

total: 0 errors, 1 warnings, 0 checks, 18 lines checked
dcfb1f190d40 drm/i915/gt: Disable HW load balancing for CCS
1205dac76b84 drm/i915/gt: Enable only one CCS for compute workload
-:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#16: 
Requires: 4e4f77d74878 ("drm/i915/gt: Refactor uabi engine class/instance list 
creation")

total: 0 errors, 1 warnings, 0 checks, 54 lines checked




✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUX

2024-02-29 Thread Patchwork
== Series Details ==

Series: series starting with [1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to 
ICL_PORT_TX_DW6_AUX
URL   : https://patchwork.freedesktop.org/series/130581/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14370 -> Patchwork_130581v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/index.html

Participating hosts (43 -> 41)
--

  Missing(2): bat-arls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130581v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-arls-3: [PASS][1] -> [FAIL][2] ([i915#10234])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-3/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/bat-arls-3/boot.html
- fi-cfl-8109u:   [PASS][3] -> [FAIL][4] ([i915#8293])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-cfl-8109u/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][5] ([Intel XE#484]) +1 other test 
skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/bat-dg2-13/igt@kms_chamelium_...@dp-hpd-fast.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][6] ([Intel XE#484] / [i915#4550]) +1 
other test skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/bat-dg2-13/igt@kms_chamelium_...@vga-hpd-fast.html

  
 Possible fixes 

  * igt@i915_selftest@live@dmabuf:
- bat-arls-1: [DMESG-FAIL][7] -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-1/igt@i915_selftest@l...@dmabuf.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/bat-arls-1/igt@i915_selftest@l...@dmabuf.html

  * igt@i915_selftest@live@gt_timelines:
- {bat-arls-4}:   [INCOMPLETE][9] -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-4/igt@i915_selftest@live@gt_timelines.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/bat-arls-4/igt@i915_selftest@live@gt_timelines.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/484
  [i915#10234]: https://gitlab.freedesktop.org/drm/intel/issues/10234
  [i915#4550]: https://gitlab.freedesktop.org/drm/intel/issues/4550
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293


Build changes
-

  * Linux: CI_DRM_14370 -> Patchwork_130581v1

  CI-20190529: 20190529
  CI_DRM_14370: c1a0f6caf0ffa81e77e74e04d937605a2e293774 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7738: 7738
  Patchwork_130581v1: c1a0f6caf0ffa81e77e74e04d937605a2e293774 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

0c144112a027 drm/i915: Streamline eDP handling in 
icl_combo_phy_aux_power_well_enable()
0fa49ce48c9e drm/i915: Use pw_idx to derive PHY for ICL_LANE_ENABLE_AUX override
0286bc59ff54 drm/i915: Use REG_BIT() & co. in intel_combo_phy_regs.h
3a06bbca238d drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUX

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130581v1/index.html


Re: [PATCH] drm/i915/selftest_hangcheck: Check sanity with more patience

2024-02-29 Thread Andi Shyti
Hi Janusz,

On Wed, Feb 28, 2024 at 04:24:41PM +0100, Janusz Krzysztofik wrote:
> While trying to reproduce some other issues reported by CI for i915
> hangcheck live selftest, I found them hidden behind timeout failures
> reported by igt_hang_sanitycheck -- the very first hangcheck test case
> executed.
> 
> Feb 22 19:49:06 DUT1394ACMR kernel: calling  mei_gsc_driver_init+0x0/0xff0 
> [mei_gsc] @ 121074
> Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] DRM_I915_DEBUG 
> enabled
> Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] Cannot find any 
> crtc or sizes
> Feb 22 19:49:06 DUT1394ACMR kernel: probe of i915.mei-gsc.768 returned 0 
> after 1475 usecs
> Feb 22 19:49:06 DUT1394ACMR kernel: probe of i915.mei-gscfi.768 returned 0 
> after 1441 usecs
> Feb 22 19:49:06 DUT1394ACMR kernel: initcall mei_gsc_driver_init+0x0/0xff0 
> [mei_gsc] returned 0 after 3010 usecs
> Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] 
> DRM_I915_DEBUG_GEM enabled
> Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] 
> DRM_I915_DEBUG_RUNTIME_PM enabled
> Feb 22 19:49:06 DUT1394ACMR kernel: i915: Performing live selftests with 
> st_random_seed=0x4c26c048 st_timeout=500
> Feb 22 19:49:07 DUT1394ACMR kernel: i915: Running hangcheck
> Feb 22 19:49:07 DUT1394ACMR kernel: calling  mei_hdcp_driver_init+0x0/0xff0 
> [mei_hdcp] @ 121074
> Feb 22 19:49:07 DUT1394ACMR kernel: i915: Running 
> intel_hangcheck_live_selftests/igt_hang_sanitycheck
> Feb 22 19:49:07 DUT1394ACMR kernel: probe of 
> :00:16.0-b638ab7e-94e2-4ea2-a552-d1c54b627f04 returned 0 after 1398 usecs
> Feb 22 19:49:07 DUT1394ACMR kernel: probe of 
> i915.mei-gsc.768-b638ab7e-94e2-4ea2-a552-d1c54b627f04 returned 0 after 97 
> usecs
> Feb 22 19:49:07 DUT1394ACMR kernel: initcall mei_hdcp_driver_init+0x0/0xff0 
> [mei_hdcp] returned 0 after 101960 usecs
> Feb 22 19:49:07 DUT1394ACMR kernel: calling  mei_pxp_driver_init+0x0/0xff0 
> [mei_pxp] @ 121094
> Feb 22 19:49:07 DUT1394ACMR kernel: probe of 
> :00:16.0-fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1 returned 0 after 435 usecs
> Feb 22 19:49:07 DUT1394ACMR kernel: mei_pxp 
> i915.mei-gsc.768-fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1: bound :03:00.0 
> (ops i915_pxp_tee_component_ops [i915])
> Feb 22 19:49:07 DUT1394ACMR kernel: 100ms wait for request failed on rcs0, 
> err=-62
> Feb 22 19:49:07 DUT1394ACMR kernel: probe of 
> i915.mei-gsc.768-fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1 returned 0 after 158425 
> usecs
> Feb 22 19:49:07 DUT1394ACMR kernel: initcall mei_pxp_driver_init+0x0/0xff0 
> [mei_pxp] returned 0 after 224159 usecs
> Feb 22 19:49:07 DUT1394ACMR kernel: i915/intel_hangcheck_live_selftests: 
> igt_hang_sanitycheck failed with error -5
> Feb 22 19:49:07 DUT1394ACMR kernel: i915: probe of :03:00.0 failed with 
> error -5
> 
> Those request waits, once timed out after 100ms, have never been
> confirmed to still persist over another 100ms, always being able to
> complete within the originally requested wait time doubled.
> 
> Taking into account potentially significant additional concurrent workload
> generated by new auxiliary drivers that didn't exist before and now are
> loaded in parallel with the i915 module also when loaded in selftest mode,
> relax our expectations on time consumed by the sanity check request before
> it completes.
> 
> Signed-off-by: Janusz Krzysztofik 

I'm OK with it...

Reviewed-by: Andi Shyti 

Thanks,
Andi


Re: [PATCH] drm/i915/selftests: Fix dependency of some timeouts on HZ

2024-02-29 Thread Andi Shyti
Hi Janusz,

On Thu, Feb 22, 2024 at 12:32:40PM +0100, Janusz Krzysztofik wrote:
> Third argument of i915_request_wait() accepts a timeout value in jiffies.
> Most users pass either a simple HZ based expression, or a result of
> msecs_to_jiffies(), or MAX_SCHEDULE_TIMEOUT, or a very small number not
> exceeding 4 if applicable as that value.  However, there is one user --
> intel_selftest_wait_for_rq() -- that passes a WAIT_FOR_RESET_TIME symbol,
> defined as a large constant value that most probably represents a desired
> timeout in ms.  While that usage results in the intended value of timeout
> on usual x86_64 kernel configurations, it is not portable across different
> architectures and custom kernel configs.
> 
> Rename the symbol to clearly indicate intended units and convert it to
> jiffies before use.
> 
> Fixes: 3a4bfa091c46 ("drm/i915/selftest: Fix workarounds selftest for GuC 
> submission")
> Signed-off-by: Janusz Krzysztofik 
> Cc: Rahul Kumar Singh 
> Cc: John Harrison 
> Cc: Matthew Brost 

Reviewed-by: Andi Shyti 

Thanks,
Andi


✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUX

2024-02-29 Thread Patchwork
== Series Details ==

Series: series starting with [1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to 
ICL_PORT_TX_DW6_AUX
URL   : https://patchwork.freedesktop.org/series/130581/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: 

[PATCH v3 4/4] drm/i915/gt: Enable only one CCS for compute workload

2024-02-29 Thread Andi Shyti
Enable only one CCS engine by default with all the compute sices
allocated to it.

While generating the list of UABI engines to be exposed to the
user, exclude any additional CCS engines beyond the first
instance.

This change can be tested with igt i915_query.

Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Requires: 4e4f77d74878 ("drm/i915/gt: Refactor uabi engine class/instance list 
creation")
Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Matt Roper 
Cc:  # v6.2+
---
 drivers/gpu/drm/i915/gt/intel_engine_user.c | 11 +++
 drivers/gpu/drm/i915/gt/intel_gt.c  | 11 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h |  2 ++
 3 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c 
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index ec5bcd1c1ec4..6d6ef11f55e5 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -208,6 +208,7 @@ void intel_engines_driver_register(struct drm_i915_private 
*i915)
struct list_head *it, *next;
struct rb_node **p, *prev;
LIST_HEAD(engines);
+   u16 uabi_ccs = 0;
 
sort_engines(i915, );
 
@@ -256,6 +257,16 @@ void intel_engines_driver_register(struct drm_i915_private 
*i915)
  BIT(_CCS(engine->uabi_instance
continue;
 
+   /*
+* The load is balanced among all the available compute
+* slices. Expose only the first instance of the compute
+* engine.
+*/
+   if (IS_DG2(i915) &&
+   uabi_class == I915_ENGINE_CLASS_COMPUTE &&
+   uabi_ccs++)
+   continue;
+
GEM_BUG_ON(uabi_class >=
   ARRAY_SIZE(i915->engine_uabi_class_count));
i915->engine_uabi_class_count[uabi_class]++;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index a425db5ed3a2..e19df4ef47f6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -168,6 +168,14 @@ static void init_unused_rings(struct intel_gt *gt)
}
 }
 
+static void intel_gt_apply_ccs_mode(struct intel_gt *gt)
+{
+   if (!IS_DG2(gt->i915))
+   return;
+
+   intel_uncore_write(gt->uncore, XEHP_CCS_MODE, 0);
+}
+
 int intel_gt_init_hw(struct intel_gt *gt)
 {
struct drm_i915_private *i915 = gt->i915;
@@ -195,6 +203,9 @@ int intel_gt_init_hw(struct intel_gt *gt)
 
intel_gt_init_swizzling(gt);
 
+   /* Configure CCS mode */
+   intel_gt_apply_ccs_mode(gt);
+
/*
 * At least 830 can leave some of the unused rings
 * "active" (ie. head != tail) after resume which
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index cf709f6c05ae..c148113770ea 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1605,6 +1605,8 @@
 #define   GEN12_VOLTAGE_MASK   REG_GENMASK(10, 0)
 #define   GEN12_CAGF_MASK  REG_GENMASK(19, 11)
 
+#define XEHP_CCS_MODE  _MMIO(0x14804)
+
 #define GEN11_GT_INTR_DW(x)_MMIO(0x190018 + ((x) * 4))
 #define   GEN11_CSME   (31)
 #define   GEN12_HECI_2 (30)
-- 
2.43.0



[PATCH v3 3/4] drm/i915/gt: Disable HW load balancing for CCS

2024-02-29 Thread Andi Shyti
The hardware should not dynamically balance the load between CCS
engines. Wa_14019159160 recommends disabling it across all
platforms.

Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Matt Roper 
Cc:  # v6.2+
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 50962cfd1353..cf709f6c05ae 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1478,6 +1478,7 @@
 
 #define GEN12_RCU_MODE _MMIO(0x14800)
 #define   GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
+#define   XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE   REG_BIT(1)
 
 #define CHV_FUSE_GT_MMIO(VLV_GUNIT_BASE + 0x2168)
 #define   CHV_FGT_DISABLE_SS0  (1 << 10)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d67d44611c28..57c1f3d2589e 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2945,6 +2945,12 @@ general_render_compute_wa_init(struct intel_engine_cs 
*engine, struct i915_wa_li
 
/* Wa_18028616096 */
wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW, 
UGM_FRAGMENT_THRESHOLD_TO_3);
+
+   /*
+* Wa_14019159160: disable the CCS load balancing
+* indiscriminately for all the platforms
+*/
+   wa_masked_en(wal, GEN12_RCU_MODE, 
XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
}
 
if (IS_DG2_G11(i915)) {
-- 
2.43.0



[PATCH v3 2/4] drm/i915/gt: Do not exposed fused off engines.

2024-02-29 Thread Andi Shyti
Some of the CCS engines are disabled. They should not be listed
in the uabi_engine list, that is the list of engines that the
user can see.

Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Requires: 4e4f77d74878 ("drm/i915/gt: Refactor uabi engine class/instance list 
creation")
Signed-off-by: Andi Shyti 
---
 drivers/gpu/drm/i915/gt/intel_engine_user.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c 
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index cf8f24ad88f6..ec5bcd1c1ec4 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -244,6 +244,18 @@ void intel_engines_driver_register(struct drm_i915_private 
*i915)
if (uabi_class > I915_LAST_UABI_ENGINE_CLASS)
continue;
 
+   /*
+* If the CCS engine is fused off, the corresponding bit
+* in the engine mask is disabled. Do not expose it
+* to the user.
+*
+* By default at least one engine is enabled (check
+* the engine_mask_apply_compute_fuses() function.
+*/
+   if (!(engine->gt->info.engine_mask &
+ BIT(_CCS(engine->uabi_instance
+   continue;
+
GEM_BUG_ON(uabi_class >=
   ARRAY_SIZE(i915->engine_uabi_class_count));
i915->engine_uabi_class_count[uabi_class]++;
-- 
2.43.0



[PATCH v3 1/4] drm/i915/gt: Refactor uabi engine class/instance list creation

2024-02-29 Thread Andi Shyti
For the upcoming changes we need a cleaner way to build the list
of uabi engines.

Suggested-by: Tvrtko Ursulin 
Signed-off-by: Andi Shyti 
---
 drivers/gpu/drm/i915/gt/intel_engine_user.c | 29 -
 1 file changed, 17 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c 
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 833987015b8b..cf8f24ad88f6 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -203,7 +203,7 @@ static void engine_rename(struct intel_engine_cs *engine, 
const char *name, u16
 
 void intel_engines_driver_register(struct drm_i915_private *i915)
 {
-   u16 name_instance, other_instance = 0;
+   u16 class_instance[I915_LAST_UABI_ENGINE_CLASS + 1] = { };
struct legacy_ring ring = {};
struct list_head *it, *next;
struct rb_node **p, *prev;
@@ -214,6 +214,8 @@ void intel_engines_driver_register(struct drm_i915_private 
*i915)
prev = NULL;
p = >uabi_engines.rb_node;
list_for_each_safe(it, next, ) {
+   u16 uabi_class;
+
struct intel_engine_cs *engine =
container_of(it, typeof(*engine), uabi_list);
 
@@ -222,15 +224,14 @@ void intel_engines_driver_register(struct 
drm_i915_private *i915)
 
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
-   if (engine->uabi_class == I915_NO_UABI_CLASS) {
-   name_instance = other_instance++;
-   } else {
-   GEM_BUG_ON(engine->uabi_class >=
-  ARRAY_SIZE(i915->engine_uabi_class_count));
-   name_instance =
-   
i915->engine_uabi_class_count[engine->uabi_class]++;
-   }
-   engine->uabi_instance = name_instance;
+
+   if (engine->uabi_class == I915_NO_UABI_CLASS)
+   uabi_class = I915_LAST_UABI_ENGINE_CLASS + 1;
+   else
+   uabi_class = engine->uabi_class;
+
+   GEM_BUG_ON(uabi_class >= ARRAY_SIZE(class_instance));
+   engine->uabi_instance = class_instance[uabi_class]++;
 
/*
 * Replace the internal name with the final user and log facing
@@ -238,11 +239,15 @@ void intel_engines_driver_register(struct 
drm_i915_private *i915)
 */
engine_rename(engine,
  intel_engine_class_repr(engine->class),
- name_instance);
+ engine->uabi_instance);
 
-   if (engine->uabi_class == I915_NO_UABI_CLASS)
+   if (uabi_class > I915_LAST_UABI_ENGINE_CLASS)
continue;
 
+   GEM_BUG_ON(uabi_class >=
+  ARRAY_SIZE(i915->engine_uabi_class_count));
+   i915->engine_uabi_class_count[uabi_class]++;
+
rb_link_node(>uabi_node, prev, p);
rb_insert_color(>uabi_node, >uabi_engines);
 
-- 
2.43.0



[PATCH v3 0/4] Disable automatic load CCS load balancing

2024-02-29 Thread Andi Shyti
Hi,

this series does basically two things:

1. Disables automatic load balancing as adviced by the hardware
   workaround.

2. Assigns all the CCS slices to one single user engine. The user
   will then be able to query only one CCS engine

I'm using here the "Requires: " tag, but I'm not sure the commit
id will be valid, on the other hand, I don't know what commit id
I should use.

Thanks Tvrtko, Matt and John for your reviews!

Andi

Changelog
=
v2 -> v3
- Simplified the algorithm for creating the list of the exported
  uabi engines. (Patch 1) (Thanks, Tvrtko)
- Consider the fused engines when creating the uabi engine list
  (Patch 2) (Thanks, Matt)
- Patch 4 now uses a the refactoring from patch 1, in a cleaner
  outcome.

v1 -> v2
- In Patch 1 use the correct workaround number (thanks Matt).
- In Patch 2 do not add the extra CCS engines to the exposed UABI
  engine list and adapt the engine counting accordingly (thanks
  Tvrtko).
- Reword the commit of Patch 2 (thanks John).

Andi Shyti (4):
  drm/i915/gt: Refactor uabi engine class/instance list creation
  drm/i915/gt: Do not exposed fused off engines.
  drm/i915/gt: Disable HW load balancing for CCS
  drm/i915/gt: Enable only one CCS for compute workload

 drivers/gpu/drm/i915/gt/intel_engine_user.c | 52 -
 drivers/gpu/drm/i915/gt/intel_gt.c  | 11 +
 drivers/gpu/drm/i915/gt/intel_gt_regs.h |  3 ++
 drivers/gpu/drm/i915/gt/intel_workarounds.c |  6 +++
 4 files changed, 60 insertions(+), 12 deletions(-)

-- 
2.43.0



✗ Fi.CI.BAT: failure for drm/i915: Use drm_printer more (rev4)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Use drm_printer more (rev4)
URL   : https://patchwork.freedesktop.org/series/129956/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14370 -> Patchwork_129956v4


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_129956v4 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_129956v4, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/index.html

Participating hosts (43 -> 39)
--

  Missing(4): bat-mtlp-8 bat-kbl-2 bat-adlm-1 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_129956v4:

### IGT changes ###

 Possible regressions 

  * igt@runner@aborted:
- bat-arls-2: NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-arls-2/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_129956v4 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][2] ([i915#8293]) -> [PASS][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-jsl-1/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-jsl-1:  NOTRUN -> [SKIP][4] ([i915#9318])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- bat-jsl-1:  NOTRUN -> [SKIP][5] ([i915#2190])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@verify-random:
- bat-jsl-1:  NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][7] ([Intel XE#484]) +1 other test 
skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-dg2-13/igt@kms_chamelium_...@dp-hpd-fast.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][8] ([Intel XE#484] / [i915#4550]) +1 
other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-dg2-13/igt@kms_chamelium_...@vga-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1:  NOTRUN -> [SKIP][9] ([i915#4103]) +1 other test skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-jsl-1:  NOTRUN -> [SKIP][10] ([i915#3555] / [i915#9886])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-1:  NOTRUN -> [SKIP][11] ([fdo#109285])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-dg2-11: NOTRUN -> [SKIP][12] ([i915#9197])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-1:  NOTRUN -> [SKIP][13] ([i915#3555])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-jsl-1/igt@kms_setm...@basic-clone-single-crtc.html

  
 Possible fixes 

  * igt@i915_selftest@live@dmabuf:
- bat-arls-1: [DMESG-FAIL][14] -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-1/igt@i915_selftest@l...@dmabuf.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-arls-1/igt@i915_selftest@l...@dmabuf.html

  * igt@i915_selftest@live@gt_timelines:
- {bat-arls-4}:   [INCOMPLETE][16] -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-arls-4/igt@i915_selftest@live@gt_timelines.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v4/bat-arls-4/igt@i915_selftest@live@gt_timelines.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/484
  [fdo#109285]: 

✗ Fi.CI.SPARSE: warning for drm/i915: Use drm_printer more (rev4)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Use drm_printer more (rev4)
URL   : https://patchwork.freedesktop.org/series/129956/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use drm_printer more (rev4)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Use drm_printer more (rev4)
URL   : https://patchwork.freedesktop.org/series/129956/
State : warning

== Summary ==

Error: dim checkpatch failed
1b6df16a7ddc drm/i915: Indicate which pipe failed the fastset check overall
a2e117546ece drm/i915: Include CRTC info in infoframe mismatch prints
865cc0e100a7 drm/i915: Include CRTC info in VSC SDP mismatch prints
6de01205811f drm/i915: Convert pipe_config_infoframe_mismatch() to drm_printer
f52e5ec8162d drm/i915: Convert pipe_config_buffer_mismatch() to drm_printer
c3a68fc915fc drm/i915: Convert intel_dpll_dump_hw_state() to drm_printer
3a43730f22e4 drm/i915: Use drm_printer more extensively in 
intel_crtc_state_dump()
28d758fc5c7e drm/i915: Convert the remaining state dump to drm_printer
-:127: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#127: FILE: drivers/gpu/drm/i915/display/intel_crtc_state_dump.c:139:
+  plane_state->hw.rotation, plane_state->scaler_id, 
plane_state->hw.scaling_filter);

total: 0 errors, 1 warnings, 0 checks, 236 lines checked
e353d67561c1 drm/i915: Skip intel_crtc_state_dump() if debugs aren't enabled
d3d5eec2ebbd drm/i915: Relocate pipe_config_mismatch()
a95a1d12e0c0 drm/i915: Reuse pipe_config_mismatch() more
4e66df9644a8 drm/i915: Create the printer only once in 
intel_pipe_config_compare()




✓ Fi.CI.IGT: success for drm/dp: Fix documentation of DP tunnel functions

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/dp: Fix documentation of DP tunnel functions
URL   : https://patchwork.freedesktop.org/series/130517/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14362_full -> Patchwork_130517v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

New tests
-

  New tests have been introduced between CI_DRM_14362_full and 
Patchwork_130517v1_full:

### New IGT tests (3) ###

  * igt@kms_cursor_edge_walk@256x256-top-bottom@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [3.44] s

  * igt@kms_cursor_edge_walk@256x256-top-bottom@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [3.32] s

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.21] s

  

Known issues


  Here are the changes found in Patchwork_130517v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- shard-rkl:  NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-rkl-4/igt@debugfs_t...@basic-hwmon.html

  * igt@device_reset@unbind-cold-reset-rebind:
- shard-dg2:  NOTRUN -> [SKIP][2] ([i915#7701])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-dg2-3/igt@device_re...@unbind-cold-reset-rebind.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
- shard-rkl:  [PASS][3] -> [FAIL][4] ([i915#7742])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14362/shard-rkl-5/igt@drm_fdinfo@most-busy-check-...@rcs0.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-rkl-3/igt@drm_fdinfo@most-busy-check-...@rcs0.html

  * igt@drm_fdinfo@most-busy-check-all@vcs0:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#8414]) +5 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-mtlp-2/igt@drm_fdinfo@most-busy-check-...@vcs0.html

  * igt@drm_fdinfo@virtual-busy-idle:
- shard-dg2:  NOTRUN -> [SKIP][6] ([i915#8414])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-dg2-3/igt@drm_fdi...@virtual-busy-idle.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
- shard-dg2:  [PASS][7] -> [INCOMPLETE][8] ([i915#7297])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14362/shard-dg2-1/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-smem-lmem0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-dg2-6/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-smem-lmem0.html

  * igt@gem_create@create-ext-cpu-access-big:
- shard-dg2:  NOTRUN -> [ABORT][9] ([i915#10183])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-dg2-11/igt@gem_cre...@create-ext-cpu-access-big.html

  * igt@gem_ctx_sseu@invalid-sseu:
- shard-rkl:  NOTRUN -> [SKIP][10] ([i915#280]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-rkl-4/igt@gem_ctx_s...@invalid-sseu.html

  * igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2:  NOTRUN -> [SKIP][11] ([i915#4812]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-dg2-11/igt@gem_exec_balan...@bonded-false-hang.html

  * igt@gem_exec_balancer@parallel-bb-first:
- shard-rkl:  NOTRUN -> [SKIP][12] ([i915#4525])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-rkl-3/igt@gem_exec_balan...@parallel-bb-first.html

  * igt@gem_exec_capture@capture-invisible@smem0:
- shard-mtlp: NOTRUN -> [SKIP][13] ([i915#6334])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-mtlp-2/igt@gem_exec_capture@capture-invisi...@smem0.html

  * igt@gem_exec_capture@capture-recoverable:
- shard-rkl:  NOTRUN -> [SKIP][14] ([i915#6344])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-rkl-4/igt@gem_exec_capt...@capture-recoverable.html

  * igt@gem_exec_fair@basic-none-vip:
- shard-dg2:  NOTRUN -> [SKIP][15] ([i915#3539] / [i915#4852])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-dg2-3/igt@gem_exec_f...@basic-none-vip.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  NOTRUN -> [FAIL][16] ([i915#2842]) +1 other test fail
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130517v1/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
- shard-rkl:  [PASS][17] -> [FAIL][18] ([i915#2842])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14362/shard-rkl-5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [18]: 

Re: [PATCH] drm/i915: fix applying placement flag

2024-02-29 Thread Stephen Rothwell
Hi Christian,

On Thu, 29 Feb 2024 14:01:05 +0100 Christian König  
wrote:
>
> Gentle ping. Can I get an rb for that?

If it is me you are waiting for, I am not really able to review it (or
test its functionality), but I did apply it to the merge of the drm
tree yesterday and it did fix the build problem.

Tested-by: Stephen Rothwell  # compile only

-- 
Cheers,
Stephen Rothwell


pgpWCPWlgMfWr.pgp
Description: OpenPGP digital signature


✗ Fi.CI.BAT: failure for Enable Adaptive Sync SDP Support for DP (rev14)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Enable Adaptive Sync SDP Support for DP (rev14)
URL   : https://patchwork.freedesktop.org/series/126829/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14370 -> Patchwork_126829v14


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126829v14 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126829v14, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/index.html

Participating hosts (43 -> 41)
--

  Missing(2): bat-adlm-1 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126829v14:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@load:
- fi-bsw-n3050:   [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-bsw-n3050/igt@i915_module_l...@load.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/fi-bsw-n3050/igt@i915_module_l...@load.html

  
Known issues


  Here are the changes found in Patchwork_126829v14 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/bat-jsl-1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-jsl-1:  NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- bat-jsl-1:  NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@verify-random:
- bat-jsl-1:  NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_module_load@load:
- fi-elk-e7500:   [PASS][8] -> [INCOMPLETE][9] ([i915#10311])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-elk-e7500/igt@i915_module_l...@load.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/fi-elk-e7500/igt@i915_module_l...@load.html
- fi-bsw-nick:[PASS][10] -> [INCOMPLETE][11] ([i915#10311])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-bsw-nick/igt@i915_module_l...@load.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/fi-bsw-nick/igt@i915_module_l...@load.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][12] ([Intel XE#484]) +1 other test 
skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-dg2-13/igt@kms_chamelium_...@dp-hpd-fast.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
- bat-dg2-13: NOTRUN -> [SKIP][13] ([Intel XE#484] / [i915#4550]) 
+1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-dg2-13/igt@kms_chamelium_...@vga-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1:  NOTRUN -> [SKIP][14] ([i915#4103]) +1 other test skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-jsl-1:  NOTRUN -> [SKIP][15] ([i915#3555] / [i915#9886])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-1:  NOTRUN -> [SKIP][16] ([fdo#109285])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-ilk-650: [PASS][17] -> [INCOMPLETE][18] ([i915#10312])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14370/fi-ilk-650/igt@kms_hdmi_inj...@inject-audio.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/fi-ilk-650/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-1:  NOTRUN -> [SKIP][19] ([i915#3555])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v14/bat-jsl-1/igt@kms_setm...@basic-clone-single-crtc.html

  
 Possible fixes 

  * igt@i915_selftest@live@dmabuf:
- 

✗ Fi.CI.SPARSE: warning for Enable Adaptive Sync SDP Support for DP (rev14)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Enable Adaptive Sync SDP Support for DP (rev14)
URL   : https://patchwork.freedesktop.org/series/126829/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




✗ Fi.CI.CHECKPATCH: warning for Enable Adaptive Sync SDP Support for DP (rev14)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Enable Adaptive Sync SDP Support for DP (rev14)
URL   : https://patchwork.freedesktop.org/series/126829/
State : warning

== Summary ==

Error: dim checkpatch failed
5de8093d121a drm/dp: Add support to indicate if sink supports AS SDP
bf8049b39bb1 drm: Add Adaptive Sync SDP logging
2d792b70b1ae drm: Add crtc state dump for Adaptive Sync SDP
cdaa58ff08a6 drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
28996390effd drm/i915/dp: Add wrapper function to check AS SDP
c1549bd49779 drm/i915/display: Compute AS SDP parameters
96286d60b391 drm/i915/display: Add state checker for Adaptive Sync SDP
-:71: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible 
side-effects?
#71: FILE: drivers/gpu/drm/i915/display/intel_display.c:5137:
+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \
+   if (!intel_compare_dp_as_sdp(_config->infoframes.name, \
+ _config->infoframes.name)) { \
+   pipe_config_dp_as_sdp_mismatch(dev_priv, fastset, 
__stringify(name), \
+   
_config->infoframes.name, \
+   _config->infoframes.name); 
\
+   ret = false; \
+   } \
+} while (0)

total: 0 errors, 0 warnings, 1 checks, 70 lines checked
8abb99a26b2d drm/i915/display: Compute vrr_vsync params
9f0cbe1982bb drm/i915/display: Read/Write AS sdp only when sink/source has 
enabled




[PATCH 4/4] drm/i915: Streamline eDP handling in icl_combo_phy_aux_power_well_enable()

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

Drop the pointless phy/port detour from the eDP handling
in icl_combo_phy_aux_power_well_enable(). We can just directly
consult the dig_port and determine whether it's eDP or not.

This also removes the assumption that port==phy, although that is
always trued on ICL, so it wasn't really doing any harm.

Signed-off-by: Ville Syrjälä 
---
 .../drm/i915/display/intel_display_power_well.c   | 15 ---
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c 
b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index f25ad7d2c784..217f82f1da84 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -394,17 +394,11 @@ static void hsw_power_well_disable(struct 
drm_i915_private *dev_priv,
hsw_wait_for_power_well_disable(dev_priv, power_well);
 }
 
-static bool intel_port_is_edp(struct drm_i915_private *i915, enum port port)
+static bool intel_aux_ch_is_edp(struct drm_i915_private *i915, enum aux_ch 
aux_ch)
 {
-   struct intel_encoder *encoder;
+   struct intel_digital_port *dig_port = aux_ch_to_digital_port(i915, 
aux_ch);
 
-   for_each_intel_encoder(>drm, encoder) {
-   if (encoder->type == INTEL_OUTPUT_EDP &&
-   encoder->port == port)
-   return true;
-   }
-
-   return false;
+   return dig_port && dig_port->base.type == INTEL_OUTPUT_EDP;
 }
 
 static void
@@ -413,7 +407,6 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private 
*dev_priv,
 {
const struct i915_power_well_regs *regs = power_well->desc->ops->regs;
int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
-   enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);
 
drm_WARN_ON(_priv->drm, !IS_ICELAKE(dev_priv));
 
@@ -430,7 +423,7 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private 
*dev_priv,
 
/* Display WA #1178: icl */
if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
-   !intel_port_is_edp(dev_priv, (enum port)phy))
+   !intel_aux_ch_is_edp(dev_priv, ICL_AUX_PW_TO_CH(pw_idx)))
intel_de_rmw(dev_priv, 
ICL_PORT_TX_DW6_AUX(ICL_AUX_PW_TO_PHY(pw_idx)),
 0, ICL_AUX_ANAOVRD1_ENABLE | 
ICL_AUX_ANAOVRD1_LDO_BYPASS);
 }
-- 
2.43.0



[PATCH 3/4] drm/i915: Use pw_idx to derive PHY for ICL_LANE_ENABLE_AUX override

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

We don't actually know whether we should be picking the PHY
simply based on the AUX_CH/power well, or based on the VBT
defined AUX_CH->DDI->PHY relationship. At the moment we are
doing the former for the ANAOVRD workaround, and the latter
for the ICL_LANE_ENABLE_AUX override. Windows seems to use the
first approach for everything. So let's unify this to follow
that same approach for both.

Eventually we should try to figure out  which is actually
correct, or whether any of this even matters (ie. whether there
are any real machines where the DDI and its AUX_CH do not match
1:1).

Note that this also changes the behaviour if we do end up
poking an AUX power well not associated with any port (as
per VBT). Previously we would have skipped the PHY register
write, but now we always write it.

Signed-off-by: Ville Syrjälä 
---
 .../i915/display/intel_display_power_well.c   | 21 +++
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c 
b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index a1edac6ce31f..f25ad7d2c784 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -419,10 +419,12 @@ icl_combo_phy_aux_power_well_enable(struct 
drm_i915_private *dev_priv,
 
intel_de_rmw(dev_priv, regs->driver, 0, HSW_PWR_WELL_CTL_REQ(pw_idx));
 
-   /* FIXME this is a mess */
-   if (phy != PHY_NONE)
-   intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),
-0, ICL_LANE_ENABLE_AUX);
+   /*
+* FIXME not sure if we should derive the PHY from the pw_idx, or
+* from the VBT defined AUX_CH->DDI->PHY mapping.
+*/
+   intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(ICL_AUX_PW_TO_PHY(pw_idx)),
+0, ICL_LANE_ENABLE_AUX);
 
hsw_wait_for_power_well_enable(dev_priv, power_well, false);
 
@@ -439,14 +441,15 @@ icl_combo_phy_aux_power_well_disable(struct 
drm_i915_private *dev_priv,
 {
const struct i915_power_well_regs *regs = power_well->desc->ops->regs;
int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
-   enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);
 
drm_WARN_ON(_priv->drm, !IS_ICELAKE(dev_priv));
 
-   /* FIXME this is a mess */
-   if (phy != PHY_NONE)
-   intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),
-ICL_LANE_ENABLE_AUX, 0);
+   /*
+* FIXME not sure if we should derive the PHY from the pw_idx, or
+* from the VBT defined AUX_CH->DDI->PHY mapping.
+*/
+   intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(ICL_AUX_PW_TO_PHY(pw_idx)),
+ICL_LANE_ENABLE_AUX, 0);
 
intel_de_rmw(dev_priv, regs->driver, HSW_PWR_WELL_CTL_REQ(pw_idx), 0);
 
-- 
2.43.0



[PATCH 2/4] drm/i915: Use REG_BIT() & co. in intel_combo_phy_regs.h

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

Modernize the ICL+ combo PHY register refinitions by using
REG_BIT() & co.

Signed-off-by: Ville Syrjälä 
---
 .../drm/i915/display/intel_combo_phy_regs.h   | 114 +-
 1 file changed, 55 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h 
b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
index 1d931557cd79..63601129b736 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
@@ -25,28 +25,26 @@
 4 * (dw))
 
 #define ICL_PORT_CL_DW5(phy)   _MMIO(_ICL_PORT_CL_DW(5, phy))
-#define   CL_POWER_DOWN_ENABLE (1 << 4)
-#define   SUS_CLOCK_CONFIG (3 << 0)
+#define   CL_POWER_DOWN_ENABLE REG_BIT(4)
+#define   SUS_CLOCK_CONFIG REG_GENMASK(1, 0)
 
 #define ICL_PORT_CL_DW10(phy)  _MMIO(_ICL_PORT_CL_DW(10, phy))
-#define  PG_SEQ_DELAY_OVERRIDE_MASK(3 << 25)
-#define  PG_SEQ_DELAY_OVERRIDE_SHIFT   25
-#define  PG_SEQ_DELAY_OVERRIDE_ENABLE  (1 << 24)
-#define  PWR_UP_ALL_LANES  (0x0 << 4)
-#define  PWR_DOWN_LN_3_2_1 (0xe << 4)
-#define  PWR_DOWN_LN_3_2   (0xc << 4)
-#define  PWR_DOWN_LN_3 (0x8 << 4)
-#define  PWR_DOWN_LN_2_1_0 (0x7 << 4)
-#define  PWR_DOWN_LN_1_0   (0x3 << 4)
-#define  PWR_DOWN_LN_3_1   (0xa << 4)
-#define  PWR_DOWN_LN_3_1_0 (0xb << 4)
-#define  PWR_DOWN_LN_MASK  (0xf << 4)
-#define  PWR_DOWN_LN_SHIFT 4
-#define  EDP4K2K_MODE_OVRD_EN  (1 << 3)
-#define  EDP4K2K_MODE_OVRD_OPTIMIZED   (1 << 2)
+#define  PG_SEQ_DELAY_OVERRIDE_MASKREG_GENMASK(26, 25)
+#define  PG_SEQ_DELAY_OVERRIDE_ENABLE  REG_BIT(24)
+#define  PWR_DOWN_LN_MASK  REG_GENMASK(7, 4)
+#define  PWR_UP_ALL_LANES  
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x0)
+#define  PWR_DOWN_LN_3_2_1 
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xe)
+#define  PWR_DOWN_LN_3_2   
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xc)
+#define  PWR_DOWN_LN_3 
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x8)
+#define  PWR_DOWN_LN_2_1_0 
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x7)
+#define  PWR_DOWN_LN_1_0   
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0x3)
+#define  PWR_DOWN_LN_3_1   
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xa)
+#define  PWR_DOWN_LN_3_1_0 
REG_FIELD_PREP(PWR_DOWN_LN_MASK, 0xb)
+#define  EDP4K2K_MODE_OVRD_EN  REG_BIT(3)
+#define  EDP4K2K_MODE_OVRD_OPTIMIZED   REG_BIT(2)
 
 #define ICL_PORT_CL_DW12(phy)  _MMIO(_ICL_PORT_CL_DW(12, phy))
-#define   ICL_LANE_ENABLE_AUX  (1 << 0)
+#define   ICL_LANE_ENABLE_AUX  REG_BIT(0)
 
 /* ICL Port COMP_DW registers */
 #define _ICL_PORT_COMP 0x100
@@ -54,24 +52,22 @@
 _ICL_PORT_COMP + 4 * (dw))
 
 #define ICL_PORT_COMP_DW0(phy) _MMIO(_ICL_PORT_COMP_DW(0, phy))
-#define   COMP_INIT(1 << 31)
+#define   COMP_INITREG_BIT(31)
 
 #define ICL_PORT_COMP_DW1(phy) _MMIO(_ICL_PORT_COMP_DW(1, phy))
 
 #define ICL_PORT_COMP_DW3(phy) _MMIO(_ICL_PORT_COMP_DW(3, phy))
-#define   PROCESS_INFO_DOT_0   (0 << 26)
-#define   PROCESS_INFO_DOT_1   (1 << 26)
-#define   PROCESS_INFO_DOT_4   (2 << 26)
-#define   PROCESS_INFO_MASK(7 << 26)
-#define   PROCESS_INFO_SHIFT   26
-#define   VOLTAGE_INFO_0_85V   (0 << 24)
-#define   VOLTAGE_INFO_0_95V   (1 << 24)
-#define   VOLTAGE_INFO_1_05V   (2 << 24)
-#define   VOLTAGE_INFO_MASK(3 << 24)
-#define   VOLTAGE_INFO_SHIFT   24
+#define   PROCESS_INFO_MASKREG_GENMASK(28, 26)
+#define   PROCESS_INFO_DOT_0   
REG_FIELD_PREP(PROCESS_INFO_MASK, 0)
+#define   PROCESS_INFO_DOT_1   
REG_FIELD_PREP(PROCESS_INFO_MASK, 1)
+#define   PROCESS_INFO_DOT_4   
REG_FIELD_PREP(PROCESS_INFO_MASK, 2)
+#define   VOLTAGE_INFO_MASKREG_GENMASK(25, 24)
+#define   VOLTAGE_INFO_0_85V   
REG_FIELD_PREP(VOLTAGE_INFO_MASK, 0)
+#define   VOLTAGE_INFO_0_95V   
REG_FIELD_PREP(VOLTAGE_INFO_MASK, 1)
+#define   VOLTAGE_INFO_1_05V   
REG_FIELD_PREP(VOLTAGE_INFO_MASK, 2)
 
 #define ICL_PORT_COMP_DW8(phy) _MMIO(_ICL_PORT_COMP_DW(8, phy))
-#define   IREFGEN  (1 << 24)

[PATCH 1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUX

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

ICL_AUX_ANAOVRD1 is actually ICL_PORT_TX_DW6_AUX. Give it its proper
name, and relocate to the correct file (intel_combo_phy_regs.h).

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_combo_phy_regs.h | 6 ++
 drivers/gpu/drm/i915/display/intel_display_power_well.c | 5 -
 drivers/gpu/drm/i915/i915_reg.h | 9 -
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h 
b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
index b0983edccf3f..1d931557cd79 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
@@ -142,6 +142,12 @@
 #define   RTERM_SELECT(x)  ((x) << 3)
 #define   RTERM_SELECT_MASK(0x7 << 3)
 
+#define ICL_PORT_TX_DW6_AUX(phy)   _MMIO(_ICL_PORT_TX_DW_AUX(6, 
phy))
+#define ICL_PORT_TX_DW6_GRP(phy)   _MMIO(_ICL_PORT_TX_DW_GRP(6, 
phy))
+#define ICL_PORT_TX_DW6_LN(ln, phy)_MMIO(_ICL_PORT_TX_DW_LN(6, ln, 
phy))
+#define   ICL_AUX_ANAOVRD1_LDO_BYPASS  (1 << 7)
+#define   ICL_AUX_ANAOVRD1_ENABLE  (1 << 0)
+
 #define ICL_PORT_TX_DW7_AUX(phy)   _MMIO(_ICL_PORT_TX_DW_AUX(7, 
phy))
 #define ICL_PORT_TX_DW7_GRP(phy)   _MMIO(_ICL_PORT_TX_DW_GRP(7, 
phy))
 #define ICL_PORT_TX_DW7_LN(ln, phy)_MMIO(_ICL_PORT_TX_DW_LN(7, ln, 
phy))
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c 
b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index c20e80aded35..a1edac6ce31f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -199,6 +199,9 @@ static void hsw_power_well_pre_disable(struct 
drm_i915_private *dev_priv,
gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
 }
 
+#define ICL_AUX_PW_TO_PHY(pw_idx)  \
+   ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + PHY_A)
+
 #define ICL_AUX_PW_TO_CH(pw_idx)   \
((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
 
@@ -426,7 +429,7 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private 
*dev_priv,
/* Display WA #1178: icl */
if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
!intel_port_is_edp(dev_priv, (enum port)phy))
-   intel_de_rmw(dev_priv, ICL_AUX_ANAOVRD1(pw_idx),
+   intel_de_rmw(dev_priv, 
ICL_PORT_TX_DW6_AUX(ICL_AUX_PW_TO_PHY(pw_idx)),
 0, ICL_AUX_ANAOVRD1_ENABLE | 
ICL_AUX_ANAOVRD1_LDO_BYPASS);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e00557e1a57f..74e943f21475 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5566,15 +5566,6 @@ enum skl_power_gate {
((pw_idx) - ICL_PW_CTL_IDX_PW_1 + SKL_PG1)
 #define  SKL_FUSE_PG_DIST_STATUS(pg)   (1 << (27 - (pg)))
 
-#define _ICL_AUX_REG_IDX(pw_idx)   ((pw_idx) - ICL_PW_CTL_IDX_AUX_A)
-#define _ICL_AUX_ANAOVRD1_A0x162398
-#define _ICL_AUX_ANAOVRD1_B0x6C398
-#define ICL_AUX_ANAOVRD1(pw_idx)   _MMIO(_PICK(_ICL_AUX_REG_IDX(pw_idx), \
-   _ICL_AUX_ANAOVRD1_A, \
-   _ICL_AUX_ANAOVRD1_B))
-#define   ICL_AUX_ANAOVRD1_LDO_BYPASS  (1 << 7)
-#define   ICL_AUX_ANAOVRD1_ENABLE  (1 << 0)
-
 /* Per-pipe DDI Function Control */
 #define _TRANS_DDI_FUNC_CTL_A  0x60400
 #define _TRANS_DDI_FUNC_CTL_B  0x61400
-- 
2.43.0



RE: [PATCH v12 2/8] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Golani, Mitulkumar Ajitkumar
> On Thu, 29 Feb 2024, "Golani, Mitulkumar Ajitkumar"
>  wrote:
> > Thought behind this was to use the function where it was defined. But
> > no worries, I have split it with new patch series floated.
> 
> Please do not rush to send so many new versions! Let the review come to a
> conclusion first.

Apologies, Jani, for the rapid succession of patch releases. I missed including 
the first patch in the initial series float, leading to its inclusion in the 
subsequent revision.

Regards,
Mitul



Re: [PATCH v2 06/12] drm/i915: Convert intel_dpll_dump_hw_state() to drm_printer

2024-02-29 Thread Jani Nikula
On Thu, 29 Feb 2024, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Utilize drm_printer in pipe_config_pll_mismatch() to avoid
> a bit of code duplication.
>
> To achieve this we need to plumb the printer all way to the
> dpll_mgr .dump_hw_state() functions. Those are also used by
> intel_crtc_state_dump() which needs to be adjusted as well.
>
> v2: Convert a few misplaecd drm_dbg_kms() calls (Rodrigo)
> Drop the redundant drm_debug_enabled() check here
> instead of later (Jani)
>
> Cc: Rodrigo Vivi 
> Cc: Jani Nikula 
> Signed-off-by: Ville Syrjälä 

At a fairly quick glance,

Reviewed-by: Jani Nikula 



> ---
>  .../drm/i915/display/intel_crtc_state_dump.c  |   5 +-
>  drivers/gpu/drm/i915/display/intel_display.c  |  28 +++--
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 105 --
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |   2 +
>  4 files changed, 66 insertions(+), 74 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index 4bcf446c75f4..59d2b3d39951 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -205,9 +205,12 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
> *pipe_config,
>   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>   const struct intel_plane_state *plane_state;
>   struct intel_plane *plane;
> + struct drm_printer p;
>   char buf[64];
>   int i;
>  
> + p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
> +
>   drm_dbg_kms(>drm, "[CRTC:%d:%s] enable: %s [%s]\n",
>   crtc->base.base.id, crtc->base.name,
>   str_yes_no(pipe_config->hw.enable), context);
> @@ -356,7 +359,7 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
> *pipe_config,
>   pipe_config->ips_enabled, pipe_config->double_wide,
>   pipe_config->has_drrs);
>  
> - intel_dpll_dump_hw_state(i915, _config->dpll_hw_state);
> + intel_dpll_dump_hw_state(i915, , _config->dpll_hw_state);
>  
>   if (IS_CHERRYVIEW(i915))
>   drm_dbg_kms(>drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e5010049d52e..962b640e7c74 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4927,26 +4927,24 @@ pipe_config_pll_mismatch(bool fastset,
>const struct intel_dpll_hw_state *b)
>  {
>   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + struct drm_printer p;
>  
>   if (fastset) {
> - if (!drm_debug_enabled(DRM_UT_KMS))
> - return;
> + p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
>  
> - drm_dbg_kms(>drm,
> - "[CRTC:%d:%s] fastset requirement not met in %s\n",
> - crtc->base.base.id, crtc->base.name, name);
> - drm_dbg_kms(>drm, "expected:\n");
> - intel_dpll_dump_hw_state(i915, a);
> - drm_dbg_kms(>drm, "found:\n");
> - intel_dpll_dump_hw_state(i915, b);
> + drm_printf(, "[CRTC:%d:%s] fastset requirement not met in 
> %s\n",
> +crtc->base.base.id, crtc->base.name, name);
>   } else {
> - drm_err(>drm, "[CRTC:%d:%s] mismatch in %s buffer\n",
> - crtc->base.base.id, crtc->base.name, name);
> - drm_err(>drm, "expected:\n");
> - intel_dpll_dump_hw_state(i915, a);
> - drm_err(>drm, "found:\n");
> - intel_dpll_dump_hw_state(i915, b);
> + p = drm_err_printer(>drm, NULL);
> +
> + drm_printf(, "[CRTC:%d:%s] mismatch in %s\n",
> +crtc->base.base.id, crtc->base.name, name);
>   }
> +
> + drm_printf(, "expected:\n");
> + intel_dpll_dump_hw_state(i915, , a);
> + drm_printf(, "found:\n");
> + intel_dpll_dump_hw_state(i915, , b);
>  }
>  
>  bool
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index ff480f171f75..9542e62186e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -107,7 +107,7 @@ struct intel_dpll_mgr {
>  struct intel_crtc *crtc,
>  struct intel_encoder *encoder);
>   void (*update_ref_clks)(struct drm_i915_private *i915);
> - void (*dump_hw_state)(struct drm_i915_private *i915,
> + void (*dump_hw_state)(struct drm_printer *p,
> const struct intel_dpll_hw_state *hw_state);
>   bool (*compare_hw_state)(const struct intel_dpll_hw_state *a,
>const struct intel_dpll_hw_state *b);
> @@ -634,16 +634,15 @@ static int 

RE: [PATCH v12 2/8] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Jani Nikula
On Thu, 29 Feb 2024, "Golani, Mitulkumar Ajitkumar" 
 wrote:
> Thought behind this was to use the function where it was defined. But
> no worries, I have split it with new patch series floated.

Please do not rush to send so many new versions! Let the review come to
a conclusion first.

BR,
Jani.


-- 
Jani Nikula, Intel


✗ Fi.CI.BAT: failure for drm/i915: Add missing doc for drm_i915_reset_stats

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Add missing doc for drm_i915_reset_stats
URL   : https://patchwork.freedesktop.org/series/130562/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14368 -> Patchwork_130562v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_130562v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_130562v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/index.html

Participating hosts (43 -> 42)
--

  Missing(1): fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_130562v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@module-reload:
- bat-arls-2: NOTRUN -> [ABORT][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@i915_pm_...@module-reload.html

  
Known issues


  Here are the changes found in Patchwork_130562v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- fi-cfl-8109u:   [PASS][2] -> [FAIL][3] ([i915#8293])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/fi-cfl-8109u/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/fi-cfl-8109u/boot.html

  
 Possible fixes 

  * boot:
- fi-apl-guc: [FAIL][4] ([i915#8293]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/fi-apl-guc/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/fi-apl-guc/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- bat-arls-2: NOTRUN -> [SKIP][7] ([i915#10213]) +3 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_rps@basic-api:
- bat-arls-2: NOTRUN -> [SKIP][8] ([i915#10209])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@gt_lrc:
- bat-rplp-1: [PASS][9] -> [INCOMPLETE][10] ([i915#9413])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-rplp-1/igt@i915_selftest@live@gt_lrc.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-rplp-1/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg2-8:  [PASS][11] -> [DMESG-FAIL][12] ([i915#9840])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-dg2-8/igt@i915_selftest@l...@hangcheck.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-dg2-8/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-arls-2: NOTRUN -> [SKIP][13] ([i915#10200]) +9 other tests 
skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10202]) +1 other test skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-arls-2: NOTRUN -> [SKIP][15] ([i915#9886])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10207])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-arls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-apl-guc: NOTRUN -> [SKIP][17] ([fdo#109271]) +17 other tests 
skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/fi-apl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][18] ([i915#9197]) +1 other test skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130562v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_psr@psr-primary-mmap-gtt@edp-1:
- bat-arls-2: NOTRUN -> [SKIP][19] ([i915#10196] / [i915#4077] / 

✗ Fi.CI.SPARSE: warning for drm/i915: Add missing doc for drm_i915_reset_stats

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Add missing doc for drm_i915_reset_stats
URL   : https://patchwork.freedesktop.org/series/130562/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




[PATCH v2 12/12] drm/i915: Create the printer only once in intel_pipe_config_compare()

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

Create the drm_printer at the start of intel_pipe_config_compare()
and pass it on to all the mismatch() functions.

v2: Rebase

Reviewed-by: Jani Nikula 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_display.c | 101 +--
 1 file changed, 46 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 4d5ef823c5fe..69c9693dcc8d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4787,11 +4787,11 @@ intel_compare_buffer(const u8 *a, const u8 *b, size_t 
len)
return memcmp(a, b, len) == 0;
 }
 
-static void __printf(4, 5)
-pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
+static void __printf(5, 6)
+pipe_config_mismatch(struct drm_printer *p, bool fastset,
+const struct intel_crtc *crtc,
 const char *name, const char *format, ...)
 {
-   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct va_format vaf;
va_list args;
 
@@ -4800,65 +4800,55 @@ pipe_config_mismatch(bool fastset, const struct 
intel_crtc *crtc,
vaf.va = 
 
if (fastset)
-   drm_dbg_kms(>drm,
-   "[CRTC:%d:%s] fastset requirement not met in %s 
%pV\n",
-   crtc->base.base.id, crtc->base.name, name, );
+   drm_printf(p, "[CRTC:%d:%s] fastset requirement not met in %s 
%pV\n",
+  crtc->base.base.id, crtc->base.name, name, );
else
-   drm_err(>drm, "[CRTC:%d:%s] mismatch in %s %pV\n",
-   crtc->base.base.id, crtc->base.name, name, );
+   drm_printf(p, "[CRTC:%d:%s] mismatch in %s %pV\n",
+  crtc->base.base.id, crtc->base.name, name, );
 
va_end(args);
 }
 
 static void
-pipe_config_infoframe_mismatch(bool fastset, const struct intel_crtc *crtc,
+pipe_config_infoframe_mismatch(struct drm_printer *p, bool fastset,
+  const struct intel_crtc *crtc,
   const char *name,
   const union hdmi_infoframe *a,
   const union hdmi_infoframe *b)
 {
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-   struct drm_printer p;
const char *loglevel;
 
if (fastset) {
if (!drm_debug_enabled(DRM_UT_KMS))
return;
 
-   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
loglevel = KERN_DEBUG;
} else {
-   p = drm_err_printer(>drm, NULL);
loglevel = KERN_ERR;
}
 
-   pipe_config_mismatch(fastset, crtc, name, "infoframe");
+   pipe_config_mismatch(p, fastset, crtc, name, "infoframe");
 
-   drm_printf(, "expected:\n");
+   drm_printf(p, "expected:\n");
hdmi_infoframe_log(loglevel, i915->drm.dev, a);
-   drm_printf(, "found:\n");
+   drm_printf(p, "found:\n");
hdmi_infoframe_log(loglevel, i915->drm.dev, b);
 }
 
 static void
-pipe_config_dp_vsc_sdp_mismatch(bool fastset, const struct intel_crtc *crtc,
+pipe_config_dp_vsc_sdp_mismatch(struct drm_printer *p, bool fastset,
+   const struct intel_crtc *crtc,
const char *name,
const struct drm_dp_vsc_sdp *a,
const struct drm_dp_vsc_sdp *b)
 {
-   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-   struct drm_printer p;
+   pipe_config_mismatch(p, fastset, crtc, name, "dp sdp");
 
-   if (fastset)
-   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
-   else
-   p = drm_err_printer(>drm, NULL);
-
-   pipe_config_mismatch(fastset, crtc, name, "dp sdp");
-
-   drm_printf(, "expected:\n");
-   drm_dp_vsc_sdp_log(, a);
-   drm_printf(, "found:\n");
-   drm_dp_vsc_sdp_log(, b);
+   drm_printf(p, "expected:\n");
+   drm_dp_vsc_sdp_log(p, a);
+   drm_printf(p, "found:\n");
+   drm_dp_vsc_sdp_log(p, b);
 }
 
 /* Returns the length up to and including the last differing byte */
@@ -4876,7 +4866,8 @@ memcmp_diff_len(const u8 *a, const u8 *b, size_t len)
 }
 
 static void
-pipe_config_buffer_mismatch(bool fastset, const struct intel_crtc *crtc,
+pipe_config_buffer_mismatch(struct drm_printer *p, bool fastset,
+   const struct intel_crtc *crtc,
const char *name,
const u8 *a, const u8 *b, size_t len)
 {
@@ -4891,7 +4882,7 @@ pipe_config_buffer_mismatch(bool fastset, const struct 
intel_crtc *crtc,
loglevel = KERN_ERR;
}
 
-   pipe_config_mismatch(fastset, crtc, name, "buffer");
+   pipe_config_mismatch(p, fastset, crtc, name, "buffer");
 
/* 

[PATCH v2 11/12] drm/i915: Reuse pipe_config_mismatch() more

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

Just call pipe_config_mismatch() from all the more specialized
mismatch() functions instead of hand rolling the same printfs
all over.

v2: Eliminate the dpll drm_debug_enabled() in an earlier patch (Jani)

Reviewed-by: Jani Nikula 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_display.c | 42 +---
 1 file changed, 10 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 68522fcfd3e4..4d5ef823c5fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4826,17 +4826,13 @@ pipe_config_infoframe_mismatch(bool fastset, const 
struct intel_crtc *crtc,
 
p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
loglevel = KERN_DEBUG;
-
-   drm_printf(, "[CRTC:%d:%s] fastset requirement not met in %s 
infoframe\n",
-  crtc->base.base.id, crtc->base.name, name);
} else {
p = drm_err_printer(>drm, NULL);
loglevel = KERN_ERR;
-
-   drm_printf(, "[CRTC:%d:%s] mismatch in %s infoframe\n",
-  crtc->base.base.id, crtc->base.name, name);
}
 
+   pipe_config_mismatch(fastset, crtc, name, "infoframe");
+
drm_printf(, "expected:\n");
hdmi_infoframe_log(loglevel, i915->drm.dev, a);
drm_printf(, "found:\n");
@@ -4852,17 +4848,12 @@ pipe_config_dp_vsc_sdp_mismatch(bool fastset, const 
struct intel_crtc *crtc,
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct drm_printer p;
 
-   if (fastset) {
+   if (fastset)
p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
-
-   drm_printf(, "[CRTC:%d:%s] fastset requirement not met in %s 
dp sdp\n",
-  crtc->base.base.id, crtc->base.name, name);
-   } else {
+   else
p = drm_err_printer(>drm, NULL);
 
-   drm_printf(, "[CRTC:%d:%s] mismatch in %s dp sdp\n",
-  crtc->base.base.id, crtc->base.name, name);
-   }
+   pipe_config_mismatch(fastset, crtc, name, "dp sdp");
 
drm_printf(, "expected:\n");
drm_dp_vsc_sdp_log(, a);
@@ -4889,27 +4880,19 @@ pipe_config_buffer_mismatch(bool fastset, const struct 
intel_crtc *crtc,
const char *name,
const u8 *a, const u8 *b, size_t len)
 {
-   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-   struct drm_printer p;
const char *loglevel;
 
if (fastset) {
if (!drm_debug_enabled(DRM_UT_KMS))
return;
 
-   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
loglevel = KERN_DEBUG;
-
-   drm_printf(, "[CRTC:%d:%s] fastset requirement not met in %s 
buffer\n",
-  crtc->base.base.id, crtc->base.name, name);
} else {
-   p = drm_err_printer(>drm, NULL);
loglevel = KERN_ERR;
-
-   drm_printf(, "[CRTC:%d:%s] mismatch in %s buffer\n",
-  crtc->base.base.id, crtc->base.name, name);
}
 
+   pipe_config_mismatch(fastset, crtc, name, "buffer");
+
/* only dump up to the last difference */
len = memcmp_diff_len(a, b, len);
 
@@ -4929,17 +4912,12 @@ pipe_config_pll_mismatch(bool fastset,
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct drm_printer p;
 
-   if (fastset) {
+   if (fastset)
p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
-
-   drm_printf(, "[CRTC:%d:%s] fastset requirement not met in 
%s\n",
-  crtc->base.base.id, crtc->base.name, name);
-   } else {
+   else
p = drm_err_printer(>drm, NULL);
 
-   drm_printf(, "[CRTC:%d:%s] mismatch in %s\n",
-  crtc->base.base.id, crtc->base.name, name);
-   }
+   pipe_config_mismatch(fastset, crtc, name, " "); /* stupid 
-Werror=format-zero-length */
 
drm_printf(, "expected:\n");
intel_dpll_dump_hw_state(i915, , a);
-- 
2.43.0



[PATCH v2 06/12] drm/i915: Convert intel_dpll_dump_hw_state() to drm_printer

2024-02-29 Thread Ville Syrjala
From: Ville Syrjälä 

Utilize drm_printer in pipe_config_pll_mismatch() to avoid
a bit of code duplication.

To achieve this we need to plumb the printer all way to the
dpll_mgr .dump_hw_state() functions. Those are also used by
intel_crtc_state_dump() which needs to be adjusted as well.

v2: Convert a few misplaecd drm_dbg_kms() calls (Rodrigo)
Drop the redundant drm_debug_enabled() check here
instead of later (Jani)

Cc: Rodrigo Vivi 
Cc: Jani Nikula 
Signed-off-by: Ville Syrjälä 
---
 .../drm/i915/display/intel_crtc_state_dump.c  |   5 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  28 +++--
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 105 --
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |   2 +
 4 files changed, 66 insertions(+), 74 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 4bcf446c75f4..59d2b3d39951 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -205,9 +205,12 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
*pipe_config,
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
const struct intel_plane_state *plane_state;
struct intel_plane *plane;
+   struct drm_printer p;
char buf[64];
int i;
 
+   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
+
drm_dbg_kms(>drm, "[CRTC:%d:%s] enable: %s [%s]\n",
crtc->base.base.id, crtc->base.name,
str_yes_no(pipe_config->hw.enable), context);
@@ -356,7 +359,7 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
*pipe_config,
pipe_config->ips_enabled, pipe_config->double_wide,
pipe_config->has_drrs);
 
-   intel_dpll_dump_hw_state(i915, _config->dpll_hw_state);
+   intel_dpll_dump_hw_state(i915, , _config->dpll_hw_state);
 
if (IS_CHERRYVIEW(i915))
drm_dbg_kms(>drm,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index e5010049d52e..962b640e7c74 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4927,26 +4927,24 @@ pipe_config_pll_mismatch(bool fastset,
 const struct intel_dpll_hw_state *b)
 {
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+   struct drm_printer p;
 
if (fastset) {
-   if (!drm_debug_enabled(DRM_UT_KMS))
-   return;
+   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
 
-   drm_dbg_kms(>drm,
-   "[CRTC:%d:%s] fastset requirement not met in %s\n",
-   crtc->base.base.id, crtc->base.name, name);
-   drm_dbg_kms(>drm, "expected:\n");
-   intel_dpll_dump_hw_state(i915, a);
-   drm_dbg_kms(>drm, "found:\n");
-   intel_dpll_dump_hw_state(i915, b);
+   drm_printf(, "[CRTC:%d:%s] fastset requirement not met in 
%s\n",
+  crtc->base.base.id, crtc->base.name, name);
} else {
-   drm_err(>drm, "[CRTC:%d:%s] mismatch in %s buffer\n",
-   crtc->base.base.id, crtc->base.name, name);
-   drm_err(>drm, "expected:\n");
-   intel_dpll_dump_hw_state(i915, a);
-   drm_err(>drm, "found:\n");
-   intel_dpll_dump_hw_state(i915, b);
+   p = drm_err_printer(>drm, NULL);
+
+   drm_printf(, "[CRTC:%d:%s] mismatch in %s\n",
+  crtc->base.base.id, crtc->base.name, name);
}
+
+   drm_printf(, "expected:\n");
+   intel_dpll_dump_hw_state(i915, , a);
+   drm_printf(, "found:\n");
+   intel_dpll_dump_hw_state(i915, , b);
 }
 
 bool
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index ff480f171f75..9542e62186e2 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -107,7 +107,7 @@ struct intel_dpll_mgr {
   struct intel_crtc *crtc,
   struct intel_encoder *encoder);
void (*update_ref_clks)(struct drm_i915_private *i915);
-   void (*dump_hw_state)(struct drm_i915_private *i915,
+   void (*dump_hw_state)(struct drm_printer *p,
  const struct intel_dpll_hw_state *hw_state);
bool (*compare_hw_state)(const struct intel_dpll_hw_state *a,
 const struct intel_dpll_hw_state *b);
@@ -634,16 +634,15 @@ static int ibx_get_dpll(struct intel_atomic_state *state,
return 0;
 }
 
-static void ibx_dump_hw_state(struct drm_i915_private *i915,
+static void ibx_dump_hw_state(struct drm_printer *p,
  

Re: [PATCH v3 1/3] bits: introduce fixed-type genmasks

2024-02-29 Thread Andy Shevchenko
On Thu, Feb 29, 2024 at 12:21:34PM -0600, Lucas De Marchi wrote:
> On Thu, Feb 29, 2024 at 12:49:57PM +0200, Andy Shevchenko wrote:
> > On Wed, Feb 28, 2024 at 05:39:21PM -0600, Lucas De Marchi wrote:
> > > On Thu, Feb 22, 2024 at 06:49:59AM -0800, Yury Norov wrote:

...

> > > I build-tested this in x86-64, x86-32 and arm64. I didn't like much the
> > > need to fork the __GENMASK() implementation on the 2 sides of the ifdef
> > > since I think the GENMASK_INPUT_CHECK() should be the one covering the
> > > input checks. However to make it common we'd need to solve 2 problems:
> > > the casts and the sizeof. The sizeof can be passed as arg to
> > > __GENMASK(), however the casts I think would need a __CAST_U8(x)
> > > or the like and sprinkle it everywhere, which would hurt readability.
> > > Not pretty. Or go back to the original submission and make it less
> > > horrible :-/
> > 
> > I'm wondering if we can use _Generic() approach here.
> 
> in assembly?

Yes.

-- 
With Best Regards,
Andy Shevchenko




Re: [PATCH v3 1/3] bits: introduce fixed-type genmasks

2024-02-29 Thread Lucas De Marchi

On Thu, Feb 29, 2024 at 12:49:57PM +0200, Andy Shevchenko wrote:

On Wed, Feb 28, 2024 at 05:39:21PM -0600, Lucas De Marchi wrote:

On Thu, Feb 22, 2024 at 06:49:59AM -0800, Yury Norov wrote:
> On Wed, Feb 21, 2024 at 03:59:06PM -0600, Lucas De Marchi wrote:
> > On Wed, Feb 21, 2024 at 11:04:22PM +0200, Andy Shevchenko wrote:
> > > On Wed, Feb 21, 2024 at 10:30:02PM +0200, Dmitry Baryshkov wrote:
> > > > On Thu, 8 Feb 2024 at 09:45, Lucas De Marchi  
wrote:


...


I build-tested this in x86-64, x86-32 and arm64. I didn't like much the
need to fork the __GENMASK() implementation on the 2 sides of the ifdef
since I think the GENMASK_INPUT_CHECK() should be the one covering the
input checks. However to make it common we'd need to solve 2 problems:
the casts and the sizeof. The sizeof can be passed as arg to
__GENMASK(), however the casts I think would need a __CAST_U8(x)
or the like and sprinkle it everywhere, which would hurt readability.
Not pretty. Or go back to the original submission and make it less
horrible :-/


I'm wondering if we can use _Generic() approach here.


in assembly?



...


> #define GENMASK_INPUT_CHECK(h, l) 0
> +#define __GENMASK(t, h, l) \
> +  ((~0 - (1 << (l)) + 1) & (~0 >> (BITS_PER_LONG - 1 - (h

humn... this builds, but does it work if GENMASK_ULL() is used in
assembly? That BITS_PER_LONG does not match the type width.


UL()/ULL() macros are not just for fun.


they are not for fun, but they expand to a nop in assembly. And it's up
to the instruction used to be the right one. Since this branch is for
assembly only, having them wouldn't really change the current behavior.
I'm talking about BITS_PER_LONG vs BITS_PER_LONG_LONG. That introduces
a bug here.

Lucas De Marchi



--
With Best Regards,
Andy Shevchenko




✗ Fi.CI.BAT: failure for series starting with [1/2] drm/ttm: improve idle/busy handling v5

2024-02-29 Thread Patchwork
== Series Details ==

Series: series starting with [1/2] drm/ttm: improve idle/busy handling v5
URL   : https://patchwork.freedesktop.org/series/130561/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14368 -> Patchwork_130561v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_130561v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_130561v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/index.html

Participating hosts (43 -> 42)
--

  Missing(1): fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_130561v1:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_parallel@engines@userptr:
- bat-arls-2: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-arls-2/igt@gem_exec_parallel@engi...@userptr.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@gem_exec_parallel@engi...@userptr.html

  * igt@i915_selftest@live@sanitycheck:
- bat-arls-2: NOTRUN -> [ABORT][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@i915_selftest@l...@sanitycheck.html

  
Known issues


  Here are the changes found in Patchwork_130561v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][4] -> [FAIL][5] ([i915#8293])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-jsl-1/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-jsl-1/boot.html

  
 Possible fixes 

  * boot:
- fi-apl-guc: [FAIL][6] ([i915#8293]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/fi-apl-guc/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/fi-apl-guc/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10213]) +3 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_rps@basic-api:
- bat-arls-2: NOTRUN -> [SKIP][10] ([i915#10209])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-arls-2: NOTRUN -> [SKIP][11] ([i915#10200]) +9 other tests 
skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10202]) +1 other test skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-arls-2: NOTRUN -> [SKIP][13] ([i915#9886])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10207])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-apl-guc: NOTRUN -> [SKIP][15] ([fdo#109271]) +17 other tests 
skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/fi-apl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_psr@psr-primary-mmap-gtt@edp-1:
- bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10196] / [i915#4077] / 
[i915#9688])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@kms_psr@psr-primary-mmap-...@edp-1.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-arls-2: NOTRUN -> [SKIP][17] ([i915#10208] / [i915#8809])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130561v1/bat-arls-2/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-mmap:
- bat-arls-2: NOTRUN -> [SKIP][18] ([i915#10196] / [i915#3708] / 
[i915#4077]) +1 other test skip
   [18]: 

✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/ttm: improve idle/busy handling v5

2024-02-29 Thread Patchwork
== Series Details ==

Series: series starting with [1/2] drm/ttm: improve idle/busy handling v5
URL   : https://patchwork.freedesktop.org/series/130561/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/ttm: improve idle/busy handling v5

2024-02-29 Thread Patchwork
== Series Details ==

Series: series starting with [1/2] drm/ttm: improve idle/busy handling v5
URL   : https://patchwork.freedesktop.org/series/130561/
State : warning

== Summary ==

Error: dim checkpatch failed
e4e8442e7666 drm/ttm: improve idle/busy handling v5
-:27: WARNING:BAD_SIGN_OFF: Unexpected content after email: 'Zack Rusin 
 v3', should be: 'Zack Rusin  
(v3)'
#27: 
Reviewed-by: Zack Rusin  v3

-:388: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address 
mismatch: 'From: "Christian König" ' != 
'Signed-off-by: Christian König '

total: 0 errors, 2 warnings, 0 checks, 341 lines checked
77aab0a47a3b drm/amdgpu: use GTT only as fallback for VRAM|GTT
-:33: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address 
mismatch: 'From: "Christian König" ' != 
'Signed-off-by: Christian König '

total: 0 errors, 1 warnings, 0 checks, 12 lines checked




Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

2024-02-29 Thread Souza, Jose
On Thu, 2024-02-29 at 16:44 +, Souza, Jose wrote:
> On Wed, 2024-02-28 at 06:04 -0800, José Roberto de Souza wrote:
> > On Wed, 2024-02-28 at 16:02 +0200, Juha-Pekka Heikkila wrote:
> > > AuxCCS framebuffers don't work on Xe driver hence disable them
> > > from plane capabilities until they are fixed. FlatCCS framebuffers
> > > work and they are left enabled. CCS is left untouched for i915
> > > driver.
> > > 
> > 
> > Reviewed-by: José Roberto de Souza 
> 
> This needs a Fixes tag so it gets backported to Linux 6.8.

Tested on Xe KMD and fixed the issue at least on ADL-P, you can also add:

Tested-by: José Roberto de Souza 

thank you

> 
> > 
> > > Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933
> > > Signed-off-by: Juha-Pekka Heikkila 
> > > ---
> > >  drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++
> > >  1 file changed, 3 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
> > > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > index e941e2e4fd14..860574d04f88 100644
> > > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > @@ -2295,6 +2295,9 @@ static u8 skl_get_plane_caps(struct 
> > > drm_i915_private *i915,
> > >   if (HAS_4TILE(i915))
> > >   caps |= INTEL_PLANE_CAP_TILING_4;
> > >  
> > > + if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915))
> > > + return caps;
> > > +
> > >   if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
> > >   caps |= INTEL_PLANE_CAP_CCS_RC;
> > >   if (DISPLAY_VER(i915) >= 12)
> > 
> 



✓ Fi.CI.BAT: success for drm/i915/dp: Fix connector DSC HW state readout (rev2)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915/dp: Fix connector DSC HW state readout (rev2)
URL   : https://patchwork.freedesktop.org/series/129540/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14368 -> Patchwork_129540v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/index.html

Participating hosts (43 -> 41)
--

  Missing(2): bat-jsl-1 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_129540v2 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- fi-apl-guc: [FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/fi-apl-guc/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/fi-apl-guc/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- bat-arls-2: NOTRUN -> [SKIP][4] ([i915#10213]) +3 other tests skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_rps@basic-api:
- bat-arls-2: NOTRUN -> [SKIP][5] ([i915#10209])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-arls-2: NOTRUN -> [SKIP][6] ([i915#10200]) +9 other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-arls-2: NOTRUN -> [SKIP][7] ([i915#10202]) +1 other test skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-arls-2: NOTRUN -> [SKIP][8] ([i915#9886])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10207])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-apl-guc: NOTRUN -> [SKIP][10] ([fdo#109271]) +17 other tests 
skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/fi-apl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_psr@psr-primary-mmap-gtt@edp-1:
- bat-arls-2: NOTRUN -> [SKIP][11] ([i915#10196] / [i915#4077] / 
[i915#9688])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@kms_psr@psr-primary-mmap-...@edp-1.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10208] / [i915#8809])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-mmap:
- bat-arls-2: NOTRUN -> [SKIP][13] ([i915#10196] / [i915#3708] / 
[i915#4077]) +1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@prime_v...@basic-fence-mmap.html

  * igt@prime_vgem@basic-fence-read:
- bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10212] / [i915#3708])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@prime_v...@basic-fence-read.html

  * igt@prime_vgem@basic-read:
- bat-arls-2: NOTRUN -> [SKIP][15] ([i915#10214] / [i915#3708])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-write:
- bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10216] / [i915#3708])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@prime_v...@basic-write.html

  
 Possible fixes 

  * igt@gem_wait@busy@all-engines:
- bat-arls-2: [ABORT][17] -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-arls-2/igt@gem_wait@b...@all-engines.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/bat-arls-2/igt@gem_wait@b...@all-engines.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg2-14: [INCOMPLETE][19] ([i915#10137]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-dg2-14/igt@i915_selftest@l...@hangcheck.html
   [20]: 

✗ Fi.CI.IGT: failure for Enable Adaptive Sync SDP Support for DP (rev12)

2024-02-29 Thread Patchwork
== Series Details ==

Series: Enable Adaptive Sync SDP Support for DP (rev12)
URL   : https://patchwork.freedesktop.org/series/126829/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14361_full -> Patchwork_126829v12_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126829v12_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126829v12_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 8)
--

  Additional (1): shard-snb-0 
  Missing(1): shard-snb 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126829v12_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-hdmi-a2:
- shard-dg2:  NOTRUN -> [TIMEOUT][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-dg2-2/igt@kms_flip@basic-flip-vs-wf_vbl...@d-hdmi-a2.html

  
New tests
-

  New tests have been introduced between CI_DRM_14361_full and 
Patchwork_126829v12_full:

### New IGT tests (5) ###

  * igt@kms_cursor_edge_walk@256x256-right-edge@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [3.45] s

  * igt@kms_cursor_edge_walk@256x256-right-edge@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [3.33] s

  * igt@kms_plane_alpha_blend@constant-alpha-mid@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.75] s

  * 
igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.40] s

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  

Known issues


  Here are the changes found in Patchwork_126829v12_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2:  NOTRUN -> [SKIP][2] ([i915#8411])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-dg2-11/igt@api_intel...@blit-reloc-keep-cache.html

  * igt@device_reset@unbind-cold-reset-rebind:
- shard-rkl:  NOTRUN -> [SKIP][3] ([i915#7701])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-rkl-5/igt@device_re...@unbind-cold-reset-rebind.html

  * igt@drm_fdinfo@busy-idle@bcs0:
- shard-dg2:  NOTRUN -> [SKIP][4] ([i915#8414]) +20 other tests skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-dg2-5/igt@drm_fdinfo@busy-i...@bcs0.html

  * igt@drm_fdinfo@idle@rcs0:
- shard-rkl:  NOTRUN -> [FAIL][5] ([i915#7742])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-rkl-1/igt@drm_fdinfo@i...@rcs0.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl:  [PASS][6] -> [FAIL][7] ([i915#7742]) +1 other test 
fail
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14361/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html

  * igt@drm_fdinfo@virtual-busy:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8414])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-mtlp-8/igt@drm_fdi...@virtual-busy.html

  * igt@gem_bad_reloc@negative-reloc:
- shard-rkl:  NOTRUN -> [SKIP][9] ([i915#3281]) +5 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-rkl-5/igt@gem_bad_re...@negative-reloc.html

  * igt@gem_ccs@block-multicopy-inplace:
- shard-rkl:  NOTRUN -> [SKIP][10] ([i915#3555] / [i915#9323])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-rkl-1/igt@gem_...@block-multicopy-inplace.html

  * igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-lmem0-lmem0:
- shard-dg2:  NOTRUN -> [INCOMPLETE][11] ([i915#10137] / 
[i915#7297])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-dg2-5/igt@gem_ccs@suspend-res...@tile4-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-process:
- shard-mtlp: NOTRUN -> [SKIP][12] ([i915#7697])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-mtlp-8/igt@gem_close_r...@multigpu-basic-process.html

  * igt@gem_create@create-ext-cpu-access-big:
- shard-rkl:  NOTRUN -> [SKIP][13] ([i915#6335])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v12/shard-rkl-1/igt@gem_cre...@create-ext-cpu-access-big.html

  * 

✓ Fi.CI.BAT: success for drm/i915/mtl: Update workaround 14018575942 (rev2)

2024-02-29 Thread Patchwork
== Series Details ==

Series: drm/i915/mtl: Update workaround 14018575942 (rev2)
URL   : https://patchwork.freedesktop.org/series/130490/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14368 -> Patchwork_130490v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/index.html

Participating hosts (43 -> 40)
--

  Missing(3): bat-mtlp-8 fi-glk-j4005 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130490v2 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-arls-3: [PASS][1] -> [FAIL][2] ([i915#10234])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-arls-3/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-3/boot.html
- bat-jsl-1:  [PASS][3] -> [FAIL][4] ([i915#8293])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/bat-jsl-1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-jsl-1/boot.html

  
 Possible fixes 

  * boot:
- fi-apl-guc: [FAIL][5] ([i915#8293]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/fi-apl-guc/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/fi-apl-guc/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- bat-arls-2: NOTRUN -> [SKIP][8] ([i915#10213]) +3 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_rps@basic-api:
- bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10209])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-arls-2: NOTRUN -> [SKIP][10] ([i915#10200]) +9 other tests 
skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-arls-2: NOTRUN -> [SKIP][11] ([i915#10202]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-arls-2: NOTRUN -> [SKIP][12] ([i915#9886])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-arls-2: NOTRUN -> [SKIP][13] ([i915#10207])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-apl-guc: NOTRUN -> [SKIP][14] ([fdo#109271]) +17 other tests 
skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/fi-apl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_psr@psr-primary-mmap-gtt@edp-1:
- bat-arls-2: NOTRUN -> [SKIP][15] ([i915#10196] / [i915#4077] / 
[i915#9688])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@kms_psr@psr-primary-mmap-...@edp-1.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10208] / [i915#8809])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-mmap:
- bat-arls-2: NOTRUN -> [SKIP][17] ([i915#10196] / [i915#3708] / 
[i915#4077]) +1 other test skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@prime_v...@basic-fence-mmap.html

  * igt@prime_vgem@basic-fence-read:
- bat-arls-2: NOTRUN -> [SKIP][18] ([i915#10212] / [i915#3708])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@prime_v...@basic-fence-read.html

  * igt@prime_vgem@basic-read:
- bat-arls-2: NOTRUN -> [SKIP][19] ([i915#10214] / [i915#3708])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-write:
- bat-arls-2: NOTRUN -> [SKIP][20] ([i915#10216] / [i915#3708])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130490v2/bat-arls-2/igt@prime_v...@basic-write.html

  
 Possible fixes 

  * igt@gem_wait@busy@all-engines:
- bat-arls-2: 

[PATCH v14 9/9] drm/i915/display: Read/Write AS sdp only when sink/source has enabled

2024-02-29 Thread Mitul Golani
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
 drivers/gpu/drm/i915/display/intel_dp.c  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index bea441590204..6b8088321582 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3971,6 +3971,7 @@ static void intel_ddi_get_config(struct intel_encoder 
*encoder,
 
intel_read_dp_sdp(encoder, pipe_config, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
+   intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
 
intel_audio_codec_get_config(encoder, pipe_config);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 86de854516ef..9309abeda241 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4294,6 +4294,7 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
return;
 
intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);
+   intel_write_dp_sdp(encoder, crtc_state, DP_SDP_ADAPTIVE_SYNC);
 
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
-- 
2.25.1



[PATCH v14 7/9] drm/i915/display: Add state checker for Adaptive Sync SDP

2024-02-29 Thread Mitul Golani
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.

--v1:
- crtc_state->infoframes.enable, to add on correct place holder.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_display.c | 46 
 1 file changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 00ac65a14029..be0a5fae4e58 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4781,6 +4781,17 @@ intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a,
a->content_type == b->content_type;
 }
 
+static bool
+intel_compare_dp_as_sdp(const struct drm_dp_as_sdp *a,
+   const struct drm_dp_as_sdp *b)
+{
+   return a->vtotal == b->vtotal &&
+   a->target_rr == b->target_rr &&
+   a->duration_incr_ms == b->duration_incr_ms &&
+   a->duration_decr_ms == b->duration_decr_ms &&
+   a->mode == b->mode;
+}
+
 static bool
 intel_compare_buffer(const u8 *a, const u8 *b, size_t len)
 {
@@ -4836,6 +4847,30 @@ pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private 
*i915,
drm_dp_vsc_sdp_log(, b);
 }
 
+static void
+pipe_config_dp_as_sdp_mismatch(struct drm_i915_private *i915,
+  bool fastset, const char *name,
+  const struct drm_dp_as_sdp *a,
+  const struct drm_dp_as_sdp *b)
+{
+   struct drm_printer p;
+
+   if (fastset) {
+   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
+
+   drm_printf(, "fastset requirement not met in %s dp sdp\n", 
name);
+   } else {
+   p = drm_err_printer(>drm, NULL);
+
+   drm_printf(, "mismatch in %s dp sdp\n", name);
+   }
+
+   drm_printf(, "expected:\n");
+   drm_dp_as_sdp_log(, a);
+   drm_printf(, "found:\n");
+   drm_dp_as_sdp_log(, b);
+}
+
 /* Returns the length up to and including the last differing byte */
 static size_t
 memcmp_diff_len(const u8 *a, const u8 *b, size_t len)
@@ -5089,6 +5124,16 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
} \
 } while (0)
 
+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \
+   if (!intel_compare_dp_as_sdp(_config->infoframes.name, \
+ _config->infoframes.name)) { \
+   pipe_config_dp_as_sdp_mismatch(dev_priv, fastset, 
__stringify(name), \
+   
_config->infoframes.name, \
+   _config->infoframes.name); 
\
+   ret = false; \
+   } \
+} while (0)
+
 #define PIPE_CONF_CHECK_BUFFER(name, len) do { \
BUILD_BUG_ON(sizeof(current_config->name) != (len)); \
BUILD_BUG_ON(sizeof(pipe_config->name) != (len)); \
@@ -5270,6 +5315,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_INFOFRAME(hdmi);
PIPE_CONF_CHECK_INFOFRAME(drm);
PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
+   PIPE_CONF_CHECK_DP_AS_SDP(as_sdp);
 
PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
PIPE_CONF_CHECK_I(master_transcoder);
-- 
2.25.1



[PATCH v14 6/9] drm/i915/display: Compute AS SDP parameters

2024-02-29 Thread Mitul Golani
Add necessary function definitions to compute AS SDP data.
The new intel_dp_compute_as_sdp function computes AS SDP
values based on the display configuration, ensuring proper
handling of Variable Refresh Rate (VRR).

--v2:
- Added DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx(). [Ankit]
- Separated patch for intel_read/write_dp_sdp. [Ankit]
- _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward. [Ankit]
- Fixed indentation issues. [Ankit]

--v3:
- Added VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes.

--v4:
- Added HAS_VRR check before writing AS SDP.

--v5:
Added missed HAS_VRR check before reading AS SDP.

--v6:
- Used Adaptive Sync sink status as a check for read/write SDP. (Ankit)

--v7:
- Remove as_sdp_enable from crtc_state.
- Add a comment mentioning current support of
  DP_AS_SDP_AVT_FIXED_VTOTAL.
- Add state checker for AS_SDP infoframe enable.

--v8:
- Drop conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 26 +
 1 file changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index b26efce4a041..86de854516ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2626,6 +2626,31 @@ static void intel_dp_compute_vsc_colorimetry(const 
struct intel_crtc_state *crtc
vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED;
 }
 
+static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
+   struct intel_crtc_state *crtc_state)
+{
+   struct drm_dp_as_sdp *as_sdp = _state->infoframes.as_sdp;
+   struct intel_connector *connector = intel_dp->attached_connector;
+   const struct drm_display_mode *adjusted_mode =
+   _state->hw.adjusted_mode;
+   int vrefresh = drm_mode_vrefresh(adjusted_mode);
+
+   if (!intel_vrr_is_in_range(connector, vrefresh) ||
+   !intel_dp_as_sdp_supported(intel_dp))
+   return;
+
+   crtc_state->infoframes.enable |= 
intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
+
+   /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */
+   as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC;
+   as_sdp->length = 0x9;
+   as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL;
+   as_sdp->vtotal = adjusted_mode->vtotal;
+   as_sdp->target_rr = 0;
+   as_sdp->duration_incr_ms = 0;
+   as_sdp->duration_incr_ms = 0;
+}
+
 static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 struct intel_crtc_state *crtc_state,
 const struct drm_connector_state 
*conn_state)
@@ -2951,6 +2976,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
g4x_dp_set_clock(encoder, pipe_config);
 
intel_vrr_compute_config(pipe_config, conn_state);
+   intel_dp_compute_as_sdp(intel_dp, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
-- 
2.25.1



[PATCH v14 5/9] drm/i915/dp: Add wrapper function to check AS SDP

2024-02-29 Thread Mitul Golani
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.

--v1:
Just use drm/i915/dp in subject line.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 8 
 drivers/gpu/drm/i915/display/intel_dp.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 7cf849015797..b26efce4a041 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -120,6 +120,14 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
return dig_port->base.type == INTEL_OUTPUT_EDP;
 }
 
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp)
+{
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+   return HAS_AS_SDP(i915) &&
+   drm_dp_as_sdp_supported(_dp->aux, intel_dp->dpcd);
+}
+
 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
 
 /* Is link rate UHBR and thus 128b/132b? */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
b/drivers/gpu/drm/i915/display/intel_dp.h
index 530cc97bc42f..cc5e069091ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -80,6 +80,7 @@ void intel_dp_audio_compute_config(struct intel_encoder 
*encoder,
   struct drm_connector_state *conn_state);
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
 int intel_dp_link_symbol_size(int rate);
 int intel_dp_link_symbol_clock(int rate);
-- 
2.25.1



[PATCH v14 8/9] drm/i915/display: Compute vrr_vsync params

2024-02-29 Thread Mitul Golani
Compute vrr_vsync_start/end, which sets the position
for hardware to send the Vsync at a fixed position
relative to the end of the Vblank.

--v2:
- Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit)
- Updated bit fields of VRR_VSYNC_START/END. (Ankit)

--v3:
- Add PIPE_CONF_CHECK_I(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_display.c  |  2 ++
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_vrr.c  | 29 +--
 drivers/gpu/drm/i915/i915_reg.h   |  7 +
 4 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index be0a5fae4e58..c523eec4d626 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5367,6 +5367,8 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_I(vrr.flipline);
PIPE_CONF_CHECK_I(vrr.pipeline_full);
PIPE_CONF_CHECK_I(vrr.guardband);
+   PIPE_CONF_CHECK_I(vrr.vsync_start);
+   PIPE_CONF_CHECK_I(vrr.vsync_end);
}
 
 #undef PIPE_CONF_CHECK_X
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 1256730ea276..45b30d3ceb06 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1417,6 +1417,7 @@ struct intel_crtc_state {
bool enable, in_range;
u8 pipeline_full;
u16 flipline, vmin, vmax, guardband;
+   u32 vsync_end, vsync_start;
} vrr;
 
/* Stream Splitter for eDP MSO */
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c 
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 5d905f932cb4..d24a42902e69 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -9,6 +9,7 @@
 #include "intel_de.h"
 #include "intel_display_types.h"
 #include "intel_vrr.h"
+#include "intel_dp.h"
 
 bool intel_vrr_is_capable(struct intel_connector *connector)
 {
@@ -113,6 +114,7 @@ intel_vrr_compute_config(struct intel_crtc_state 
*crtc_state,
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_connector *connector =
to_intel_connector(conn_state->connector);
+   struct intel_dp *intel_dp = intel_attached_dp(connector);
struct drm_display_mode *adjusted_mode = _state->hw.adjusted_mode;
const struct drm_display_info *info = >base.display_info;
int vmin, vmax;
@@ -165,6 +167,15 @@ intel_vrr_compute_config(struct intel_crtc_state 
*crtc_state,
if (crtc_state->uapi.vrr_enabled) {
crtc_state->vrr.enable = true;
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+   if (intel_dp_as_sdp_supported(intel_dp)) {
+   crtc_state->vrr.vsync_start =
+   (crtc_state->hw.adjusted_mode.crtc_vtotal -
+   
VRR_VSYNC_START(crtc_state->hw.adjusted_mode.vsync_start));
+   crtc_state->vrr.vsync_end =
+   (crtc_state->hw.adjusted_mode.crtc_vtotal -
+   
(VRR_VSYNC_END(crtc_state->hw.adjusted_mode.vsync_end) >> 16));
+   }
}
 }
 
@@ -203,6 +214,10 @@ void intel_vrr_set_transcoder_timings(const struct 
intel_crtc_state *crtc_state)
intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), 
crtc_state->vrr.vmax - 1);
intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 
trans_vrr_ctl(crtc_state));
intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), 
crtc_state->vrr.flipline - 1);
+
+   if (crtc_state->vrr.vsync_end && crtc_state->vrr.vsync_start)
+   intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
+  crtc_state->vrr.vsync_end << 16 | 
crtc_state->vrr.vsync_start);
 }
 
 void intel_vrr_send_push(const struct intel_crtc_state *crtc_state)
@@ -263,7 +278,7 @@ void intel_vrr_get_config(struct intel_crtc_state 
*crtc_state)
 {
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
-   u32 trans_vrr_ctl;
+   u32 trans_vrr_ctl, trans_vrr_vsync;
 
trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(cpu_transcoder));
 
@@ -283,6 +298,16 @@ void intel_vrr_get_config(struct intel_crtc_state 
*crtc_state)
crtc_state->vrr.vmin = intel_de_read(dev_priv, 
TRANS_VRR_VMIN(cpu_transcoder)) + 1;
}
 
-   if (crtc_state->vrr.enable)
+   if (crtc_state->vrr.enable) {
crtc_state->mode_flags |= 

[PATCH v14 2/9] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Mitul Golani
Add structure representing Adaptive Sync Secondary Data Packet (AS SDP).
Also, add Adaptive Sync SDP logging in drm_dp_helper.c to facilitate
debugging.

--v2:
- Update logging. [Jani, Ankit]
- Use 'as_sdp' instead of 'async' [Ankit]
- Correct define placeholders to where they are actually used. [Jani]
- Update members in 'as_sdp' structure to make it uniform. [Jani]

--v3:
- Added changes to dri-devel mailing list. No code changes.

--v4:
- Instead of directly using operation mode, use an enum to accommodate
all operation modes (Ankit).

--v5:
Nit-pick changes to commit message.

--v6:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
 include/drm/display/drm_dp.h| 10 +
 include/drm/display/drm_dp_helper.h | 29 +
 3 files changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c 
b/drivers/gpu/drm/display/drm_dp_helper.c
index f94c04db7187..b1459ac92aea 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2913,6 +2913,18 @@ void drm_dp_vsc_sdp_log(struct drm_printer *p, const 
struct drm_dp_vsc_sdp *vsc)
 }
 EXPORT_SYMBOL(drm_dp_vsc_sdp_log);
 
+void drm_dp_as_sdp_log(struct drm_printer *p, const struct drm_dp_as_sdp 
*as_sdp)
+{
+   drm_printf(p, "DP SDP: AS_SDP, revision %u, length %u\n",
+  as_sdp->revision, as_sdp->length);
+   drm_printf(p, "vtotal: %d\n", as_sdp->vtotal);
+   drm_printf(p, "target_rr: %d\n", as_sdp->target_rr);
+   drm_printf(p, "duration_incr_ms: %d\n", as_sdp->duration_incr_ms);
+   drm_printf(p, "duration_decr_ms: %d\n", as_sdp->duration_decr_ms);
+   drm_printf(p, "operation_mode: %d\n", as_sdp->mode);
+}
+EXPORT_SYMBOL(drm_dp_as_sdp_log);
+
 /**
  * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported
  * @aux: DisplayPort AUX channel
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 281afff6ee4e..ba388ad48ade 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -1149,6 +1149,7 @@
 
 #define DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1 0x2214 /* 2.0 E11 */
 # define DP_ADAPTIVE_SYNC_SDP_SUPPORTED(1 << 0)
+# define DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE   GENMASK(1, 0)
 # define DP_AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (1 
<< 1)
 # define DP_VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED  (1 << 4)
 
@@ -1578,10 +1579,12 @@ enum drm_dp_phy {
 #define DP_SDP_AUDIO_COPYMANAGEMENT0x05 /* DP 1.2 */
 #define DP_SDP_ISRC0x06 /* DP 1.2 */
 #define DP_SDP_VSC 0x07 /* DP 1.2 */
+#define DP_SDP_ADAPTIVE_SYNC   0x22 /* DP 1.4 */
 #define DP_SDP_CAMERA_GENERIC(i)   (0x08 + (i)) /* 0-7, DP 1.3 */
 #define DP_SDP_PPS 0x10 /* DP 1.4 */
 #define DP_SDP_VSC_EXT_VESA0x20 /* DP 1.4 */
 #define DP_SDP_VSC_EXT_CEA 0x21 /* DP 1.4 */
+
 /* 0x80+ CEA-861 infoframe types */
 
 #define DP_SDP_AUDIO_INFOFRAME_HB2 0x1b
@@ -1737,4 +1740,11 @@ enum dp_content_type {
DP_CONTENT_TYPE_GAME = 0x04,
 };
 
+enum operation_mode {
+   DP_AS_SDP_AVT_DYNAMIC_VTOTAL = 0x00,
+   DP_AS_SDP_AVT_FIXED_VTOTAL = 0x01,
+   DP_AS_SDP_FAVT_TRR_NOT_REACHED = 0x02,
+   DP_AS_SDP_FAVT_TRR_REACHED = 0x03
+};
+
 #endif /* _DRM_DP_H_ */
diff --git a/include/drm/display/drm_dp_helper.h 
b/include/drm/display/drm_dp_helper.h
index 7c1aa3a703c8..94eb0d92abae 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -98,6 +98,35 @@ struct drm_dp_vsc_sdp {
enum dp_content_type content_type;
 };
 
+/**
+ * struct drm_dp_as_sdp - drm DP Adaptive Sync SDP
+ *
+ * This structure represents a DP AS SDP of drm
+ * It is based on DP 2.1 spec [Table 2-126:  Adaptive-Sync SDP Header Bytes] 
and
+ * [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]
+ *
+ * @sdp_type: Secondary-data packet type
+ * @revision: Revision Number
+ * @length: Number of valid data bytes
+ * @vtotal: Minimum Vertical Vtotal
+ * @target_rr: Target Refresh
+ * @duration_incr_ms: Successive frame duration increase
+ * @duration_decr_ms: Successive frame duration decrease
+ * @operation_mode: Adaptive Sync Operation Mode
+ */
+struct drm_dp_as_sdp {
+   unsigned char sdp_type;
+   unsigned char revision;
+   unsigned char length;
+   int vtotal;
+   int target_rr;
+   int duration_incr_ms;
+   int duration_decr_ms;
+   enum operation_mode mode;
+};
+
+void drm_dp_as_sdp_log(struct drm_printer *p,
+  const struct drm_dp_as_sdp *as_sdp);
 void drm_dp_vsc_sdp_log(struct drm_printer *p, const struct drm_dp_vsc_sdp 
*vsc);
 
 bool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 

[PATCH v14 4/9] drm/i915/dp: Add Read/Write support for Adaptive Sync SDP

2024-02-29 Thread Mitul Golani
Add the necessary structures and functions to handle reading and
unpacking Adaptive Sync Secondary Data Packets. Also add support
to write and pack AS SDP.

--v2:
- Correct use of REG_BIT and REG_GENMASK. [Jani]
- Use as_sdp instead of async. [Jani]
- Remove unrelated comments and changes. [Jani]
- Correct code indent. [Jani]

--v3:
- Update definition names for AS SDP which are starting from
HSW, as these defines are applicable for ADLP+.(Ankit)

--v4:
- Remove as_sdp_mode from crtc_state.
- Drop metadata keyword.
- For consistency, update ADL_ prefix or post fix as required.

--v5:
- Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not
  return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
Signed-off-by: Mitul Golani 
---
 .../drm/i915/display/intel_display_device.h   |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 91 +++
 drivers/gpu/drm/i915/display/intel_hdmi.c | 12 ++-
 drivers/gpu/drm/i915/i915_reg.h   |  8 ++
 include/drm/display/drm_dp_helper.h   |  2 +-
 5 files changed, 112 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h 
b/drivers/gpu/drm/i915/display/intel_display_device.h
index fe4268813786..6399fbc6c738 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -68,6 +68,7 @@ struct drm_printer;
 #define HAS_TRANSCODER(i915, trans)
((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
  BIT(trans)) != 0)
 #define HAS_VRR(i915)  (DISPLAY_VER(i915) >= 11)
+#define HAS_AS_SDP(i915)   (DISPLAY_VER(i915) >= 13)
 #define INTEL_NUM_PIPES(i915)  
(hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
 #define I915_HAS_HOTPLUG(i915) (DISPLAY_INFO(i915)->has_hotplug)
 #define OVERLAY_NEEDS_PHYSICAL(i915)   
(DISPLAY_INFO(i915)->overlay_needs_physical)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index e13121dc3a03..7cf849015797 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4089,6 +4089,32 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state 
*crtc_state,
return false;
 }
 
+static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *as_sdp,
+   struct dp_sdp *sdp, size_t size)
+{
+   size_t length = sizeof(struct dp_sdp);
+
+   if (size < length)
+   return -ENOSPC;
+
+   memset(sdp, 0, size);
+
+   /* Prepare AS (Adaptive Sync) SDP Header */
+   sdp->sdp_header.HB0 = 0;
+   sdp->sdp_header.HB1 = as_sdp->sdp_type;
+   sdp->sdp_header.HB2 = 0x02;
+   sdp->sdp_header.HB3 = as_sdp->length;
+
+   /* Fill AS (Adaptive Sync) SDP Payload */
+   sdp->db[0] = as_sdp->mode;
+   sdp->db[1] = as_sdp->vtotal & 0xFF;
+   sdp->db[2] = (as_sdp->vtotal >> 8) & 0xFF;
+   sdp->db[3] = as_sdp->target_rr;
+   sdp->db[4] = (as_sdp->target_rr >> 8) & 0x3;
+
+   return length;
+}
+
 static ssize_t
 intel_dp_hdr_metadata_infoframe_sdp_pack(struct drm_i915_private *i915,
 const struct hdmi_drm_infoframe 
*drm_infoframe,
@@ -4188,6 +4214,10 @@ static void intel_write_dp_sdp(struct intel_encoder 
*encoder,
   
_state->infoframes.drm.drm,
   , 
sizeof(sdp));
break;
+   case DP_SDP_ADAPTIVE_SYNC:
+   len = intel_dp_as_sdp_pack(_state->infoframes.as_sdp, ,
+  sizeof(sdp));
+   break;
default:
MISSING_CASE(type);
return;
@@ -4209,6 +4239,10 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
 VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
 VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;
+
+   if (HAS_AS_SDP(dev_priv))
+   dip_enable |= VIDEO_DIP_ENABLE_AS_ADL;
+
u32 val = intel_de_read(dev_priv, reg) & ~dip_enable;
 
/* TODO: Sanitize DSC enabling wrt. intel_dsc_dp_pps_write(). */
@@ -4230,6 +4264,36 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static
+int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
+  const void *buffer, size_t size)
+{
+   const struct dp_sdp *sdp = buffer;
+
+   if (size < sizeof(struct dp_sdp))
+   return -EINVAL;
+
+   memset(as_sdp, 0, sizeof(*as_sdp));
+
+   if (sdp->sdp_header.HB0 != 0)
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB1 != DP_SDP_ADAPTIVE_SYNC)
+ 

[PATCH v14 3/9] drm: Add crtc state dump for Adaptive Sync SDP

2024-02-29 Thread Mitul Golani
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.

Signed-off-by: Mitul Golani 
---
 .../gpu/drm/i915/display/intel_crtc_state_dump.c| 13 +
 drivers/gpu/drm/i915/display/intel_display_types.h  |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 4bcf446c75f4..1e4618271156 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -51,6 +51,15 @@ intel_dump_infoframe(struct drm_i915_private *i915,
hdmi_infoframe_log(KERN_DEBUG, i915->drm.dev, frame);
 }
 
+static void
+intel_dump_dp_as_sdp(struct drm_i915_private *i915,
+const struct drm_dp_as_sdp *as_sdp)
+{
+   struct drm_printer p = drm_dbg_printer(>drm, DRM_UT_KMS, 
"AS_SDP");
+
+   drm_dp_as_sdp_log(, as_sdp);
+}
+
 static void
 intel_dump_dp_vsc_sdp(struct drm_i915_private *i915,
  const struct drm_dp_vsc_sdp *vsc)
@@ -302,6 +311,10 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
*pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(DP_SDP_VSC))
intel_dump_dp_vsc_sdp(i915, _config->infoframes.vsc);
+   if (pipe_config->infoframes.enable &
+   intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC))
+   intel_dump_dp_as_sdp(i915, _config->infoframes.as_sdp);
+
 
if (pipe_config->has_audio)
intel_dump_buffer(i915, "ELD: ", pipe_config->eld,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8ce986fadd9a..1256730ea276 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1335,6 +1335,7 @@ struct intel_crtc_state {
union hdmi_infoframe hdmi;
union hdmi_infoframe drm;
struct drm_dp_vsc_sdp vsc;
+   struct drm_dp_as_sdp as_sdp;
} infoframes;
 
u8 eld[MAX_ELD_BYTES];
-- 
2.25.1



[PATCH v14 0/9] Enable Adaptive Sync SDP Support for DP

2024-02-29 Thread Mitul Golani
An Adaptive-Sync-capable DP protocol converter indicates its
support by setting the related bit in the DPCD register.

Computes AS SDP values based on the display configuration,
ensuring proper handling of Variable Refresh Rate (VRR)
in the context of Adaptive Sync.

--v2:
- Update logging to Patch-1
- use as_sdp instead of async
- Put definitions to correct placeholders from where it is defined.
- Update member types of as_sdp for uniformity.
- Correct use of REG_BIT and REG_GENMASK.
- Remove unrelated comments and changes.
- Correct code indents.
- separate out patch changes for intel_read/write_dp_sdp.

--v3:
- Add VIDEO_DIP_ASYNC_DATA_SIZE definition and comment in as_sdp_pack
  function to patch 2 as originally used there. [Patch 2].
- Add VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes [Patch 3].

--v4:
- Add check for HAS_VRR before writing AS SDP. [Patch 3].

--v5:
- Add missing check for HAS_VRR before reading AS SDP as well [Patch 3].

--v6:
- Rebase all patches.
- Compute TRANS_VRR_VSYNC.

-v7:
- Move vrr_vsync_start/end to compute config.
- Use correct function for drm_debug_printer.

-v8:
- Code refactoring.
- Update, VSYNC_START/END macros to VRR_VSYNC_START/END.(Ankit)
- Update bit fields of VRR_VSYNC_START/END.(Ankit)
- Send patches to dri-devel.(Ankit)
- Update definition names for AS SDP which are starting from
HSW, as these defines are applicable for ADLP+.(Ankit)
- Remove unused bitfield define, AS_SDP_ENABLE.
- Add support in drm for Adaptive Sync sink status, which can be
used later as a check for read/write sdp. (Ankit)

-v9:
- Add enum to operation mode to represent different AVT and
FAVT modes. (Ankit)
- Operation_mode, target_rr etc should be filled from as_sdp struct. (Ankit)
- Fill as_sdp->*All Params* from compute config, read from the sdp. (Ankit)
- Move configs to the appropriate patch where it used first.(Ankit)
- There should be a check if as sdp is enable is set or not. (Ankit)
- Add variables in crtc state->vrr for ad sdp enable and operation mode. (Ankit)
- Use above variables for tracking AS SDP. (Ankit)
- Revert unused changes. (Ankit)

-v10:
- Send Patches to dri-devel (Ankit).

-v11:
- Remove as_sdp_mode and enable from crtc_state.
- For consistency, update ADL_ prefix or post fix as required.
- Add a comment mentioning current support of
  DP_AS_SDP_AVT_FIXED_VTOTAL.
- Add state checker for AS_SDP infoframe enable.
- Add PIPE_CONF_CHECK_I(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.

-v12:
- Update cover letter

-v13:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
- Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not
  return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
- Just use drm/i915/dp in subject line.
- Drop conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
- crtc_state->infoframes.enable, to add on correct place holder.

--v14: Mistakenly dropped first patch, adding back.

Signed-off-by: Mitul Golani i

Mitul Golani (9):
  drm/dp: Add support to indicate if sink supports AS SDP
  drm: Add Adaptive Sync SDP logging
  drm: Add crtc state dump for Adaptive Sync SDP
  drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
  drm/i915/dp: Add wrapper function to check AS SDP
  drm/i915/display: Compute AS SDP parameters
  drm/i915/display: Add state checker for Adaptive Sync SDP
  drm/i915/display: Compute vrr_vsync params
  drm/i915/display: Read/Write AS sdp only when sink/source has enabled

 drivers/gpu/drm/display/drm_dp_helper.c   |  37 +
 .../drm/i915/display/intel_crtc_state_dump.c  |  13 ++
 drivers/gpu/drm/i915/display/intel_ddi.c  |   1 +
 drivers/gpu/drm/i915/display/intel_display.c  |  48 +++
 .../drm/i915/display/intel_display_device.h   |   1 +
 .../drm/i915/display/intel_display_types.h|   2 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 126 ++
 drivers/gpu/drm/i915/display/intel_dp.h   |   1 +
 drivers/gpu/drm/i915/display/intel_hdmi.c |  12 +-
 drivers/gpu/drm/i915/display/intel_vrr.c  |  29 +++-
 drivers/gpu/drm/i915/i915_reg.h   |  15 +++
 include/drm/display/drm_dp.h  |  10 ++
 include/drm/display/drm_dp_helper.h   |  30 +
 13 files changed, 322 insertions(+), 3 deletions(-)

-- 
2.25.1



[PATCH v14 1/9] drm/dp: Add support to indicate if sink supports AS SDP

2024-02-29 Thread Mitul Golani
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.

--v1:
- Format commit message properly.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/display/drm_dp_helper.c | 25 +
 include/drm/display/drm_dp_helper.h |  1 +
 2 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c 
b/drivers/gpu/drm/display/drm_dp_helper.c
index 9ac52cf5d4d8..f94c04db7187 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2913,6 +2913,31 @@ void drm_dp_vsc_sdp_log(struct drm_printer *p, const 
struct drm_dp_vsc_sdp *vsc)
 }
 EXPORT_SYMBOL(drm_dp_vsc_sdp_log);
 
+/**
+ * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported
+ * @aux: DisplayPort AUX channel
+ * @dpcd: DisplayPort configuration data
+ *
+ * Returns true if adaptive sync sdp is supported, else returns false
+ */
+bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 
dpcd[DP_RECEIVER_CAP_SIZE])
+{
+   u8 rx_feature;
+
+   if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_13)
+   return false;
+
+   if (drm_dp_dpcd_readb(aux, DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,
+ _feature) != 1) {
+   drm_dbg_dp(aux->drm_dev,
+  "Failed to read 
DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1\n");
+   return false;
+   }
+
+   return (rx_feature & DP_ADAPTIVE_SYNC_SDP_SUPPORTED);
+}
+EXPORT_SYMBOL(drm_dp_as_sdp_supported);
+
 /**
  * drm_dp_vsc_sdp_supported() - check if vsc sdp is supported
  * @aux: DisplayPort AUX channel
diff --git a/include/drm/display/drm_dp_helper.h 
b/include/drm/display/drm_dp_helper.h
index 0c1a4021e098..7c1aa3a703c8 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -101,6 +101,7 @@ struct drm_dp_vsc_sdp {
 void drm_dp_vsc_sdp_log(struct drm_printer *p, const struct drm_dp_vsc_sdp 
*vsc);
 
 bool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 
dpcd[DP_RECEIVER_CAP_SIZE]);
+bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 
dpcd[DP_RECEIVER_CAP_SIZE]);
 
 int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
 
-- 
2.25.1



Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

2024-02-29 Thread Souza, Jose
On Wed, 2024-02-28 at 06:04 -0800, José Roberto de Souza wrote:
> On Wed, 2024-02-28 at 16:02 +0200, Juha-Pekka Heikkila wrote:
> > AuxCCS framebuffers don't work on Xe driver hence disable them
> > from plane capabilities until they are fixed. FlatCCS framebuffers
> > work and they are left enabled. CCS is left untouched for i915
> > driver.
> > 
> 
> Reviewed-by: José Roberto de Souza 

This needs a Fixes tag so it gets backported to Linux 6.8.

> 
> > Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933
> > Signed-off-by: Juha-Pekka Heikkila 
> > ---
> >  drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
> > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index e941e2e4fd14..860574d04f88 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -2295,6 +2295,9 @@ static u8 skl_get_plane_caps(struct drm_i915_private 
> > *i915,
> > if (HAS_4TILE(i915))
> > caps |= INTEL_PLANE_CAP_TILING_4;
> >  
> > +   if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915))
> > +   return caps;
> > +
> > if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
> > caps |= INTEL_PLANE_CAP_CCS_RC;
> > if (DISPLAY_VER(i915) >= 12)
> 



RE: [PATCH v12 2/8] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Golani, Mitulkumar Ajitkumar



> -Original Message-
> From: Nikula, Jani 
> Sent: Thursday, February 29, 2024 4:08 PM
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Nautiyal, Ankit K
> ; Golani, Mitulkumar Ajitkumar
> 
> Subject: Re: [PATCH v12 2/8] drm: Add Adaptive Sync SDP logging
> 
> On Wed, 28 Feb 2024, Mitul Golani 
> wrote:
> > Add structure representing Adaptive Sync Secondary Data Packet (AS SDP).
> > Also, add Adaptive Sync SDP logging in drm_dp_helper.c to facilitate
> > debugging.
> 
> To be honest, the division of patches is a bit weird. There's no reason to 
> change
> i915 here, is there?
> 

Hi Jani,

Thought behind this was to use the function where it was defined. But no 
worries, I have split it with new patch series floated.

Regards,
Mitul


[PATCH v13 8/8] drm/i915/display: Read/Write AS sdp only when sink/source has enabled

2024-02-29 Thread Mitul Golani
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
 drivers/gpu/drm/i915/display/intel_dp.c  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index bea441590204..6b8088321582 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3971,6 +3971,7 @@ static void intel_ddi_get_config(struct intel_encoder 
*encoder,
 
intel_read_dp_sdp(encoder, pipe_config, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
+   intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
 
intel_audio_codec_get_config(encoder, pipe_config);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 86de854516ef..9309abeda241 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4294,6 +4294,7 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
return;
 
intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);
+   intel_write_dp_sdp(encoder, crtc_state, DP_SDP_ADAPTIVE_SYNC);
 
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
-- 
2.25.1



[PATCH v13 6/8] drm/i915/display: Add state checker for Adaptive Sync SDP

2024-02-29 Thread Mitul Golani
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.

--v1:
- crtc_state->infoframes.enable, to add on correct place holder.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_display.c | 46 
 1 file changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 00ac65a14029..be0a5fae4e58 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4781,6 +4781,17 @@ intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a,
a->content_type == b->content_type;
 }
 
+static bool
+intel_compare_dp_as_sdp(const struct drm_dp_as_sdp *a,
+   const struct drm_dp_as_sdp *b)
+{
+   return a->vtotal == b->vtotal &&
+   a->target_rr == b->target_rr &&
+   a->duration_incr_ms == b->duration_incr_ms &&
+   a->duration_decr_ms == b->duration_decr_ms &&
+   a->mode == b->mode;
+}
+
 static bool
 intel_compare_buffer(const u8 *a, const u8 *b, size_t len)
 {
@@ -4836,6 +4847,30 @@ pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private 
*i915,
drm_dp_vsc_sdp_log(, b);
 }
 
+static void
+pipe_config_dp_as_sdp_mismatch(struct drm_i915_private *i915,
+  bool fastset, const char *name,
+  const struct drm_dp_as_sdp *a,
+  const struct drm_dp_as_sdp *b)
+{
+   struct drm_printer p;
+
+   if (fastset) {
+   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
+
+   drm_printf(, "fastset requirement not met in %s dp sdp\n", 
name);
+   } else {
+   p = drm_err_printer(>drm, NULL);
+
+   drm_printf(, "mismatch in %s dp sdp\n", name);
+   }
+
+   drm_printf(, "expected:\n");
+   drm_dp_as_sdp_log(, a);
+   drm_printf(, "found:\n");
+   drm_dp_as_sdp_log(, b);
+}
+
 /* Returns the length up to and including the last differing byte */
 static size_t
 memcmp_diff_len(const u8 *a, const u8 *b, size_t len)
@@ -5089,6 +5124,16 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
} \
 } while (0)
 
+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \
+   if (!intel_compare_dp_as_sdp(_config->infoframes.name, \
+ _config->infoframes.name)) { \
+   pipe_config_dp_as_sdp_mismatch(dev_priv, fastset, 
__stringify(name), \
+   
_config->infoframes.name, \
+   _config->infoframes.name); 
\
+   ret = false; \
+   } \
+} while (0)
+
 #define PIPE_CONF_CHECK_BUFFER(name, len) do { \
BUILD_BUG_ON(sizeof(current_config->name) != (len)); \
BUILD_BUG_ON(sizeof(pipe_config->name) != (len)); \
@@ -5270,6 +5315,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_INFOFRAME(hdmi);
PIPE_CONF_CHECK_INFOFRAME(drm);
PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
+   PIPE_CONF_CHECK_DP_AS_SDP(as_sdp);
 
PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
PIPE_CONF_CHECK_I(master_transcoder);
-- 
2.25.1



[PATCH v13 7/8] drm/i915/display: Compute vrr_vsync params

2024-02-29 Thread Mitul Golani
Compute vrr_vsync_start/end, which sets the position
for hardware to send the Vsync at a fixed position
relative to the end of the Vblank.

--v2:
- Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit)
- Updated bit fields of VRR_VSYNC_START/END. (Ankit)

--v3:
- Add PIPE_CONF_CHECK_I(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_display.c  |  2 ++
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_vrr.c  | 29 +--
 drivers/gpu/drm/i915/i915_reg.h   |  7 +
 4 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index be0a5fae4e58..c523eec4d626 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5367,6 +5367,8 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_I(vrr.flipline);
PIPE_CONF_CHECK_I(vrr.pipeline_full);
PIPE_CONF_CHECK_I(vrr.guardband);
+   PIPE_CONF_CHECK_I(vrr.vsync_start);
+   PIPE_CONF_CHECK_I(vrr.vsync_end);
}
 
 #undef PIPE_CONF_CHECK_X
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 1256730ea276..45b30d3ceb06 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1417,6 +1417,7 @@ struct intel_crtc_state {
bool enable, in_range;
u8 pipeline_full;
u16 flipline, vmin, vmax, guardband;
+   u32 vsync_end, vsync_start;
} vrr;
 
/* Stream Splitter for eDP MSO */
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c 
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 5d905f932cb4..d24a42902e69 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -9,6 +9,7 @@
 #include "intel_de.h"
 #include "intel_display_types.h"
 #include "intel_vrr.h"
+#include "intel_dp.h"
 
 bool intel_vrr_is_capable(struct intel_connector *connector)
 {
@@ -113,6 +114,7 @@ intel_vrr_compute_config(struct intel_crtc_state 
*crtc_state,
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_connector *connector =
to_intel_connector(conn_state->connector);
+   struct intel_dp *intel_dp = intel_attached_dp(connector);
struct drm_display_mode *adjusted_mode = _state->hw.adjusted_mode;
const struct drm_display_info *info = >base.display_info;
int vmin, vmax;
@@ -165,6 +167,15 @@ intel_vrr_compute_config(struct intel_crtc_state 
*crtc_state,
if (crtc_state->uapi.vrr_enabled) {
crtc_state->vrr.enable = true;
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+   if (intel_dp_as_sdp_supported(intel_dp)) {
+   crtc_state->vrr.vsync_start =
+   (crtc_state->hw.adjusted_mode.crtc_vtotal -
+   
VRR_VSYNC_START(crtc_state->hw.adjusted_mode.vsync_start));
+   crtc_state->vrr.vsync_end =
+   (crtc_state->hw.adjusted_mode.crtc_vtotal -
+   
(VRR_VSYNC_END(crtc_state->hw.adjusted_mode.vsync_end) >> 16));
+   }
}
 }
 
@@ -203,6 +214,10 @@ void intel_vrr_set_transcoder_timings(const struct 
intel_crtc_state *crtc_state)
intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), 
crtc_state->vrr.vmax - 1);
intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 
trans_vrr_ctl(crtc_state));
intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), 
crtc_state->vrr.flipline - 1);
+
+   if (crtc_state->vrr.vsync_end && crtc_state->vrr.vsync_start)
+   intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
+  crtc_state->vrr.vsync_end << 16 | 
crtc_state->vrr.vsync_start);
 }
 
 void intel_vrr_send_push(const struct intel_crtc_state *crtc_state)
@@ -263,7 +278,7 @@ void intel_vrr_get_config(struct intel_crtc_state 
*crtc_state)
 {
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
-   u32 trans_vrr_ctl;
+   u32 trans_vrr_ctl, trans_vrr_vsync;
 
trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(cpu_transcoder));
 
@@ -283,6 +298,16 @@ void intel_vrr_get_config(struct intel_crtc_state 
*crtc_state)
crtc_state->vrr.vmin = intel_de_read(dev_priv, 
TRANS_VRR_VMIN(cpu_transcoder)) + 1;
}
 
-   if (crtc_state->vrr.enable)
+   if (crtc_state->vrr.enable) {
crtc_state->mode_flags |= 

[PATCH v13 3/8] drm/i915/dp: Add Read/Write support for Adaptive Sync SDP

2024-02-29 Thread Mitul Golani
Add the necessary structures and functions to handle reading and
unpacking Adaptive Sync Secondary Data Packets. Also add support
to write and pack AS SDP.

--v2:
- Correct use of REG_BIT and REG_GENMASK. [Jani]
- Use as_sdp instead of async. [Jani]
- Remove unrelated comments and changes. [Jani]
- Correct code indent. [Jani]

--v3:
- Update definition names for AS SDP which are starting from
HSW, as these defines are applicable for ADLP+.(Ankit)

--v4:
- Remove as_sdp_mode from crtc_state.
- Drop metadata keyword.
- For consistency, update ADL_ prefix or post fix as required.

--v5:
- Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not
  return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.

Signed-off-by: Mitul Golani 
---
 .../drm/i915/display/intel_display_device.h   |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 91 +++
 drivers/gpu/drm/i915/display/intel_hdmi.c | 12 ++-
 drivers/gpu/drm/i915/i915_reg.h   |  8 ++
 include/drm/display/drm_dp_helper.h   |  2 +-
 5 files changed, 112 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h 
b/drivers/gpu/drm/i915/display/intel_display_device.h
index fe4268813786..6399fbc6c738 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -68,6 +68,7 @@ struct drm_printer;
 #define HAS_TRANSCODER(i915, trans)
((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
  BIT(trans)) != 0)
 #define HAS_VRR(i915)  (DISPLAY_VER(i915) >= 11)
+#define HAS_AS_SDP(i915)   (DISPLAY_VER(i915) >= 13)
 #define INTEL_NUM_PIPES(i915)  
(hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
 #define I915_HAS_HOTPLUG(i915) (DISPLAY_INFO(i915)->has_hotplug)
 #define OVERLAY_NEEDS_PHYSICAL(i915)   
(DISPLAY_INFO(i915)->overlay_needs_physical)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index e13121dc3a03..7cf849015797 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4089,6 +4089,32 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state 
*crtc_state,
return false;
 }
 
+static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *as_sdp,
+   struct dp_sdp *sdp, size_t size)
+{
+   size_t length = sizeof(struct dp_sdp);
+
+   if (size < length)
+   return -ENOSPC;
+
+   memset(sdp, 0, size);
+
+   /* Prepare AS (Adaptive Sync) SDP Header */
+   sdp->sdp_header.HB0 = 0;
+   sdp->sdp_header.HB1 = as_sdp->sdp_type;
+   sdp->sdp_header.HB2 = 0x02;
+   sdp->sdp_header.HB3 = as_sdp->length;
+
+   /* Fill AS (Adaptive Sync) SDP Payload */
+   sdp->db[0] = as_sdp->mode;
+   sdp->db[1] = as_sdp->vtotal & 0xFF;
+   sdp->db[2] = (as_sdp->vtotal >> 8) & 0xFF;
+   sdp->db[3] = as_sdp->target_rr;
+   sdp->db[4] = (as_sdp->target_rr >> 8) & 0x3;
+
+   return length;
+}
+
 static ssize_t
 intel_dp_hdr_metadata_infoframe_sdp_pack(struct drm_i915_private *i915,
 const struct hdmi_drm_infoframe 
*drm_infoframe,
@@ -4188,6 +4214,10 @@ static void intel_write_dp_sdp(struct intel_encoder 
*encoder,
   
_state->infoframes.drm.drm,
   , 
sizeof(sdp));
break;
+   case DP_SDP_ADAPTIVE_SYNC:
+   len = intel_dp_as_sdp_pack(_state->infoframes.as_sdp, ,
+  sizeof(sdp));
+   break;
default:
MISSING_CASE(type);
return;
@@ -4209,6 +4239,10 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
 VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
 VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;
+
+   if (HAS_AS_SDP(dev_priv))
+   dip_enable |= VIDEO_DIP_ENABLE_AS_ADL;
+
u32 val = intel_de_read(dev_priv, reg) & ~dip_enable;
 
/* TODO: Sanitize DSC enabling wrt. intel_dsc_dp_pps_write(). */
@@ -4230,6 +4264,36 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static
+int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
+  const void *buffer, size_t size)
+{
+   const struct dp_sdp *sdp = buffer;
+
+   if (size < sizeof(struct dp_sdp))
+   return -EINVAL;
+
+   memset(as_sdp, 0, sizeof(*as_sdp));
+
+   if (sdp->sdp_header.HB0 != 0)
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB1 != DP_SDP_ADAPTIVE_SYNC)
+

[PATCH v13 4/8] drm/i915/dp: Add wrapper function to check AS SDP

2024-02-29 Thread Mitul Golani
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.

--v1:
Just use drm/i915/dp in subject line.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 8 
 drivers/gpu/drm/i915/display/intel_dp.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 7cf849015797..b26efce4a041 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -120,6 +120,14 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
return dig_port->base.type == INTEL_OUTPUT_EDP;
 }
 
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp)
+{
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+   return HAS_AS_SDP(i915) &&
+   drm_dp_as_sdp_supported(_dp->aux, intel_dp->dpcd);
+}
+
 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
 
 /* Is link rate UHBR and thus 128b/132b? */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
b/drivers/gpu/drm/i915/display/intel_dp.h
index 530cc97bc42f..cc5e069091ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -80,6 +80,7 @@ void intel_dp_audio_compute_config(struct intel_encoder 
*encoder,
   struct drm_connector_state *conn_state);
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
 int intel_dp_link_symbol_size(int rate);
 int intel_dp_link_symbol_clock(int rate);
-- 
2.25.1



[PATCH v13 5/8] drm/i915/display: Compute AS SDP parameters

2024-02-29 Thread Mitul Golani
Add necessary function definitions to compute AS SDP data.
The new intel_dp_compute_as_sdp function computes AS SDP
values based on the display configuration, ensuring proper
handling of Variable Refresh Rate (VRR).

--v2:
- Added DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx(). [Ankit]
- Separated patch for intel_read/write_dp_sdp. [Ankit]
- _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward. [Ankit]
- Fixed indentation issues. [Ankit]

--v3:
- Added VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes.

--v4:
- Added HAS_VRR check before writing AS SDP.

--v5:
Added missed HAS_VRR check before reading AS SDP.

--v6:
- Used Adaptive Sync sink status as a check for read/write SDP. (Ankit)

--v7:
- Remove as_sdp_enable from crtc_state.
- Add a comment mentioning current support of
  DP_AS_SDP_AVT_FIXED_VTOTAL.
- Add state checker for AS_SDP infoframe enable.

--v8:
- Drop conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 26 +
 1 file changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index b26efce4a041..86de854516ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2626,6 +2626,31 @@ static void intel_dp_compute_vsc_colorimetry(const 
struct intel_crtc_state *crtc
vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED;
 }
 
+static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
+   struct intel_crtc_state *crtc_state)
+{
+   struct drm_dp_as_sdp *as_sdp = _state->infoframes.as_sdp;
+   struct intel_connector *connector = intel_dp->attached_connector;
+   const struct drm_display_mode *adjusted_mode =
+   _state->hw.adjusted_mode;
+   int vrefresh = drm_mode_vrefresh(adjusted_mode);
+
+   if (!intel_vrr_is_in_range(connector, vrefresh) ||
+   !intel_dp_as_sdp_supported(intel_dp))
+   return;
+
+   crtc_state->infoframes.enable |= 
intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
+
+   /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */
+   as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC;
+   as_sdp->length = 0x9;
+   as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL;
+   as_sdp->vtotal = adjusted_mode->vtotal;
+   as_sdp->target_rr = 0;
+   as_sdp->duration_incr_ms = 0;
+   as_sdp->duration_incr_ms = 0;
+}
+
 static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
 struct intel_crtc_state *crtc_state,
 const struct drm_connector_state 
*conn_state)
@@ -2951,6 +2976,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
g4x_dp_set_clock(encoder, pipe_config);
 
intel_vrr_compute_config(pipe_config, conn_state);
+   intel_dp_compute_as_sdp(intel_dp, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
-- 
2.25.1



[PATCH v13 2/8] drm: Add crtc state dump for Adaptive Sync SDP

2024-02-29 Thread Mitul Golani
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.

--v2:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.

Signed-off-by: Mitul Golani 
---
 .../gpu/drm/i915/display/intel_crtc_state_dump.c| 13 +
 drivers/gpu/drm/i915/display/intel_display_types.h  |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 4bcf446c75f4..1e4618271156 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -51,6 +51,15 @@ intel_dump_infoframe(struct drm_i915_private *i915,
hdmi_infoframe_log(KERN_DEBUG, i915->drm.dev, frame);
 }
 
+static void
+intel_dump_dp_as_sdp(struct drm_i915_private *i915,
+const struct drm_dp_as_sdp *as_sdp)
+{
+   struct drm_printer p = drm_dbg_printer(>drm, DRM_UT_KMS, 
"AS_SDP");
+
+   drm_dp_as_sdp_log(, as_sdp);
+}
+
 static void
 intel_dump_dp_vsc_sdp(struct drm_i915_private *i915,
  const struct drm_dp_vsc_sdp *vsc)
@@ -302,6 +311,10 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
*pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(DP_SDP_VSC))
intel_dump_dp_vsc_sdp(i915, _config->infoframes.vsc);
+   if (pipe_config->infoframes.enable &
+   intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC))
+   intel_dump_dp_as_sdp(i915, _config->infoframes.as_sdp);
+
 
if (pipe_config->has_audio)
intel_dump_buffer(i915, "ELD: ", pipe_config->eld,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8ce986fadd9a..1256730ea276 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1335,6 +1335,7 @@ struct intel_crtc_state {
union hdmi_infoframe hdmi;
union hdmi_infoframe drm;
struct drm_dp_vsc_sdp vsc;
+   struct drm_dp_as_sdp as_sdp;
} infoframes;
 
u8 eld[MAX_ELD_BYTES];
-- 
2.25.1



[PATCH v13 1/8] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Mitul Golani
Add structure representing Adaptive Sync Secondary Data Packet (AS SDP).
Also, add Adaptive Sync SDP logging in drm_dp_helper.c to facilitate
debugging.

--v2:
- Update logging. [Jani, Ankit]
- Use 'as_sdp' instead of 'async' [Ankit]
- Correct define placeholders to where they are actually used. [Jani]
- Update members in 'as_sdp' structure to make it uniform. [Jani]

--v3:
- Added changes to dri-devel mailing list. No code changes.

--v4:
- Instead of directly using operation mode, use an enum to accommodate
all operation modes (Ankit).

--v5:
Nit-pick changes to commit message.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
 include/drm/display/drm_dp.h| 10 +
 include/drm/display/drm_dp_helper.h | 29 +
 3 files changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c 
b/drivers/gpu/drm/display/drm_dp_helper.c
index f94c04db7187..b1459ac92aea 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2913,6 +2913,18 @@ void drm_dp_vsc_sdp_log(struct drm_printer *p, const 
struct drm_dp_vsc_sdp *vsc)
 }
 EXPORT_SYMBOL(drm_dp_vsc_sdp_log);
 
+void drm_dp_as_sdp_log(struct drm_printer *p, const struct drm_dp_as_sdp 
*as_sdp)
+{
+   drm_printf(p, "DP SDP: AS_SDP, revision %u, length %u\n",
+  as_sdp->revision, as_sdp->length);
+   drm_printf(p, "vtotal: %d\n", as_sdp->vtotal);
+   drm_printf(p, "target_rr: %d\n", as_sdp->target_rr);
+   drm_printf(p, "duration_incr_ms: %d\n", as_sdp->duration_incr_ms);
+   drm_printf(p, "duration_decr_ms: %d\n", as_sdp->duration_decr_ms);
+   drm_printf(p, "operation_mode: %d\n", as_sdp->mode);
+}
+EXPORT_SYMBOL(drm_dp_as_sdp_log);
+
 /**
  * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported
  * @aux: DisplayPort AUX channel
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 281afff6ee4e..ba388ad48ade 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -1149,6 +1149,7 @@
 
 #define DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1 0x2214 /* 2.0 E11 */
 # define DP_ADAPTIVE_SYNC_SDP_SUPPORTED(1 << 0)
+# define DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE   GENMASK(1, 0)
 # define DP_AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (1 
<< 1)
 # define DP_VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED  (1 << 4)
 
@@ -1578,10 +1579,12 @@ enum drm_dp_phy {
 #define DP_SDP_AUDIO_COPYMANAGEMENT0x05 /* DP 1.2 */
 #define DP_SDP_ISRC0x06 /* DP 1.2 */
 #define DP_SDP_VSC 0x07 /* DP 1.2 */
+#define DP_SDP_ADAPTIVE_SYNC   0x22 /* DP 1.4 */
 #define DP_SDP_CAMERA_GENERIC(i)   (0x08 + (i)) /* 0-7, DP 1.3 */
 #define DP_SDP_PPS 0x10 /* DP 1.4 */
 #define DP_SDP_VSC_EXT_VESA0x20 /* DP 1.4 */
 #define DP_SDP_VSC_EXT_CEA 0x21 /* DP 1.4 */
+
 /* 0x80+ CEA-861 infoframe types */
 
 #define DP_SDP_AUDIO_INFOFRAME_HB2 0x1b
@@ -1737,4 +1740,11 @@ enum dp_content_type {
DP_CONTENT_TYPE_GAME = 0x04,
 };
 
+enum operation_mode {
+   DP_AS_SDP_AVT_DYNAMIC_VTOTAL = 0x00,
+   DP_AS_SDP_AVT_FIXED_VTOTAL = 0x01,
+   DP_AS_SDP_FAVT_TRR_NOT_REACHED = 0x02,
+   DP_AS_SDP_FAVT_TRR_REACHED = 0x03
+};
+
 #endif /* _DRM_DP_H_ */
diff --git a/include/drm/display/drm_dp_helper.h 
b/include/drm/display/drm_dp_helper.h
index 7c1aa3a703c8..94eb0d92abae 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -98,6 +98,35 @@ struct drm_dp_vsc_sdp {
enum dp_content_type content_type;
 };
 
+/**
+ * struct drm_dp_as_sdp - drm DP Adaptive Sync SDP
+ *
+ * This structure represents a DP AS SDP of drm
+ * It is based on DP 2.1 spec [Table 2-126:  Adaptive-Sync SDP Header Bytes] 
and
+ * [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]
+ *
+ * @sdp_type: Secondary-data packet type
+ * @revision: Revision Number
+ * @length: Number of valid data bytes
+ * @vtotal: Minimum Vertical Vtotal
+ * @target_rr: Target Refresh
+ * @duration_incr_ms: Successive frame duration increase
+ * @duration_decr_ms: Successive frame duration decrease
+ * @operation_mode: Adaptive Sync Operation Mode
+ */
+struct drm_dp_as_sdp {
+   unsigned char sdp_type;
+   unsigned char revision;
+   unsigned char length;
+   int vtotal;
+   int target_rr;
+   int duration_incr_ms;
+   int duration_decr_ms;
+   enum operation_mode mode;
+};
+
+void drm_dp_as_sdp_log(struct drm_printer *p,
+  const struct drm_dp_as_sdp *as_sdp);
 void drm_dp_vsc_sdp_log(struct drm_printer *p, const struct drm_dp_vsc_sdp 
*vsc);
 
 bool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 
dpcd[DP_RECEIVER_CAP_SIZE]);
-- 
2.25.1



[PATCH v13 0/8] Enable Adaptive Sync SDP Support for DP

2024-02-29 Thread Mitul Golani
An Adaptive-Sync-capable DP protocol converter indicates its
support by setting the related bit in the DPCD register.

Computes AS SDP values based on the display configuration,
ensuring proper handling of Variable Refresh Rate (VRR)
in the context of Adaptive Sync.

--v2:
- Update logging to Patch-1
- use as_sdp instead of async
- Put definitions to correct placeholders from where it is defined.
- Update member types of as_sdp for uniformity.
- Correct use of REG_BIT and REG_GENMASK.
- Remove unrelated comments and changes.
- Correct code indents.
- separate out patch changes for intel_read/write_dp_sdp.

--v3:
- Add VIDEO_DIP_ASYNC_DATA_SIZE definition and comment in as_sdp_pack
  function to patch 2 as originally used there. [Patch 2].
- Add VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes [Patch 3].

--v4:
- Add check for HAS_VRR before writing AS SDP. [Patch 3].

--v5:
- Add missing check for HAS_VRR before reading AS SDP as well [Patch 3].

--v6:
- Rebase all patches.
- Compute TRANS_VRR_VSYNC.

-v7:
- Move vrr_vsync_start/end to compute config.
- Use correct function for drm_debug_printer.

-v8:
- Code refactoring.
- Update, VSYNC_START/END macros to VRR_VSYNC_START/END.(Ankit)
- Update bit fields of VRR_VSYNC_START/END.(Ankit)
- Send patches to dri-devel.(Ankit)
- Update definition names for AS SDP which are starting from
HSW, as these defines are applicable for ADLP+.(Ankit)
- Remove unused bitfield define, AS_SDP_ENABLE.
- Add support in drm for Adaptive Sync sink status, which can be
used later as a check for read/write sdp. (Ankit)

-v9:
- Add enum to operation mode to represent different AVT and
FAVT modes. (Ankit)
- Operation_mode, target_rr etc should be filled from as_sdp struct. (Ankit)
- Fill as_sdp->*All Params* from compute config, read from the sdp. (Ankit)
- Move configs to the appropriate patch where it used first.(Ankit)
- There should be a check if as sdp is enable is set or not. (Ankit)
- Add variables in crtc state->vrr for ad sdp enable and operation mode. (Ankit)
- Use above variables for tracking AS SDP. (Ankit)
- Revert unused changes. (Ankit)

-v10:
- Send Patches to dri-devel (Ankit).

-v11:
- Remove as_sdp_mode and enable from crtc_state.
- For consistency, update ADL_ prefix or post fix as required.
- Add a comment mentioning current support of
  DP_AS_SDP_AVT_FIXED_VTOTAL.
- Add state checker for AS_SDP infoframe enable.
- Add PIPE_CONF_CHECK_I(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.

-v12:
- Update cover letter

-v13:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
- Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not
  return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
- Just use drm/i915/dp in subject line.
- Drop conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
- crtc_state->infoframes.enable, to add on correct place holder.

Signed-off-by: Mitul Golani 

Mitul Golani (8):
  drm: Add Adaptive Sync SDP logging
  drm: Add crtc state dump for Adaptive Sync SDP
  drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
  drm/i915/dp: Add wrapper function to check AS SDP
  drm/i915/display: Compute AS SDP parameters
  drm/i915/display: Add state checker for Adaptive Sync SDP
  drm/i915/display: Compute vrr_vsync params
  drm/i915/display: Read/Write AS sdp only when sink/source has enabled

 drivers/gpu/drm/display/drm_dp_helper.c   |  12 ++
 .../drm/i915/display/intel_crtc_state_dump.c  |  13 ++
 drivers/gpu/drm/i915/display/intel_ddi.c  |   1 +
 drivers/gpu/drm/i915/display/intel_display.c  |  48 +++
 .../drm/i915/display/intel_display_device.h   |   1 +
 .../drm/i915/display/intel_display_types.h|   2 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 126 ++
 drivers/gpu/drm/i915/display/intel_dp.h   |   1 +
 drivers/gpu/drm/i915/display/intel_hdmi.c |  12 +-
 drivers/gpu/drm/i915/display/intel_vrr.c  |  29 +++-
 drivers/gpu/drm/i915/i915_reg.h   |  15 +++
 include/drm/display/drm_dp.h  |  10 ++
 include/drm/display/drm_dp_helper.h   |  31 -
 13 files changed, 297 insertions(+), 4 deletions(-)

-- 
2.25.1



Re: [PATCH 12/12] drm/i915: Create the printer only once in intel_pipe_config_compare()

2024-02-29 Thread Jani Nikula
On Thu, 15 Feb 2024, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Create the drm_printer at the start of intel_pipe_config_compare()
> and pass it on to all the mismatch() functions.

Nice!

Reviewed-by: Jani Nikula 


>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 101 +--
>  1 file changed, 46 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 26580d4aef2d..69c9693dcc8d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4787,11 +4787,11 @@ intel_compare_buffer(const u8 *a, const u8 *b, size_t 
> len)
>   return memcmp(a, b, len) == 0;
>  }
>  
> -static void __printf(4, 5)
> -pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
> +static void __printf(5, 6)
> +pipe_config_mismatch(struct drm_printer *p, bool fastset,
> +  const struct intel_crtc *crtc,
>const char *name, const char *format, ...)
>  {
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>   struct va_format vaf;
>   va_list args;
>  
> @@ -4800,65 +4800,55 @@ pipe_config_mismatch(bool fastset, const struct 
> intel_crtc *crtc,
>   vaf.va = 
>  
>   if (fastset)
> - drm_dbg_kms(>drm,
> - "[CRTC:%d:%s] fastset requirement not met in %s 
> %pV\n",
> - crtc->base.base.id, crtc->base.name, name, );
> + drm_printf(p, "[CRTC:%d:%s] fastset requirement not met in %s 
> %pV\n",
> +crtc->base.base.id, crtc->base.name, name, );
>   else
> - drm_err(>drm, "[CRTC:%d:%s] mismatch in %s %pV\n",
> - crtc->base.base.id, crtc->base.name, name, );
> + drm_printf(p, "[CRTC:%d:%s] mismatch in %s %pV\n",
> +crtc->base.base.id, crtc->base.name, name, );
>  
>   va_end(args);
>  }
>  
>  static void
> -pipe_config_infoframe_mismatch(bool fastset, const struct intel_crtc *crtc,
> +pipe_config_infoframe_mismatch(struct drm_printer *p, bool fastset,
> +const struct intel_crtc *crtc,
>  const char *name,
>  const union hdmi_infoframe *a,
>  const union hdmi_infoframe *b)
>  {
>   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> - struct drm_printer p;
>   const char *loglevel;
>  
>   if (fastset) {
>   if (!drm_debug_enabled(DRM_UT_KMS))
>   return;
>  
> - p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
>   loglevel = KERN_DEBUG;
>   } else {
> - p = drm_err_printer(>drm, NULL);
>   loglevel = KERN_ERR;
>   }
>  
> - pipe_config_mismatch(fastset, crtc, name, "infoframe");
> + pipe_config_mismatch(p, fastset, crtc, name, "infoframe");
>  
> - drm_printf(, "expected:\n");
> + drm_printf(p, "expected:\n");
>   hdmi_infoframe_log(loglevel, i915->drm.dev, a);
> - drm_printf(, "found:\n");
> + drm_printf(p, "found:\n");
>   hdmi_infoframe_log(loglevel, i915->drm.dev, b);
>  }
>  
>  static void
> -pipe_config_dp_vsc_sdp_mismatch(bool fastset, const struct intel_crtc *crtc,
> +pipe_config_dp_vsc_sdp_mismatch(struct drm_printer *p, bool fastset,
> + const struct intel_crtc *crtc,
>   const char *name,
>   const struct drm_dp_vsc_sdp *a,
>   const struct drm_dp_vsc_sdp *b)
>  {
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> - struct drm_printer p;
> + pipe_config_mismatch(p, fastset, crtc, name, "dp sdp");
>  
> - if (fastset)
> - p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
> - else
> - p = drm_err_printer(>drm, NULL);
> -
> - pipe_config_mismatch(fastset, crtc, name, "dp sdp");
> -
> - drm_printf(, "expected:\n");
> - drm_dp_vsc_sdp_log(, a);
> - drm_printf(, "found:\n");
> - drm_dp_vsc_sdp_log(, b);
> + drm_printf(p, "expected:\n");
> + drm_dp_vsc_sdp_log(p, a);
> + drm_printf(p, "found:\n");
> + drm_dp_vsc_sdp_log(p, b);
>  }
>  
>  /* Returns the length up to and including the last differing byte */
> @@ -4876,7 +4866,8 @@ memcmp_diff_len(const u8 *a, const u8 *b, size_t len)
>  }
>  
>  static void
> -pipe_config_buffer_mismatch(bool fastset, const struct intel_crtc *crtc,
> +pipe_config_buffer_mismatch(struct drm_printer *p, bool fastset,
> + const struct intel_crtc *crtc,
>   const char *name,
>   const u8 *a, const u8 *b, size_t len)
>  {
> @@ -4891,7 +4882,7 @@ pipe_config_buffer_mismatch(bool fastset, const struct 
> intel_crtc *crtc,
>   loglevel = 

Re: [PATCH] drm/i915: Add missing doc for drm_i915_reset_stats

2024-02-29 Thread Andi Shyti
Hi Nirmoy,

On Thu, Feb 29, 2024 at 02:29:18PM +0100, Nirmoy Das wrote:
> Add missing doc for struct drm_i915_reset_stats.
> 
> Cc: Andi Shyti 
> Signed-off-by: Nirmoy Das 

Reviewed-by: Andi Shyti 

Thanks,
Andi


Re: [PATCH 11/12] drm/i915: Reuse pipe_config_mismatch() more

2024-02-29 Thread Jani Nikula
On Thu, 15 Feb 2024, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Just call pipe_config_mismatch() from all the more specialized
> mismatch() functions instead of hand rolling the same printfs
> all over.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 45 +---
>  1 file changed, 10 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a9dd3632898c..26580d4aef2d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4826,17 +4826,13 @@ pipe_config_infoframe_mismatch(bool fastset, const 
> struct intel_crtc *crtc,
>  
>   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
>   loglevel = KERN_DEBUG;
> -
> - drm_printf(, "[CRTC:%d:%s] fastset requirement not met in %s 
> infoframe\n",
> -crtc->base.base.id, crtc->base.name, name);
>   } else {
>   p = drm_err_printer(>drm, NULL);
>   loglevel = KERN_ERR;
> -
> - drm_printf(, "[CRTC:%d:%s] mismatch in %s infoframe\n",
> -crtc->base.base.id, crtc->base.name, name);
>   }
>  
> + pipe_config_mismatch(fastset, crtc, name, "infoframe");
> +
>   drm_printf(, "expected:\n");
>   hdmi_infoframe_log(loglevel, i915->drm.dev, a);
>   drm_printf(, "found:\n");
> @@ -4852,17 +4848,12 @@ pipe_config_dp_vsc_sdp_mismatch(bool fastset, const 
> struct intel_crtc *crtc,
>   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>   struct drm_printer p;
>  
> - if (fastset) {
> + if (fastset)
>   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
> -
> - drm_printf(, "[CRTC:%d:%s] fastset requirement not met in %s 
> dp sdp\n",
> -crtc->base.base.id, crtc->base.name, name);
> - } else {
> + else
>   p = drm_err_printer(>drm, NULL);
>  
> - drm_printf(, "[CRTC:%d:%s] mismatch in %s dp sdp\n",
> -crtc->base.base.id, crtc->base.name, name);
> - }
> + pipe_config_mismatch(fastset, crtc, name, "dp sdp");
>  
>   drm_printf(, "expected:\n");
>   drm_dp_vsc_sdp_log(, a);
> @@ -4889,27 +4880,19 @@ pipe_config_buffer_mismatch(bool fastset, const 
> struct intel_crtc *crtc,
>   const char *name,
>   const u8 *a, const u8 *b, size_t len)
>  {
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> - struct drm_printer p;
>   const char *loglevel;
>  
>   if (fastset) {
>   if (!drm_debug_enabled(DRM_UT_KMS))
>   return;
>  
> - p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
>   loglevel = KERN_DEBUG;
> -
> - drm_printf(, "[CRTC:%d:%s] fastset requirement not met in %s 
> buffer\n",
> -crtc->base.base.id, crtc->base.name, name);
>   } else {
> - p = drm_err_printer(>drm, NULL);
>   loglevel = KERN_ERR;
> -
> - drm_printf(, "[CRTC:%d:%s] mismatch in %s buffer\n",
> -crtc->base.base.id, crtc->base.name, name);
>   }
>  
> + pipe_config_mismatch(fastset, crtc, name, "buffer");
> +
>   /* only dump up to the last difference */
>   len = memcmp_diff_len(a, b, len);
>  
> @@ -4929,20 +4912,12 @@ pipe_config_pll_mismatch(bool fastset,
>   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>   struct drm_printer p;
>  
> - if (fastset) {
> - if (!drm_debug_enabled(DRM_UT_KMS))
> - return;

Removing this seems misplaced.

Other than that,

Reviewed-by: Jani Nikula 


> -
> + if (fastset)
>   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
> -
> - drm_printf(, "[CRTC:%d:%s] fastset requirement not met in 
> %s\n",
> -crtc->base.base.id, crtc->base.name, name);
> - } else {
> + else
>   p = drm_err_printer(>drm, NULL);
>  
> - drm_printf(, "[CRTC:%d:%s] mismatch in %s\n",
> -crtc->base.base.id, crtc->base.name, name);
> - }
> + pipe_config_mismatch(fastset, crtc, name, " "); /* stupid 
> -Werror=format-zero-length */
>  
>   drm_dbg_kms(>drm, "expected:\n");
>   intel_dpll_dump_hw_state(i915, , a);

-- 
Jani Nikula, Intel


Re: [PATCH 10/12] drm/i915: Relocate pipe_config_mismatch()

2024-02-29 Thread Jani Nikula
On Thu, 15 Feb 2024, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Hoist pipe_config_mismatch() upwards a bit so that it can get
> reused by the other mismatch() functions.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 46 ++--
>  1 file changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d7f39ad84138..a9dd3632898c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4787,6 +4787,29 @@ intel_compare_buffer(const u8 *a, const u8 *b, size_t 
> len)
>   return memcmp(a, b, len) == 0;
>  }
>  
> +static void __printf(4, 5)
> +pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
> +  const char *name, const char *format, ...)
> +{
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + struct va_format vaf;
> + va_list args;
> +
> + va_start(args, format);
> + vaf.fmt = format;
> + vaf.va = 
> +
> + if (fastset)
> + drm_dbg_kms(>drm,
> + "[CRTC:%d:%s] fastset requirement not met in %s 
> %pV\n",
> + crtc->base.base.id, crtc->base.name, name, );
> + else
> + drm_err(>drm, "[CRTC:%d:%s] mismatch in %s %pV\n",
> + crtc->base.base.id, crtc->base.name, name, );
> +
> + va_end(args);
> +}
> +
>  static void
>  pipe_config_infoframe_mismatch(bool fastset, const struct intel_crtc *crtc,
>  const char *name,
> @@ -4896,29 +4919,6 @@ pipe_config_buffer_mismatch(bool fastset, const struct 
> intel_crtc *crtc,
>  16, 0, b, len, false);
>  }
>  
> -static void __printf(4, 5)
> -pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
> -  const char *name, const char *format, ...)
> -{
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> - struct va_format vaf;
> - va_list args;
> -
> - va_start(args, format);
> - vaf.fmt = format;
> - vaf.va = 
> -
> - if (fastset)
> - drm_dbg_kms(>drm,
> - "[CRTC:%d:%s] fastset requirement not met in %s 
> %pV\n",
> - crtc->base.base.id, crtc->base.name, name, );
> - else
> - drm_err(>drm, "[CRTC:%d:%s] mismatch in %s %pV\n",
> - crtc->base.base.id, crtc->base.name, name, );
> -
> - va_end(args);
> -}
> -
>  static void
>  pipe_config_pll_mismatch(bool fastset,
>const struct intel_crtc *crtc,

-- 
Jani Nikula, Intel


Re: [PATCH 09/12] drm/i915: Skip intel_crtc_state_dump() if debugs aren't enabled

2024-02-29 Thread Jani Nikula
On Thu, 29 Feb 2024, Jani Nikula  wrote:
> On Thu, 15 Feb 2024, Ville Syrjala  wrote:
>> From: Ville Syrjälä 
>>
>> intel_crtc_state_dump() does a whole boatload of string formatting
>> which is all wasted energy if the debugs aren't even enabled. Skip
>> the whole thing in that case.
>
> I wonder how something like this would work to skip it in a more generic
> fashion:

In the mean time,

Reviewed-by: Jani Nikula 


>
> index 9cc473e5d353..0adc8020ae4f 100644
> --- a/include/drm/drm_print.h
> +++ b/include/drm/drm_print.h
> @@ -206,7 +206,8 @@ drm_vprintf(struct drm_printer *p, const char *fmt, 
> va_list *va)
>  {
> struct va_format vaf = { .fmt = fmt, .va = va };
>  
> -   p->printfn(p, );
> +   if (p->printfn)
> +   p->printfn(p, );
>  }
>  
>  /**
> @@ -330,7 +331,7 @@ static inline struct drm_printer drm_dbg_printer(struct 
> drm_device *drm,
>  const char *prefix)
>  {
> struct drm_printer p = {
> -   .printfn = __drm_printfn_dbg,
> +   .printfn = drm_debug_enabled(category) ? __drm_printfn_dbg : 
> NULL,
> .arg = drm,
> .prefix = prefix,
> .category = category,
>
>>
>> Signed-off-by: Ville Syrjälä 
>> ---
>>  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
>> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>> index b5b9b99213cf..cd78c200d483 100644
>> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>> @@ -192,6 +192,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
>> *pipe_config,
>>  char buf[64];
>>  int i;
>>  
>> +if (!drm_debug_enabled(DRM_UT_KMS))
>> +return;
>> +
>>  p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
>>  
>>  drm_printf(, "[CRTC:%d:%s] enable: %s [%s]\n",

-- 
Jani Nikula, Intel


Re: [PATCH 09/12] drm/i915: Skip intel_crtc_state_dump() if debugs aren't enabled

2024-02-29 Thread Jani Nikula
On Thu, 15 Feb 2024, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> intel_crtc_state_dump() does a whole boatload of string formatting
> which is all wasted energy if the debugs aren't even enabled. Skip
> the whole thing in that case.

I wonder how something like this would work to skip it in a more generic
fashion:

index 9cc473e5d353..0adc8020ae4f 100644
--- a/include/drm/drm_print.h
+++ b/include/drm/drm_print.h
@@ -206,7 +206,8 @@ drm_vprintf(struct drm_printer *p, const char *fmt, va_list 
*va)
 {
struct va_format vaf = { .fmt = fmt, .va = va };
 
-   p->printfn(p, );
+   if (p->printfn)
+   p->printfn(p, );
 }
 
 /**
@@ -330,7 +331,7 @@ static inline struct drm_printer drm_dbg_printer(struct 
drm_device *drm,
 const char *prefix)
 {
struct drm_printer p = {
-   .printfn = __drm_printfn_dbg,
+   .printfn = drm_debug_enabled(category) ? __drm_printfn_dbg : 
NULL,
.arg = drm,
.prefix = prefix,
.category = category,

>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index b5b9b99213cf..cd78c200d483 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -192,6 +192,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
> *pipe_config,
>   char buf[64];
>   int i;
>  
> + if (!drm_debug_enabled(DRM_UT_KMS))
> + return;
> +
>   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
>  
>   drm_printf(, "[CRTC:%d:%s] enable: %s [%s]\n",

-- 
Jani Nikula, Intel


Re: [PATCH v3 0/6] VBT read cleanup

2024-02-29 Thread Jani Nikula
On Wed, 28 Feb 2024, Radhakrishna Sripada  
wrote:
> This series is originally based out of [1], and built on top of [2].
>
> The primary departure from [1] was that vbt is no longer cached. During vbt
> show, based on the source of vbt, it would simply be re-read reducing the
> read/cleanup complexity. With this series debugfs dump of vbt should work on
> all the platforms that support display.
>
> v3 of the series extracts opregion firmware check and harmonizes the memory
> handling of different variants viz. opregion/oprom/spi/fimrware

Reviewed-by: Jani Nikula 


>
> 1. https://patchwork.freedesktop.org/series/128341/
> 2. https://patchwork.freedesktop.org/series/128683/
>
>
> Radhakrishna Sripada (6):
>   drm/i915: Pass size to oprom_get_vbt
>   drm/i915: Pass size to spi_oprom_get_vbt
>   drm/i915: Move vbt read from firmware to intel_bios.c
>   drm/i915: Extract opregion vbt presence check
>   drm/i915: Duplicate opregion vbt memory
>   drm/i915: Show bios vbt when read from firmware/spi/oprom
>
>  drivers/gpu/drm/i915/display/intel_bios.c | 108 +-
>  drivers/gpu/drm/i915/display/intel_opregion.c |  58 ++
>  drivers/gpu/drm/i915/display/intel_opregion.h |   1 +
>  3 files changed, 92 insertions(+), 75 deletions(-)

-- 
Jani Nikula, Intel


Re: [PATCH] drm/i915/lnl: Modeset sequence change for DP on LNL

2024-02-29 Thread Jani Nikula
On Thu, 29 Feb 2024, Shekhar Chauhan  wrote:
> Currently, the driver is only waiting for 1ms for
> idle patterns. But starting from LNL and beyond,
> the MST wants the driver to wait for 1640us before
> timing out (which we round up to 2ms).
>
> BSpec: 68849
> Signed-off-by: Shekhar Chauhan 

Replied in the other thread:

https://lore.kernel.org/r/878r338nhs@intel.com


> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index bea441590204..05ba3642d486 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3680,7 +3680,7 @@ static void intel_ddi_set_idle_link_train(struct 
> intel_dp *intel_dp,
>  
>   if (intel_de_wait_for_set(dev_priv,
> dp_tp_status_reg(encoder, crtc_state),
> -   DP_TP_STATUS_IDLE_DONE, 1))
> +   DP_TP_STATUS_IDLE_DONE, 2))
>   drm_err(_priv->drm,
>   "Timed out waiting for DP idle patterns\n");
>  }

-- 
Jani Nikula, Intel


Re: [PATCH] drm/i915/display: Save a few bytes of memory in intel_backlight_device_register()

2024-02-29 Thread Jani Nikula
On Fri, 23 Feb 2024, Christophe JAILLET  wrote:
> 'name' may still be "intel_backlight" when backlight_device_register() is
> called.
> In such a case, using kstrdup_const() saves a memory duplication when
> dev_set_name() is called in backlight_device_register().
>
> Use kfree_const() accordingly.
>
> Signed-off-by: Christophe JAILLET 

Thanks, pushed to drm-intel-next.

BR,
Jani.

> ---
> Compile tested only
> ---
>  drivers/gpu/drm/i915/display/intel_backlight.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c 
> b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 1946d7fb3c2e..9e4a9d4f1585 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_backlight.c
> @@ -949,7 +949,7 @@ int intel_backlight_device_register(struct 
> intel_connector *connector)
>   else
>   props.power = FB_BLANK_POWERDOWN;
>  
> - name = kstrdup("intel_backlight", GFP_KERNEL);
> + name = kstrdup_const("intel_backlight", GFP_KERNEL);
>   if (!name)
>   return -ENOMEM;
>  
> @@ -963,7 +963,7 @@ int intel_backlight_device_register(struct 
> intel_connector *connector)
>* compatibility. Use unique names for subsequent backlight 
> devices as a
>* fallback when the default name already exists.
>*/
> - kfree(name);
> + kfree_const(name);
>   name = kasprintf(GFP_KERNEL, "card%d-%s-backlight",
>i915->drm.primary->index, 
> connector->base.name);
>   if (!name)
> @@ -987,7 +987,7 @@ int intel_backlight_device_register(struct 
> intel_connector *connector)
>   connector->base.base.id, connector->base.name, name);
>  
>  out:
> - kfree(name);
> + kfree_const(name);
>  
>   return ret;
>  }

-- 
Jani Nikula, Intel


Re: [PATCH] MAINTAINERS: Update email address for Tvrtko Ursulin

2024-02-29 Thread Rodrigo Vivi
On Wed, Feb 28, 2024 at 02:22:40PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin 
> 
> I will lose access to my @.*intel.com e-mail addresses soon so let me
> adjust the maintainers entry and update the mailmap too.
> 
> While at it consolidate a few other of my old emails to point to the
> main one.
> 
> Signed-off-by: Tvrtko Ursulin 
> Cc: Daniel Vetter 
> Cc: Dave Airlie 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 

Acked-by: Rodrigo Vivi 

> ---
>  .mailmap| 5 +
>  MAINTAINERS | 2 +-
>  2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/.mailmap b/.mailmap
> index b99a238ee3bd..d67e351bce8e 100644
> --- a/.mailmap
> +++ b/.mailmap
> @@ -608,6 +608,11 @@ TripleX Chung  
>  TripleX Chung  
>  Tsuneo Yoshioka 
>  Tudor Ambarus  
> +Tvrtko Ursulin  
> +Tvrtko Ursulin  
> +Tvrtko Ursulin  
> +Tvrtko Ursulin  
> +Tvrtko Ursulin  
>  Tycho Andersen  
>  Tzung-Bi Shih  
>  Uwe Kleine-König 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 19f6f8014f94..b940bfe2a692 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10734,7 +10734,7 @@ INTEL DRM I915 DRIVER (Meteor Lake, DG2 and older 
> excluding Poulsbo, Moorestown
>  M:   Jani Nikula 
>  M:   Joonas Lahtinen 
>  M:   Rodrigo Vivi 
> -M:   Tvrtko Ursulin 
> +M:   Tvrtko Ursulin 
>  L:   intel-gfx@lists.freedesktop.org
>  S:   Supported
>  W:   https://drm.pages.freedesktop.org/intel-docs/
> -- 
> 2.40.1
> 


Re: [PATCH v2 3/3] drm/i915/bios: abstract child device expected size

2024-02-29 Thread Jani Nikula
On Thu, 29 Feb 2024, Ville Syrjälä  wrote:
> On Mon, Feb 26, 2024 at 07:58:54PM +0200, Jani Nikula wrote:
>> Add a function to return the expected child device size. Flip the if
>> ladder around and use the same versions as in documentation to make it
>> easier to verify. Return an error for unknown versions. No functional
>> changes.
>> 
>> v2: Move BUILD_BUG_ON() next to the expected sizes
>> 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/display/intel_bios.c | 40 ++-
>>  1 file changed, 24 insertions(+), 16 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
>> b/drivers/gpu/drm/i915/display/intel_bios.c
>> index c0f41bd1f946..343726de9aa7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -2699,27 +2699,35 @@ static void parse_ddi_ports(struct drm_i915_private 
>> *i915)
>>  print_ddi_port(devdata);
>>  }
>>  
>> +static int child_device_expected_size(u16 version)
>> +{
>> +BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
>
> Should we make that !=40 perhaps?

Yeah, but let's get this going first.

> Anyways, series is
> Reviewed-by: Ville Syrjälä 

Thanks, pushed to din.

BR,
Jani.


-- 
Jani Nikula, Intel


Re: [PULL] drm-misc-fixes

2024-02-29 Thread Matthew Auld

On 29/02/2024 13:37, Maxime Ripard wrote:

Hi,

Here's this week drm-misc fixes PR.

There's two commits for files unders drivers/soc/qcom that don't have a
maintainer Acked-by. Bjorn's Acked-by was provided on IRC, and Konrad
provided it by mail after the facts so we're covered.

Maxime

drm-misc-fixes-2024-02-29:
A reset fix for host1x, a resource leak fix and a probe fix for aux-hpd,
a use-after-free fix and a boot fix for a pmic_glink qcom driver in
drivers/soc, a fix for the simpledrm/tegra transition, a kunit fix for
the TTM tests, a font handling fix for fbcon, two allocation fixes and a
kunit test to cover them for drm/buddy
The following changes since commit 72fa02fdf83306c52bc1eede28359e3fa32a151a:

   nouveau: add an ioctl to report vram usage (2024-02-23 10:20:07 +1000)

are available in the Git repository at:

   https://anongit.freedesktop.org/git/drm/drm-misc 
tags/drm-misc-fixes-2024-02-29

for you to fetch changes up to c70703320e557ff30847915e6a7631a9abdda16b:

   drm/tests/drm_buddy: add alloc_range_bias test (2024-02-28 08:03:29 +0100)


A reset fix for host1x, a resource leak fix and a probe fix for aux-hpd,
a use-after-free fix and a boot fix for a pmic_glink qcom driver in
drivers/soc, a fix for the simpledrm/tegra transition, a kunit fix for
the TTM tests, a font handling fix for fbcon, two allocation fixes and a
kunit test to cover them for drm/buddy


Christian König (1):
   drm/ttm/tests: depend on UML || COMPILE_TEST

Jiri Slaby (SUSE) (1):
   fbcon: always restore the old font data in fbcon_do_set_font()

Johan Hovold (3):
   drm/bridge: aux-hpd: fix OF node leaks
   drm/bridge: aux-hpd: separate allocation and registration
   soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free

Matthew Auld (3):
   drm/buddy: fix range bias
   drm/buddy: check range allocation matches alignment
   drm/tests/drm_buddy: add alloc_range_bias test


Note that there is a build fix needed for this one:
https://patchwork.freedesktop.org/patch/580568/?series=130552=1



Maxime Ripard (1):
   Merge drm/drm-fixes into drm-misc-fixes

Mikko Perttunen (1):
   gpu: host1x: Skip reset assert on Tegra186

Rob Clark (1):
   soc: qcom: pmic_glink: Fix boot when QRTR=m

Thierry Reding (1):
   drm/tegra: Remove existing framebuffer only if we support display

  drivers/gpu/drm/Kconfig |   5 +-
  drivers/gpu/drm/bridge/aux-hpd-bridge.c |  70 +++---
  drivers/gpu/drm/drm_buddy.c |  16 ++-
  drivers/gpu/drm/tegra/drm.c |  23 +++-
  drivers/gpu/drm/tests/drm_buddy_test.c  | 218 
  drivers/gpu/host1x/dev.c|  15 ++-
  drivers/gpu/host1x/dev.h|   6 +
  drivers/soc/qcom/pmic_glink.c   |  21 +--
  drivers/soc/qcom/pmic_glink_altmode.c   |  16 ++-
  drivers/video/fbdev/core/fbcon.c|   8 +-
  include/drm/bridge/aux-bridge.h |  15 +++
  11 files changed, 368 insertions(+), 45 deletions(-)


[PATCH] drm/i915: Add missing doc for drm_i915_reset_stats

2024-02-29 Thread Nirmoy Das
Add missing doc for struct drm_i915_reset_stats.

Cc: Andi Shyti 
Signed-off-by: Nirmoy Das 
---
 include/uapi/drm/i915_drm.h | 16 +---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 2ee338860b7e..1279a6b2bece 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -2623,19 +2623,29 @@ struct drm_i915_reg_read {
  *
  */
 
+/*
+ * struct drm_i915_reset_stats - Return global reset and other context stats
+ *
+ * Driver keeps few stats for each contexts and also global reset count.
+ * This struct can be used to query those stats.
+ */
 struct drm_i915_reset_stats {
+   /** @ctx_id: ID of the requested context */
__u32 ctx_id;
+
+   /** @flags: MBZ */
__u32 flags;
 
-   /* All resets since boot/module reload, for all contexts */
+   /** @reset_count: All resets since boot/module reload, for all contexts 
*/
__u32 reset_count;
 
-   /* Number of batches lost when active in GPU, for this context */
+   /** @batch_active: Number of batches lost when active in GPU, for this 
context */
__u32 batch_active;
 
-   /* Number of batches lost pending for execution, for this context */
+   /** @batch_pending: Number of batches lost pending for execution, for 
this context */
__u32 batch_pending;
 
+   /** @pad: MBZ */
__u32 pad;
 };
 
-- 
2.42.0



[PATCH 2/2] drm/amdgpu: use GTT only as fallback for VRAM|GTT

2024-02-29 Thread Christian König
Try to fill up VRAM as well by setting the busy flag on GTT allocations.

This fixes the issue that when VRAM was evacuated for suspend it's never
filled up again unless the application is restarted.

Signed-off-by: Christian König 
Reviewed-by: Zack Rusin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 010b0cb7693c..8bc79924d171 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -173,6 +173,12 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo 
*abo, u32 domain)
abo->flags & AMDGPU_GEM_CREATE_PREEMPTIBLE ?
AMDGPU_PL_PREEMPT : TTM_PL_TT;
places[c].flags = 0;
+   /*
+* When GTT is just an alternative to VRAM make sure that we
+* only use it as fallback and still try to fill up VRAM first.
+*/
+   if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)
+   places[c].flags |= TTM_PL_FLAG_FALLBACK;
c++;
}
 
-- 
2.34.1



[PATCH 1/2] drm/ttm: improve idle/busy handling v5

2024-02-29 Thread Christian König
Previously we would never try to move a BO into the preferred placements
when it ever landed in a busy placement since those were considered
compatible.

Rework the whole handling and finally unify the idle and busy handling.
ttm_bo_validate() is now responsible to try idle placement first and then
use the busy placement if that didn't worked.

Drawback is that we now always try the idle placement first for each
validation which might cause some additional CPU overhead on overcommit.

v2: fix kerneldoc warning and coding style
v3: take care of XE as well
v4: keep the ttm_bo_mem_space functionality as it is for now, only add
new handling for ttm_bo_validate as suggested by Thomas
v5: fix bug pointed out by Matthew

Signed-off-by: Christian König 
Reviewed-by: Zack Rusin  v3
---
 drivers/gpu/drm/ttm/ttm_bo.c   | 231 +
 drivers/gpu/drm/ttm/ttm_resource.c |  16 +-
 include/drm/ttm/ttm_resource.h |   3 +-
 3 files changed, 121 insertions(+), 129 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 96a724e8f3ff..e059b1e1b13b 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -724,64 +724,36 @@ static int ttm_bo_add_move_fence(struct ttm_buffer_object 
*bo,
return ret;
 }
 
-/*
- * Repeatedly evict memory from the LRU for @mem_type until we create enough
- * space, or we've evicted everything and there isn't enough space.
- */
-static int ttm_bo_mem_force_space(struct ttm_buffer_object *bo,
- const struct ttm_place *place,
- struct ttm_resource **mem,
- struct ttm_operation_ctx *ctx)
-{
-   struct ttm_device *bdev = bo->bdev;
-   struct ttm_resource_manager *man;
-   struct ww_acquire_ctx *ticket;
-   int ret;
-
-   man = ttm_manager_type(bdev, place->mem_type);
-   ticket = dma_resv_locking_ctx(bo->base.resv);
-   do {
-   ret = ttm_resource_alloc(bo, place, mem);
-   if (likely(!ret))
-   break;
-   if (unlikely(ret != -ENOSPC))
-   return ret;
-   ret = ttm_mem_evict_first(bdev, man, place, ctx,
- ticket);
-   if (unlikely(ret != 0))
-   return ret;
-   } while (1);
-
-   return ttm_bo_add_move_fence(bo, man, *mem, ctx->no_wait_gpu);
-}
-
 /**
- * ttm_bo_mem_space
+ * ttm_bo_alloc_resource - Allocate backing store for a BO
  *
- * @bo: Pointer to a struct ttm_buffer_object. the data of which
- * we want to allocate space for.
- * @placement: Proposed new placement for the buffer object.
- * @mem: A struct ttm_resource.
+ * @bo: Pointer to a struct ttm_buffer_object of which we want a resource for
+ * @placement: Proposed new placement for the buffer object
  * @ctx: if and how to sleep, lock buffers and alloc memory
+ * @force_space: If we should evict buffers to force space
+ * @res: The resulting struct ttm_resource.
  *
- * Allocate memory space for the buffer object pointed to by @bo, using
- * the placement flags in @placement, potentially evicting other idle buffer 
objects.
- * This function may sleep while waiting for space to become available.
+ * Allocates a resource for the buffer object pointed to by @bo, using the
+ * placement flags in @placement, potentially evicting other buffer objects 
when
+ * @force_space is true.
+ * This function may sleep while waiting for resources to become available.
  * Returns:
- * -EBUSY: No space available (only if no_wait == 1).
+ * -EBUSY: No space available (only if no_wait == true).
  * -ENOSPC: Could not allocate space for the buffer object, either due to
  * fragmentation or concurrent allocators.
  * -ERESTARTSYS: An interruptible sleep was interrupted by a signal.
  */
-int ttm_bo_mem_space(struct ttm_buffer_object *bo,
-   struct ttm_placement *placement,
-   struct ttm_resource **mem,
-   struct ttm_operation_ctx *ctx)
+static int ttm_bo_alloc_resource(struct ttm_buffer_object *bo,
+struct ttm_placement *placement,
+struct ttm_operation_ctx *ctx,
+bool force_space,
+struct ttm_resource **res)
 {
struct ttm_device *bdev = bo->bdev;
-   bool type_found = false;
+   struct ww_acquire_ctx *ticket;
int i, ret;
 
+   ticket = dma_resv_locking_ctx(bo->base.resv);
ret = dma_resv_reserve_fences(bo->base.resv, 1);
if (unlikely(ret))
return ret;
@@ -790,98 +762,73 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
const struct ttm_place *place = >placement[i];
struct ttm_resource_manager *man;
 
-   if (place->flags & TTM_PL_FLAG_FALLBACK)
-   continue;

[PULL] drm-misc-fixes

2024-02-29 Thread Maxime Ripard
Hi,

Here's this week drm-misc fixes PR.

There's two commits for files unders drivers/soc/qcom that don't have a
maintainer Acked-by. Bjorn's Acked-by was provided on IRC, and Konrad
provided it by mail after the facts so we're covered.

Maxime

drm-misc-fixes-2024-02-29:
A reset fix for host1x, a resource leak fix and a probe fix for aux-hpd,
a use-after-free fix and a boot fix for a pmic_glink qcom driver in
drivers/soc, a fix for the simpledrm/tegra transition, a kunit fix for
the TTM tests, a font handling fix for fbcon, two allocation fixes and a
kunit test to cover them for drm/buddy
The following changes since commit 72fa02fdf83306c52bc1eede28359e3fa32a151a:

  nouveau: add an ioctl to report vram usage (2024-02-23 10:20:07 +1000)

are available in the Git repository at:

  https://anongit.freedesktop.org/git/drm/drm-misc 
tags/drm-misc-fixes-2024-02-29

for you to fetch changes up to c70703320e557ff30847915e6a7631a9abdda16b:

  drm/tests/drm_buddy: add alloc_range_bias test (2024-02-28 08:03:29 +0100)


A reset fix for host1x, a resource leak fix and a probe fix for aux-hpd,
a use-after-free fix and a boot fix for a pmic_glink qcom driver in
drivers/soc, a fix for the simpledrm/tegra transition, a kunit fix for
the TTM tests, a font handling fix for fbcon, two allocation fixes and a
kunit test to cover them for drm/buddy


Christian König (1):
  drm/ttm/tests: depend on UML || COMPILE_TEST

Jiri Slaby (SUSE) (1):
  fbcon: always restore the old font data in fbcon_do_set_font()

Johan Hovold (3):
  drm/bridge: aux-hpd: fix OF node leaks
  drm/bridge: aux-hpd: separate allocation and registration
  soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free

Matthew Auld (3):
  drm/buddy: fix range bias
  drm/buddy: check range allocation matches alignment
  drm/tests/drm_buddy: add alloc_range_bias test

Maxime Ripard (1):
  Merge drm/drm-fixes into drm-misc-fixes

Mikko Perttunen (1):
  gpu: host1x: Skip reset assert on Tegra186

Rob Clark (1):
  soc: qcom: pmic_glink: Fix boot when QRTR=m

Thierry Reding (1):
  drm/tegra: Remove existing framebuffer only if we support display

 drivers/gpu/drm/Kconfig |   5 +-
 drivers/gpu/drm/bridge/aux-hpd-bridge.c |  70 +++---
 drivers/gpu/drm/drm_buddy.c |  16 ++-
 drivers/gpu/drm/tegra/drm.c |  23 +++-
 drivers/gpu/drm/tests/drm_buddy_test.c  | 218 
 drivers/gpu/host1x/dev.c|  15 ++-
 drivers/gpu/host1x/dev.h|   6 +
 drivers/soc/qcom/pmic_glink.c   |  21 +--
 drivers/soc/qcom/pmic_glink_altmode.c   |  16 ++-
 drivers/video/fbdev/core/fbcon.c|   8 +-
 include/drm/bridge/aux-bridge.h |  15 +++
 11 files changed, 368 insertions(+), 45 deletions(-)


signature.asc
Description: PGP signature


[PULL] drm-xe-fixes

2024-02-29 Thread Thomas Hellstrom
Dave, Sima

The xe fixes for -rc7. It's mostly uapi sanitizing and future-proofing,
and a couple of driver fixes.

drm-xe-fixes-2024-02-29:
UAPI Changes:
- A couple of tracepoint updates from Priyanka and Lucas.
- Make sure BINDs are completed before accepting UNBINDs on LR vms.
- Don't arbitrarily restrict max number of batched binds.
- Add uapi for dumpable bos (agreed on IRC).
- Remove unused uapi flags and a leftover comment.

Driver Changes:
- A couple of fixes related to the execlist backend.
- A 32-bit fix.

/Thomas


The following changes since commit 6650d23f3e20ca00482a71a4ef900f0ea776fb15:

  drm/xe: Fix modpost warning on xe_mocs kunit module (2024-02-21 11:06:52 
+0100)

are available in the Git repository at:

  https://gitlab.freedesktop.org/drm/xe/kernel.git tags/drm-xe-fixes-2024-02-29

for you to fetch changes up to 8188cae3cc3d8018ec97ca9ab8caa3acc69a056d:

  drm/xe/xe_trace: Add move_lacks_source detail to xe_bo_move trace (2024-02-29 
12:32:15 +0100)


UAPI Changes:
- A couple of tracepoint updates from Priyanka and Lucas.
- Make sure BINDs are completed before accepting UNBINDs on LR vms.
- Don't arbitrarily restrict max number of batched binds.
- Add uapi for dumpable bos (agreed on IRC).
- Remove unused uapi flags and a leftover comment.

Driver Changes:
- A couple of fixes related to the execlist backend.
- A 32-bit fix.

Arnd Bergmann (1):
  drm/xe/mmio: fix build warning for BAR resize on 32-bit

Francois Dugast (1):
  drm/xe/uapi: Remove unused flags

José Roberto de Souza (1):
  drm/xe/uapi: Remove DRM_XE_VM_BIND_FLAG_ASYNC comment left over

Lucas De Marchi (1):
  drm/xe: Use pointers in trace events

Maarten Lankhorst (1):
  drm/xe: Add uapi for dumpable bos

Matthew Brost (3):
  drm/xe: Fix execlist splat
  drm/xe: Don't support execlists in xe_gt_tlb_invalidation layer
  drm/xe: Use vmalloc for array of bind allocation in bind IOCTL

Mika Kuoppala (2):
  drm/xe: Expose user fence from xe_sync_entry
  drm/xe: Deny unbinds if uapi ufence pending

Paulo Zanoni (1):
  drm/xe: get rid of MAX_BINDS

Priyanka Dandamudi (2):
  drm/xe/xe_bo_move: Enhance xe_bo_move trace
  drm/xe/xe_trace: Add move_lacks_source detail to xe_bo_move trace

 drivers/gpu/drm/xe/xe_bo.c  | 11 +++-
 drivers/gpu/drm/xe/xe_bo.h  |  1 +
 drivers/gpu/drm/xe/xe_drm_client.c  | 12 +---
 drivers/gpu/drm/xe/xe_exec_queue.c  | 88 +
 drivers/gpu/drm/xe/xe_exec_queue_types.h| 10 
 drivers/gpu/drm/xe/xe_execlist.c|  2 +-
 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 12 
 drivers/gpu/drm/xe/xe_lrc.c | 10 +---
 drivers/gpu/drm/xe/xe_mmio.c|  2 +-
 drivers/gpu/drm/xe/xe_sync.c| 58 +++
 drivers/gpu/drm/xe/xe_sync.h|  4 ++
 drivers/gpu/drm/xe/xe_sync_types.h  |  2 +-
 drivers/gpu/drm/xe/xe_trace.h   | 59 +--
 drivers/gpu/drm/xe/xe_vm.c  | 80 ++
 drivers/gpu/drm/xe/xe_vm_types.h| 11 ++--
 include/uapi/drm/xe_drm.h   | 21 +--
 16 files changed, 187 insertions(+), 196 deletions(-)


Re: [PATCH] drm/i915: fix applying placement flag

2024-02-29 Thread Christian König

Gentle ping. Can I get an rb for that?

Thanks,
Christian.

Am 26.02.24 um 15:27 schrieb Christian König:

Switching from a separate list to flags introduced a bug here.

We were accidentially ORing the flag before initailizing the placement
and not after. So this code didn't do nothing except producing a
warning.

Signed-off-by: Christian König 
Reported-by: Stephen Rothwell 
Fixes: a78a8da51b36 ("drm/ttm: replace busy placement with flags v6")
---
  drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index a6b0aaf30cbe..7264fb08eee8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -162,10 +162,10 @@ i915_ttm_placement_from_obj(const struct 
drm_i915_gem_object *obj,
unsigned int flags = obj->flags;
unsigned int i;
  
-	places[0].flags |= TTM_PL_FLAG_DESIRED;

i915_ttm_place_from_region(num_allowed ? obj->mm.placements[0] :
   obj->mm.region, [0], obj->bo_offset,
   obj->base.size, flags);
+   places[0].flags |= TTM_PL_FLAG_DESIRED;
  
  	/* Cache this on object? */

for (i = 0; i < num_allowed; ++i) {




Re: [PATCH] drm/i915: Remove unneeded double drm_rect_visible call in check_overlay_dst

2024-02-29 Thread Ville Syrjälä
On Wed, Feb 28, 2024 at 09:32:47PM +0300, Nikita Kiryushin wrote:
> 
> check_overlay_dst for clipped is called 2 times: in drm_rect_intersect 
> and than directly. Change second call for check of drm_rect_intersect 
> result to save some time (in locked code section).
> 
> Found by Linux Verification Center (linuxtesting.org) with SVACE.
> 
> Fixes: 8d8b2dd3995f ("drm/i915: Make the PIPESRC rect relative to the 
> entire bigjoiner area")
> Signed-off-by: Nikita Kiryushin 
> ---
>   drivers/gpu/drm/i915/display/intel_overlay.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c 
> b/drivers/gpu/drm/i915/display/intel_overlay.c
> index 2b1392d5a902..1cda1c163a92 100644
> --- a/drivers/gpu/drm/i915/display/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/display/intel_overlay.c
> @@ -972,9 +972,8 @@ static int check_overlay_dst(struct intel_overlay 
> *overlay,
> rec->dst_width, rec->dst_height);
>   clipped = req;
> - drm_rect_intersect(, _state->pipe_src);
>   -   if (!drm_rect_visible() ||
> + if (!drm_rect_intersect(, _state->pipe_src) ||

I prefer the current way where we have no side effects in
the if statement.

>   !drm_rect_equals(, ))
>   return -EINVAL;
>   -- 2.34.1

-- 
Ville Syrjälä
Intel


Re: [PATCH v2 3/3] drm/i915/bios: abstract child device expected size

2024-02-29 Thread Ville Syrjälä
On Mon, Feb 26, 2024 at 07:58:54PM +0200, Jani Nikula wrote:
> Add a function to return the expected child device size. Flip the if
> ladder around and use the same versions as in documentation to make it
> easier to verify. Return an error for unknown versions. No functional
> changes.
> 
> v2: Move BUILD_BUG_ON() next to the expected sizes
> 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 40 ++-
>  1 file changed, 24 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index c0f41bd1f946..343726de9aa7 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2699,27 +2699,35 @@ static void parse_ddi_ports(struct drm_i915_private 
> *i915)
>   print_ddi_port(devdata);
>  }
>  
> +static int child_device_expected_size(u16 version)
> +{
> + BUILD_BUG_ON(sizeof(struct child_device_config) < 40);

Should we make that !=40 perhaps?

Anyways, series is
Reviewed-by: Ville Syrjälä 

> +
> + if (version > 256)
> + return -ENOENT;
> + else if (version >= 256)
> + return 40;
> + else if (version >= 216)
> + return 39;
> + else if (version >= 196)
> + return 38;
> + else if (version >= 195)
> + return 37;
> + else if (version >= 111)
> + return LEGACY_CHILD_DEVICE_CONFIG_SIZE;
> + else if (version >= 106)
> + return 27;
> + else
> + return 22;
> +}
> +
>  static bool child_device_size_valid(struct drm_i915_private *i915, int size)
>  {
>   int expected_size;
>  
> - if (i915->display.vbt.version < 106) {
> - expected_size = 22;
> - } else if (i915->display.vbt.version < 111) {
> - expected_size = 27;
> - } else if (i915->display.vbt.version < 195) {
> - expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
> - } else if (i915->display.vbt.version == 195) {
> - expected_size = 37;
> - } else if (i915->display.vbt.version <= 215) {
> - expected_size = 38;
> - } else if (i915->display.vbt.version <= 255) {
> - expected_size = 39;
> - } else if (i915->display.vbt.version <= 256) {
> - expected_size = 40;
> - } else {
> + expected_size = child_device_expected_size(i915->display.vbt.version);
> + if (expected_size < 0) {
>   expected_size = sizeof(struct child_device_config);
> - BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
>   drm_dbg(>drm,
>   "Expected child device config size for VBT version %u 
> not known; assuming %d\n",
>   i915->display.vbt.version, expected_size);
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel


Re: [PATCH] MAINTAINERS: Update email address for Tvrtko Ursulin

2024-02-29 Thread Joonas Lahtinen
Quoting Tvrtko Ursulin (2024-02-28 16:22:40)
> From: Tvrtko Ursulin 
> 
> I will lose access to my @.*intel.com e-mail addresses soon so let me
> adjust the maintainers entry and update the mailmap too.
> 
> While at it consolidate a few other of my old emails to point to the
> main one.
> 
> Signed-off-by: Tvrtko Ursulin 
> Cc: Daniel Vetter 
> Cc: Dave Airlie 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 

Acked-by: Joonas Lahtinen 

Regards, Joonas


Re: [PATCH v12 2/8] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Nautiyal, Ankit K



On 2/29/2024 4:53 PM, Jani Nikula wrote:

On Thu, 29 Feb 2024, "Nautiyal, Ankit K"  wrote:

On 2/28/2024 8:08 PM, Mitul Golani wrote:

+enum operation_mode {
+   DP_AS_SDP_AVT_DYNAMIC_VTOTAL = 0x00,
+   DP_AS_SDP_AVT_FIXED_VTOTAL = 0x01,
+   DP_AS_SDP_FAVT_TRR_NOT_REACHED = 0x02,
+   DP_AS_SDP_FAVT_TRR_REACHED = 0x03
+};

We can drop the initialization here.

For stuff that needs to match the spec it's common to include the
initializations instead of relying on the auto enumeration.


Ah alright, got it.

Regards,

Ankit




BR,
Jani.




Re: [PATCH 00/12] drm/i915: Use drm_printer more

2024-02-29 Thread Jani Nikula
On Thu, 15 Feb 2024, Ville Syrjala  wrote:
> Convert the entire state dumper and state checker to
> use drm_printer.

I've backmerged drm-next to drm-intel-next to get the required
drm_printer stuff, so it's actually possible to merge this.

BR,
Jani.


-- 
Jani Nikula, Intel


Re: [PATCH v12 6/8] drm/i915/display: Add state checker for Adaptive Sync SDP

2024-02-29 Thread Nautiyal, Ankit K



On 2/28/2024 8:08 PM, Mitul Golani wrote:

Enable infoframe and add state checker for Adaptive Sync
SDP enablement.

Signed-off-by: Mitul Golani 
---
  drivers/gpu/drm/i915/display/intel_display.c | 46 
  drivers/gpu/drm/i915/display/intel_dp.c  |  2 +
  2 files changed, 48 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 00ac65a14029..be0a5fae4e58 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4781,6 +4781,17 @@ intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a,
a->content_type == b->content_type;
  }
  
+static bool

+intel_compare_dp_as_sdp(const struct drm_dp_as_sdp *a,
+   const struct drm_dp_as_sdp *b)
+{
+   return a->vtotal == b->vtotal &&
+   a->target_rr == b->target_rr &&
+   a->duration_incr_ms == b->duration_incr_ms &&
+   a->duration_decr_ms == b->duration_decr_ms &&
+   a->mode == b->mode;
+}
+
  static bool
  intel_compare_buffer(const u8 *a, const u8 *b, size_t len)
  {
@@ -4836,6 +4847,30 @@ pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private 
*i915,
drm_dp_vsc_sdp_log(, b);
  }
  
+static void

+pipe_config_dp_as_sdp_mismatch(struct drm_i915_private *i915,
+  bool fastset, const char *name,
+  const struct drm_dp_as_sdp *a,
+  const struct drm_dp_as_sdp *b)
+{
+   struct drm_printer p;
+
+   if (fastset) {
+   p = drm_dbg_printer(>drm, DRM_UT_KMS, NULL);
+
+   drm_printf(, "fastset requirement not met in %s dp sdp\n", 
name);
+   } else {
+   p = drm_err_printer(>drm, NULL);
+
+   drm_printf(, "mismatch in %s dp sdp\n", name);
+   }
+
+   drm_printf(, "expected:\n");
+   drm_dp_as_sdp_log(, a);
+   drm_printf(, "found:\n");
+   drm_dp_as_sdp_log(, b);
+}
+
  /* Returns the length up to and including the last differing byte */
  static size_t
  memcmp_diff_len(const u8 *a, const u8 *b, size_t len)
@@ -5089,6 +5124,16 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
} \
  } while (0)
  
+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \

+   if (!intel_compare_dp_as_sdp(_config->infoframes.name, \
+ _config->infoframes.name)) { \
+   pipe_config_dp_as_sdp_mismatch(dev_priv, fastset, 
__stringify(name), \
+   
_config->infoframes.name, \
+   _config->infoframes.name); 
\
+   ret = false; \
+   } \
+} while (0)
+
  #define PIPE_CONF_CHECK_BUFFER(name, len) do { \
BUILD_BUG_ON(sizeof(current_config->name) != (len)); \
BUILD_BUG_ON(sizeof(pipe_config->name) != (len)); \
@@ -5270,6 +5315,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_INFOFRAME(hdmi);
PIPE_CONF_CHECK_INFOFRAME(drm);
PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
+   PIPE_CONF_CHECK_DP_AS_SDP(as_sdp);
  
  	PIPE_CONF_CHECK_X(sync_mode_slaves_mask);

PIPE_CONF_CHECK_I(master_transcoder);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 1cd3cc0d0c0b..2ec1f923a5a0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2648,6 +2648,8 @@ static void intel_dp_compute_as_sdp(struct intel_dp 
*intel_dp,
as_sdp->target_rr = 0;
as_sdp->duration_incr_ms = 0;
as_sdp->duration_incr_ms = 0;
+
+   crtc_state->infoframes.enable |= 
intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);



This change does not seem to belong to this patch.

Regards,

Ankit


  }
  
  static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,


Re: [PATCH v12 2/8] drm: Add Adaptive Sync SDP logging

2024-02-29 Thread Jani Nikula
On Thu, 29 Feb 2024, "Nautiyal, Ankit K"  wrote:
> On 2/28/2024 8:08 PM, Mitul Golani wrote:
>> +enum operation_mode {
>> +DP_AS_SDP_AVT_DYNAMIC_VTOTAL = 0x00,
>> +DP_AS_SDP_AVT_FIXED_VTOTAL = 0x01,
>> +DP_AS_SDP_FAVT_TRR_NOT_REACHED = 0x02,
>> +DP_AS_SDP_FAVT_TRR_REACHED = 0x03
>> +};
>
> We can drop the initialization here.

For stuff that needs to match the spec it's common to include the
initializations instead of relying on the auto enumeration.

BR,
Jani.


-- 
Jani Nikula, Intel


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