== Series Details ==
Series: VBT read cleanup (rev6)
URL : https://patchwork.freedesktop.org/series/130528/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130528v6
Summary
---
**FAILURE**
== Series Details ==
Series: VBT read cleanup (rev6)
URL : https://patchwork.freedesktop.org/series/130528/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
> -Original Message-
> From: Jani Nikula
> Sent: Monday, March 4, 2024 11:03 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: Hogander, Jouni ; Murthy, Arun R
> ; Manna, Animesh
> Subject: Re: [RFC 2/3] drm/i915/alpm: Add compute config for lobf
>
> On Mon, 04 Mar
== Series Details ==
Series: drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev3)
URL : https://patchwork.freedesktop.org/series/130643/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130643v3
Hello Mathew,
> -Original Message-
> From: Borah, Chaitanya Kumar
> Sent: Monday, March 4, 2024 8:18 PM
> To: Matthew Wilcox
> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani
> Subject: RE: Regression on linux-next (next-20240228)
>
> Hello Mathew,
>
> >
== Series Details ==
Series: drm/i915/mtl: Update workaround 14018575942 (rev4)
URL : https://patchwork.freedesktop.org/series/130490/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130490v4
Summary
For DISPLAY < 13, compressed bpp is chosen from a list of
supported compressed bpps. Fix the condition to choose the
appropriate compressed bpp from the list.
Fixes: 1c56e9a39833 ("drm/i915/dp: Get optimal link config to have best
compressed bpp")
Cc: Ankit Nautiyal
Cc: Stanislav Lisovskiy
Cc:
== Series Details ==
Series: drm/i915/guc: Use context hints for GT frequency
URL : https://patchwork.freedesktop.org/series/130698/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130698v1
Summary
---
== Series Details ==
Series: drm/i915/guc: Use context hints for GT frequency
URL : https://patchwork.freedesktop.org/series/130698/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi,
https://patchwork.freedesktop.org/series/130512/ - Re-reported.
Thanks,
Tejasree
-Original Message-
From: Janusz Krzysztofik
Sent: Friday, March 1, 2024 6:55 PM
To: LGCI Bug Filing
Cc: intel-gfx@lists.freedesktop.org; Andi Shyti ;
Janusz Krzysztofik
Subject: Re: ✗ Fi.CI.IGT:
== Series Details ==
Series: drm/i915/selftest_hangcheck: Check sanity with more patience (rev3)
URL : https://patchwork.freedesktop.org/series/130512/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130512v3
== Series Details ==
Series: VBT read cleanup (rev5)
URL : https://patchwork.freedesktop.org/series/130528/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130528v5
Summary
---
**FAILURE**
== Series Details ==
Series: VBT read cleanup (rev5)
URL : https://patchwork.freedesktop.org/series/130528/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/selftest_hangcheck: Check sanity with more patience (rev3)
URL : https://patchwork.freedesktop.org/series/130512/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130512v3
On 2/26/2024 23:28, Jani Nikula wrote:
Add a function to return the expected child device size. Flip the if
ladder around and use the same versions as in documentation to make it
easier to verify. Return an error for unknown versions. No functional
changes.
v2: Move BUILD_BUG_ON() next to the
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/130335/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130335v3
Summary
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/130335/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/130335/
State : warning
== Summary ==
Error: dim checkpatch failed
0900ae5c7da2 drm/i915: Enable Wa_16019325821
f4c1b0cad70c drm/i915/guc: Add support for w/a
The driver currently waits 1ms for idle patterns,
but for LNL and later platforms, it requires a
1640us (rounded up to 2ms) timeout whilst waiting
for idle patterns for MST streams.
To simplify the code, the timeout is uniformly
increased by 1ms across all platforms.
v1: Introduced the 2ms wait
== Series Details ==
Series: Enable LNL display
URL : https://patchwork.freedesktop.org/series/130689/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130689v1
Summary
---
**FAILURE**
Serious
== Series Details ==
Series: Enable LNL display
URL : https://patchwork.freedesktop.org/series/130689/
State : warning
== Summary ==
Error: dim checkpatch failed
52ce7e3a93e7 drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
3f9ed6439f1f drm/i915/cdclk: Add and use
== Series Details ==
Series: Enable LNL display
URL : https://patchwork.freedesktop.org/series/130689/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Fix VMA UAF on destroy against deactivate race (rev4)
URL : https://patchwork.freedesktop.org/series/129026/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_129026v4
== Series Details ==
Series: series starting with [v8,1/3] drm/buddy: Implement tracking clear page
feature
URL : https://patchwork.freedesktop.org/series/130680/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
== Series Details ==
Series: drm/i915: Fix VMA UAF on destroy against deactivate race (rev4)
URL : https://patchwork.freedesktop.org/series/129026/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/selftest_hangcheck: Check sanity with more patience (rev3)
URL : https://patchwork.freedesktop.org/series/130512/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130512v3
== Series Details ==
Series: drm/i915/selftest_hangcheck: Check sanity with more patience (rev3)
URL : https://patchwork.freedesktop.org/series/130512/
State : warning
== Summary ==
Error: dim checkpatch failed
3db5d21fbc6b drm/i915/selftest_hangcheck: Check sanity with more patience
-:11:
== Series Details ==
Series: drm/i915/selftests: Fix dependency of some timeouts on HZ (rev3)
URL : https://patchwork.freedesktop.org/series/130249/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14383 -> Patchwork_130249v3
== Series Details ==
Series: drm/i915: Remove unneeded double drm_rect_visible call in
check_overlay_dst
URL : https://patchwork.freedesktop.org/series/130669/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/130669/revisions/1/mbox/ not
applied
== Series Details ==
Series: drm/i915/mtl: Update workaround 14018575942 (rev3)
URL : https://patchwork.freedesktop.org/series/130490/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14382 -> Patchwork_130490v3
Summary
== Series Details ==
Series: drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev2)
URL : https://patchwork.freedesktop.org/series/130643/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14382 -> Patchwork_130643v2
== Series Details ==
Series: Link off between frames for edp
URL : https://patchwork.freedesktop.org/series/130650/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/130650/revisions/1/mbox/ not
applied
Applying: drm/i915/alpm: Move alpm parameters
Allow user to provide a low latency context hint. When set, KMD
sends a hint to GuC which results in special handling for this
context. SLPC will ramp the GT frequency aggressively every time
it switches to this context. The down freq threshold will also be
lower so GuC will ramp down the GT freq
On Mon, Mar 04, 2024 at 03:30:24PM -0300, Gustavo Sousa wrote:
> CDCLK programming Xe2LPD always selects the CDCLK PLL as source for the
I think something got a bit muddled while rewriting this sentence.
Maybe the first two words were supposed to be dropped?
Otherwise,
Reviewed-by: Matt Roper
== Series Details ==
Series: drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev2)
URL : https://patchwork.freedesktop.org/series/130643/
State : warning
== Summary ==
Error: dim checkpatch failed
3a67ec8f2461 drm/i915/dp: Increase idle pattern wait timeout to 2ms
-:31:
On Mon, Mar 04, 2024 at 03:30:23PM -0300, Gustavo Sousa wrote:
> As of Xe2LPD, it is now possible to select the source of the MDCLK
> as either the CD2XCLK or the CDCLK PLL.
>
> Previous display IPs were hardcoded to use the CD2XCLK. For those, the
> ratio between MDCLK and CDCLK remained
On Mon, Mar 04, 2024 at 03:30:22PM -0300, Gustavo Sousa wrote:
> It is no use computing the squash waveform if we are not going to use
> it. Move the call to cdclk_squash_waveform() inside the block guarded by
> HAS_CDCLK_SQUASH(dev_priv).
>
> Signed-off-by: Gustavo Sousa
You could also move
On Mon, Mar 04, 2024 at 03:30:21PM -0300, Gustavo Sousa wrote:
> There will be future changes that rely on the source of the MDCLK. Let's
> have xe2lpd_mdclk_source_sel() as the function responsible for reporting
> that information.
>
> Bspec: 69090
> Signed-off-by: Gustavo Sousa
> ---
>
On Mon, Mar 04, 2024 at 03:30:20PM -0300, Gustavo Sousa wrote:
> The CDCLK table is tied to Xe2LPD display and not to the platform. Let's
> rename lnl_cdclk_table to xe2lpd_cdclk_table in order to reflect that.
>
> Signed-off-by: Gustavo Sousa
Reviewed-by: Matt Roper
> ---
>
On Wed, Feb 28, 2024 at 11:58:06AM -0800, Belgaumkar, Vinay wrote:
>
> On 2/28/2024 4:54 AM, Tvrtko Ursulin wrote:
> >
> > On 27/02/2024 23:51, Vinay Belgaumkar wrote:
> > > Allow user to provide a low latency context hint. When set, KMD
> > > sends a hint to GuC which results in special
Make debugfs vbt only shows valid vbt when read from ACPI opregion.
Make it work when read from firmware/spi/pci oprom cases. In the cases
where VBT needs to be read from spi/pci oprom, take the wakeref to
prevent WARN while reading DE registers during debugfs vbt dump.
v2: Extract getting vbt
Quoting Lucas De Marchi (2024-03-04 16:50:49-03:00)
>On Mon, Mar 04, 2024 at 03:30:26PM -0300, Gustavo Sousa wrote:
>>From: Balasubramani Vivekanandan
>>
>>Load DMC for Xe2LPD. The value 0x8000 is the maximum payload size for
>>any Xe2LPD DMC firmware.
>>
>>Signed-off-by: Balasubramani
On Mon, Mar 04, 2024 at 03:30:27PM -0300, Gustavo Sousa wrote:
From: Balasubramani Vivekanandan
Enable display support for Lunar Lake.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Lucas De Marchi
Signed-off-by: Gustavo Sousa
Reviewed-by: Lucas De Marchi
No need to merge
On Mon, Mar 04, 2024 at 03:30:26PM -0300, Gustavo Sousa wrote:
From: Balasubramani Vivekanandan
Load DMC for Xe2LPD. The value 0x8000 is the maximum payload size for
any Xe2LPD DMC firmware.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Gustavo
Quoting Govindapillai, Vinod (2024-02-22 14:18:53-03:00)
>Hi.
>
>
>
>On Thu, 2024-02-22 at 13:04 -0300, Gustavo Sousa wrote:
>> Hi, guys.
>>
>> (This is a re-send, because I *think* my MUA badly formed the address to
>> the mailing list.)
>>
>> Quoting Govindapillai, Vinod (2024-02-22
From: Balasubramani Vivekanandan
Load DMC for Xe2LPD. The value 0x8000 is the maximum payload size for
any Xe2LPD DMC firmware.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 9
From: Balasubramani Vivekanandan
Enable display support for Lunar Lake.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Lucas De Marchi
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/xe/xe_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_pci.c
Commit 394b4b7df9f7 ("drm/i915/lnl: Add CDCLK table") and commit
3d3696c0fed1 ("drm/i915/lnl: Start using CDCLK through PLL") started
adding support for CDCLK programming support for Xe2LPD. One final piece
is missing, which is the programming necessary for changed in the ratio
between MDCLK and
CDCLK programming Xe2LPD always selects the CDCLK PLL as source for the
MDCLK. Because of that, the ratio between MDCLK and CDCLK is not be
constant anymore. As such, make sure to have the current ratio available
in intel_dbuf_state so that it can be used during dbuf programming.
Note that we
As of Xe2LPD, it is now possible to select the source of the MDCLK
as either the CD2XCLK or the CDCLK PLL.
Previous display IPs were hardcoded to use the CD2XCLK. For those, the
ratio between MDCLK and CDCLK remained constant, namely 2. For Xe2LPD,
when we select the CDCLK PLL as the source, the
It is no use computing the squash waveform if we are not going to use
it. Move the call to cdclk_squash_waveform() inside the block guarded by
HAS_CDCLK_SQUASH(dev_priv).
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +++--
1 file changed, 3 insertions(+), 2
There will be future changes that rely on the source of the MDCLK. Let's
have xe2lpd_mdclk_source_sel() as the function responsible for reporting
that information.
Bspec: 69090
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 17 -
The CDCLK table is tied to Xe2LPD display and not to the platform. Let's
rename lnl_cdclk_table to xe2lpd_cdclk_table in order to reflect that.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
This series aims at providing the remaining patches for enabling display
on Lunar Lake, which used Xe2LPD display IP.
The first set of patches contains fixes and extra stuff required for
supporting CDCLK on Xe2LPD:
drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
On Mon, 04 Mar 2024, Animesh Manna wrote:
> Link Off Between Active Frames, is a new feature for eDP
> that allows the panel to go to lower power state after
> transmission of data. This is a feature on top of ALPM, AS SDP.
> Add compute config during atomic-check phase.
>
> Signed-off-by:
Am 04.03.24 um 17:32 schrieb Arunpravin Paneer Selvam:
Add amdgpu driver as user for the drm buddy
defragmentation.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 17 +++--
drivers/gpu/drm/drm_buddy.c | 1 +
2 files
Add amdgpu driver as user for the drm buddy
defragmentation.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 17 +++--
drivers/gpu/drm/drm_buddy.c | 1 +
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git
Add clear page support in vram memory region.
v1(Christian):
- Dont handle clear page as TTM flag since when moving the BO back
in from GTT again we don't need that.
- Make a specialized version of amdgpu_fill_buffer() which only
clears the VRAM areas which are not already cleared
-
- Add tracking clear page feature.
- Driver should enable the DRM_BUDDY_CLEARED flag if it
successfully clears the blocks in the free path. On the otherhand,
DRM buddy marks each block as cleared.
- Track the available cleared pages size
- If driver requests cleared memory we prefer cleared
Hi Dave and Sima,
A few xe fixes for 6.9.
drm-xe-next-fixes-2024-03-04:
Driver Changes:
- Fix kunit link failure with built-in xe
- Fix one more 32-bit build failure with ARM compiler
- Fix initialization order of topology struct
- Cleanup unused fields in struct xe_vm
- Fix xe_vm leak when
On Tue, 27 Feb 2024, Suraj Kandpal wrote:
> Move intel_hdcp_gsc_message definition into intel_hdcp_gsc.h
> so that intel_hdcp_gsc_message can be redefined for xe as needed.
>
> --v2
> -Correct commit message to reflect what patch is actually doing [Arun]
>
> Signed-off-by: Suraj Kandpal
On 3/1/2024 8:29 AM, Janusz Krzysztofik wrote:
Object debugging tools were sporadically reporting illegal attempts to
free a still active i915 VMA object when parking a GT believed to be idle.
[161.359441] ODEBUG: free active (active state 0) object: 88811643b958
object type: i915_active
Hello Mathew,
> -Original Message-
> From: Matthew Wilcox
> Sent: Monday, March 4, 2024 6:52 PM
> To: Borah, Chaitanya Kumar
> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani
> Subject: Re: Regression on linux-next (next-20240228)
>
> On Mon, Mar 04, 2024
On Monday, March 4th, 2024 at 15:04, Garg, Nemesa wrote:
> This is generic as sharpness effect is applied post blending. Depending
> on the color gamut, pixel format and other inputs the image gets
> blended and once we get blended output it can be sharpened based on
> strength value provided by
Michał has helped me a lot - no action is required!
Thank you for your time and help, I really appreciate it!
Maksym
środa, 28 lutego 2024 1:43 PM, mak...@wezdecki.pl
napisał(a):
>
>
> Hello,
>
> Thanks again for reply.
>
> I have implemented __uc_sanitize() function in my code for
On 2/29/24 15:30, Ville Syrjälä wrote:
I prefer the current way where we have no side effects in
the if statement.
This seem like a valid concern from readability and maintainability
standpoint. My patch was aimed mostly at performance and maintainability
using tools: some more pedantic
Hi Stephen,
On 2/28/24 21:26, Stephen Rothwell wrote:
Hi all,
After merging the kunit-next tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from drivers/gpu/drm/tests/drm_buddy_test.c:7:
drivers/gpu/drm/tests/drm_buddy_test.c: In function
Hi Stephen,
On 3/1/24 13:46, Stephen Rothwell wrote:
Hi Shuah,
On Fri, 1 Mar 2024 09:05:57 -0700 Shuah Khan wrote:
On 3/1/24 03:43, Stephen Rothwell wrote:
Hi all,
On Fri, 1 Mar 2024 15:15:02 +0800 David Gow wrote:
On Thu, 29 Feb 2024 at 23:07, Shuah Khan wrote:
I can carry the fix
On 3/1/24 03:43, Stephen Rothwell wrote:
Hi all,
On Fri, 1 Mar 2024 15:15:02 +0800 David Gow wrote:
On Thu, 29 Feb 2024 at 23:07, Shuah Khan wrote:
I can carry the fix through kselftest kunit if it works
for all.
I'm happy for this to go in with the KUnit changes if that's the best
way
Hello,
Thank you for your help.
Is there a possibility to load GuC, then "unload" it and load it again without
cold reset?
By loading I mean HuC firmware upload, GuC ADS/log init, GuC firmware upload,
CT init, HuC authentication by GuC.
I'm asking because I need to perform severe testing on
check_overlay_dst for clipped is called 2 times: in drm_rect_intersect
and than directly. Change second call for check of drm_rect_intersect
result to save some time (in locked code section).
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: 8d8b2dd3995f ("drm/i915:
Hi,
I understand that GuC is 32bit uController, so it has access only to 4GB GTT.
I don't understand WOPCM and GTT conjunction.
>From i915 doc we can see that:
+===> ++ <== _
^ | Reserved |
| ++
This is generic as sharpness effect is applied post blending. Depending on the
color gamut, pixel format and other inputs the image gets blended and once we
get blended output it can be sharpened based on strength value provided by the
user.
On intel platform it is implemented through pipe
On Mon, Mar 04, 2024 at 10:03:13AM +, Borah, Chaitanya Kumar wrote:
> > Could you try putting the two:
> >
> > - list_del(>lru);
> >
> > statements back in and see if that fixes it?
>
> That seems to fix it.
>
> if (!folio_put_testzero(folio))
> +
On 04/03/2024 12:22, Paneer Selvam, Arunpravin wrote:
Hi Matthew,
On 2/22/2024 12:12 AM, Matthew Auld wrote:
On 21/02/2024 12:18, Arunpravin Paneer Selvam wrote:
Add a function to support defragmentation.
v1:
- Defragment the memory beginning from min_order
till the required memory
Hi Matthew,
On 2/22/2024 12:12 AM, Matthew Auld wrote:
On 21/02/2024 12:18, Arunpravin Paneer Selvam wrote:
Add a function to support defragmentation.
v1:
- Defragment the memory beginning from min_order
till the required memory space is available.
v2(Matthew):
- add amdgpu user
On Mon, 04 Mar 2024, "Chauhan, Shekhar" wrote:
> On 3/4/2024 14:16, Jani Nikula wrote:
>> I did not ask for this. I would rather all platforms used 2 ms. I even
>> said the original change looked fine. But I'd like it to be explained in
>> the commit message.
> I felt that when you said "why bump
On 3/4/2024 14:16, Jani Nikula wrote:
On Mon, 04 Mar 2024, Shekhar Chauhan wrote:
Currently, the driver is only waiting for 1ms for
idle patterns. But starting from LNL and beyond,
the MST wants the driver to wait for 1640us before
What does it mean that "the MST wants"?
I wanted to convey
On Sat, Mar 25, 2023 at 02:27:19PM -0300, Arthur Grillo wrote:
> The drm_rect_intersect() already returns if the intersection is visible
> or not, so the use of drm_rect_visible() is duplicate.
>
> Signed-off-by: Arthur Grillo
Sorry, looks like I completely missed this.
Now push the
On Fri, Mar 01, 2024 at 09:56:41PM +0300, Nikita Kiryushin wrote:
> On 2/29/24 15:30, Ville Syrjälä wrote:
> > I prefer the current way where we have no side effects in
> > the if statement.
> >
>
> This seem like a valid concern from readability and maintainability
> standpoint. My patch was
On 3/1/2024 2:15 PM, Mitul Golani wrote:
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.
The subject line and commit message need to be updated.
Now we are just enabling Adaptive sync SDP.
Regards,
Ankit
On 3/1/2024 2:15 PM, Mitul Golani wrote:
Compute vrr_vsync_start/end, which sets the position
for hardware to send the Vsync at a fixed position
relative to the end of the Vblank.
--v2:
- Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit)
- Updated bit fields of
On Mon, Mar 04, 2024 at 08:44:35AM +0200, Srinivas, Vidya wrote:
> Thank you very much Ville and Stan.
> With https://patchwork.freedesktop.org/series/130619/ and
> https://patchwork.freedesktop.org/series/130449/ tested that 6K works
> Tested-by: Vidya Srinivas
The thing is that we still don't
On 3/1/2024 2:15 PM, Mitul Golani wrote:
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
LGTM.
Reviewed-by: Ankit Nautiyal
---
On 3/1/2024 2:15 PM, Mitul Golani wrote:
Add necessary function definitions to compute AS SDP data.
The new intel_dp_compute_as_sdp function computes AS SDP
values based on the display configuration, ensuring proper
handling of Variable Refresh Rate (VRR).
--v2:
- Added DP_SDP_ADAPTIVE_SYNC
On 3/1/2024 2:14 PM, Mitul Golani wrote:
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
LGTM.
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
On 3/1/2024 2:14 PM, Mitul Golani wrote:
Add the necessary structures and functions to handle reading and
unpacking Adaptive Sync Secondary Data Packets. Also add support
to write and pack AS SDP.
--v2:
- Correct use of REG_BIT and REG_GENMASK. [Jani]
- Use as_sdp instead of async. [Jani]
-
Hello Mathew,
> -Original Message-
> From: Matthew Wilcox
> Sent: Monday, March 4, 2024 11:27 AM
> To: Borah, Chaitanya Kumar
> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani
> Subject: Re: Regression on linux-next (next-20240228)
>
> On Mon, Mar 04, 2024
On Fri, 01 Mar 2024, Radhakrishna Sripada
wrote:
> Make debugfs vbt only shows valid vbt when read from ACPI opregion.
> Make it work when read from firmware/spi/pci oprom cases. In the cases
> where VBT needs to be read from spi/pci oprom, take the wakeref to
> prevent WARN while reading DE
Add drm/i915/display in subject line.
With that fixed this is:
Reviewed-by: Ankit Nautiyal
On 3/1/2024 2:14 PM, Mitul Golani wrote:
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
Signed-off-by: Mitul Golani
---
On Fri, Mar 01, 2024 at 06:47:54PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 01, 2024 at 06:22:19PM +0200, Lisovskiy, Stanislav wrote:
> > On Fri, Mar 01, 2024 at 06:10:25PM +0200, Ville Syrjälä wrote:
> > > On Fri, Mar 01, 2024 at 06:04:27PM +0200, Lisovskiy, Stanislav wrote:
> > > > On Fri, Mar
On 3/1/2024 2:14 PM, Mitul Golani wrote:
Add structure representing Adaptive Sync Secondary Data Packet (AS SDP).
Also, add Adaptive Sync SDP logging in drm_dp_helper.c to facilitate
debugging.
--v2:
- Update logging. [Jani, Ankit]
- Use 'as_sdp' instead of 'async' [Ankit]
- Correct define
On Mon, 04 Mar 2024, Shekhar Chauhan wrote:
> Currently, the driver is only waiting for 1ms for
> idle patterns. But starting from LNL and beyond,
> the MST wants the driver to wait for 1640us before
What does it mean that "the MST wants"?
> timing out (which we round up to 2ms).
>
> v1:
On 3/1/2024 2:14 PM, Mitul Golani wrote:
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
LGTM.
Reviewed-by: Ankit Nautiyal
---
On Mon, 26 Feb 2024 13:44:27 +0100,
Cezary Rojewski wrote:
>
> A small set of changes to improve initialization of the audio stack on
> HDAudio devices and pair of cleanups.
>
> As the first change is the most important one here, following is the
> technical background for it:
>
> Commit
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