[PATCH v4] drm/i915/hwmon: Get rid of devm
When both hwmon and hwmon drvdata (on which hwmon depends) are device
managed resources, the expectation, on device unbind, is that hwmon will be
released before drvdata. However, in i915 there are two separate code
paths, which both release either drvdata or hwmon and either can be
released before the other. These code paths (for device unbind) are as
follows (see also the bug referenced below):
Call Trace:
release_nodes+0x11/0x70
devres_release_group+0xb2/0x110
component_unbind_all+0x8d/0xa0
component_del+0xa5/0x140
intel_pxp_tee_component_fini+0x29/0x40 [i915]
intel_pxp_fini+0x33/0x80 [i915]
i915_driver_remove+0x4c/0x120 [i915]
i915_pci_remove+0x19/0x30 [i915]
pci_device_remove+0x32/0xa0
device_release_driver_internal+0x19c/0x200
unbind_store+0x9c/0xb0
and
Call Trace:
release_nodes+0x11/0x70
devres_release_all+0x8a/0xc0
device_unbind_cleanup+0x9/0x70
device_release_driver_internal+0x1c1/0x200
unbind_store+0x9c/0xb0
This means that in i915, if use devm, we cannot gurantee that hwmon will
always be released before drvdata. Which means that we have a uaf if hwmon
sysfs is accessed when drvdata has been released but hwmon hasn't.
The only way out of this seems to be do get rid of devm_ and release/free
everything explicitly during device unbind.
v2: Change commit message and other minor code changes
v3: Cleanup from i915_hwmon_register on error (Armin Wolf)
v4: Eliminate potential static analyzer warning (Rodrigo)
Eliminate fetch_and_zero (Jani)
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10366
Reviewed-by: Rodrigo Vivi
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/i915_hwmon.c | 52 +--
1 file changed, 36 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
b/drivers/gpu/drm/i915/i915_hwmon.c
index b758fd110c20..1551a40a675e 100644
--- a/drivers/gpu/drm/i915/i915_hwmon.c
+++ b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -793,7 +793,7 @@ void i915_hwmon_register(struct drm_i915_private *i915)
if (!IS_DGFX(i915))
return;
- hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
+ hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL);
if (!hwmon)
return;
@@ -819,14 +819,12 @@ void i915_hwmon_register(struct drm_i915_private *i915)
hwm_get_preregistration_info(i915);
/* hwmon_dev points to device hwmon */
- hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat->name,
-ddat,
-_chip_info,
-hwm_groups);
- if (IS_ERR(hwmon_dev)) {
- i915->hwmon = NULL;
- return;
- }
+ hwmon_dev = hwmon_device_register_with_info(dev, ddat->name,
+ ddat,
+ _chip_info,
+ hwm_groups);
+ if (IS_ERR(hwmon_dev))
+ goto err;
ddat->hwmon_dev = hwmon_dev;
@@ -839,16 +837,38 @@ void i915_hwmon_register(struct drm_i915_private *i915)
if (!hwm_gt_is_visible(ddat_gt, hwmon_energy,
hwmon_energy_input, 0))
continue;
- hwmon_dev = devm_hwmon_device_register_with_info(dev,
ddat_gt->name,
-ddat_gt,
-
_gt_chip_info,
-NULL);
- if (!IS_ERR(hwmon_dev))
- ddat_gt->hwmon_dev = hwmon_dev;
+ hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt->name,
+ ddat_gt,
+ _gt_chip_info,
+ NULL);
+ if (IS_ERR(hwmon_dev))
+ goto err;
+
+ ddat_gt->hwmon_dev = hwmon_dev;
}
+ return;
+err:
+ i915_hwmon_unregister(i915);
}
void i915_hwmon_unregister(struct drm_i915_private *i915)
{
- fetch_and_zero(>hwmon);
+ struct i915_hwmon *hwmon = i915->hwmon;
+ struct intel_gt *gt;
+ int i;
+
+ if (!hwmon)
+ return;
+
+ for_each_gt(gt, i915, i)
+ if (hwmon->ddat_gt[i].hwmon_dev)
+ hwmon_device_unregister(hwmon->ddat_gt[i].hwmon_dev);
+
+ if (hwmon->ddat.hwmon_dev)
+ hwmon_device_unregister(hwmon->ddat.hwmon_dev);
+
+ mutex_destroy(>hwmon_lock);
+
+ kfree(i915->hwmon);
+ i915->hwmon = NULL;
}
--
2.41.0
RE: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
> -Original Message-
> From: Ville Syrjälä
> Sent: Tuesday, April 16, 2024 6:25 PM
> To: Kandpal, Suraj
> Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar
> ; Shankar, Uma
> ; Nautiyal, Ankit K ;
> Bhadane, Dnyaneshwar
> Subject: Re: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
>
> On Tue, Apr 16, 2024 at 12:57:33PM +0530, Suraj Kandpal wrote:
> > Add SCLKGATE_DIS register and it's register definition which will be
> > used the next patch.
> >
> > Signed-off-by: Suraj Kandpal
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 3f34efcd7d6c..beec91a2f493
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6250,6 +6250,10 @@ enum skl_power_gate {
> > #define SFUSE_STRAP_DDIC_DETECTED (1 << 1)
> > #define SFUSE_STRAP_DDID_DETECTED (1 << 0)
> >
> > +/* SCLKGATE_DIS */
> > +#define SCLKGATE_DIS _MMIO(0xc2014)
>
> That address is SFUSE_STRAP
>
Hi Ville had noticed that fixed it along with Jani's other comments
https://patchwork.freedesktop.org/series/132495/
Regards,
Suraj Kandpal
> > +#define DPLS_GATING_DISABLE REG_BIT(29)
> > +
> > #define WM_MISC_MMIO(0x45260)
> > #define WM_MISC_DATA_PARTITION_5_6(1 << 0)
> >
> > --
> > 2.43.2
>
> --
> Ville Syrjälä
> Intel
RE: [5/6] drm/i915/dp: Enable AUX based backlight for HDR
> -Original Message-
> From: Sebastian Wick
> Sent: Tuesday, April 16, 2024 7:10 PM
> To: Kandpal, Suraj
> Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar
> ; Shankar, Uma
> ; Nautiyal, Ankit K ;
> Murthy, Arun R ; Nikula, Jani
> ; Kumar, Naveen1
> Subject: Re: [5/6] drm/i915/dp: Enable AUX based backlight for HDR
>
> On Thu, Apr 11, 2024 at 11:39:24AM +0530, Suraj Kandpal wrote:
> > As of now whenerver HDR is switched on we use the PWM to change the
> > backlight as opposed to AUX based backlight changes in terms of nits.
> > This patch writes to the appropriate DPCD registers to enable aux
> > based backlight using values in nits.
> >
> > --v2
> > -Fix max_cll and max_fall assignment [Jani] -Fix the size sent in
> > drm_dpcd_write [Jani]
> >
> > --v3
> > -Content Luminance needs to be sent only for pre-ICL after that it is
> > directly picked up from hdr metadata [Ville]
> >
> > --v4
> > -Add checks for HDR TCON cap bits [Ville] -Check eotf of
> > hdr_output_data and sets bits base of that value.
> >
> > --v5
> > -Fix capability check bits.
> > -Check colorspace before setting BT2020
> >
> > --v6
> > -Use intel_dp_has_gamut_dip to check if we have capability to send sdp
> > [Ville] -Seprate filling of all hdr tcon related bits into it's own
> > function.
> > -Check eotf data to make sure we are in HDR mode [Sebastian]
> >
> > --v7
> > -Fix confusion function name for hdr mode check [Jani] -Fix the
> > condition which tells us if we are in HDR mode or not [Sebastian]
> >
> > Signed-off-by: Suraj Kandpal
> > ---
> > .../drm/i915/display/intel_dp_aux_backlight.c | 105
> > --
> > 1 file changed, 94 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > index b61bad218994..b13eee250dc4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > @@ -40,11 +40,6 @@
> > #include "intel_dp.h"
> > #include "intel_dp_aux_backlight.h"
> >
> > -/* TODO:
> > - * Implement HDR, right now we just implement the bare minimum to
> > bring us back into SDR mode so we
> > - * can make people's backlights work in the mean time
> > - */
> > -
> > /*
> > * DP AUX registers for Intel's proprietary HDR backlight interface. We
> > define
> > * them here since we'll likely be the only driver to ever use these.
> > @@ -127,9 +122,6 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
> > if (ret != sizeof(tcon_cap))
> > return false;
> >
> > - if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
> > - return false;
> > -
> > drm_dbg_kms(>drm, "[CONNECTOR:%d:%s] Detected %s HDR
> backlight interface version %d\n",
> > connector->base.base.id, connector->base.name,
> > is_intel_tcon_cap(tcon_cap) ? "Intel" : "unsupported",
> > tcon_cap[0]); @@ -137,6 +129,9 @@
> intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
> > if (!is_intel_tcon_cap(tcon_cap))
> > return false;
> >
> > + if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
> > + return false;
> > +
> > /*
> > * If we don't have HDR static metadata there is no way to
> > * runtime detect used range for nits based control. For now @@
> > -225,13 +220,27 @@ intel_dp_aux_hdr_set_aux_backlight(const struct
> drm_connector_state *conn_state,
> > connector->base.base.id, connector->base.name); }
> >
> > +static bool
> > +intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state) {
> > + struct hdr_output_metadata *hdr_metadata;
> > +
> > + if (!conn_state->hdr_output_metadata)
> > + return false;
> > +
> > + hdr_metadata = conn_state->hdr_output_metadata->data;
> > +
> > + return hdr_metadata->hdmi_metadata_type1.eotf ==
> > +HDMI_EOTF_SMPTE_ST2084; }
> > +
> > static void
> > intel_dp_aux_hdr_set_backlight(const struct drm_connector_state
> > *conn_state, u32 level) {
> > struct intel_connector *connector = to_intel_connector(conn_state-
> >connector);
> > struct intel_panel *panel = >panel;
> >
> > - if (panel->backlight.edp.intel.sdr_uses_aux) {
> > + if (intel_dp_in_hdr_mode(conn_state) ||
> > + panel->backlight.edp.intel.sdr_uses_aux) {
> > intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> > } else {
> > const u32 pwm_level =
> intel_backlight_level_to_pwm(connector,
> > level); @@ -240,6 +249,70 @@ intel_dp_aux_hdr_set_backlight(const
> struct drm_connector_state *conn_state, u32
> > }
> > }
> >
> > +static void
> > +intel_dp_aux_write_content_luminance(struct intel_connector *connector,
> > +struct hdr_output_metadata
> *hdr_metadata) {
> > + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
> > + struct
Re: [RFC PATCH] drm/i915: Don't reset GuC before engine reset on full GT reset
On 4/15/2024 09:44, Nirmoy Das wrote:
Currently intel_gt_reset() happens as follows:
reset_prepare() ---> Sends GDRST to GuC, GuC is in GS_MIA_IN_RESET
do_reset()
__intel_gt_reset()
*_engine_reset_prepare() -->RESET_CTL expects running
GuC
*_reset_engines()
intel_gt_init_hw() --> GuC FW loading happens, GuC comes out of
GS_MIA_IN_RESET.
Fix the above flow so that GuC reset happens after all the
engines reset is done.
Cc: John Harrison
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_reset.c | 9 --
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 42 +--
drivers/gpu/drm/i915/gt/uc/intel_uc.h | 1 +
3 files changed, 41 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index c8e9aa41fdea..9ebd68ce0c22 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -879,8 +879,11 @@ static intel_engine_mask_t reset_prepare(struct intel_gt
*gt)
intel_engine_mask_t awake = 0;
enum intel_engine_id id;
- /* For GuC mode, ensure submission is disabled before stopping ring */
- intel_uc_reset_prepare(>uc);
+ /*
+* For GuC mode, ensure submission is disabled before stopping ring.
+* Don't reset the GuC a engine reset requires GuC to be running.
These two lines appear to be mutually exclusive unless there is a test
for GuC submission being enabled, which I am not seeing. Note that
"ensure submission is disabled" means "reset the GuC".
+*/
+ intel_uc_reset_prepare_without_guc_reset(>uc);
for_each_engine(engine, gt, id) {
if (intel_engine_pm_get_if_awake(engine))
@@ -1227,6 +1230,8 @@ void intel_gt_reset(struct intel_gt *gt,
intel_overlay_reset(gt->i915);
+ /* Now that all engines are clean, Reset the GuC */
+ intel_uc_reset_prepare(>uc);
/*
* Next we need to restore the context, but we don't use those
* yet either...
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 7a63abf8f644..5feee4db2ccc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -345,7 +345,7 @@ static void __uc_fini(struct intel_uc *uc)
intel_guc_fini(>guc);
}
-static int __uc_sanitize(struct intel_uc *uc)
+static void __uc_sanitize_without_guc_reset(struct intel_uc *uc)
{
struct intel_guc *guc = >guc;
struct intel_huc *huc = >huc;
@@ -354,7 +354,11 @@ static int __uc_sanitize(struct intel_uc *uc)
intel_huc_sanitize(huc);
intel_guc_sanitize(guc);
+}
This seems like an extremely bad idea. You are wiping out all the GuC
communication structures on the host side while the GuC itself is still
executing and using those same structures.
Is the failure when doing individual engine resets or when doing a full
GT reset?
If the former, I think a better approach would be to just not reset GuC
at all (or indeed any UC) if not using GuC submission. Although, looking
at the code, I'm not seeing an engine only reset path that does nuke the
UC layers?
If it is the latter, then how/why are individual engine resets happening
in the middle of a full GT reset? Don't we just splat everything all at
once? Either way, it would be safer to split at the GT reset code layer
rather than inside the UC layer. That is, when not using GuC submission,
do the entire prepare/reset/init sequence of the UC layers as one
'atomic' operation either before the GT/engine reset or after it (or
potentially both before and after?).
John.
+static int __uc_sanitize(struct intel_uc *uc)
+{
+ __uc_sanitize_without_guc_reset(uc);
return __intel_uc_reset_hw(uc);
}
@@ -593,13 +597,7 @@ static void __uc_fini_hw(struct intel_uc *uc)
__uc_sanitize(uc);
}
-/**
- * intel_uc_reset_prepare - Prepare for reset
- * @uc: the intel_uc structure
- *
- * Preparing for full gpu reset.
- */
-void intel_uc_reset_prepare(struct intel_uc *uc)
+static void __intel_uc_reset_prepare(struct intel_uc *uc, bool reset_guc)
{
struct intel_guc *guc = >guc;
@@ -617,9 +615,35 @@ void intel_uc_reset_prepare(struct intel_uc *uc)
intel_guc_submission_reset_prepare(guc);
sanitize:
- __uc_sanitize(uc);
+ if (reset_guc)
+ __uc_sanitize(uc);
+ else
+ __uc_sanitize_without_guc_reset(uc);
}
+/**
+ * intel_uc_reset_prepare - Prepare for reset
+ * @uc: the intel_uc structure
+ *
+ * Preparing for full gpu reset.
+ */
+void intel_uc_reset_prepare(struct intel_uc *uc)
+{
+ __intel_uc_reset_prepare(uc, true);
+}
+/**
+ * intel_uc_reset_prepare_without_guc_reset - Prepare for reset but don't reset
+ * the GuC
+ * @uc: the intel_uc structure
+ *
+ * Preparing for full gpu reset.
+ */
+void
✓ Fi.CI.BAT: success for drm/i915/gt: Refactor uabi engine class/instance list creation
== Series Details == Series: drm/i915/gt: Refactor uabi engine class/instance list creation URL : https://patchwork.freedesktop.org/series/132521/ State : success == Summary == CI Bug Log - changes from CI_DRM_14591 -> Patchwork_132521v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/index.html Participating hosts (39 -> 41) -- Additional (4): fi-kbl-7567u fi-kbl-8809g fi-elk-e7500 bat-arls-3 Missing(2): fi-cfl-8109u fi-snb-2520m Known issues Here are the changes found in Patchwork_132521v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-3: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - fi-kbl-7567u: NOTRUN -> [SKIP][2] ([i915#2190]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/fi-kbl-7567u/igt@gem_huc_c...@huc-copy.html - fi-kbl-8809g: NOTRUN -> [SKIP][3] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-7567u: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/fi-kbl-7567u/igt@gem_lmem_swapp...@basic.html - fi-kbl-8809g: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/fi-kbl-8809g/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-9: [PASS][6] -> [FAIL][7] ([i915#10378]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14591/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][8] ([i915#10213]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#4083]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][10] ([i915#10197] / [i915#10211] / [i915#4079]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][11] ([i915#10196] / [i915#4077]) +2 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-arls-3: NOTRUN -> [SKIP][12] ([i915#10206] / [i915#4079]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-arls-3: NOTRUN -> [SKIP][13] ([i915#10209]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@active: - fi-bsw-n3050: [PASS][14] -> [DMESG-FAIL][15] ([i915#10676]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14591/fi-bsw-n3050/igt@i915_selftest@l...@active.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/fi-bsw-n3050/igt@i915_selftest@l...@active.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - bat-arls-3: NOTRUN -> [SKIP][16] ([i915#10200]) +9 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@kms_addfb_ba...@addfb25-x-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10202]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_dsc@dsc-basic: - bat-arls-3: NOTRUN -> [SKIP][18] ([i915#9886]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/bat-arls-3/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - fi-kbl-7567u: NOTRUN -> [SKIP][19] +11 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132521v1/fi-kbl-7567u/igt@kms_force_connector_ba...@force-load-detect.html - fi-kbl-8809g: NOTRUN -> [SKIP][20] +30 other tests skip [20]:
✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Refactor uabi engine class/instance list creation
== Series Details == Series: drm/i915/gt: Refactor uabi engine class/instance list creation URL : https://patchwork.freedesktop.org/series/132521/ State : warning == Summary == Error: dim checkpatch failed 2f4e662264cc drm/i915/gt: Refactor uabi engine class/instance list creation -:54: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #54: FILE: drivers/gpu/drm/i915/gt/intel_engine_user.c:233: + GEM_BUG_ON(uabi_class >= ARRAY_SIZE(class_instance)); -:70: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #70: FILE: drivers/gpu/drm/i915/gt/intel_engine_user.c:247: + GEM_BUG_ON(uabi_class >= total: 0 errors, 2 warnings, 0 checks, 56 lines checked
✓ Fi.CI.BAT: success for drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
== Series Details ==
Series: drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
URL : https://patchwork.freedesktop.org/series/131386/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14591 -> Patchwork_131386v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/index.html
Participating hosts (39 -> 34)
--
Additional (2): fi-kbl-7567u bat-kbl-2
Missing(7): bat-dg1-7 fi-bsw-n3050 fi-apl-guc fi-snb-2520m fi-cfl-8109u
bat-dg2-11 bat-jsl-1
Known issues
Here are the changes found in Patchwork_131386v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@info:
- bat-kbl-2: NOTRUN -> [SKIP][1] ([i915#1849])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/bat-kbl-2/igt@fb...@info.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-7567u: NOTRUN -> [SKIP][2] ([i915#2190])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/fi-kbl-7567u/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-7567u: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/fi-kbl-7567u/igt@gem_lmem_swapp...@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][4] +39 other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-kbl-7567u: NOTRUN -> [SKIP][5] +11 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/fi-kbl-7567u/igt@kms_force_connector_ba...@force-load-detect.html
Possible fixes
* igt@i915_selftest@live@execlists:
- bat-adls-6: [TIMEOUT][6] ([i915#10795]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14591/bat-adls-6/igt@i915_selftest@l...@execlists.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/bat-adls-6/igt@i915_selftest@l...@execlists.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10435]: https://gitlab.freedesktop.org/drm/intel/issues/10435
[i915#10795]: https://gitlab.freedesktop.org/drm/intel/issues/10795
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
Build changes
-
* Linux: CI_DRM_14591 -> Patchwork_131386v2
CI-20190529: 20190529
CI_DRM_14591: 6eb009a883a7ae925b3b0f0363b64a026bb4333a @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7809: 3a71f659700859cab49b8e05a198ba18a5cbd24a @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_131386v2: 6eb009a883a7ae925b3b0f0363b64a026bb4333a @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
f796b82d062e drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates
c0632c3ed743 drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports
1ac53dd2d610 drm/dp_mst: Add drm_dp_mst_aux_for_parent()
a2cf3329ac68 drm/dp_mst: Factor out drm_dp_mst_port_is_logical()
a1727e858c02 drm/dp: Add drm_dp_uhbr_channel_coding_supported()
e7e6403dbb1d drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit
085cd830e1b2 drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
5211a42a485e drm/i915/dp_mst: Account for channel coding efficiency in the DSC
DPT bpp limit
a91633a13451 drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp
07caca67f93f drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp
limit
9b372aec4ebb drm/i915/dp: Fix DSC line buffer depth programming
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131386v2/index.html
[PATCH] drm/i915/gt: Refactor uabi engine class/instance list creation
For the upcoming changes we need a cleaner way to build the list
of uabi engines.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
Hi,
just sending this patch to unburden the coming series from this
single patch inherited from a previously sent series.
Andi
drivers/gpu/drm/i915/gt/intel_engine_user.c | 29 -
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 833987015b8b..11cc06c0c785 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -203,7 +203,7 @@ static void engine_rename(struct intel_engine_cs *engine,
const char *name, u16
void intel_engines_driver_register(struct drm_i915_private *i915)
{
- u16 name_instance, other_instance = 0;
+ u16 class_instance[I915_LAST_UABI_ENGINE_CLASS + 2] = { };
struct legacy_ring ring = {};
struct list_head *it, *next;
struct rb_node **p, *prev;
@@ -214,6 +214,8 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
prev = NULL;
p = >uabi_engines.rb_node;
list_for_each_safe(it, next, ) {
+ u16 uabi_class;
+
struct intel_engine_cs *engine =
container_of(it, typeof(*engine), uabi_list);
@@ -222,15 +224,14 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
- if (engine->uabi_class == I915_NO_UABI_CLASS) {
- name_instance = other_instance++;
- } else {
- GEM_BUG_ON(engine->uabi_class >=
- ARRAY_SIZE(i915->engine_uabi_class_count));
- name_instance =
-
i915->engine_uabi_class_count[engine->uabi_class]++;
- }
- engine->uabi_instance = name_instance;
+
+ if (engine->uabi_class == I915_NO_UABI_CLASS)
+ uabi_class = I915_LAST_UABI_ENGINE_CLASS + 1;
+ else
+ uabi_class = engine->uabi_class;
+
+ GEM_BUG_ON(uabi_class >= ARRAY_SIZE(class_instance));
+ engine->uabi_instance = class_instance[uabi_class]++;
/*
* Replace the internal name with the final user and log facing
@@ -238,11 +239,15 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
*/
engine_rename(engine,
intel_engine_class_repr(engine->class),
- name_instance);
+ engine->uabi_instance);
- if (engine->uabi_class == I915_NO_UABI_CLASS)
+ if (uabi_class > I915_LAST_UABI_ENGINE_CLASS)
continue;
+ GEM_BUG_ON(uabi_class >=
+ ARRAY_SIZE(i915->engine_uabi_class_count));
+ i915->engine_uabi_class_count[uabi_class]++;
+
rb_link_node(>uabi_node, prev, p);
rb_insert_color(>uabi_node, >uabi_engines);
--
2.43.0
✗ Fi.CI.SPARSE: warning for drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
== Series Details == Series: drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2) URL : https://patchwork.freedesktop.org/series/131386/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
== Series Details ==
Series: drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
URL : https://patchwork.freedesktop.org/series/131386/
State : warning
== Summary ==
Error: dim checkpatch failed
5724c674a1ec drm/i915/dp: Fix DSC line buffer depth programming
14de0d36c5c7 drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp
limit
4ddc14d15b02 drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp
8917c224c3d3 drm/i915/dp_mst: Account for channel coding efficiency in the DSC
DPT bpp limit
c7b0c9026fa2 drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
15320ff69e03 drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit
106281453d04 drm/dp: Add drm_dp_uhbr_channel_coding_supported()
e6289b512704 drm/dp_mst: Factor out drm_dp_mst_port_is_logical()
de54f2b85a15 drm/dp_mst: Add drm_dp_mst_aux_for_parent()
4e68979f4124 drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports
e98b5e65b7ef drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates
-:37: WARNING:LONG_LINE_COMMENT: line length of 109 exceeds 100 columns
#37: FILE: drivers/gpu/drm/display/drm_dp_helper.c:2284:
+ /* MediaTek panels (at least in U3224KBA) require DSC for modes with a
short HBLANK on UHBR links. */
-:38: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#38: FILE: drivers/gpu/drm/display/drm_dp_helper.c:2285:
+ { OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false,
BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
total: 0 errors, 2 warnings, 0 checks, 55 lines checked
[PATCH v2 07/11] drm/dp: Add drm_dp_uhbr_channel_coding_supported()
Factor out a function to check for UHBR channel coding support used by a
follow-up patch in the patchset.
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Reviewed-by: Manasi Navare
Acked-by: Maarten Lankhorst
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
include/drm/display/drm_dp_helper.h | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 23808e9d41d5d..41127069b55e4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -225,7 +225,7 @@ static void intel_dp_set_dpcd_sink_rates(struct intel_dp
*intel_dp)
* Sink rates for 128b/132b. If set, sink should support all 8b/10b
* rates and 10 Gbps.
*/
- if (intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B)
{
+ if (drm_dp_uhbr_channel_coding_supported(intel_dp->dpcd)) {
u8 uhbr_rates = 0;
BUILD_BUG_ON(ARRAY_SIZE(intel_dp->sink_rates) <
ARRAY_SIZE(dp_rates) + 3);
diff --git a/include/drm/display/drm_dp_helper.h
b/include/drm/display/drm_dp_helper.h
index baf9949ff96fc..8a64fe8d97af2 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -251,6 +251,12 @@ drm_dp_channel_coding_supported(const u8
dpcd[DP_RECEIVER_CAP_SIZE])
return dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_8B10B;
}
+static inline bool
+drm_dp_uhbr_channel_coding_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ return dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B;
+}
+
static inline bool
drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
{
--
2.43.3
[PATCH v2 11/11] drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates
Enabling the 5k@60Hz uncompressed mode on the MediaTek/Dell U3224KBA
monitor results in a blank screen, at least on MTL platforms on UHBR
link rates with some (<30) uncompressed bpp values. Enabling compression
fixes the problem, so do that for now. Windows enables DSC always if the
sink supports it and forcing it to enable the mode without compression
leads to the same problem above (which suggests a panel issue with
uncompressed mode).
The same 5k mode on non-UHBR link rates is not affected and lower
resolution modes are not affected either. The problem is similar to the
one fixed by the HBLANK expansion quirk on Synaptics hubs, with the
difference that the problematic mode has a longer HBLANK duration. Also
the monitor doesn't report supporting HBLANK expansion; either its
internal MST hub does the expansion internally - similarly to the
Synaptics hub - or the issue has another root cause, but still related
to the mode's short HBLANK duration. Enable the quirk for the monitor
adjusting the detection for the above differences.
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Tested-by: Khaled Almahallawy
Signed-off-by: Imre Deak
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 ++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 22 +
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
index 023907da98581..79a615667aab1 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2281,6 +2281,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
{ OUI(0x90, 0xCC, 0x24), DEVICE_ID_ANY, true,
BIT(DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) },
/* Synaptics DP1.4 MST hubs require DSC for some modes on which it
applies HBLANK expansion. */
{ OUI(0x90, 0xCC, 0x24), DEVICE_ID_ANY, true,
BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
+ /* MediaTek panels (at least in U3224KBA) require DSC for modes with a
short HBLANK on UHBR links. */
+ { OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false,
BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
/* Apple MacBookPro 2017 15 inch eDP Retina panel reports too low
DP_MAX_LINK_RATE */
{ OUI(0x00, 0x10, 0xfa), DEVICE_ID(101, 68, 21, 101, 98, 97), false,
BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS) },
};
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index fb5e167c3c659..71b01f7631919 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -421,15 +421,22 @@ static int mode_hblank_period_ns(const struct
drm_display_mode *mode)
static bool
hblank_expansion_quirk_needs_dsc(const struct intel_connector *connector,
-const struct intel_crtc_state *crtc_state)
+const struct intel_crtc_state *crtc_state,
+const struct link_config_limits *limits)
{
const struct drm_display_mode *adjusted_mode =
_state->hw.adjusted_mode;
+ bool is_uhbr_sink = connector->mst_port &&
+
drm_dp_uhbr_channel_coding_supported(connector->mst_port->dpcd);
+ int hblank_limit = is_uhbr_sink ? 500 : 300;
if (!connector->dp.dsc_hblank_expansion_quirk)
return false;
- if (mode_hblank_period_ns(adjusted_mode) > 300)
+ if (is_uhbr_sink && !drm_dp_is_uhbr_rate(limits->max_rate))
+ return false;
+
+ if (mode_hblank_period_ns(adjusted_mode) > hblank_limit)
return false;
return true;
@@ -445,7 +452,7 @@ adjust_limits_for_dsc_hblank_expansion_quirk(const struct
intel_connector *conne
const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
int min_bpp_x16 = limits->link.min_bpp_x16;
- if (!hblank_expansion_quirk_needs_dsc(connector, crtc_state))
+ if (!hblank_expansion_quirk_needs_dsc(connector, crtc_state, limits))
return true;
if (!dsc) {
@@ -1604,7 +1611,14 @@ static bool detect_dsc_hblank_expansion_quirk(const
struct intel_connector *conn
DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC))
return false;
- if (!(dpcd[DP_RECEIVE_PORT_0_CAP_0] & DP_HBLANK_EXPANSION_CAPABLE))
+ /*
+* UHBR (MST sink) devices requiring this quirk doesn't advertise the
+* HBLANK expansion support. Presuming that they perform HBLANK
+* expansion internally, or are affected by this issue on modes with a
+* short HBLANK for other reasons.
+*/
+ if (!drm_dp_uhbr_channel_coding_supported(dpcd) &&
+ !(dpcd[DP_RECEIVE_PORT_0_CAP_0] & DP_HBLANK_EXPANSION_CAPABLE))
return false;
drm_dbg_kms(>drm,
--
2.43.3
[PATCH v2 09/11] drm/dp_mst: Add drm_dp_mst_aux_for_parent()
Add a function to get the AUX device of the parent of an MST port, used
by a follow-up i915 patch in the patchset.
v2: Move drm_dp_mst_aux_for_parent() forward declaration to this patch
(Ankit)
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Acked-by: Maarten Lankhorst
Signed-off-by: Imre Deak
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 16
include/drm/display/drm_dp_mst_helper.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 46b99d5fe0086..3577786b5db2c 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -6010,6 +6010,22 @@ static bool drm_dp_mst_is_virtual_dpcd(struct
drm_dp_mst_port *port)
return false;
}
+/**
+ * drm_dp_mst_aux_for_parent() - Get the AUX device for an MST port's parent
+ * @port: MST port whose parent's AUX device is returned
+ *
+ * Return the AUX device for @port's parent or NULL if port's parent is the
+ * root port.
+ */
+struct drm_dp_aux *drm_dp_mst_aux_for_parent(struct drm_dp_mst_port *port)
+{
+ if (!port->parent || !port->parent->port_parent)
+ return NULL;
+
+ return >parent->port_parent->aux;
+}
+EXPORT_SYMBOL(drm_dp_mst_aux_for_parent);
+
/**
* drm_dp_mst_dsc_aux_for_port() - Find the correct aux for DSC
* @port: The port to check. A leaf of the MST tree with an attached display.
diff --git a/include/drm/display/drm_dp_mst_helper.h
b/include/drm/display/drm_dp_mst_helper.h
index f00e32b0315d7..3546b58a121bc 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -954,6 +954,7 @@ bool drm_dp_mst_port_is_logical(struct drm_dp_mst_port
*port)
return port->port_num >= DP_MST_LOGICAL_PORT_0;
}
+struct drm_dp_aux *drm_dp_mst_aux_for_parent(struct drm_dp_mst_port *port);
struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port);
static inline struct drm_dp_mst_topology_state *
--
2.43.3
[PATCH v2 10/11] drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports
The DPCD OUI of the logical port on a Dell UHBR monitor - on which the
AUX device is used to enable DSC - is all 0. To detect if the HBLANK
expansion quirk is required for this monitor use the OUI of the port's
parent instead.
Since in the above case the DPCD of both the logical port and the parent
port reports being a sink device (vs. branch device) type, read the
proper sink/branch OUI based on the DPCD device type.
This is required by a follow-up patch enabling the quirk for the above
Dell monitor.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 22 +++--
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 89ee80a357140..fb5e167c3c659 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1577,23 +1577,33 @@ intel_dp_mst_read_decompression_port_dsc_caps(struct
intel_dp *intel_dp,
static bool detect_dsc_hblank_expansion_quirk(const struct intel_connector
*connector)
{
struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ struct drm_dp_aux *aux = connector->dp.dsc_decompression_aux;
struct drm_dp_desc desc;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
- if (!connector->dp.dsc_decompression_aux)
+ if (!aux)
return false;
- if (drm_dp_read_desc(connector->dp.dsc_decompression_aux,
-, true) < 0)
+ /*
+* A logical port's OUI (at least for affected sinks) is all 0, so
+* instead of that the parent port's OUI is used for identification.
+*/
+ if (drm_dp_mst_port_is_logical(connector->port)) {
+ aux = drm_dp_mst_aux_for_parent(connector->port);
+ if (!aux)
+ aux = >mst_port->aux;
+ }
+
+ if (drm_dp_read_dpcd_caps(aux, dpcd) < 0)
+ return false;
+
+ if (drm_dp_read_desc(aux, , drm_dp_is_branch(dpcd)) < 0)
return false;
if (!drm_dp_has_quirk(,
DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC))
return false;
- if (drm_dp_read_dpcd_caps(connector->dp.dsc_decompression_aux, dpcd) <
0)
- return false;
-
if (!(dpcd[DP_RECEIVE_PORT_0_CAP_0] & DP_HBLANK_EXPANSION_CAPABLE))
return false;
--
2.43.3
[PATCH v2 08/11] drm/dp_mst: Factor out drm_dp_mst_port_is_logical()
Factor out a function to check if an MST port is logical, used by a
follow-up i915 patch in the patchset.
v2: Move drm_dp_mst_aux_for_parent() forward declaration to the next
patch. (Ankit)
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Acked-by: Maarten Lankhorst
Signed-off-by: Imre Deak
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 6 +++---
include/drm/display/drm_dp_mst_helper.h | 6 ++
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index c193be3577f7a..46b99d5fe0086 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -2274,7 +2274,7 @@ drm_dp_mst_port_add_connector(struct drm_dp_mst_branch
*mstb,
if (port->pdt != DP_PEER_DEVICE_NONE &&
drm_dp_mst_is_end_device(port->pdt, port->mcs) &&
- port->port_num >= DP_MST_LOGICAL_PORT_0)
+ drm_dp_mst_port_is_logical(port))
port->cached_edid = drm_edid_read_ddc(port->connector,
>aux.ddc);
@@ -4219,7 +4219,7 @@ drm_dp_mst_detect_port(struct drm_connector *connector,
case DP_PEER_DEVICE_SST_SINK:
ret = connector_status_connected;
/* for logical ports - cache the EDID */
- if (port->port_num >= DP_MST_LOGICAL_PORT_0 &&
!port->cached_edid)
+ if (drm_dp_mst_port_is_logical(port) && !port->cached_edid)
port->cached_edid = drm_edid_read_ddc(connector,
>aux.ddc);
break;
case DP_PEER_DEVICE_DP_LEGACY_CONV:
@@ -5983,7 +5983,7 @@ static bool drm_dp_mst_is_virtual_dpcd(struct
drm_dp_mst_port *port)
return false;
/* Virtual DP Sink (Internal Display Panel) */
- if (port->port_num >= 8)
+ if (drm_dp_mst_port_is_logical(port))
return true;
/* DP-to-HDMI Protocol Converter */
diff --git a/include/drm/display/drm_dp_mst_helper.h
b/include/drm/display/drm_dp_mst_helper.h
index cbcb49cb6a460..f00e32b0315d7 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -948,6 +948,12 @@ int __must_check drm_dp_mst_root_conn_atomic_check(struct
drm_connector_state *n
void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port);
void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port);
+static inline
+bool drm_dp_mst_port_is_logical(struct drm_dp_mst_port *port)
+{
+ return port->port_num >= DP_MST_LOGICAL_PORT_0;
+}
+
struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port);
static inline struct drm_dp_mst_topology_state *
--
2.43.3
[PATCH v2 06/11] drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit
Instead of checking each compressed bpp value against the maximum
DSC/DPT bpp, simplify things by calculating the maximum bpp upfront and
limiting the range of bpps looped over using this maximum.
While at it add a comment about the origin of the DSC/DPT bpp limit.
Bspec: 49259, 68912
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 76 ++---
1 file changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 847e264e5bb8b..89ee80a357140 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -51,43 +51,39 @@
#include "intel_vdsc.h"
#include "skl_scaler.h"
-static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int
bpp,
- const struct drm_display_mode
*adjusted_mode,
- struct intel_crtc_state *crtc_state,
- bool dsc)
+static int intel_dp_mst_max_dpt_bpp(const struct intel_crtc_state *crtc_state,
+ bool dsc)
{
- if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 20 && dsc) {
- int output_bpp = bpp;
- int symbol_clock =
intel_dp_link_symbol_clock(crtc_state->port_clock);
- /*
-* Bspec/49259 suggests that the FEC overhead needs to be
-* applied here, though HW people claim that neither this FEC
-* or any other overhead is applicable here (that is the actual
-* available_bw is just symbol_clock * 72). However based on
-* testing on MTL-P the
-* - DELL U3224KBA display
-* - Unigraf UCD-500 CTS test sink
-* devices the
-* - 5120x2880/995.59Mhz
-* - 6016x3384/1357.23Mhz
-* - 6144x3456/1413.39Mhz
-* modes (all which had a DPT limit on the above devices),
-* both the channel coding efficiency and an additional 3%
-* overhead needs to be accounted for.
-*/
- int available_bw = mul_u32_u32(symbol_clock * 72,
-
drm_dp_bw_channel_coding_efficiency(true)) /
- 103;
+ struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ const struct drm_display_mode *adjusted_mode =
+ _state->hw.adjusted_mode;
- if (output_bpp * adjusted_mode->crtc_clock >
- available_bw) {
- drm_dbg_kms(>drm, "UHBR check failed(required bw
%d available %d)\n",
- output_bpp * adjusted_mode->crtc_clock,
available_bw);
- return -EINVAL;
- }
- }
+ if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(i915) >= 20 || !dsc)
+ return INT_MAX;
- return 0;
+ /*
+* DSC->DPT interface width:
+* ICL-MTL: 72 bits (each branch has 72 bits, only left branch is
used)
+* LNL+:144 bits (not a bottleneck in any config)
+*
+* Bspec/49259 suggests that the FEC overhead needs to be
+* applied here, though HW people claim that neither this FEC
+* or any other overhead is applicable here (that is the actual
+* available_bw is just symbol_clock * 72). However based on
+* testing on MTL-P the
+* - DELL U3224KBA display
+* - Unigraf UCD-500 CTS test sink
+* devices the
+* - 5120x2880/995.59Mhz
+* - 6016x3384/1357.23Mhz
+* - 6144x3456/1413.39Mhz
+* modes (all which had a DPT limit on the above devices),
+* both the channel coding efficiency and an additional 3%
+* overhead needs to be accounted for.
+*/
+ return
div64_u64(mul_u32_u32(intel_dp_link_symbol_clock(crtc_state->port_clock) * 72,
+drm_dp_bw_channel_coding_efficiency(true)),
+mul_u32_u32(adjusted_mode->crtc_clock, 103));
}
static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state,
@@ -175,6 +171,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
const struct drm_display_mode *adjusted_mode =
_state->hw.adjusted_mode;
int bpp, slots = -EINVAL;
+ int max_dpt_bpp;
int ret = 0;
mst_state = drm_atomic_get_mst_topology_state(state,
_dp->mst_mgr);
@@ -195,6 +192,13 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
crtc_state->port_clock,
crtc_state->lane_count);
+
[PATCH v2 03/11] drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp
The DSC DPT bpp limit check should only fail if the available DPT BW is
less than the required BW, fix the check accordingly.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 196eeead8cf02..58eb6bf33c92e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -60,7 +60,7 @@ static int intel_dp_mst_check_constraints(struct
drm_i915_private *i915, int bpp
int output_bpp = bpp;
int symbol_clock =
intel_dp_link_symbol_clock(crtc_state->port_clock);
- if (output_bpp * adjusted_mode->crtc_clock >=
+ if (output_bpp * adjusted_mode->crtc_clock >
symbol_clock * 72) {
drm_dbg_kms(>drm, "UHBR check failed(required bw
%d available %d)\n",
output_bpp * adjusted_mode->crtc_clock,
symbol_clock * 72);
--
2.43.3
[PATCH v2 04/11] drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT bpp limit
The DSC DPT interface BW limit check should take into account the link
clock's (aka DDI clock in bspec) channel coding efficiency overhead.
Bspec suggests that the FEC overhead needs to be applied, however HW
people claim this isn't the case, nor is any overhead applicable.
However based on testing various 5k/6k modes both on the DELL U3224KBA
monitor and the Unigraf UCD-500 CTS test device, both the channel coding
efficiency (which includes the FEC overhead) and an additional 3%
overhead must be accounted for to get these modes working.
Bspec: 49259
v2:
- Apply an additional 3% overhead, add a commit log and code comment
about these overheads and the relation to the Bspec BW limit formula.
Reviewed-by: Ankit Nautiyal (v1)
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 23 +++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 58eb6bf33c92e..0448cc343a33f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -59,11 +59,30 @@ static int intel_dp_mst_check_constraints(struct
drm_i915_private *i915, int bpp
if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 14 && dsc) {
int output_bpp = bpp;
int symbol_clock =
intel_dp_link_symbol_clock(crtc_state->port_clock);
+ /*
+* Bspec/49259 suggests that the FEC overhead needs to be
+* applied here, though HW people claim that neither this FEC
+* or any other overhead is applicable here (that is the actual
+* available_bw is just symbol_clock * 72). However based on
+* testing on MTL-P the
+* - DELL U3224KBA display
+* - Unigraf UCD-500 CTS test sink
+* devices the
+* - 5120x2880/995.59Mhz
+* - 6016x3384/1357.23Mhz
+* - 6144x3456/1413.39Mhz
+* modes (all which had a DPT limit on the above devices),
+* both the channel coding efficiency and an additional 3%
+* overhead needs to be accounted for.
+*/
+ int available_bw = mul_u32_u32(symbol_clock * 72,
+
drm_dp_bw_channel_coding_efficiency(true)) /
+ 103;
if (output_bpp * adjusted_mode->crtc_clock >
- symbol_clock * 72) {
+ available_bw) {
drm_dbg_kms(>drm, "UHBR check failed(required bw
%d available %d)\n",
- output_bpp * adjusted_mode->crtc_clock,
symbol_clock * 72);
+ output_bpp * adjusted_mode->crtc_clock,
available_bw);
return -EINVAL;
}
}
--
2.43.3
[PATCH v2 05/11] drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
The DPT/DSC bpp limit should be accounted for on MTL platforms as well,
do so.
Bspec: 49259
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0448cc343a33f..847e264e5bb8b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -56,7 +56,7 @@ static int intel_dp_mst_check_constraints(struct
drm_i915_private *i915, int bpp
struct intel_crtc_state *crtc_state,
bool dsc)
{
- if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 14 && dsc) {
+ if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 20 && dsc) {
int output_bpp = bpp;
int symbol_clock =
intel_dp_link_symbol_clock(crtc_state->port_clock);
/*
--
2.43.3
[PATCH v2 02/11] drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limit
The expected link symbol clock unit when calculating the DSC DPT bpp
limit is kSymbols/sec, aligning with the dotclock's kPixels/sec unit
based on the crtc clock. As opposed to this port_clock is used - which
has a 10 kbits/sec unit - with the resulting symbol clock in 10
kSymbols/sec units (disregarding the rounding error for the 13.5Gbps
rate). Fix the calculation using the expected 10x factor.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index d43617734009c..196eeead8cf02 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -58,8 +58,7 @@ static int intel_dp_mst_check_constraints(struct
drm_i915_private *i915, int bpp
{
if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 14 && dsc) {
int output_bpp = bpp;
- /* DisplayPort 2 128b/132b, bits per lane is always 32 */
- int symbol_clock = crtc_state->port_clock / 32;
+ int symbol_clock =
intel_dp_link_symbol_clock(crtc_state->port_clock);
if (output_bpp * adjusted_mode->crtc_clock >=
symbol_clock * 72) {
--
2.43.3
[PATCH v2 01/11] drm/i915/dp: Fix DSC line buffer depth programming
Fix the calculation of the DSC line buffer depth. This is limited both
by the source's and sink's maximum line buffer depth, but the former one
was not taken into account. On all Intel platform's the source's maximum
buffer depth is 13, so the overall limit is simply the minimum of the
source/sink's limit, regardless of the DSC version.
This leaves the DSI DSC line buffer depth calculation as-is, trusting
VBT.
On DSC version 1.2 for sinks reporting a maximum line buffer depth of 16
the line buffer depth was incorrectly programmed as 0, leading to a
corruption in color gradients / lines on the decompressed screen image.
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Reviewed-by: Manasi Navare
Acked-by: Maarten Lankhorst
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 16 ++--
include/drm/display/drm_dsc.h | 3 ---
2 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 163da48bc4065..23808e9d41d5d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -89,6 +89,9 @@
#define DP_DSC_MAX_ENC_THROUGHPUT_034
#define DP_DSC_MAX_ENC_THROUGHPUT_140
+/* Max DSC line buffer depth supported by HW. */
+#define INTEL_DP_DSC_MAX_LINE_BUF_DEPTH13
+
/* DP DSC FEC Overhead factor in ppm = 1/(0.972261) = 1.028530 */
#define DP_DSC_FEC_OVERHEAD_FACTOR 1028530
@@ -1705,7 +1708,6 @@ static int intel_dp_dsc_compute_params(const struct
intel_connector *connector,
{
struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct drm_dsc_config *vdsc_cfg = _state->dsc.config;
- u8 line_buf_depth;
int ret;
/*
@@ -1734,20 +1736,14 @@ static int intel_dp_dsc_compute_params(const struct
intel_connector *connector,
connector->dp.dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP -
DP_DSC_SUPPORT] &
DP_DSC_RGB;
- line_buf_depth = drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd);
- if (!line_buf_depth) {
+ vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH,
+
drm_dp_dsc_sink_line_buf_depth(connector->dp.dsc_dpcd));
+ if (!vdsc_cfg->line_buf_depth) {
drm_dbg_kms(>drm,
"DSC Sink Line Buffer Depth invalid\n");
return -EINVAL;
}
- if (vdsc_cfg->dsc_version_minor == 2)
- vdsc_cfg->line_buf_depth = (line_buf_depth ==
DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
- DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
- else
- vdsc_cfg->line_buf_depth = (line_buf_depth >
DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
- DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
-
vdsc_cfg->block_pred_enable =
connector->dp.dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT -
DP_DSC_SUPPORT] &
DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
diff --git a/include/drm/display/drm_dsc.h b/include/drm/display/drm_dsc.h
index bc90273d06a62..bbbe7438473d3 100644
--- a/include/drm/display/drm_dsc.h
+++ b/include/drm/display/drm_dsc.h
@@ -40,9 +40,6 @@
#define DSC_PPS_RC_RANGE_MINQP_SHIFT 11
#define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6
#define DSC_PPS_NATIVE_420_SHIFT 1
-#define DSC_1_2_MAX_LINEBUF_DEPTH_BITS 16
-#define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0
-#define DSC_1_1_MAX_LINEBUF_DEPTH_BITS 13
/**
* struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
--
2.43.3
[PATCH v2 00/11] drm/i915/dp: Few MTL/DSC and a UHBR monitor fix
This is v2 of [1], after additional testing on the DELL U3224KBA and Unigraf UCD-500 CTS devices and based on that adding a 3% overhead to DPT/DSC BW limit calculation in patch 4 to fix a 6k mode on both of these devices. Cc: Ankit Nautiyal [1] https://lore.kernel.org/all/20240320201152.3487892-1-imre.d...@intel.com Imre Deak (11): drm/i915/dp: Fix DSC line buffer depth programming drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limit drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT bpp limit drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit drm/dp: Add drm_dp_uhbr_channel_coding_supported() drm/dp_mst: Factor out drm_dp_mst_port_is_logical() drm/dp_mst: Add drm_dp_mst_aux_for_parent() drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates drivers/gpu/drm/display/drm_dp_helper.c | 2 + drivers/gpu/drm/display/drm_dp_mst_topology.c | 22 +++- drivers/gpu/drm/i915/display/intel_dp.c | 18 ++-- drivers/gpu/drm/i915/display/intel_dp_mst.c | 102 -- include/drm/display/drm_dp_helper.h | 6 ++ include/drm/display/drm_dp_mst_helper.h | 7 ++ include/drm/display/drm_dsc.h | 3 - 7 files changed, 113 insertions(+), 47 deletions(-) -- 2.43.3
[linux-next:master] BUILD REGRESSION 66e4190e92ce0e4a50b2f6be0e5f5b2e47e072f4
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 66e4190e92ce0e4a50b2f6be0e5f5b2e47e072f4 Add linux-next specific files for 20240416 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202404161933.izfqz32k-...@intel.com https://lore.kernel.org/oe-kbuild-all/202404170348.thxrbof1-...@intel.com Error/Warning: (recently discovered and may have been fixed) arch/arc/include/asm/cmpxchg.h:50:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration] arch/mips/sgi-ip27/ip27-irq.c:280:13: warning: unused variable 'i' [-Wunused-variable] netdev.c:(.text+0x2288): undefined reference to `page_pool_create' netdev.c:(.text+0x378): undefined reference to `page_pool_alloc_pages' Error/Warning ids grouped by kconfigs: gcc_recent_errors |-- alpha-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- alpha-randconfig-r112-20240416 | `-- kernel-bpf-verifier.c:sparse:sparse:cast-truncates-bits-from-constant-value-(fffc-becomes-) |-- arc-allmodconfig | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arc-allnoconfig | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arc-allyesconfig | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arc-defconfig | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arc-nsimosci_hs_smp_defconfig | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arc-randconfig-001-20240416 | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arc-randconfig-002-20240416 | `-- arch-arc-include-asm-cmpxchg.h:error:implicit-declaration-of-function-cmpxchg_emu_u8 |-- arm-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- arm-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- csky-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- csky-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- i386-randconfig-141-20240416 | |-- drivers-pwm-core.c-pwm_cdev_ioctl()-warn:possible-spectre-second-half.-pwm | `-- drivers-pwm-core.c-pwm_cdev_ioctl()-warn:potential-spectre-issue-cdata-pwm-r |-- loongarch-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- loongarch-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- microblaze-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- microblaze-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- mips-ip27_defconfig | `-- arch-mips-sgi-ip27-ip27-irq.c:warning:unused-variable-i |-- openrisc-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes
Re: [PATCH] drm/dp: correct struct member name in documentation
On Thu, Apr 11, 2024 at 12:55:29PM -0400, Golani, Mitulkumar Ajitkumar wrote:
>
>
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Wednesday, April 10, 2024 9:49 PM
> > To: Golani, Mitulkumar Ajitkumar ;
> > tzimmerm...@suse.de; mrip...@kernel.org;
> > maarten.lankho...@linux.intel.com
> > Cc: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
> > Nautiyal,
> > Ankit K ; Nikula, Jani ;
> > s...@canb.auug.org.au
> > Subject: Re: [PATCH] drm/dp: correct struct member name in documentation
> >
> > On Fri, Apr 05, 2024 at 12:21:59PM +0530, Mitul Golani wrote:
> > > Correct struct member name to 'mode' instead of 'operation mode'
> > > in 'drm_dp_as_sdp' structure description.
> > >
> > > Fixes: 0bbb8f594e33 ("drm/dp: Add Adaptive Sync SDP logging")
> >
> > Probably good to avoid this 'Fixes:' tag, and only use that for real code
> > bugs.
>
> Thank you for inputs.. I understood and I will take the future note. Please
> suggest if required to update the change with new revision or we can take
> care while merge.. ?
I can remove it while merging.
I just need an ack from drm or drm-misc maintainers to merge this through
drm-intel-next.
Sima, Dave?
>
> >
> > Cc: Maarten Lankhorst
> > Cc: Maxime Ripard
> > Cc: Thomas Zimmermann
> >
> > drm-misc folks, ack to get this through drm-intel-next, where the original
> > patch
> > is?
> >
> > Thanks,
> > Rodrigo
> >
> > > Cc: Mitul Golani
> > > Cc: Ankit Nautiyal
> > > Cc: Jani Nikula
> > > Signed-off-by: Mitul Golani
> >
> > > ---
> > > include/drm/display/drm_dp_helper.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/include/drm/display/drm_dp_helper.h
> > > b/include/drm/display/drm_dp_helper.h
> > > index baf9949ff96f..6799f57d635c 100644
> > > --- a/include/drm/display/drm_dp_helper.h
> > > +++ b/include/drm/display/drm_dp_helper.h
> > > @@ -112,7 +112,7 @@ struct drm_dp_vsc_sdp {
> > > * @target_rr: Target Refresh
> > > * @duration_incr_ms: Successive frame duration increase
> > > * @duration_decr_ms: Successive frame duration decrease
> > > - * @operation_mode: Adaptive Sync Operation Mode
> > > + * @mode: Adaptive Sync Operation Mode
> > > */
> > > struct drm_dp_as_sdp {
> > > unsigned char sdp_type;
> > > --
> > > 2.25.1
> > >
Re: [PATCH v2] drm/i915/hwmon: Get rid of devm
On Tue, Apr 16, 2024 at 12:02:10PM -0700, Dixit, Ashutosh wrote:
> On Tue, 16 Apr 2024 11:55:20 -0700, Rodrigo Vivi wrote:
> >
>
> Hi Rodrigo,
>
> > > @@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private
> > > *i915)
> > >
> > > void i915_hwmon_unregister(struct drm_i915_private *i915)
> > > {
> > > - fetch_and_zero(>hwmon);
> > > + struct i915_hwmon *hwmon = fetch_and_zero(>hwmon);
> > > + struct hwm_drvdata *ddat = >ddat;
> > > + struct intel_gt *gt;
> > > + int i;
> > > +
> > > + if (!hwmon)
> > > + return;
> >
> > "that's too late", we are going to hear from static analyzer tools.
> >
> > beter to move ddat = >ddat; after this return.
>
> Yeah, I worried a lot about it :/ But then finally decided (and verified)
> that we are never actually dereferencing the (possibly NULL) pointer.
yeap, another acceptable approach is to simply remove this check entirely.
>
> But not sure about static analyzer tools, maybe you are right, I'll move
> it.
>
> > with that,
> >
> > Reviewed-by: Rodrigo Vivi
>
> Thanks a lot :)
>
> Ashutosh
>
> >
> > > +
> > > + for_each_gt(gt, i915, i) {
> > > + struct hwm_drvdata *ddat_gt = hwmon->ddat_gt + i;
> > > +
> > > + if (ddat_gt->hwmon_dev) {
> > > + hwmon_device_unregister(ddat_gt->hwmon_dev);
> > > + ddat_gt->hwmon_dev = NULL;
> > > + }
> > > + }
> > > +
> > > + if (ddat->hwmon_dev)
> > > + hwmon_device_unregister(ddat->hwmon_dev);
> > > +
> > > + mutex_destroy(>hwmon_lock);
> > > + kfree(hwmon);
> > > }
> > > --
> > > 2.41.0
> > >
Re: [PATCH] drm/i915/dg2: wait for HuC load completion before running selftests
On 4/10/2024 13:15, Daniele Ceraolo Spurio wrote:
On DG2, submissions to VCS engines tied to a gem context are blocked
until the HuC is loaded. Since some selftests do use a gem context,
wait for the HuC load to complete before running the tests to avoid
contamination.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10564
Signed-off-by: Daniele Ceraolo Spurio
Cc: John Harrison
Reviewed-by: John Harrison
---
.../gpu/drm/i915/selftests/i915_selftest.c| 36 ---
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c
b/drivers/gpu/drm/i915/selftests/i915_selftest.c
index ee79e0809a6d..fee76c1d2f45 100644
--- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
+++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
@@ -154,6 +154,30 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)
pr_warn(DRIVER_NAME "Timed out waiting for
gsc_proxy_completion!\n");
}
+static void
+__wait_gsc_huc_load_completed(struct drm_i915_private *i915)
+{
+ /* this only applies to DG2, so we only care about GT0 */
+ struct intel_huc *huc = _gt(i915)->uc.huc;
+ bool need_to_wait = (IS_ENABLED(CONFIG_INTEL_MEI_PXP) &&
+intel_huc_wait_required(huc));
+ /*
+* The GSC and PXP mei bringup depends on the kernel boot ordering, so
+* to account for the worst case scenario the HuC code waits for up to
+* 10s for the GSC driver to load and then another 5s for the PXP
+* component to bind before giving up, even though those steps normally
+* complete in less than a second from the i915 load. We match that
+* timeout here, but we expect to bail early due to the fence being
+* signalled even in a failure case, as it is extremely unlikely that
+* both components will use their full timeout.
+*/
+ unsigned long timeout_ms = 15000;
+
+ if (need_to_wait &&
+ wait_for(i915_sw_fence_done(>delayed_load.fence), timeout_ms))
+ pr_warn(DRIVER_NAME "Timed out waiting for huc load via
GSC!\n");
+}
+
static int __run_selftests(const char *name,
struct selftest *st,
unsigned int count,
@@ -228,14 +252,16 @@ int i915_mock_selftests(void)
int i915_live_selftests(struct pci_dev *pdev)
{
+ struct drm_i915_private *i915 = pdev_to_i915(pdev);
int err;
if (!i915_selftest.live)
return 0;
- __wait_gsc_proxy_completed(pdev_to_i915(pdev));
+ __wait_gsc_proxy_completed(i915);
+ __wait_gsc_huc_load_completed(i915);
- err = run_selftests(live, pdev_to_i915(pdev));
+ err = run_selftests(live, i915);
if (err) {
i915_selftest.live = err;
return err;
@@ -251,14 +277,16 @@ int i915_live_selftests(struct pci_dev *pdev)
int i915_perf_selftests(struct pci_dev *pdev)
{
+ struct drm_i915_private *i915 = pdev_to_i915(pdev);
int err;
if (!i915_selftest.perf)
return 0;
- __wait_gsc_proxy_completed(pdev_to_i915(pdev));
+ __wait_gsc_proxy_completed(i915);
+ __wait_gsc_huc_load_completed(i915);
- err = run_selftests(perf, pdev_to_i915(pdev));
+ err = run_selftests(perf, i915);
if (err) {
i915_selftest.perf = err;
return err;
Re: [PATCH v2] drm/i915/hwmon: Get rid of devm
On Tue, 16 Apr 2024 11:55:20 -0700, Rodrigo Vivi wrote:
>
Hi Rodrigo,
> > @@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private *i915)
> >
> > void i915_hwmon_unregister(struct drm_i915_private *i915)
> > {
> > - fetch_and_zero(>hwmon);
> > + struct i915_hwmon *hwmon = fetch_and_zero(>hwmon);
> > + struct hwm_drvdata *ddat = >ddat;
> > + struct intel_gt *gt;
> > + int i;
> > +
> > + if (!hwmon)
> > + return;
>
> "that's too late", we are going to hear from static analyzer tools.
>
> beter to move ddat = >ddat; after this return.
Yeah, I worried a lot about it :/ But then finally decided (and verified)
that we are never actually dereferencing the (possibly NULL) pointer.
But not sure about static analyzer tools, maybe you are right, I'll move
it.
> with that,
>
> Reviewed-by: Rodrigo Vivi
Thanks a lot :)
Ashutosh
>
> > +
> > + for_each_gt(gt, i915, i) {
> > + struct hwm_drvdata *ddat_gt = hwmon->ddat_gt + i;
> > +
> > + if (ddat_gt->hwmon_dev) {
> > + hwmon_device_unregister(ddat_gt->hwmon_dev);
> > + ddat_gt->hwmon_dev = NULL;
> > + }
> > + }
> > +
> > + if (ddat->hwmon_dev)
> > + hwmon_device_unregister(ddat->hwmon_dev);
> > +
> > + mutex_destroy(>hwmon_lock);
> > + kfree(hwmon);
> > }
> > --
> > 2.41.0
> >
Re: [PATCH v2] drm/i915/hwmon: Get rid of devm
On Mon, Apr 15, 2024 at 03:36:12PM -0700, Ashutosh Dixit wrote:
> When both hwmon and hwmon drvdata (on which hwmon depends) are device
> managed resources, the expectation, on device unbind, is that hwmon will be
> released before drvdata. However, in i915 there are two separate code
> paths, which both release either drvdata or hwmon and either can be
> released before the other. These code paths (for device unbind) are as
> follows (see also the bug referenced below):
>
> Call Trace:
> release_nodes+0x11/0x70
> devres_release_group+0xb2/0x110
> component_unbind_all+0x8d/0xa0
> component_del+0xa5/0x140
> intel_pxp_tee_component_fini+0x29/0x40 [i915]
> intel_pxp_fini+0x33/0x80 [i915]
> i915_driver_remove+0x4c/0x120 [i915]
> i915_pci_remove+0x19/0x30 [i915]
> pci_device_remove+0x32/0xa0
> device_release_driver_internal+0x19c/0x200
> unbind_store+0x9c/0xb0
>
> and
>
> Call Trace:
> release_nodes+0x11/0x70
> devres_release_all+0x8a/0xc0
> device_unbind_cleanup+0x9/0x70
> device_release_driver_internal+0x1c1/0x200
> unbind_store+0x9c/0xb0
>
> This means that in i915, if use devm, we cannot gurantee that hwmon will
> always be released before drvdata. Which means that we have a uaf if hwmon
> sysfs is accessed when drvdata has been released but hwmon hasn't.
>
> The only way out of this seems to be do get rid of devm_ and release/free
> everything explicitly during device unbind.
>
> v2: Change commit message and other minor code changes
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10366
> Signed-off-by: Ashutosh Dixit
> ---
> drivers/gpu/drm/i915/i915_hwmon.c | 41 +++
> 1 file changed, 31 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
> b/drivers/gpu/drm/i915/i915_hwmon.c
> index 8c3f443c8347..46c24b1ee6df 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -792,7 +792,7 @@ void i915_hwmon_register(struct drm_i915_private *i915)
> if (!IS_DGFX(i915))
> return;
>
> - hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
> + hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL);
> if (!hwmon)
> return;
>
> @@ -818,10 +818,10 @@ void i915_hwmon_register(struct drm_i915_private *i915)
> hwm_get_preregistration_info(i915);
>
> /* hwmon_dev points to device hwmon */
> - hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat->name,
> - ddat,
> - _chip_info,
> - hwm_groups);
> + hwmon_dev = hwmon_device_register_with_info(dev, ddat->name,
> + ddat,
> + _chip_info,
> + hwm_groups);
> if (IS_ERR(hwmon_dev)) {
> i915->hwmon = NULL;
> return;
> @@ -838,10 +838,10 @@ void i915_hwmon_register(struct drm_i915_private *i915)
> if (!hwm_gt_is_visible(ddat_gt, hwmon_energy,
> hwmon_energy_input, 0))
> continue;
>
> - hwmon_dev = devm_hwmon_device_register_with_info(dev,
> ddat_gt->name,
> - ddat_gt,
> -
> _gt_chip_info,
> - NULL);
> + hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt->name,
> + ddat_gt,
> + _gt_chip_info,
> + NULL);
> if (!IS_ERR(hwmon_dev))
> ddat_gt->hwmon_dev = hwmon_dev;
> }
> @@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private *i915)
>
> void i915_hwmon_unregister(struct drm_i915_private *i915)
> {
> - fetch_and_zero(>hwmon);
> + struct i915_hwmon *hwmon = fetch_and_zero(>hwmon);
> + struct hwm_drvdata *ddat = >ddat;
> + struct intel_gt *gt;
> + int i;
> +
> + if (!hwmon)
> + return;
"that's too late", we are going to hear from static analyzer tools.
beter to move ddat = >ddat; after this return.
with that,
Reviewed-by: Rodrigo Vivi
> +
> + for_each_gt(gt, i915, i) {
> + struct hwm_drvdata *ddat_gt = hwmon->ddat_gt + i;
> +
> + if (ddat_gt->hwmon_dev) {
> + hwmon_device_unregister(ddat_gt->hwmon_dev);
> + ddat_gt->hwmon_dev = NULL;
> + }
> + }
> +
> + if (ddat->hwmon_dev)
> + hwmon_device_unregister(ddat->hwmon_dev);
> +
> + mutex_destroy(>hwmon_lock);
> + kfree(hwmon);
> }
> --
> 2.41.0
>
Re: [PATCH v3] drm/i915/vma: Fix UAF on reopen vs destroy race
On Tue, Apr 16, 2024 at 10:09:46AM +0200, Janusz Krzysztofik wrote:
> Hi Rodrigo,
>
> On Tuesday, 16 April 2024 03:16:31 CEST Rodrigo Vivi wrote:
> > On Mon, Apr 15, 2024 at 09:53:09PM +0200, Janusz Krzysztofik wrote:
> > > We defer actually closing, unbinding and destroying a VMA until next idle
> > > point, or until the object is freed in the meantime. By postponing the
> > > unbind, we allow for the VMA to be reopened by the client, avoiding the
> > > work required to rebind the VMA.
> > >
> > > It was assumed that as long as a GT is held idle, no VMA would be reopened
> > > while we destroy them. That assumption is no longer true in multi-GT
> > > configurations, where a VMA we reopen may be handled by a GT different
> > > from the one that we already keep active via its engine while we set up
> > > an execbuf request.
> > >
> > > <4> [260.290809] [ cut here ]
> > > <4> [260.290988] list_del corruption. prev->next should be
> > > 888118c5d990, but was 888118c5a510. (prev=888118c5a510)
> > > <4> [260.291004] WARNING: CPU: 2 PID: 1143 at lib/list_debug.c:62
> > > __list_del_entry_valid_or_report+0xb7/0xe0
> > > ..
> > > <4> [260.291055] CPU: 2 PID: 1143 Comm: kms_plane Not tainted
> > > 6.9.0-rc2-CI_DRM_14524-ga25d180c6853+ #1
> > > <4> [260.291058] Hardware name: Intel Corporation Meteor Lake Client
> > > Platform/MTL-P LP5x T3 RVP, BIOS MTLPFWI1.R00.3471.D91.2401310918
> > > 01/31/2024
> > > <4> [260.291060] RIP: 0010:__list_del_entry_valid_or_report+0xb7/0xe0
> > > ...
> > > <4> [260.291087] Call Trace:
> > > <4> [260.291089]
> > > <4> [260.291124] i915_vma_reopen+0x43/0x80 [i915]
> > > <4> [260.291298] eb_lookup_vmas+0x9cb/0xcc0 [i915]
> > > <4> [260.291579] i915_gem_do_execbuffer+0xc9a/0x26d0 [i915]
> > > <4> [260.291883] i915_gem_execbuffer2_ioctl+0x123/0x2a0 [i915]
> > > ...
> > > <4> [260.292301]
> > > ...
> > > <4> [260.292506] ---[ end trace ]---
> > > <4> [260.292782] general protection fault, probably for non-canonical
> > > address 0x6b6b6b6b6b6b6ca3: [#1] PREEMPT SMP NOPTI
> > > <4> [260.303575] CPU: 2 PID: 1143 Comm: kms_plane Tainted: GW
> > > 6.9.0-rc2-CI_DRM_14524-ga25d180c6853+ #1
> > > <4> [260.313851] Hardware name: Intel Corporation Meteor Lake Client
> > > Platform/MTL-P LP5x T3 RVP, BIOS MTLPFWI1.R00.3471.D91.2401310918
> > > 01/31/2024
> > > <4> [260.326359] RIP: 0010:eb_validate_vmas+0x114/0xd80 [i915]
> > > ...
> > > <4> [260.428756] Call Trace:
> > > <4> [260.431192]
> > > <4> [639.283393] i915_gem_do_execbuffer+0xd05/0x26d0 [i915]
> > > <4> [639.305245] i915_gem_execbuffer2_ioctl+0x123/0x2a0 [i915]
> > > ...
> > > <4> [639.411134]
> > > ...
> > > <4> [639.449979] ---[ end trace ]---
> > >
> > > As soon as we start unbinding and destroying a VMA, marked it as parked,
> > > and also keep it marked as closed for the rest of its life. When a VMA
> > > to be opened occurs closed, reopen it only if not yet parked.
> > >
> > > v3: Fix misplaced brackets.
> > > v2: Since we no longer re-init the VMA closed list link on VMA park so it
> > > looks like still on a list, don't try to delete it from the list again
> > > after the VMA has been marked as parked.
> > >
> > > Fixes: b0647a5e79b1 ("drm/i915: Avoid live-lock with i915_vma_parked()")
> >
> > what about reverting that?
>
> I didn't think of that. Why you think that might be a better approach?
well, I thought of that mainly because...
>
> Anyway, that's a 4 years old patch and a few things have changed since then,
> so simple revert won't work. Moreover, I've just checked that patch was
> supposed to fix another patch, 77853186e547 ("drm/i915: Claim vma while under
> closed_lock in i915_vma_parked()"), which in turn was supposed to fix
> aa5e4453dc05 ("drm/i915/gem: Try to flush pending unbind events"), and that
> one also referenced still another, cb6c3d45f948 ("drm/i915/gem: Avoid parking
> the vma as we unbind") from December 2019, which finally wasn't a fix but an
> improvement.
... because of histories like that ^ and I was afraid of this patch here now
just put us into a different corner case.
I have a feeling that without locks there we might just hit another
race soon with the the park and only using the atomic checks.
> Then, we would have to consider new fixes alternative to at least
> some of those three, I guess.
Indeed.. I didn't think that deep on that...
> I'd rather not dig that deep, unless we invest
> in a completely new solution (e.g. backport VMA handling from xe if more
> effective while compatible to some extent?). Even then, we need a fix for
> now.
yeap, not sure if that would help. was also not designed to
the park unpark.
>
> Alternatively, we can try to revert my 1f33dc0c1189 ("drm/i915: Remove extra
> multi-gt pm-references") which was a manual revert of f56fe3e91787
> ("drm/i915:
> Fix a VMA UAF for multi-gt platform") -- a workaround that
Re: [PATCH v3 0/7] drm/i915: better high level abstraction for display
On Tue, Apr 09, 2024 at 03:26:42PM +0300, Jani Nikula wrote: > v3 of [1], and no longer an RFC. > > This is just initial plumbing, and not much in terms of usage (apart > from patch 7). We could start converting a number of places already, but > the main blocker atm is that I haven't figured out a decent solution for > the various IS_() check macros. what about convert them all to DISPLAY_VER? or perhaps with a legacy way for that like: s/IS_/IS_DISPLAY_PLATFORM where #define IS_DISPLAY_PLATFORM DISPLAY_VER(something...) btw I just noticed we need to convert DISPLAY_VER towards display rather then device pointer quickly as well. > > I'm intentionally keeping the patches small and independent, because > they could conceivably be backported to stable as dependencies, so we > don't cause a huge problem for backports. > > Anyway, we could start moving things forward with this. > > > BR, > Jani. > > > [1] https://lore.kernel.org/r/cover.1709727127.git.jani.nik...@intel.com > > > Jani Nikula (7): > drm/i915/display: add intel_display -> drm_device backpointer > drm/i915/display: add generic to_intel_display() macro > drm/i915: add generic __to_intel_display() > drm/xe/display: add generic __to_intel_display() > drm/i915/display: accept either i915 or display for feature tests > drm/i915/de: allow intel_display and drm_i915_private for de functions > drm/i915/quirks: convert struct drm_i915_private to struct > intel_display > > .../gpu/drm/i915/display/intel_backlight.c| 40 +++ > drivers/gpu/drm/i915/display/intel_ddi.c | 6 +- > drivers/gpu/drm/i915/display/intel_de.h | 102 +++--- > .../gpu/drm/i915/display/intel_display_core.h | 3 + > .../drm/i915/display/intel_display_device.c | 3 + > .../drm/i915/display/intel_display_device.h | 4 +- > .../drm/i915/display/intel_display_driver.c | 3 +- > .../drm/i915/display/intel_display_types.h| 37 +++ > drivers/gpu/drm/i915/display/intel_panel.c| 10 +- > drivers/gpu/drm/i915/display/intel_pps.c | 6 +- > drivers/gpu/drm/i915/display/intel_quirks.c | 56 +- > drivers/gpu/drm/i915/display/intel_quirks.h | 6 +- > drivers/gpu/drm/i915/i915_drv.h | 11 ++ > .../gpu/drm/xe/compat-i915-headers/i915_drv.h | 11 ++ > drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 1 + > 15 files changed, 197 insertions(+), 102 deletions(-) > > -- > 2.39.2 >
Re: [PATCH v3 7/7] drm/i915/quirks: convert struct drm_i915_private to struct intel_display
On Tue, Apr 09, 2024 at 03:26:49PM +0300, Jani Nikula wrote:
> Use struct intel_display instead of struct drm_i915_private for
> quirks. Also do drive-by conversions in call sites of intel_has_quirk().
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> .../gpu/drm/i915/display/intel_backlight.c| 40 ++---
> drivers/gpu/drm/i915/display/intel_ddi.c | 6 +-
> .../drm/i915/display/intel_display_driver.c | 3 +-
> drivers/gpu/drm/i915/display/intel_panel.c| 10 ++--
> drivers/gpu/drm/i915/display/intel_pps.c | 6 +-
> drivers/gpu/drm/i915/display/intel_quirks.c | 56 +--
> drivers/gpu/drm/i915/display/intel_quirks.h | 6 +-
> 7 files changed, 65 insertions(+), 62 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
> b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 4d4330410b4d..071668bfe5d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_backlight.c
> @@ -83,16 +83,16 @@ static u32 scale_hw_to_user(struct intel_connector
> *connector,
>
> u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32
> val)
> {
> - struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct intel_display *display = to_intel_display(connector);
> struct intel_panel *panel = >panel;
>
> - drm_WARN_ON(>drm, panel->backlight.pwm_level_max == 0);
> + drm_WARN_ON(display->drm, panel->backlight.pwm_level_max == 0);
>
> - if (i915->display.params.invert_brightness < 0)
> + if (display->params.invert_brightness < 0)
> return val;
>
> - if (i915->display.params.invert_brightness > 0 ||
> - intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) {
> + if (display->params.invert_brightness > 0 ||
> + intel_has_quirk(display, QUIRK_INVERT_BRIGHTNESS)) {
> return panel->backlight.pwm_level_max - val +
> panel->backlight.pwm_level_min;
> }
>
> @@ -126,15 +126,15 @@ u32 intel_backlight_level_to_pwm(struct intel_connector
> *connector, u32 val)
>
> u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32
> val)
> {
> - struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct intel_display *display = to_intel_display(connector);
> struct intel_panel *panel = >panel;
>
> - drm_WARN_ON_ONCE(>drm,
> + drm_WARN_ON_ONCE(display->drm,
>panel->backlight.max == 0 ||
> panel->backlight.pwm_level_max == 0);
>
> - if (i915->display.params.invert_brightness > 0 ||
> - (i915->display.params.invert_brightness == 0 &&
> - intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
> + if (display->params.invert_brightness > 0 ||
> + (display->params.invert_brightness == 0 &&
> + intel_has_quirk(display, QUIRK_INVERT_BRIGHTNESS)))
> val = panel->backlight.pwm_level_max - (val -
> panel->backlight.pwm_level_min);
>
> return scale(val, panel->backlight.pwm_level_min,
> panel->backlight.pwm_level_max,
> @@ -1642,17 +1642,17 @@ void intel_backlight_update(struct intel_atomic_state
> *state,
>
> int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe)
> {
> - struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct intel_display *display = to_intel_display(connector);
> struct intel_panel *panel = >panel;
> int ret;
>
> if (!connector->panel.vbt.backlight.present) {
> - if (intel_has_quirk(i915, QUIRK_BACKLIGHT_PRESENT)) {
> - drm_dbg_kms(>drm,
> + if (intel_has_quirk(display, QUIRK_BACKLIGHT_PRESENT)) {
> + drm_dbg_kms(display->drm,
> "[CONNECTOR:%d:%s] no backlight present per
> VBT, but present per quirk\n",
> connector->base.base.id,
> connector->base.name);
> } else {
> - drm_dbg_kms(>drm,
> + drm_dbg_kms(display->drm,
> "[CONNECTOR:%d:%s] no backlight present per
> VBT\n",
> connector->base.base.id,
> connector->base.name);
> return 0;
> @@ -1660,16 +1660,16 @@ int intel_backlight_setup(struct intel_connector
> *connector, enum pipe pipe)
> }
>
> /* ensure intel_panel has been initialized first */
> - if (drm_WARN_ON(>drm, !panel->backlight.funcs))
> + if (drm_WARN_ON(display->drm, !panel->backlight.funcs))
> return -ENODEV;
>
> /* set level and max in panel struct */
> - mutex_lock(>display.backlight.lock);
> + mutex_lock(>backlight.lock);
> ret = panel->backlight.funcs->setup(connector, pipe);
> - mutex_unlock(>display.backlight.lock);
> + mutex_unlock(>backlight.lock);
>
> if (ret) {
> - drm_dbg_kms(>drm,
Re: [PATCH v3 6/7] drm/i915/de: allow intel_display and drm_i915_private for de functions
On Tue, Apr 09, 2024 at 03:26:48PM +0300, Jani Nikula wrote:
> It would be too much noise to convert the intel_de_* functions from
> using struct drm_i915_private to struct intel_display all at once. Add
> generic wrappers using __to_intel_display() to accept both.
>
> Signed-off-by: Jani Nikula
>
> ---
>
> This was done using a cocci + shell script combo.
the conversion below seems sane.
would you mind sharing the scripts in the commit message,
so scripts could be used when porting this patch to other
trees?
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_de.h | 102 +++-
> 1 file changed, 64 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h
> b/drivers/gpu/drm/i915/display/intel_de.h
> index ba7a1c6ebc2a..a08f8ef630f3 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -10,80 +10,101 @@
> #include "i915_trace.h"
> #include "intel_uncore.h"
>
> +static inline struct intel_uncore *__to_uncore(struct intel_display *display)
> +{
> + return _i915(display->drm)->uncore;
> +}
> +
> static inline u32
> -intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
> +__intel_de_read(struct intel_display *display, i915_reg_t reg)
> {
> - return intel_uncore_read(>uncore, reg);
> + return intel_uncore_read(__to_uncore(display), reg);
> }
> +#define intel_de_read(p,...) __intel_de_read(__to_intel_display(p),
> __VA_ARGS__)
>
> static inline u8
> -intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
> +__intel_de_read8(struct intel_display *display, i915_reg_t reg)
> {
> - return intel_uncore_read8(>uncore, reg);
> + return intel_uncore_read8(__to_uncore(display), reg);
> }
> +#define intel_de_read8(p,...) __intel_de_read8(__to_intel_display(p),
> __VA_ARGS__)
>
> static inline u64
> -intel_de_read64_2x32(struct drm_i915_private *i915,
> - i915_reg_t lower_reg, i915_reg_t upper_reg)
> +__intel_de_read64_2x32(struct intel_display *display,
> +i915_reg_t lower_reg, i915_reg_t upper_reg)
> {
> - return intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
> + return intel_uncore_read64_2x32(__to_uncore(display), lower_reg,
> + upper_reg);
> }
> +#define intel_de_read64_2x32(p,...)
> __intel_de_read64_2x32(__to_intel_display(p), __VA_ARGS__)
>
> static inline void
> -intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
> +__intel_de_posting_read(struct intel_display *display, i915_reg_t reg)
> {
> - intel_uncore_posting_read(>uncore, reg);
> + intel_uncore_posting_read(__to_uncore(display), reg);
> }
> +#define intel_de_posting_read(p,...)
> __intel_de_posting_read(__to_intel_display(p), __VA_ARGS__)
>
> static inline void
> -intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
> +__intel_de_write(struct intel_display *display, i915_reg_t reg, u32 val)
> {
> - intel_uncore_write(>uncore, reg, val);
> + intel_uncore_write(__to_uncore(display), reg, val);
> }
> +#define intel_de_write(p,...) __intel_de_write(__to_intel_display(p),
> __VA_ARGS__)
>
> static inline u32
> -intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32
> set)
> +__intel_de_rmw(struct intel_display *display, i915_reg_t reg, u32 clear,
> +u32 set)
> {
> - return intel_uncore_rmw(>uncore, reg, clear, set);
> + return intel_uncore_rmw(__to_uncore(display), reg, clear, set);
> }
> +#define intel_de_rmw(p,...) __intel_de_rmw(__to_intel_display(p),
> __VA_ARGS__)
>
> static inline int
> -intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg,
> - u32 mask, u32 value, unsigned int timeout)
> +__intel_de_wait(struct intel_display *display, i915_reg_t reg,
> + u32 mask, u32 value, unsigned int timeout)
> {
> - return intel_wait_for_register(>uncore, reg, mask, value,
> timeout);
> + return intel_wait_for_register(__to_uncore(display), reg, mask, value,
> +timeout);
> }
> +#define intel_de_wait(p,...) __intel_de_wait(__to_intel_display(p),
> __VA_ARGS__)
>
> static inline int
> -intel_de_wait_fw(struct drm_i915_private *i915, i915_reg_t reg,
> - u32 mask, u32 value, unsigned int timeout)
> +__intel_de_wait_fw(struct intel_display *display, i915_reg_t reg,
> +u32 mask, u32 value, unsigned int timeout)
> {
> - return intel_wait_for_register_fw(>uncore, reg, mask, value,
> timeout);
> + return intel_wait_for_register_fw(__to_uncore(display), reg, mask,
> + value, timeout);
> }
> +#define intel_de_wait_fw(p,...) __intel_de_wait_fw(__to_intel_display(p),
> __VA_ARGS__)
>
> static inline int
> -intel_de_wait_custom(struct drm_i915_private *i915, i915_reg_t reg,
> - u32 mask, u32 value,
> -
Re: [PATCH v3 5/7] drm/i915/display: accept either i915 or display for feature tests
On Tue, Apr 09, 2024 at 03:26:47PM +0300, Jani Nikula wrote: > Use the generic __to_intel_display() to allow passing either struct > drm_i915_private * or struct intel_display * to the feature test macros. > > Unfortunately, this requires including i915_drv.h in xe display > code. This is still better than polluting the main xe_device.h or > xe_device_types.h files with the __to_intel_display() macro definition. what about just duplicating these 2 lines in a compat layer (perhaps a new temporary one?) and the only including that instead of bringing it entirely? or what else wouldbe needed? > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_display_device.h | 4 ++-- > drivers/gpu/drm/xe/display/xe_hdcp_gsc.c| 1 + > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h > b/drivers/gpu/drm/i915/display/intel_display_device.h > index 66b51de86e38..01c6a4bef179 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.h > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h > @@ -100,8 +100,8 @@ struct drm_printer; > (IS_DISPLAY_IP_RANGE((__i915), (ipver), (ipver)) && \ >IS_DISPLAY_STEP((__i915), (from), (until))) > > -#define DISPLAY_INFO(i915) ((i915)->display.info.__device_info) > -#define DISPLAY_RUNTIME_INFO(i915) (&(i915)->display.info.__runtime_info) > +#define DISPLAY_INFO(i915) > (__to_intel_display(i915)->info.__device_info) > +#define DISPLAY_RUNTIME_INFO(i915) > (&__to_intel_display(i915)->info.__runtime_info) > > #define DISPLAY_VER(i915)(DISPLAY_RUNTIME_INFO(i915)->ip.ver) > #define DISPLAY_VER_FULL(i915) > IP_VER(DISPLAY_RUNTIME_INFO(i915)->ip.ver, \ > diff --git a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c > b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c > index ac4b870f73fa..54314760f47a 100644 > --- a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c > +++ b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c > @@ -19,6 +19,7 @@ > #include "xe_map.h" > #include "xe_pm.h" > #include "xe_uc_fw.h" > +#include "i915_drv.h" > > #define HECI_MEADDRESS_HDCP 18 > > -- > 2.39.2 >
Re: [PATCH v3 4/7] drm/xe/display: add generic __to_intel_display()
On Tue, Apr 09, 2024 at 03:26:46PM +0300, Jani Nikula wrote:
> Add generic __to_intel_display() macro that accepts either struct
> xe_device * or struct intel_display *. This is to be used for
> transitional stuff that eventually needs to be converted to use struct
> intel_display *, and therefore is not part of to_intel_display().
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> index 2792a497257e..4448eda8b2a4 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> @@ -29,6 +29,17 @@
> #include "intel_runtime_pm.h"
> #include
>
> +/*
> + * Transitional macro to optionally convert struct xe_device * to struct
> + * intel_display *, also accepting the latter.
> + */
> +#define __to_intel_display(p)
> \
> + _Generic(p, \
> + const struct xe_device *: (&((const struct xe_device
> *)(p))->display), \
> + struct xe_device *: (&((struct xe_device *)(p))->display), \
> + const struct intel_display *: (p), \
> + struct intel_display *: (p))
hmmm... I thought that with our make magic we didn't need this.
but well, at least more awareness and trying to get rid of the make magic
earlier?
Reviewed-by: Rodrigo Vivi
> +
> static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
> {
> return container_of(dev, struct drm_i915_private, drm);
> --
> 2.39.2
>
Re: [PATCH v3 3/7] drm/i915: add generic __to_intel_display()
On Tue, Apr 09, 2024 at 03:26:45PM +0300, Jani Nikula wrote:
> Add generic __to_intel_display() macro that accepts either struct
> drm_i915_private * or struct intel_display *. This is to be used for
> transitional stuff that eventually needs to be converted to use struct
> intel_display *, and therefore is not part of to_intel_display().
I hope this doesn't backfire and end up delaying the conversion
like the dev_priv -> i915...
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_drv.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ee0d7d5f135d..4819f80942d3 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -357,6 +357,17 @@ struct drm_i915_private {
>*/
> };
>
> +/*
> + * Transitional macro to optionally convert struct drm_i915_private * to
> struct
> + * intel_display *, also accepting the latter.
> + */
> +#define __to_intel_display(p)
> \
> + _Generic(p, \
> + const struct drm_i915_private *: (&((const struct
> drm_i915_private *)(p))->display), \
> + struct drm_i915_private *: (&((struct drm_i915_private
> *)(p))->display), \
> + const struct intel_display *: (p), \
> + struct intel_display *: (p))
> +
> static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
> {
> return container_of(dev, struct drm_i915_private, drm);
> --
> 2.39.2
>
Re: [PATCH v3 2/7] drm/i915/display: add generic to_intel_display() macro
On Tue, Apr 09, 2024 at 03:26:44PM +0300, Jani Nikula wrote: > Convert various pointers to struct intel_display * using _Generic(). > > Add some macro magic to make adding new conversions easier, and somewhat > abstract the need to cast each generic association. The cast is required > because all associations needs to compile, regardless of the type and > the generic selection. > > The use of *p in the generic selection assignment expression removes the > need to add separate associations for const pointers. > > Note: This intentionally does *not* cover struct drm_i915_private or > struct xe_device. They are not to be used in the long run, so avoid > using this macro for them. > > Signed-off-by: Jani Nikula I also missed this. This magic is great, let move with this already Reviewed-by: Rodrigo Vivi > --- > .../drm/i915/display/intel_display_types.h| 37 +++ > 1 file changed, 37 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index 0f4bd5710796..1be98c4219b0 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -2197,4 +2197,41 @@ static inline int to_bpp_x16(int bpp) > return bpp << 4; > } > > +/* > + * Conversion functions/macros from various pointer types to struct > + * intel_display pointer. > + */ > +#define __drm_device_to_intel_display(p) \ > + (_i915(p)->display) > +#define __intel_connector_to_intel_display(p)\ > + __drm_device_to_intel_display((p)->base.dev) > +#define __intel_crtc_to_intel_display(p) \ > + __drm_device_to_intel_display((p)->base.dev) > +#define __intel_crtc_state_to_intel_display(p) \ > + __drm_device_to_intel_display((p)->uapi.crtc->dev) > +#define __intel_digital_port_to_intel_display(p) \ > + __drm_device_to_intel_display((p)->base.base.dev) > +#define __intel_dp_to_intel_display(p) \ > + __drm_device_to_intel_display(dp_to_dig_port(p)->base.base.dev) > +#define __intel_encoder_to_intel_display(p) \ > + __drm_device_to_intel_display((p)->base.dev) > +#define __intel_hdmi_to_intel_display(p) \ > + __drm_device_to_intel_display(hdmi_to_dig_port(p)->base.base.dev) > + > +/* Helper for generic association. Map types to conversion functions/macros. > */ > +#define __assoc(type, p) \ > + struct type: __##type##_to_intel_display((struct type *)(p)) > + > +/* Convert various pointer types to struct intel_display pointer. */ > +#define to_intel_display(p) \ > + _Generic(*p,\ > + __assoc(drm_device, p),\ > + __assoc(intel_connector, p), \ > + __assoc(intel_crtc, p),\ > + __assoc(intel_crtc_state, p), \ > + __assoc(intel_digital_port, p),\ > + __assoc(intel_dp, p), \ > + __assoc(intel_encoder, p), \ > + __assoc(intel_hdmi, p)) > + > #endif /* __INTEL_DISPLAY_TYPES_H__ */ > -- > 2.39.2 >
Re: [PATCH v3 1/7] drm/i915/display: add intel_display -> drm_device backpointer
On Tue, Apr 09, 2024 at 03:26:43PM +0300, Jani Nikula wrote:
> As a baby step towards making struct intel_display the main data
> structure for display, add a backpointer to struct drm_device that can
> be used instead of >drm.
>
> Signed-off-by: Jani Nikula
I needed that a few weeks ago when doing that display metrics,
willing to add a drm_debug without having to go through
drm_i915_private.
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display_core.h | 3 +++
> drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index db9b6492758e..368a4953bc1b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -282,6 +282,9 @@ struct intel_wm {
> };
>
> struct intel_display {
> + /* drm device backpointer */
> + struct drm_device *drm;
> +
> /* Display functions */
> struct {
> /* Top level crtc-ish functions */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index b8903bd0e82a..120e209ee74a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -927,6 +927,9 @@ void intel_display_device_probe(struct drm_i915_private
> *i915)
> const struct intel_display_device_info *info;
> u16 ver, rel, step;
>
> + /* Add drm device backpointer as early as possible. */
> + i915->display.drm = >drm;
> +
> if (HAS_GMD_ID(i915))
> info = probe_gmdid_display(i915, , , );
> else
> --
> 2.39.2
>
Re: ✗ Fi.CI.IGT: failure for drm/i915/vma: Fix UAF on reopen vs destroy race (rev3)
On Tuesday, 16 April 2024 12:50:05 CEST Patchwork wrote: > == Series Details == > > Series: drm/i915/vma: Fix UAF on reopen vs destroy race (rev3) > URL : https://patchwork.freedesktop.org/series/132360/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_14582_full -> Patchwork_132360v3_full > > > Summary > --- > > **FAILURE** > > Serious unknown changes coming with Patchwork_132360v3_full absolutely need > to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_132360v3_full, please notify your bug team > (i915-ci-in...@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/index.html > > Participating hosts (9 -> 10) > -- > > Additional (1): shard-snb-0 > > Possible new issues > --- > > Here are the unknown changes that may have been introduced in > Patchwork_132360v3_full: > > ### IGT changes ### > > Possible regressions > > * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-2: > - shard-glk: NOTRUN -> [INCOMPLETE][1] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-glk8/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-hdmi-a-2.html I think that's not a new issue. It looks the same as eg. http://gfx-ci.igk.intel.com/cibuglog-ng/testresult/1752108558 from CI_DRM_14578, and should be reported to the same known issue, i.e., to http://gfx-ci.igk.intel.com/cibuglog-ng/issue/10769, I believe. @BUG Filing, please update filters and re-report. Thanks, Janusz > > > Known issues > > > Here are the changes found in Patchwork_132360v3_full that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@api_intel_bb@blit-reloc-keep-cache: > - shard-rkl: NOTRUN -> [SKIP][2] ([i915#8411]) >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-rkl-3/igt@api_intel...@blit-reloc-keep-cache.html > > * igt@debugfs_test@basic-hwmon: > - shard-mtlp: NOTRUN -> [SKIP][3] ([i915#9318]) >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-mtlp-5/igt@debugfs_t...@basic-hwmon.html > > * igt@device_reset@cold-reset-bound: > - shard-dg1: NOTRUN -> [SKIP][4] ([i915#7701]) >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-dg1-15/igt@device_re...@cold-reset-bound.html > > * igt@drm_fdinfo@busy-hang@rcs0: > - shard-mtlp: NOTRUN -> [SKIP][5] ([i915#8414]) +5 other tests > skip >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-mtlp-5/igt@drm_fdinfo@busy-h...@rcs0.html > > * igt@drm_fdinfo@most-busy-idle-check-all@vecs1: > - shard-dg2: NOTRUN -> [SKIP][6] ([i915#8414]) +6 other tests > skip >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-dg2-8/igt@drm_fdinfo@most-busy-idle-check-...@vecs1.html > > * igt@drm_fdinfo@virtual-busy-hang: > - shard-dg1: NOTRUN -> [SKIP][7] ([i915#8414]) +1 other test skip >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-dg1-15/igt@drm_fdi...@virtual-busy-hang.html > > * igt@gem_ccs@block-multicopy-inplace: > - shard-rkl: NOTRUN -> [SKIP][8] ([i915#3555] / [i915#9323]) >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-rkl-3/igt@gem_...@block-multicopy-inplace.html > > * igt@gem_ccs@suspend-resume: > - shard-dg1: NOTRUN -> [SKIP][9] ([i915#9323]) +1 other test skip >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-dg1-17/igt@gem_...@suspend-resume.html > > * igt@gem_close_race@multigpu-basic-process: > - shard-rkl: NOTRUN -> [SKIP][10] ([i915#7697]) >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-rkl-4/igt@gem_close_r...@multigpu-basic-process.html > > * igt@gem_ctx_persistence@legacy-engines-hostile-preempt: > - shard-snb: NOTRUN -> [SKIP][11] ([i915#1099]) >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-snb1/igt@gem_ctx_persiste...@legacy-engines-hostile-preempt.html > > * igt@gem_ctx_sseu@engines: > - shard-dg1: NOTRUN -> [SKIP][12] ([i915#280]) >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-dg1-18/igt@gem_ctx_s...@engines.html > > * igt@gem_exec_balancer@bonded-true-hang: > - shard-dg2: NOTRUN -> [SKIP][13] ([i915#4812]) +2 other tests > skip >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132360v3/shard-dg2-8/igt@gem_exec_balan...@bonded-true-hang.html > > *
Re: [5/6] drm/i915/dp: Enable AUX based backlight for HDR
On Thu, Apr 11, 2024 at 11:39:24AM +0530, Suraj Kandpal wrote:
> As of now whenerver HDR is switched on we use the PWM to change the
> backlight as opposed to AUX based backlight changes in terms of nits.
> This patch writes to the appropriate DPCD registers to enable aux
> based backlight using values in nits.
>
> --v2
> -Fix max_cll and max_fall assignment [Jani]
> -Fix the size sent in drm_dpcd_write [Jani]
>
> --v3
> -Content Luminance needs to be sent only for pre-ICL after that
> it is directly picked up from hdr metadata [Ville]
>
> --v4
> -Add checks for HDR TCON cap bits [Ville]
> -Check eotf of hdr_output_data and sets bits base of that value.
>
> --v5
> -Fix capability check bits.
> -Check colorspace before setting BT2020
>
> --v6
> -Use intel_dp_has_gamut_dip to check if we have capability
> to send sdp [Ville]
> -Seprate filling of all hdr tcon related bits into it's
> own function.
> -Check eotf data to make sure we are in HDR mode [Sebastian]
>
> --v7
> -Fix confusion function name for hdr mode check [Jani]
> -Fix the condition which tells us if we are in HDR mode or not
> [Sebastian]
>
> Signed-off-by: Suraj Kandpal
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 105 --
> 1 file changed, 94 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index b61bad218994..b13eee250dc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -40,11 +40,6 @@
> #include "intel_dp.h"
> #include "intel_dp_aux_backlight.h"
>
> -/* TODO:
> - * Implement HDR, right now we just implement the bare minimum to bring us
> back into SDR mode so we
> - * can make people's backlights work in the mean time
> - */
> -
> /*
> * DP AUX registers for Intel's proprietary HDR backlight interface. We
> define
> * them here since we'll likely be the only driver to ever use these.
> @@ -127,9 +122,6 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
> if (ret != sizeof(tcon_cap))
> return false;
>
> - if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
> - return false;
> -
> drm_dbg_kms(>drm, "[CONNECTOR:%d:%s] Detected %s HDR backlight
> interface version %d\n",
> connector->base.base.id, connector->base.name,
> is_intel_tcon_cap(tcon_cap) ? "Intel" : "unsupported",
> tcon_cap[0]);
> @@ -137,6 +129,9 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
> if (!is_intel_tcon_cap(tcon_cap))
> return false;
>
> + if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
> + return false;
> +
> /*
>* If we don't have HDR static metadata there is no way to
>* runtime detect used range for nits based control. For now
> @@ -225,13 +220,27 @@ intel_dp_aux_hdr_set_aux_backlight(const struct
> drm_connector_state *conn_state,
> connector->base.base.id, connector->base.name);
> }
>
> +static bool
> +intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state)
> +{
> + struct hdr_output_metadata *hdr_metadata;
> +
> + if (!conn_state->hdr_output_metadata)
> + return false;
> +
> + hdr_metadata = conn_state->hdr_output_metadata->data;
> +
> + return hdr_metadata->hdmi_metadata_type1.eotf == HDMI_EOTF_SMPTE_ST2084;
> +}
> +
> static void
> intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state,
> u32 level)
> {
> struct intel_connector *connector =
> to_intel_connector(conn_state->connector);
> struct intel_panel *panel = >panel;
>
> - if (panel->backlight.edp.intel.sdr_uses_aux) {
> + if (intel_dp_in_hdr_mode(conn_state) ||
> + panel->backlight.edp.intel.sdr_uses_aux) {
> intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> } else {
> const u32 pwm_level = intel_backlight_level_to_pwm(connector,
> level);
> @@ -240,6 +249,70 @@ intel_dp_aux_hdr_set_backlight(const struct
> drm_connector_state *conn_state, u32
> }
> }
>
> +static void
> +intel_dp_aux_write_content_luminance(struct intel_connector *connector,
> + struct hdr_output_metadata *hdr_metadata)
> +{
> + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + int ret;
> + u8 buf[4];
> +
> + if (!intel_dp_has_gamut_metadata_dip(connector->encoder))
> + return;
> +
> + buf[0] = hdr_metadata->hdmi_metadata_type1.max_cll & 0xFF;
> + buf[1] = (hdr_metadata->hdmi_metadata_type1.max_cll & 0xFF00) >> 8;
> + buf[2] = hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF;
> + buf[3] = (hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF00) >> 8;
Re: [PATCH v1] drm/xe: no need to call fixup_initial_plane_config in XE
On Sat, Apr 13, 2024 at 12:33:42AM +0300, Vinod Govindapillai wrote: > In XE, the updated fb mapping is already done and updated as > part of intel_find_initial_plane_obj(). So no need to invoke > fixup_initial_plane_config() again as it would basically write > the same data to "PLAN_SURF" again. > > Signed-off-by: Vinod Govindapillai > --- > drivers/gpu/drm/xe/display/xe_plane_initial.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c > b/drivers/gpu/drm/xe/display/xe_plane_initial.c > index 9693c56d386b..51eb80729cfb 100644 > --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c > +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c > @@ -297,9 +297,6 @@ void intel_initial_plane_config(struct drm_i915_private > *i915) >*/ > intel_find_initial_plane_obj(crtc, plane_configs); > > - if > (i915->display.funcs.display->fixup_initial_plane_config(crtc, plane_config)) > - intel_crtc_wait_for_next_vblank(crtc); > - We want to do the opposite. ie. get rid rid of the async flip abuse in xe. > plane_config_fini(plane_config); > } > } > -- > 2.34.1 -- Ville Syrjälä Intel
Re: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
On Tue, Apr 16, 2024 at 12:57:33PM +0530, Suraj Kandpal wrote:
> Add SCLKGATE_DIS register and it's register definition which
> will be used the next patch.
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3f34efcd7d6c..beec91a2f493 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6250,6 +6250,10 @@ enum skl_power_gate {
> #define SFUSE_STRAP_DDIC_DETECTED (1 << 1)
> #define SFUSE_STRAP_DDID_DETECTED (1 << 0)
>
> +/* SCLKGATE_DIS */
> +#define SCLKGATE_DIS _MMIO(0xc2014)
That address is SFUSE_STRAP
> +#define DPLS_GATING_DISABLE REG_BIT(29)
> +
> #define WM_MISC _MMIO(0x45260)
> #define WM_MISC_DATA_PARTITION_5_6 (1 << 0)
>
> --
> 2.43.2
--
Ville Syrjälä
Intel
Re: [REBASE 7/7] drm/edid: make drm_edid_are_equal() more convenient for its single user
Hi
Am 16.04.24 um 14:27 schrieb Jani Nikula:
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
Hi
Am 16.04.24 um 11:20 schrieb Jani Nikula:
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename drm_edid_eq(). Functionally deduce the length from the blob
size, not the blob data, making it more robust against any errors.
Could be squashed into patch 6.
Ack.
Thanks for the review. I'll hold of on resending these until there are
some R-b's... I've send them a few times already with no comments. :(
Feel free to add
Reviewed-by: Thomas Zimmermann
to the series.
Best regards
Thomas
BR,
Jani.
Best regards
Thomas
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 41 ++
1 file changed, 15 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 463fbad85d90..513590931cc5 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1820,30 +1820,20 @@ static bool edid_block_is_zero(const void *edid)
return !memchr_inv(edid, 0, EDID_LENGTH);
}
-/**
- * drm_edid_are_equal - compare two edid blobs.
- * @edid1: pointer to first blob
- * @edid2: pointer to second blob
- * This helper can be used during probing to determine if
- * edid had changed.
- */
-static bool drm_edid_are_equal(const struct edid *edid1, const struct edid
*edid2)
+static bool drm_edid_eq(const struct drm_edid *drm_edid,
+ const void *raw_edid, size_t raw_edid_size)
{
- int edid1_len, edid2_len;
- bool edid1_present = edid1 != NULL;
- bool edid2_present = edid2 != NULL;
+ bool edid1_present = drm_edid && drm_edid->edid && drm_edid->size;
+ bool edid2_present = raw_edid && raw_edid_size;
if (edid1_present != edid2_present)
return false;
- if (edid1) {
- edid1_len = edid_size(edid1);
- edid2_len = edid_size(edid2);
-
- if (edid1_len != edid2_len)
+ if (edid1_present) {
+ if (drm_edid->size != raw_edid_size)
return false;
- if (memcmp(edid1, edid2, edid1_len))
+ if (memcmp(drm_edid->edid, raw_edid, drm_edid->size))
return false;
}
@@ -6936,15 +6926,14 @@ static int _drm_edid_connector_property_update(struct drm_connector *connector,
int ret;
if (connector->edid_blob_ptr) {
- const struct edid *old_edid = connector->edid_blob_ptr->data;
-
- if (old_edid) {
- if (!drm_edid_are_equal(drm_edid ? drm_edid->edid :
NULL, old_edid)) {
- connector->epoch_counter++;
- drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed,
epoch counter %llu\n",
- connector->base.id, connector->name,
- connector->epoch_counter);
- }
+ const void *old_edid = connector->edid_blob_ptr->data;
+ size_t old_edid_size = connector->edid_blob_ptr->length;
+
+ if (old_edid && !drm_edid_eq(drm_edid, old_edid,
old_edid_size)) {
+ connector->epoch_counter++;
+ drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed, epoch
counter %llu\n",
+ connector->base.id, connector->name,
+ connector->epoch_counter);
}
}
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstrasse 146, 90461 Nuernberg, Germany
GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman
HRB 36809 (AG Nuernberg)
Re: [REQUEST] Add support for Intel DPST (Display Power Saving Technology)
On Tue, 16 Apr 2024, José Relvas wrote: > One more question. Some documentation refers to > "OPST (OLED power saving technology)". It's my understanding that this > uses the same hardware blocks and APIs as DPST - only the algorithm > in software is different. Userspace would need a way to distinguish > OLED panels from LCD panels so it can use the right algorithm. Is > there a reliable way of doing this? > On my Thinkpad P1 gen 6, the OLED exposes a standard intel_backlight, > which actually controls the PWM. Afaik, there's no other way of > telling OLED and LCD apart in userspace. The intel_backlight interface can actually control the brightness of the OLED panel using the DPCD interface, not only backlight PWM. It depends on the panel. See intel_dp_aux_backlight.c. (And yes, backlight can be a misnomer here, since OLED does not have a backlight.) I don't actually know the details of OPST, but some OLED panels I've worked with in the past have CABC, or content adaptive brightness control, where all of it is handled internally in the panel. You just tune the aggressiveness or some other mode. BR, Jani. -- Jani Nikula, Intel
✗ Fi.CI.BAT: failure for Add support for partial mapping (rev7)
== Series Details == Series: Add support for partial mapping (rev7) URL : https://patchwork.freedesktop.org/series/131817/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14584 -> Patchwork_131817v7 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_131817v7 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_131817v7, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/index.html Participating hosts (41 -> 36) -- Missing(5): fi-kbl-7567u fi-bsw-n3050 fi-snb-2520m fi-glk-j4005 fi-elk-e7500 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_131817v7: ### IGT changes ### Possible regressions * igt@i915_selftest@live@dmabuf: - bat-arls-1: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14584/bat-arls-1/igt@i915_selftest@l...@dmabuf.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-1/igt@i915_selftest@l...@dmabuf.html Known issues Here are the changes found in Patchwork_131817v7 that come from known issues: ### IGT changes ### Issues hit * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][3] ([i915#10213]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-arls-2: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][5] ([i915#10196] / [i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][6] ([i915#10197] / [i915#10211] / [i915#4079]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-arls-2: NOTRUN -> [SKIP][7] ([i915#10206] / [i915#4079]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-arls-2: NOTRUN -> [SKIP][8] ([i915#10209]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10200]) +9 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-arls-2: NOTRUN -> [SKIP][10] ([i915#10202]) +1 other test skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-arls-2: NOTRUN -> [SKIP][11] ([i915#9886]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10207]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_psr@psr-primary-mmap-gtt@edp-1: - bat-arls-2: NOTRUN -> [SKIP][13] ([i915#10196] / [i915#4077] / [i915#9688]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@kms_psr@psr-primary-mmap-...@edp-1.html * igt@kms_setmode@basic-clone-single-crtc: - bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10208] / [i915#8809]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-mmap: - bat-arls-2: NOTRUN -> [SKIP][15] ([i915#10196] / [i915#3708] / [i915#4077]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@prime_v...@basic-fence-mmap.html * igt@prime_vgem@basic-fence-read: - bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10212] / [i915#3708]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131817v7/bat-arls-2/igt@prime_v...@basic-fence-read.html * igt@prime_vgem@basic-read: - bat-arls-2: NOTRUN -> [SKIP][17]
Re: [REBASE 7/7] drm/edid: make drm_edid_are_equal() more convenient for its single user
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
> Hi
>
> Am 16.04.24 um 11:20 schrieb Jani Nikula:
>> Repurpose drm_edid_are_equal() to be more helpful for its single user,
>> and rename drm_edid_eq(). Functionally deduce the length from the blob
>> size, not the blob data, making it more robust against any errors.
>
> Could be squashed into patch 6.
Ack.
Thanks for the review. I'll hold of on resending these until there are
some R-b's... I've send them a few times already with no comments. :(
BR,
Jani.
>
> Best regards
> Thomas
>
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/drm_edid.c | 41 ++
>> 1 file changed, 15 insertions(+), 26 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index 463fbad85d90..513590931cc5 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -1820,30 +1820,20 @@ static bool edid_block_is_zero(const void *edid)
>> return !memchr_inv(edid, 0, EDID_LENGTH);
>> }
>>
>> -/**
>> - * drm_edid_are_equal - compare two edid blobs.
>> - * @edid1: pointer to first blob
>> - * @edid2: pointer to second blob
>> - * This helper can be used during probing to determine if
>> - * edid had changed.
>> - */
>> -static bool drm_edid_are_equal(const struct edid *edid1, const struct edid
>> *edid2)
>> +static bool drm_edid_eq(const struct drm_edid *drm_edid,
>> +const void *raw_edid, size_t raw_edid_size)
>> {
>> -int edid1_len, edid2_len;
>> -bool edid1_present = edid1 != NULL;
>> -bool edid2_present = edid2 != NULL;
>> +bool edid1_present = drm_edid && drm_edid->edid && drm_edid->size;
>> +bool edid2_present = raw_edid && raw_edid_size;
>>
>> if (edid1_present != edid2_present)
>> return false;
>>
>> -if (edid1) {
>> -edid1_len = edid_size(edid1);
>> -edid2_len = edid_size(edid2);
>> -
>> -if (edid1_len != edid2_len)
>> +if (edid1_present) {
>> +if (drm_edid->size != raw_edid_size)
>> return false;
>>
>> -if (memcmp(edid1, edid2, edid1_len))
>> +if (memcmp(drm_edid->edid, raw_edid, drm_edid->size))
>> return false;
>> }
>>
>> @@ -6936,15 +6926,14 @@ static int
>> _drm_edid_connector_property_update(struct drm_connector *connector,
>> int ret;
>>
>> if (connector->edid_blob_ptr) {
>> -const struct edid *old_edid = connector->edid_blob_ptr->data;
>> -
>> -if (old_edid) {
>> -if (!drm_edid_are_equal(drm_edid ? drm_edid->edid :
>> NULL, old_edid)) {
>> -connector->epoch_counter++;
>> -drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID
>> changed, epoch counter %llu\n",
>> -connector->base.id, connector->name,
>> -connector->epoch_counter);
>> -}
>> +const void *old_edid = connector->edid_blob_ptr->data;
>> +size_t old_edid_size = connector->edid_blob_ptr->length;
>> +
>> +if (old_edid && !drm_edid_eq(drm_edid, old_edid,
>> old_edid_size)) {
>> +connector->epoch_counter++;
>> +drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed, epoch
>> counter %llu\n",
>> +connector->base.id, connector->name,
>> +connector->epoch_counter);
>> }
>> }
>>
--
Jani Nikula, Intel
Re: [REBASE 5/7] drm/edid: avoid drm_edid_find_extension() internally
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
> Hi
>
> Am 16.04.24 um 11:19 schrieb Jani Nikula:
>> Prefer the EDID iterators over drm_edid_find_extension() in
>> drm_edid_has_cta_extension(), even if this leads to more code. The key
>> is to use the same patterns as much as possible.
>
> Should this patch go before patch 4? That would limit the impact of the
> latter.
I can if you want, IMO not a big deal.
> Why is this instance different than the one in
> drm_find_displayid_extension()? Best regards Thomas
Overall I'd like to get rid of the function altogether, but I'm
undecided what the replacement interface towards drm_displayid.c should
be. Maybe expose the drm_edid_iter_* stuff? But I really don't want
anyone to export and start using them in drivers.
BR,
Jani.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/drm_edid.c | 14 --
>> 1 file changed, 12 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index c29f31dcc818..4b3ad42a8f95 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -4230,11 +4230,21 @@ static bool drm_edid_has_cta_extension(const struct
>> drm_edid *drm_edid)
>> {
>> const struct displayid_block *block;
>> struct displayid_iter iter;
>> -int ext_index = 0;
>> +struct drm_edid_iter edid_iter;
>> +const u8 *ext;
>> bool found = false;
>>
>> /* Look for a top level CEA extension block */
>> -if (drm_edid_find_extension(drm_edid, CEA_EXT, _index))
>> +drm_edid_iter_begin(drm_edid, _iter);
>> +drm_edid_iter_for_each(ext, _iter) {
>> +if (ext[0] == CEA_EXT) {
>> +found = true;
>> +break;
>> +}
>> +}
>> +drm_edid_iter_end(_iter);
>> +
>> +if (found)
>> return true;
>>
>> /* CEA blocks can also be found embedded in a DisplayID block */
--
Jani Nikula, Intel
Re: [REBASE 7/7] drm/edid: make drm_edid_are_equal() more convenient for its single user
Hi
Am 16.04.24 um 11:20 schrieb Jani Nikula:
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename drm_edid_eq(). Functionally deduce the length from the blob
size, not the blob data, making it more robust against any errors.
Could be squashed into patch 6.
Best regards
Thomas
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 41 ++
1 file changed, 15 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 463fbad85d90..513590931cc5 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1820,30 +1820,20 @@ static bool edid_block_is_zero(const void *edid)
return !memchr_inv(edid, 0, EDID_LENGTH);
}
-/**
- * drm_edid_are_equal - compare two edid blobs.
- * @edid1: pointer to first blob
- * @edid2: pointer to second blob
- * This helper can be used during probing to determine if
- * edid had changed.
- */
-static bool drm_edid_are_equal(const struct edid *edid1, const struct edid
*edid2)
+static bool drm_edid_eq(const struct drm_edid *drm_edid,
+ const void *raw_edid, size_t raw_edid_size)
{
- int edid1_len, edid2_len;
- bool edid1_present = edid1 != NULL;
- bool edid2_present = edid2 != NULL;
+ bool edid1_present = drm_edid && drm_edid->edid && drm_edid->size;
+ bool edid2_present = raw_edid && raw_edid_size;
if (edid1_present != edid2_present)
return false;
- if (edid1) {
- edid1_len = edid_size(edid1);
- edid2_len = edid_size(edid2);
-
- if (edid1_len != edid2_len)
+ if (edid1_present) {
+ if (drm_edid->size != raw_edid_size)
return false;
- if (memcmp(edid1, edid2, edid1_len))
+ if (memcmp(drm_edid->edid, raw_edid, drm_edid->size))
return false;
}
@@ -6936,15 +6926,14 @@ static int _drm_edid_connector_property_update(struct drm_connector *connector,
int ret;
if (connector->edid_blob_ptr) {
- const struct edid *old_edid = connector->edid_blob_ptr->data;
-
- if (old_edid) {
- if (!drm_edid_are_equal(drm_edid ? drm_edid->edid :
NULL, old_edid)) {
- connector->epoch_counter++;
- drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed,
epoch counter %llu\n",
- connector->base.id, connector->name,
- connector->epoch_counter);
- }
+ const void *old_edid = connector->edid_blob_ptr->data;
+ size_t old_edid_size = connector->edid_blob_ptr->length;
+
+ if (old_edid && !drm_edid_eq(drm_edid, old_edid,
old_edid_size)) {
+ connector->epoch_counter++;
+ drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed, epoch
counter %llu\n",
+ connector->base.id, connector->name,
+ connector->epoch_counter);
}
}
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstrasse 146, 90461 Nuernberg, Germany
GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman
HRB 36809 (AG Nuernberg)
✗ Fi.CI.CHECKPATCH: warning for Add support for partial mapping (rev7)
== Series Details == Series: Add support for partial mapping (rev7) URL : https://patchwork.freedesktop.org/series/131817/ State : warning == Summary == Error: dim checkpatch failed 46a97a93cbcf drm/i915/gem: Increment vma offset when mapping fb objects 840915d2ed48 drm/i915/gem: Do not look for the exact address in node fb4ef24830b4 drm/i915/gem: Calculate object page offset for partial memory mapping -:67: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #67: FILE: drivers/gpu/drm/i915/gem/i915_gem_mman.c:411: + area->vm_start + ((vma->gtt_view.partial.offset - obj_offset) << PAGE_SHIFT), total: 0 errors, 1 warnings, 0 checks, 82 lines checked
Re: [REBASE 5/7] drm/edid: avoid drm_edid_find_extension() internally
Hi
Am 16.04.24 um 11:19 schrieb Jani Nikula:
Prefer the EDID iterators over drm_edid_find_extension() in
drm_edid_has_cta_extension(), even if this leads to more code. The key
is to use the same patterns as much as possible.
Should this patch go before patch 4? That would limit the impact of the
latter.
Why is this instance different than the one in
drm_find_displayid_extension()? Best regards Thomas
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c29f31dcc818..4b3ad42a8f95 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4230,11 +4230,21 @@ static bool drm_edid_has_cta_extension(const struct
drm_edid *drm_edid)
{
const struct displayid_block *block;
struct displayid_iter iter;
- int ext_index = 0;
+ struct drm_edid_iter edid_iter;
+ const u8 *ext;
bool found = false;
/* Look for a top level CEA extension block */
- if (drm_edid_find_extension(drm_edid, CEA_EXT, _index))
+ drm_edid_iter_begin(drm_edid, _iter);
+ drm_edid_iter_for_each(ext, _iter) {
+ if (ext[0] == CEA_EXT) {
+ found = true;
+ break;
+ }
+ }
+ drm_edid_iter_end(_iter);
+
+ if (found)
return true;
/* CEA blocks can also be found embedded in a DisplayID block */
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstrasse 146, 90461 Nuernberg, Germany
GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman
HRB 36809 (AG Nuernberg)
Re: [REQUEST] Add support for Intel DPST (Display Power Saving Technology)
On Tue, Apr 16, 2024 at 11:00:12AM +0300, Jani Nikula wrote: > On Fri, 05 Apr 2024, José Relvas wrote: > > The best approach here would probably be to expose a similar attribute to > > amdgpu's > > "panel_power_savings", with a scale that controls the feature's > > aggressiveness, > > then update userspace tools, including power-profiles-daemon, to set the > > value > > based on the intended energy scheme. > > I don't really know what panel_power_savings does or how it works, but > clearly it's not how this particular thing works on Intel > hardware. There isn't a trivial knob you could adjust. I've investigated this further. AMD's marketing name for it is "Vari-Bright" and, on Windows, can be controlled through their gfx control panel, with a 4-level slider. Internally, it seems to be called "Adaptive Backlight Modulation" (ABM). It increases the brightness of the image to account for a lower backlight level. I had a cursory look at the amdgpu driver, but I'm not sure if the algorithm is there, or if its handled in firmware. > Where you have to add an API for reading the image histogram, add an API > to set the image enhancement parameters, and how that function works is > userspace policy that needs to be implemented in userspace. Hmm... this could be handled by a daemon. Said daemon could hook into PPD's state to check if it should be trying to save power. - One more question. Some documentation refers to "OPST (OLED power saving technology)". It's my understanding that this uses the same hardware blocks and APIs as DPST - only the algorithm in software is different. Userspace would need a way to distinguish OLED panels from LCD panels so it can use the right algorithm. Is there a reliable way of doing this? On my Thinkpad P1 gen 6, the OLED exposes a standard intel_backlight, which actually controls the PWM. Afaik, there's no other way of telling OLED and LCD apart in userspace. José Relvas
Re: [PATCH v2] drm/i915/hwmon: Get rid of devm
Am 16.04.24 um 00:36 schrieb Ashutosh Dixit:
When both hwmon and hwmon drvdata (on which hwmon depends) are device
managed resources, the expectation, on device unbind, is that hwmon will be
released before drvdata. However, in i915 there are two separate code
paths, which both release either drvdata or hwmon and either can be
released before the other. These code paths (for device unbind) are as
follows (see also the bug referenced below):
Call Trace:
release_nodes+0x11/0x70
devres_release_group+0xb2/0x110
component_unbind_all+0x8d/0xa0
component_del+0xa5/0x140
intel_pxp_tee_component_fini+0x29/0x40 [i915]
intel_pxp_fini+0x33/0x80 [i915]
i915_driver_remove+0x4c/0x120 [i915]
i915_pci_remove+0x19/0x30 [i915]
pci_device_remove+0x32/0xa0
device_release_driver_internal+0x19c/0x200
unbind_store+0x9c/0xb0
and
Call Trace:
release_nodes+0x11/0x70
devres_release_all+0x8a/0xc0
device_unbind_cleanup+0x9/0x70
device_release_driver_internal+0x1c1/0x200
unbind_store+0x9c/0xb0
This means that in i915, if use devm, we cannot gurantee that hwmon will
always be released before drvdata. Which means that we have a uaf if hwmon
sysfs is accessed when drvdata has been released but hwmon hasn't.
The only way out of this seems to be do get rid of devm_ and release/free
everything explicitly during device unbind.
v2: Change commit message and other minor code changes
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10366
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/i915_hwmon.c | 41 +++
1 file changed, 31 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
b/drivers/gpu/drm/i915/i915_hwmon.c
index 8c3f443c8347..46c24b1ee6df 100644
--- a/drivers/gpu/drm/i915/i915_hwmon.c
+++ b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -792,7 +792,7 @@ void i915_hwmon_register(struct drm_i915_private *i915)
if (!IS_DGFX(i915))
return;
- hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
+ hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL);
if (!hwmon)
return;
@@ -818,10 +818,10 @@ void i915_hwmon_register(struct drm_i915_private *i915)
hwm_get_preregistration_info(i915);
/* hwmon_dev points to device hwmon */
- hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat->name,
-ddat,
-_chip_info,
-hwm_groups);
+ hwmon_dev = hwmon_device_register_with_info(dev, ddat->name,
+ ddat,
+ _chip_info,
+ hwm_groups);
if (IS_ERR(hwmon_dev)) {
i915->hwmon = NULL;
Hi,
you need to free hwmon here, since it is not managed by devres anymore.
return;
@@ -838,10 +838,10 @@ void i915_hwmon_register(struct drm_i915_private *i915)
if (!hwm_gt_is_visible(ddat_gt, hwmon_energy,
hwmon_energy_input, 0))
continue;
- hwmon_dev = devm_hwmon_device_register_with_info(dev,
ddat_gt->name,
-ddat_gt,
-
_gt_chip_info,
-NULL);
+ hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt->name,
+ ddat_gt,
+ _gt_chip_info,
+ NULL);
if (!IS_ERR(hwmon_dev))
ddat_gt->hwmon_dev = hwmon_dev;
}
@@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private *i915)
void i915_hwmon_unregister(struct drm_i915_private *i915)
{
- fetch_and_zero(>hwmon);
+ struct i915_hwmon *hwmon = fetch_and_zero(>hwmon);
Why is fetch_and_zero() necessary here?
Thanks,
Armin Wolf
+ struct hwm_drvdata *ddat = >ddat;
+ struct intel_gt *gt;
+ int i;
+
+ if (!hwmon)
+ return;
+
+ for_each_gt(gt, i915, i) {
+ struct hwm_drvdata *ddat_gt = hwmon->ddat_gt + i;
+
+ if (ddat_gt->hwmon_dev) {
+ hwmon_device_unregister(ddat_gt->hwmon_dev);
+ ddat_gt->hwmon_dev = NULL;
+ }
+ }
+
+ if (ddat->hwmon_dev)
+ hwmon_device_unregister(ddat->hwmon_dev);
+
+ mutex_destroy(>hwmon_lock);
+ kfree(hwmon);
}
Re: [PATCH v3 04/21] drm/i915/xe2hpd: Skip CCS modifiers
On 15.4.2024 19.06, Matt Roper wrote:
On Mon, Apr 15, 2024 at 01:44:06PM +0530, Balasubramani Vivekanandan wrote:
Framebuffer format modifiers are used to indicate the existence of
auxillary surface in the plane, containing the CCS data. But on
s/auxillary/auxiliary/ in a few places in this commit message. Although
I don't think this statement is 100% true. DG2 use FlatCCS rather than
AuxCCS, but still needs to use framebuffer modifiers because the region
of the FlatCCS that corresponds to the buffer may not be
initialized/correct if the buffer contents were generated in a
non-compressed manner. We have to use framebuffer modifiers to pass
information through the software stack as to whether the FlatCCS data
for the buffer is usable and should be consulted by consumers of the
buffer.
As I understand it, the big change in Xe2, is that compression is now
controlled by the PAT setting in the PTEs and even in cases where an
"uncompressed" PAT index is used to generate content in the buffers, the
corresponding FlatCCS area still gets initialized to whatever metadata
code corresponds to "this bloc is uncompressed." So that means that
it's always safe for consumers like display to treat the buffer as if it
were compressed (e.g., setting the decompression flag in PLANE_CTL) ---
the CCS metadata for ever single block in the buffer will properly
indicate that no compression is actually present.
Adding to what Matt commented above, issue which is being fixed here
should already be taken care by
--
commit cf48bddd31deefb9ab07de9a4d0150da6610198a
Author: Juha-Pekka Heikkila
Date: Wed Feb 28 16:02:25 2024 +0200
drm/i915/display: Disable AuxCCS framebuffers if built for Xe
--
/Juha-Pekka
Xe2_HPD, the CCS data is stored in a fixed reserved memory area and not
part of the plane. It contains no auxillary surface.
Also in Xe2, the compression is configured via PAT settings in the
pagetable mappings. Decompression is enabled by default in the
PLANE_CTL. Based on whether valid CCS data exists for the plane, display
hardware decides whether compression is necessary or not.
So there is no need for format modifiers to indicate if compression is
enabled or not.
v2:
* Improved the commit description with more details
* Removed the redundant display IP version check for 20. Display version
check for each modifier above would take care of it.
CC: Juha-Pekka Heikkilä
CC: Matt Roper
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/intel_fb.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index 86b443433e8b..7234ce36b6a4 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -431,9 +431,19 @@ static bool plane_has_modifier(struct drm_i915_private
*i915,
* Separate AuxCCS and Flat CCS modifiers to be run only on platforms
* where supported.
*/
- if (intel_fb_is_ccs_modifier(md->modifier) &&
- HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
- return false;
+ if (intel_fb_is_ccs_modifier(md->modifier)) {
+
+ /*
+* There is no need for CCS format modifiers for Xe2_HPD, as
+* there is no support of AuxCCS and the FlatCCS is configured
+* usign PAT index in the page table mappings
+*/
+ if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
+ return false;
+
+ if (HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
+ return false;
+ }
return true;
}
--
2.25.1
✗ Fi.CI.BAT: failure for drm/i915/pps: Disable DPLS_GATING around pps sequence
== Series Details == Series: drm/i915/pps: Disable DPLS_GATING around pps sequence URL : https://patchwork.freedesktop.org/series/132495/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132495v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132495v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132495v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/index.html Participating hosts (37 -> 36) -- Additional (3): bat-mtlp-8 bat-kbl-2 bat-arls-2 Missing(4): bat-dg2-11 fi-elk-e7500 fi-snb-2520m fi-bsw-n3050 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132495v1: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-rkl-11600: [PASS][1] -> [SKIP][2] +5 other tests skip [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - fi-rkl-11600: NOTRUN -> [SKIP][3] +11 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/fi-rkl-11600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-xr24.html Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-rkl-11600: [SKIP][4] ([i915#4103]) -> [SKIP][5] +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-rkl-11600: [SKIP][6] ([i915#3555] / [i915#3840]) -> [SKIP][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_...@dsc-basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/fi-rkl-11600/igt@kms_...@dsc-basic.html Known issues Here are the changes found in Patchwork_132495v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-arls-2: NOTRUN -> [SKIP][9] ([i915#9318]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/bat-arls-2/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-rkl-11600: [PASS][10] -> [SKIP][11] ([i915#2582]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@eof.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/fi-rkl-11600/igt@fb...@eof.html * igt@fbdev@info: - fi-rkl-11600: [PASS][12] -> [SKIP][13] ([i915#1849] / [i915#2582]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@info.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/fi-rkl-11600/igt@fb...@info.html - bat-kbl-2: NOTRUN -> [SKIP][14] ([i915#1849]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/bat-kbl-2/igt@fb...@info.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-9: [PASS][15] -> [FAIL][16] ([i915#10378]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html - bat-dg2-8: [PASS][17] -> [FAIL][18] ([i915#10378]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/bat-dg2-8/igt@gem_lmem_swapping@ba...@lmem0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/bat-dg2-8/igt@gem_lmem_swapping@ba...@lmem0.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][19] +39 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132495v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][20] ([i915#10213]) +3 other tests skip [20]:
✗ Fi.CI.BAT: failure for drm/edid: cleanups, rebase
== Series Details == Series: drm/edid: cleanups, rebase URL : https://patchwork.freedesktop.org/series/132494/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132494v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132494v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132494v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/index.html Participating hosts (37 -> 39) -- Additional (4): bat-mtlp-8 bat-kbl-2 bat-arls-2 bat-arls-3 Missing(2): bat-dg2-11 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132494v1: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-rkl-11600: [PASS][1] -> [SKIP][2] +5 other tests skip [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - fi-rkl-11600: NOTRUN -> [SKIP][3] +11 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/fi-rkl-11600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-xr24.html Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-rkl-11600: [SKIP][4] ([i915#4103]) -> [SKIP][5] +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-rkl-11600: [SKIP][6] ([i915#3555] / [i915#3840]) -> [SKIP][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_...@dsc-basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/fi-rkl-11600/igt@kms_...@dsc-basic.html Known issues Here are the changes found in Patchwork_132494v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#9318]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html - bat-arls-2: NOTRUN -> [SKIP][10] ([i915#9318]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-arls-2/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-rkl-11600: [PASS][11] -> [SKIP][12] ([i915#2582]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@eof.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/fi-rkl-11600/igt@fb...@eof.html * igt@fbdev@info: - fi-rkl-11600: [PASS][13] -> [SKIP][14] ([i915#1849] / [i915#2582]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@info.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/fi-rkl-11600/igt@fb...@info.html - bat-kbl-2: NOTRUN -> [SKIP][15] ([i915#1849]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-kbl-2/igt@fb...@info.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][16] +39 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10213]) +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][18] ([i915#10213]) +3 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html - bat-mtlp-8: NOTRUN -> [SKIP][19] ([i915#4613]) +3 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132494v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-arls-2: NOTRUN ->
✗ Fi.CI.SPARSE: warning for drm/edid: cleanups, rebase
== Series Details == Series: drm/edid: cleanups, rebase URL : https://patchwork.freedesktop.org/series/132494/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
✗ Fi.CI.CHECKPATCH: warning for drm/edid: cleanups, rebase
== Series Details == Series: drm/edid: cleanups, rebase URL : https://patchwork.freedesktop.org/series/132494/ State : warning == Summary == Error: dim checkpatch failed 3be00db55665 drm/displayid: move drm_displayid.h to drm_displayd_internal.h -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31: rename from include/drm/drm_displayid.h total: 0 errors, 1 warnings, 0 checks, 37 lines checked 0ab04cbf02d0 drm/edid: move all internal declarations to drm_crtc_internal.h 4e6de0a6cc85 drm/edid: group struct drm_edid based declarations together 208cb507f34b drm/edid: rename drm_find_edid_extension() to drm_edid_find_extension() a84d8b80b4ee drm/edid: avoid drm_edid_find_extension() internally abef369a43fc drm/edid: make drm_edid_are_equal() static 8066efe0737c drm/edid: make drm_edid_are_equal() more convenient for its single user
✗ Fi.CI.BAT: failure for drm/i915: limit eDP MSO pipe only for display version 20 and below (rev4)
== Series Details == Series: drm/i915: limit eDP MSO pipe only for display version 20 and below (rev4) URL : https://patchwork.freedesktop.org/series/129123/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14583 -> Patchwork_129123v4 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_129123v4 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_129123v4, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/index.html Participating hosts (37 -> 33) -- Additional (4): bat-dg1-7 bat-kbl-2 fi-cfl-8109u bat-arls-2 Missing(8): fi-kbl-7567u fi-apl-guc fi-snb-2520m fi-glk-j4005 bat-atsm-1 fi-elk-e7500 bat-dg2-11 bat-mtlp-6 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_129123v4: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-rkl-11600: [PASS][1] -> [SKIP][2] +5 other tests skip [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - fi-rkl-11600: NOTRUN -> [SKIP][3] +11 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-rkl-11600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-xr24.html Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-rkl-11600: [SKIP][4] ([i915#4103]) -> [SKIP][5] +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-rkl-11600: [SKIP][6] ([i915#3555] / [i915#3840]) -> [SKIP][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_...@dsc-basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-rkl-11600/igt@kms_...@dsc-basic.html Known issues Here are the changes found in Patchwork_129123v4 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-2: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/bat-arls-2/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-rkl-11600: [PASS][9] -> [SKIP][10] ([i915#2582]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@eof.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-rkl-11600/igt@fb...@eof.html * igt@fbdev@info: - fi-rkl-11600: [PASS][11] -> [SKIP][12] ([i915#1849] / [i915#2582]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@info.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-rkl-11600/igt@fb...@info.html - bat-kbl-2: NOTRUN -> [SKIP][13] ([i915#1849]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/bat-kbl-2/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - fi-cfl-8109u: NOTRUN -> [SKIP][14] ([i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][15] +39 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-cfl-8109u: NOTRUN -> [SKIP][16] ([i915#4613]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html - bat-arls-2: NOTRUN -> [SKIP][17] ([i915#10213]) +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#4083]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-2: NOTRUN -> [SKIP][19] ([i915#4083]) [19]:
RE: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI
> -Original Message-
> From: Nikula, Jani
> Sent: Tuesday, April 16, 2024 2:28 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Kandpal, Suraj
> Subject: Re: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2
> on HDMI
>
> On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> > Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are on
> HDMI
> > TMDS operation for DISPLAY_VER >= 14.
> >
> > --v2
> > -Wa to be mentioned in comments not in commit message [Jani] -Remove
> > blankline [Jani]
> >
> > Bspec: 49273
> > Bspec: 69964
> > Signed-off-by: Suraj Kandpal
> > ---
> > drivers/gpu/drm/i915/display/intel_hdcp.c | 22 ++
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > 2 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index d5ed4c7dfbc0..4b1833742245 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -30,6 +30,26 @@
> > #define KEY_LOAD_TRIES 5
> > #define HDCP2_LC_RETRY_CNT 3
> >
> > +/*
> > + * WA: 16022217614
> > + * Disable HDCP Line Rekeying when HDCP ver > 1.4
> > + * and when we are on HDMI TMDS operation
> > + * for DISPLAY_VEY >= 14.
>
> Sorry to be nitpicking here, but we really don't want to duplicate in comments
> what the code is already saying.
>
Would just mentioning the WA no. suffice or just drop the comment al together ?
Regards,
Suraj Kandpal
> BR,
> Jani.
>
> > + */
> > +static void
> > +intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
> > + struct intel_hdcp *hdcp)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +
> > + if (encoder->type != INTEL_OUTPUT_HDMI)
> > + return;
> > +
> > + if (DISPLAY_VER(dev_priv) >= 14)
> > + intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(hdcp-
> >cpu_transcoder),
> > +TRANS_DDI_HDCP_LINE_REKEY_DISABLE, 1); }
> > +
> > static int intel_conn_to_vcpi(struct intel_atomic_state *state,
> > struct intel_connector *connector) { @@ -2005,6
> +2025,8 @@
> > static int _intel_hdcp2_enable(struct intel_atomic_state *state,
> > connector->base.base.id, connector->base.name,
> > hdcp->content_type);
> >
> > + intel_hdcp_disable_hdcp_line_rekeying(connector->encoder, hdcp);
> > +
> > ret = hdcp2_authenticate_and_encrypt(state, connector);
> > if (ret) {
> > drm_dbg_kms(>drm, "HDCP2 Type%d Enabling Failed.
> (%d)\n",
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 3f34efcd7d6c..fbf4623cd536
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5630,6 +5630,7 @@ enum skl_power_gate {
> > #define TRANS_DDI_EDP_INPUT_B_ONOFF (5 << 12)
> > #define TRANS_DDI_EDP_INPUT_C_ONOFF (6 << 12)
> > #define TRANS_DDI_EDP_INPUT_D_ONOFF (7 << 12)
> > +#define TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(12)
> > #define TRANS_DDI_MST_TRANSPORT_SELECT_MASK
> REG_GENMASK(11, 10)
> > #define TRANS_DDI_MST_TRANSPORT_SELECT(trans) \
> > REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK,
> trans)
>
> --
> Jani Nikula, Intel
[PATCH] drm/i915/pps: Disable DPLS_GATING around pps sequence
Disable bit 29 of SCLKGATE_DIS register around pps sequence
when we turn panel power on.
--v2
-Squash two commit together [Jani]
-Use IS_DISPLAY_VER [Jani]
-Fix multiline comment [Jani]
Bspec: 49304
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_pps.c | 12
drivers/gpu/drm/i915/i915_reg.h | 4
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 3078dfac7817..2b2cead22a7d 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -948,6 +948,14 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
intel_de_posting_read(dev_priv, pp_ctrl_reg);
}
+ /*
+* WA: 16023567976
+* Disable DPLS gating around power sequence.
+*/
+ if (IS_DISPLAY_VER(dev_priv, 12, 14))
+ intel_de_rmw(dev_priv, SCLKGATE_DIS,
+DPLS_GATING_DISABLE, 1);
+
pp |= PANEL_POWER_ON;
if (!IS_IRONLAKE(dev_priv))
pp |= PANEL_POWER_RESET;
@@ -958,6 +966,10 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
wait_panel_on(intel_dp);
intel_dp->pps.last_power_on = jiffies;
+ if (IS_DISPLAY_VER(dev_priv, 12, 14))
+ intel_de_rmw(dev_priv, SCLKGATE_DIS,
+DPLS_GATING_DISABLE, 0);
+
if (IS_IRONLAKE(dev_priv)) {
pp |= PANEL_POWER_RESET; /* restore panel reset bit */
intel_de_write(dev_priv, pp_ctrl_reg, pp);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3f34efcd7d6c..1c2cd6cc254f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6250,6 +6250,10 @@ enum skl_power_gate {
#define SFUSE_STRAP_DDIC_DETECTED (1 << 1)
#define SFUSE_STRAP_DDID_DETECTED (1 << 0)
+/* SCLKGATE_DIS */
+#define SCLKGATE_DIS _MMIO(0xc2020)
+#define DPLS_GATING_DISABLE REG_BIT(29)
+
#define WM_MISC_MMIO(0x45260)
#define WM_MISC_DATA_PARTITION_5_6(1 << 0)
--
2.43.2
[REBASE 7/7] drm/edid: make drm_edid_are_equal() more convenient for its single user
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename drm_edid_eq(). Functionally deduce the length from the blob
size, not the blob data, making it more robust against any errors.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 41 ++
1 file changed, 15 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 463fbad85d90..513590931cc5 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1820,30 +1820,20 @@ static bool edid_block_is_zero(const void *edid)
return !memchr_inv(edid, 0, EDID_LENGTH);
}
-/**
- * drm_edid_are_equal - compare two edid blobs.
- * @edid1: pointer to first blob
- * @edid2: pointer to second blob
- * This helper can be used during probing to determine if
- * edid had changed.
- */
-static bool drm_edid_are_equal(const struct edid *edid1, const struct edid
*edid2)
+static bool drm_edid_eq(const struct drm_edid *drm_edid,
+ const void *raw_edid, size_t raw_edid_size)
{
- int edid1_len, edid2_len;
- bool edid1_present = edid1 != NULL;
- bool edid2_present = edid2 != NULL;
+ bool edid1_present = drm_edid && drm_edid->edid && drm_edid->size;
+ bool edid2_present = raw_edid && raw_edid_size;
if (edid1_present != edid2_present)
return false;
- if (edid1) {
- edid1_len = edid_size(edid1);
- edid2_len = edid_size(edid2);
-
- if (edid1_len != edid2_len)
+ if (edid1_present) {
+ if (drm_edid->size != raw_edid_size)
return false;
- if (memcmp(edid1, edid2, edid1_len))
+ if (memcmp(drm_edid->edid, raw_edid, drm_edid->size))
return false;
}
@@ -6936,15 +6926,14 @@ static int _drm_edid_connector_property_update(struct
drm_connector *connector,
int ret;
if (connector->edid_blob_ptr) {
- const struct edid *old_edid = connector->edid_blob_ptr->data;
-
- if (old_edid) {
- if (!drm_edid_are_equal(drm_edid ? drm_edid->edid :
NULL, old_edid)) {
- connector->epoch_counter++;
- drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID
changed, epoch counter %llu\n",
- connector->base.id, connector->name,
- connector->epoch_counter);
- }
+ const void *old_edid = connector->edid_blob_ptr->data;
+ size_t old_edid_size = connector->edid_blob_ptr->length;
+
+ if (old_edid && !drm_edid_eq(drm_edid, old_edid,
old_edid_size)) {
+ connector->epoch_counter++;
+ drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID changed, epoch
counter %llu\n",
+ connector->base.id, connector->name,
+ connector->epoch_counter);
}
}
--
2.39.2
[REBASE 6/7] drm/edid: make drm_edid_are_equal() static
drm_edid_are_equal() is only used within drm_edid.c. Make it static. Do
not encourage more uses of struct edid.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 3 +--
include/drm/drm_edid.h | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4b3ad42a8f95..463fbad85d90 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1827,7 +1827,7 @@ static bool edid_block_is_zero(const void *edid)
* This helper can be used during probing to determine if
* edid had changed.
*/
-bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2)
+static bool drm_edid_are_equal(const struct edid *edid1, const struct edid
*edid2)
{
int edid1_len, edid2_len;
bool edid1_present = edid1 != NULL;
@@ -1849,7 +1849,6 @@ bool drm_edid_are_equal(const struct edid *edid1, const
struct edid *edid2)
return true;
}
-EXPORT_SYMBOL(drm_edid_are_equal);
enum edid_block_status {
EDID_BLOCK_OK = 0,
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 92fff199aa78..b085525e53e2 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -348,8 +348,6 @@ int drm_edid_to_speaker_allocation(const struct edid *edid,
u8 **sadb);
int drm_av_sync_delay(struct drm_connector *connector,
const struct drm_display_mode *mode);
-bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2);
-
int
drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
const struct drm_connector *connector,
--
2.39.2
[REBASE 5/7] drm/edid: avoid drm_edid_find_extension() internally
Prefer the EDID iterators over drm_edid_find_extension() in
drm_edid_has_cta_extension(), even if this leads to more code. The key
is to use the same patterns as much as possible.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c29f31dcc818..4b3ad42a8f95 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4230,11 +4230,21 @@ static bool drm_edid_has_cta_extension(const struct
drm_edid *drm_edid)
{
const struct displayid_block *block;
struct displayid_iter iter;
- int ext_index = 0;
+ struct drm_edid_iter edid_iter;
+ const u8 *ext;
bool found = false;
/* Look for a top level CEA extension block */
- if (drm_edid_find_extension(drm_edid, CEA_EXT, _index))
+ drm_edid_iter_begin(drm_edid, _iter);
+ drm_edid_iter_for_each(ext, _iter) {
+ if (ext[0] == CEA_EXT) {
+ found = true;
+ break;
+ }
+ }
+ drm_edid_iter_end(_iter);
+
+ if (found)
return true;
/* CEA blocks can also be found embedded in a DisplayID block */
--
2.39.2
[REBASE 4/7] drm/edid: rename drm_find_edid_extension() to drm_edid_find_extension()
Follow the drm_edid_ naming convention.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_crtc_internal.h | 2 +-
drivers/gpu/drm/drm_displayid.c | 3 ++-
drivers/gpu/drm/drm_edid.c | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_internal.h
b/drivers/gpu/drm/drm_crtc_internal.h
index 2256893d7d67..25aaae937ceb 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -299,7 +299,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode);
int drm_edid_override_show(struct drm_connector *connector, struct seq_file
*m);
int drm_edid_override_set(struct drm_connector *connector, const void *edid,
size_t size);
int drm_edid_override_reset(struct drm_connector *connector);
-const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid,
+const u8 *drm_edid_find_extension(const struct drm_edid *drm_edid,
int ext_id, int *ext_index);
void drm_edid_cta_sad_get(const struct cea_sad *cta_sad, u8 *sad);
void drm_edid_cta_sad_set(struct cea_sad *cta_sad, const u8 *sad);
diff --git a/drivers/gpu/drm/drm_displayid.c b/drivers/gpu/drm/drm_displayid.c
index f800dc0906d5..9d01d762801f 100644
--- a/drivers/gpu/drm/drm_displayid.c
+++ b/drivers/gpu/drm/drm_displayid.c
@@ -55,9 +55,10 @@ static const u8 *drm_find_displayid_extension(const struct
drm_edid *drm_edid,
int *length, int *idx,
int *ext_index)
{
- const u8 *displayid = drm_find_edid_extension(drm_edid, DISPLAYID_EXT,
ext_index);
const struct displayid_header *base;
+ const u8 *displayid;
+ displayid = drm_edid_find_extension(drm_edid, DISPLAYID_EXT, ext_index);
if (!displayid)
return NULL;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c4f799059522..c29f31dcc818 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4200,7 +4200,7 @@ static int add_detailed_modes(struct drm_connector
*connector,
*
* FIXME: Prefer not returning pointers to raw EDID data.
*/
-const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid,
+const u8 *drm_edid_find_extension(const struct drm_edid *drm_edid,
int ext_id, int *ext_index)
{
const u8 *edid_ext = NULL;
@@ -4234,7 +4234,7 @@ static bool drm_edid_has_cta_extension(const struct
drm_edid *drm_edid)
bool found = false;
/* Look for a top level CEA extension block */
- if (drm_find_edid_extension(drm_edid, CEA_EXT, _index))
+ if (drm_edid_find_extension(drm_edid, CEA_EXT, _index))
return true;
/* CEA blocks can also be found embedded in a DisplayID block */
--
2.39.2
[REBASE 3/7] drm/edid: group struct drm_edid based declarations together
Keep the declarations for struct drm_edid based functions together. Signed-off-by: Jani Nikula --- include/drm/drm_edid.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 324e900cc287..92fff199aa78 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -431,10 +431,6 @@ struct edid *drm_do_get_edid(struct drm_connector *connector, void *data); struct edid *drm_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter); -const struct drm_edid *drm_edid_read_base_block(struct i2c_adapter *adapter); -u32 drm_edid_get_panel_id(const struct drm_edid *drm_edid); -bool drm_edid_match(const struct drm_edid *drm_edid, - const struct drm_edid_ident *ident); struct edid *drm_get_edid_switcheroo(struct drm_connector *connector, struct i2c_adapter *adapter); struct edid *drm_edid_duplicate(const struct edid *edid); @@ -474,6 +470,7 @@ const struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector, const struct drm_edid *drm_edid_read_custom(struct drm_connector *connector, int (*read_block)(void *context, u8 *buf, unsigned int block, size_t len), void *context); +const struct drm_edid *drm_edid_read_base_block(struct i2c_adapter *adapter); const struct drm_edid *drm_edid_read_switcheroo(struct drm_connector *connector, struct i2c_adapter *adapter); int drm_edid_connector_update(struct drm_connector *connector, @@ -484,5 +481,8 @@ void drm_edid_get_product_id(const struct drm_edid *drm_edid, struct drm_edid_product_id *id); void drm_edid_print_product_id(struct drm_printer *p, const struct drm_edid_product_id *id, bool raw); +u32 drm_edid_get_panel_id(const struct drm_edid *drm_edid); +bool drm_edid_match(const struct drm_edid *drm_edid, + const struct drm_edid_ident *ident); #endif /* __DRM_EDID_H__ */ -- 2.39.2
[REBASE 2/7] drm/edid: move all internal declarations to drm_crtc_internal.h
The declarations for internal EDID functions are a bit scattered. Put them all in drm_crtc_internal.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/drm_crtc_internal.h | 6 ++ drivers/gpu/drm/drm_displayid.c | 1 + drivers/gpu/drm/drm_eld.c | 4 +++- drivers/gpu/drm/drm_internal.h | 5 - include/drm/drm_edid.h | 3 --- 5 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h index 0c693229a1c9..2256893d7d67 100644 --- a/drivers/gpu/drm/drm_crtc_internal.h +++ b/drivers/gpu/drm/drm_crtc_internal.h @@ -43,12 +43,14 @@ enum drm_color_range; enum drm_connector_force; enum drm_mode_status; +struct cea_sad; struct drm_atomic_state; struct drm_bridge; struct drm_connector; struct drm_crtc; struct drm_device; struct drm_display_mode; +struct drm_edid; struct drm_file; struct drm_framebuffer; struct drm_mode_create_dumb; @@ -297,6 +299,10 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode); int drm_edid_override_show(struct drm_connector *connector, struct seq_file *m); int drm_edid_override_set(struct drm_connector *connector, const void *edid, size_t size); int drm_edid_override_reset(struct drm_connector *connector); +const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid, + int ext_id, int *ext_index); +void drm_edid_cta_sad_get(const struct cea_sad *cta_sad, u8 *sad); +void drm_edid_cta_sad_set(struct cea_sad *cta_sad, const u8 *sad); /* drm_edid_load.c */ #ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE diff --git a/drivers/gpu/drm/drm_displayid.c b/drivers/gpu/drm/drm_displayid.c index f72a893c7deb..f800dc0906d5 100644 --- a/drivers/gpu/drm/drm_displayid.c +++ b/drivers/gpu/drm/drm_displayid.c @@ -6,6 +6,7 @@ #include #include +#include "drm_crtc_internal.h" #include "drm_displayid_internal.h" static const struct displayid_header * diff --git a/drivers/gpu/drm/drm_eld.c b/drivers/gpu/drm/drm_eld.c index 5177991aa272..c0428d07de53 100644 --- a/drivers/gpu/drm/drm_eld.c +++ b/drivers/gpu/drm/drm_eld.c @@ -3,10 +3,12 @@ * Copyright © 2023 Intel Corporation */ +#include + #include #include -#include "drm_internal.h" +#include "drm_crtc_internal.h" /** * drm_eld_sad_get - get SAD from ELD to struct cea_sad diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h index 2215baef9a3e..690505a1f7a5 100644 --- a/drivers/gpu/drm/drm_internal.h +++ b/drivers/gpu/drm/drm_internal.h @@ -35,7 +35,6 @@ #define DRM_IF_VERSION(maj, min) (maj << 16 | min) -struct cea_sad; struct dentry; struct dma_buf; struct iosys_map; @@ -278,8 +277,4 @@ void drm_framebuffer_print_info(struct drm_printer *p, unsigned int indent, const struct drm_framebuffer *fb); void drm_framebuffer_debugfs_init(struct drm_device *dev); -/* drm_edid.c */ -void drm_edid_cta_sad_get(const struct cea_sad *cta_sad, u8 *sad); -void drm_edid_cta_sad_set(struct cea_sad *cta_sad, const u8 *sad); - #endif /* __DRM_INTERNAL_H__ */ diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 8e0e32349332..324e900cc287 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -485,7 +485,4 @@ void drm_edid_get_product_id(const struct drm_edid *drm_edid, void drm_edid_print_product_id(struct drm_printer *p, const struct drm_edid_product_id *id, bool raw); -const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid, - int ext_id, int *ext_index); - #endif /* __DRM_EDID_H__ */ -- 2.39.2
[REBASE 1/7] drm/displayid: move drm_displayid.h to drm_displayd_internal.h
There are no exported symbols for displayid, and it's all internal
interfaces. Move the header to drivers/gpu/drm/drm_displayd_internal.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_displayid.c | 3 ++-
.../gpu/drm/drm_displayid_internal.h | 5 +++--
drivers/gpu/drm/drm_edid.c | 2 +-
3 files changed, 6 insertions(+), 4 deletions(-)
rename include/drm/drm_displayid.h => drivers/gpu/drm/drm_displayid_internal.h
(98%)
diff --git a/drivers/gpu/drm/drm_displayid.c b/drivers/gpu/drm/drm_displayid.c
index 9edc111be7ee..f72a893c7deb 100644
--- a/drivers/gpu/drm/drm_displayid.c
+++ b/drivers/gpu/drm/drm_displayid.c
@@ -3,10 +3,11 @@
* Copyright © 2021 Intel Corporation
*/
-#include
#include
#include
+#include "drm_displayid_internal.h"
+
static const struct displayid_header *
displayid_get_header(const u8 *displayid, int length, int index)
{
diff --git a/include/drm/drm_displayid.h
b/drivers/gpu/drm/drm_displayid_internal.h
similarity index 98%
rename from include/drm/drm_displayid.h
rename to drivers/gpu/drm/drm_displayid_internal.h
index 566497eeb3b8..56fd3bb0a779 100644
--- a/include/drm/drm_displayid.h
+++ b/drivers/gpu/drm/drm_displayid_internal.h
@@ -19,8 +19,9 @@
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#ifndef DRM_DISPLAYID_H
-#define DRM_DISPLAYID_H
+
+#ifndef __DRM_DISPLAYID_INTERNAL_H__
+#define __DRM_DISPLAYID_INTERNAL_H__
#include
#include
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1400722ae3fe..c4f799059522 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -40,7 +40,6 @@
#include
#include
-#include
#include
#include
#include
@@ -48,6 +47,7 @@
#include
#include "drm_crtc_internal.h"
+#include "drm_displayid_internal.h"
#include "drm_internal.h"
static int oui(u8 first, u8 second, u8 third)
--
2.39.2
[REBASE 0/7] drm/edid: cleanups, rebase
Rebase. Jani Nikula (7): drm/displayid: move drm_displayid.h to drm_displayd_internal.h drm/edid: move all internal declarations to drm_crtc_internal.h drm/edid: group struct drm_edid based declarations together drm/edid: rename drm_find_edid_extension() to drm_edid_find_extension() drm/edid: avoid drm_edid_find_extension() internally drm/edid: make drm_edid_are_equal() static drm/edid: make drm_edid_are_equal() more convenient for its single user drivers/gpu/drm/drm_crtc_internal.h | 6 ++ drivers/gpu/drm/drm_displayid.c | 7 ++- .../gpu/drm/drm_displayid_internal.h | 5 +- drivers/gpu/drm/drm_edid.c| 60 +-- drivers/gpu/drm/drm_eld.c | 4 +- drivers/gpu/drm/drm_internal.h| 5 -- include/drm/drm_edid.h| 13 ++-- 7 files changed, 50 insertions(+), 50 deletions(-) rename include/drm/drm_displayid.h => drivers/gpu/drm/drm_displayid_internal.h (98%) -- 2.39.2
✗ Fi.CI.BAT: failure for drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI (rev2)
== Series Details == Series: drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI (rev2) URL : https://patchwork.freedesktop.org/series/132479/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132479v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132479v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132479v2, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/index.html Participating hosts (37 -> 33) -- Additional (3): bat-kbl-2 fi-cfl-8109u bat-arls-2 Missing(7): fi-kbl-7567u fi-bsw-n3050 fi-apl-guc fi-snb-2520m fi-glk-j4005 fi-elk-e7500 bat-jsl-1 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132479v2: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-rkl-11600: [PASS][1] -> [SKIP][2] +5 other tests skip [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - fi-rkl-11600: NOTRUN -> [SKIP][3] +11 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-rkl-11600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-xr24.html Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-rkl-11600: [SKIP][4] ([i915#4103]) -> [SKIP][5] +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-rkl-11600: [SKIP][6] ([i915#3555] / [i915#3840]) -> [SKIP][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_...@dsc-basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-rkl-11600/igt@kms_...@dsc-basic.html Known issues Here are the changes found in Patchwork_132479v2 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-2: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/bat-arls-2/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-rkl-11600: [PASS][9] -> [SKIP][10] ([i915#2582]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@eof.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-rkl-11600/igt@fb...@eof.html * igt@fbdev@info: - fi-rkl-11600: [PASS][11] -> [SKIP][12] ([i915#1849] / [i915#2582]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@info.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-rkl-11600/igt@fb...@info.html - bat-kbl-2: NOTRUN -> [SKIP][13] ([i915#1849]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/bat-kbl-2/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - fi-cfl-8109u: NOTRUN -> [SKIP][14] ([i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][15] +39 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-cfl-8109u: NOTRUN -> [SKIP][16] ([i915#4613]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html - bat-arls-2: NOTRUN -> [SKIP][17] ([i915#10213]) +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-arls-2: NOTRUN -> [SKIP][18] ([i915#4083]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132479v2/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][19] ([i915#10196] / [i915#4077]) +2 other tests skip
Re: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL
On Tue, 2024-04-16 at 08:20 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Monday, April 15, 2024 3:39 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> > ; Nikula, Jani
> > Subject: Re: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source
> > in
> > ALPM_CTL
> >
> > On Fri, 2024-04-12 at 21:22 +0530, Animesh Manna wrote:
> > > Set the Link Off Between Frames Enable bit in ALPM_CTL register.
> > >
> > > Signed-off-by: Animesh Manna
> > > ---
> > > drivers/gpu/drm/i915/display/intel_alpm.c | 5 +
> > > drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> > > 2 files changed, 6 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > > index 699f2f051766..ae894c85233c 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > > @@ -325,6 +325,11 @@ static void lnl_alpm_configure(struct
> > > intel_dp
> > > *intel_dp)
> > >
> > > ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp-
> > > > alpm_parameters.fast_wake_lines);
> > > }
> > >
> > > + if (intel_dp->lobf_supported) {
> > > + alpm_ctl |= ALPM_CTL_LOBF_ENABLE;
> > > + intel_dp->lobf_enabled = true;
> > > + }
> > > +
> >
> > I don't see lnl_alpm_configure being called for lobf case in your
> > patches.
>
> Enabling/Disabling LOBF will be done along with alpm(aux-wake/aux-
> less) enablement.
> Here lobf_supported flag is the switch to enable LOBF or not.
> Please let me know if I am missing anything.
I might be missing something. E.g. in case of aux_less_alpm PR
lnl_alpm_configure is called from intel_psr_enable_source. Where it is
called for lobf case?
BR,
Jouni Högander
>
> Regards,
> Animesh
>
> >
> > BR,
> >
> > Jouni Högander
> >
> > > alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp-
> > > > alpm_parameters.check_entry_lines);
> > >
> > > intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> > > alpm_ctl);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index 6116c383b543..f61ba582429b 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1884,6 +1884,7 @@ struct intel_dp {
> > >
> > > /* LOBF flags*/
> > > bool lobf_supported;
> > > + bool lobf_enabled;
> > > };
> > >
> > > enum lspcon_vendor {
>
Re: [PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf
On Tue, 2024-04-16 at 08:15 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Monday, April 15, 2024 3:36 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> > ; Nikula, Jani
> > Subject: Re: [PATCH v2 4/6] drm/i915/alpm: Add compute config for
> > lobf
> >
> > On Fri, 2024-04-12 at 21:22 +0530, Animesh Manna wrote:
> > > Link Off Between Active Frames, is a new feature for eDP that
> > > allows
> > > the panel to go to lower power state after transmission of data.
> > > This
> > > is a feature on top of ALPM, AS SDP.
> > > Add compute config during atomic-check phase.
> > >
> > > v1: RFC version.
> > > v2: Add separate flag for auxless-alpm. [Jani]
> > >
> > > Signed-off-by: Animesh Manna
> > > ---
> > > drivers/gpu/drm/i915/display/intel_alpm.c | 44
> > > +++
> > > drivers/gpu/drm/i915/display/intel_alpm.h | 5 +++
> > > .../drm/i915/display/intel_display_types.h | 4 ++
> > > drivers/gpu/drm/i915/display/intel_dp.c | 5 +++
> > > 4 files changed, 58 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > > index 13bac3e8c8fa..699f2f051766 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > > @@ -11,6 +11,16 @@
> > > #include "intel_dp_aux.h"
> > > #include "intel_psr_regs.h"
> > >
> > > +bool intel_dp_get_aux_less_alpm_status(struct intel_dp
> > > *intel_dp) {
> > > + u8 alpm_caps = 0;
> > > +
> > > + if (drm_dp_dpcd_readb(_dp->aux,
> > > DP_RECEIVER_ALPM_CAP,
> > > + _caps) != 1)
> > > + return false;
> > > + return alpm_caps & DP_ALPM_AUX_LESS_CAP; }
> > > +
> > > /*
> > > * See Bspec: 71632 for the table
> > > *
> > > @@ -242,6 +252,40 @@ bool intel_alpm_compute_params(struct
> > > intel_dp
> > > *intel_dp,
> > > return true;
> > > }
> > >
> > > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
> > > + struct intel_crtc_state
> > > *crtc_state,
> > > + struct drm_connector_state
> > > *conn_state)
> > > +{
> > > + struct drm_display_mode *adjusted_mode = _state-
> > > > hw.adjusted_mode;
> > > + int waketime_in_lines, first_sdp_position;
> > > + int context_latency, guardband;
> > > +
> > > + intel_dp->lobf_supported = false;
> > > +
> > > + if (!intel_dp_is_edp(intel_dp))
> > > + return;
> > > +
> > > + if (!intel_dp_as_sdp_supported(intel_dp))
> > > + return;
> > > +
> > > + if (crtc_state->has_psr2 || crtc_state->has_panel_replay)
> > > + return;
> >
> > LOBF is not supported with PSR1? I think checking crtc_state-
> > >has_psr is
> > enough. That covers PSR1/2 and Panel Replay.
>
> Ok.
>
> >
> > > +
> > > + if (intel_alpm_compute_params(intel_dp, crtc_state)) {
> > > + context_latency = adjusted_mode-
> > > >crtc_vblank_start -
> > > adjusted_mode->crtc_vdisplay;
> > > + guardband = adjusted_mode->crtc_vtotal -
> > > + adjusted_mode->crtc_vdisplay -
> > > context_latency;
> > > + first_sdp_position = adjusted_mode->crtc_vtotal -
> > > adjusted_mode->crtc_vsync_start;
> > > + if (intel_dp-
> > > >alpm_parameters.auxless_alpm_supported)
> > > + waketime_in_lines = intel_dp-
> > > > alpm_parameters.io_wake_lines;
> > > + else
> > > + waketime_in_lines = intel_dp-
> > > > alpm_parameters.fast_wake_lines;
> > > +
> > > + if ((context_latency + guardband) >
> > > (first_sdp_position + waketime_in_lines))
> > > + intel_dp->lobf_supported = true;
> > > + }
> >
> > You are not checking display version here. This is supported only
> > on LNL and
> > onwards.
>
> Sure will add, thought as-sdp-support will take care, but it has
> display_ver >= 13.
>
> >
> > > +}
> > > +
> > > static void lnl_alpm_configure(struct intel_dp *intel_dp)
> > > {
> > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > diff
> > > --git a/drivers/gpu/drm/i915/display/intel_alpm.h
> > > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > > index c45d078e5a6b..c341d2c2b7f7 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > > @@ -10,9 +10,14 @@
> > >
> > > struct intel_dp;
> > > struct intel_crtc_state;
> > > +struct drm_connector_state;
> > >
> > > +bool intel_dp_get_aux_less_alpm_status(struct intel_dp
> > > *intel_dp);
> > > bool intel_alpm_compute_params(struct intel_dp *intel_dp,
> > > struct intel_crtc_state
> > > *crtc_state);
> > > +void
Re: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are
> on HDMI TMDS operation for DISPLAY_VER >= 14.
>
> --v2
> -Wa to be mentioned in comments not in commit message [Jani]
> -Remove blankline [Jani]
>
> Bspec: 49273
> Bspec: 69964
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_hdcp.c | 22 ++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index d5ed4c7dfbc0..4b1833742245 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -30,6 +30,26 @@
> #define KEY_LOAD_TRIES 5
> #define HDCP2_LC_RETRY_CNT 3
>
> +/*
> + * WA: 16022217614
> + * Disable HDCP Line Rekeying when HDCP ver > 1.4
> + * and when we are on HDMI TMDS operation
> + * for DISPLAY_VEY >= 14.
Sorry to be nitpicking here, but we really don't want to duplicate in
comments what the code is already saying.
BR,
Jani.
> + */
> +static void
> +intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
> + struct intel_hdcp *hdcp)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
> + if (encoder->type != INTEL_OUTPUT_HDMI)
> + return;
> +
> + if (DISPLAY_VER(dev_priv) >= 14)
> + intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(hdcp->cpu_transcoder),
> + TRANS_DDI_HDCP_LINE_REKEY_DISABLE, 1);
> +}
> +
> static int intel_conn_to_vcpi(struct intel_atomic_state *state,
> struct intel_connector *connector)
> {
> @@ -2005,6 +2025,8 @@ static int _intel_hdcp2_enable(struct
> intel_atomic_state *state,
> connector->base.base.id, connector->base.name,
> hdcp->content_type);
>
> + intel_hdcp_disable_hdcp_line_rekeying(connector->encoder, hdcp);
> +
> ret = hdcp2_authenticate_and_encrypt(state, connector);
> if (ret) {
> drm_dbg_kms(>drm, "HDCP2 Type%d Enabling Failed. (%d)\n",
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3f34efcd7d6c..fbf4623cd536 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5630,6 +5630,7 @@ enum skl_power_gate {
> #define TRANS_DDI_EDP_INPUT_B_ONOFF (5 << 12)
> #define TRANS_DDI_EDP_INPUT_C_ONOFF (6 << 12)
> #define TRANS_DDI_EDP_INPUT_D_ONOFF (7 << 12)
> +#define TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(12)
> #define TRANS_DDI_MST_TRANSPORT_SELECT_MASK REG_GENMASK(11, 10)
> #define TRANS_DDI_MST_TRANSPORT_SELECT(trans) \
> REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, trans)
--
Jani Nikula, Intel
RE: [PATCH v2 6/6] drm/i915/alpm: Add debugfs for LOBF
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, April 15, 2024 5:23 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Murthy, Arun R ;
> Manna, Animesh
> Subject: Re: [PATCH v2 6/6] drm/i915/alpm: Add debugfs for LOBF
>
> On Fri, 12 Apr 2024, Animesh Manna wrote:
> > For validation purpose add debugfs for LOBF.
> >
> > Signed-off-by: Animesh Manna
> > ---
> > drivers/gpu/drm/i915/display/intel_alpm.c | 47 +++
> > drivers/gpu/drm/i915/display/intel_alpm.h | 2 +
> > .../drm/i915/display/intel_display_debugfs.c | 2 +
> > 3 files changed, 51 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index ae894c85233c..21dfc06952d7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -339,3 +339,50 @@ void intel_alpm_configure(struct intel_dp
> > *intel_dp) {
> > lnl_alpm_configure(intel_dp);
> > }
> > +
> > +static int i915_edp_lobf_support_show(struct seq_file *m, void *data)
> > +{
> > + struct intel_connector *connector = m->private;
> > + struct intel_dp *intel_dp = intel_attached_dp(connector);
> > +
> > + seq_printf(m, "LOBF support: = %s",
> > + str_yes_no(intel_dp->lobf_supported));
>
> If you have individual debugfs files, where the name tells you what it's
> about,
> what's the point in printing "LOBF support" here?
>
> Moreover, please be more careful, this now prints "LOBF support: = yes".
> And you'll want the \n in the end.
Ok.
>
> > +
> > + return 0;
> > +}
> > +
> > +DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_support);
> > +
> > +static int i915_edp_lobf_status_show(struct seq_file *m, void *data)
> > +{
> > + struct intel_connector *connector = m->private;
> > + struct intel_dp *intel_dp = intel_attached_dp(connector);
> > + const char *status;
> > +
> > + if (intel_dp->lobf_enabled)
> > + status = "enabled";
> > + else
> > + status = "disabled";
> > +
> > + seq_printf(m, "LOBF: %s\n", status);
>
> Ditto. But there's also str_enabled_disabled().
>
> I mean you could have a read-only info file which prints all of this info with
> the prefixes. But if it's one attribute per file, why have the extra prints?
> Maybe it should be just alpm info? Idk.
Sure, will go with a single debugfs entry lobf_info. Thanks for the input.
Regards,
Animesh
>
> BR,
> Jani.
>
> > +
> > + return 0;
> > +}
> > +
> > +DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_status);
> > +
> > +void intel_alpm_lobf_debugfs_add(struct intel_connector *connector) {
> > + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> > + struct dentry *root = connector->base.debugfs_entry;
> > +
> > + if (DISPLAY_VER(i915) >= 20 &&
> > + connector->base.connector_type !=
> DRM_MODE_CONNECTOR_eDP)
> > + return;
> > +
> > + debugfs_create_file("i915_edp_lobf_supported", 0444, root,
> > + connector, _edp_lobf_support_fops);
> > +
> > + debugfs_create_file("i915_edp_lobf_status", 0444, root,
> > + connector, _edp_lobf_status_fops); }
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h
> > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > index c341d2c2b7f7..66e81ed8b2fb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > @@ -11,6 +11,7 @@
> > struct intel_dp;
> > struct intel_crtc_state;
> > struct drm_connector_state;
> > +struct intel_connector;
> >
> > bool intel_dp_get_aux_less_alpm_status(struct intel_dp *intel_dp);
> > bool intel_alpm_compute_params(struct intel_dp *intel_dp, @@ -19,5
> > +20,6 @@ void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
> > struct intel_crtc_state *crtc_state,
> > struct drm_connector_state *conn_state);
> void
> > intel_alpm_configure(struct intel_dp *intel_dp);
> > +void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index 0feffe8d4e45..ba1530149836 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -13,6 +13,7 @@
> > #include "i915_debugfs.h"
> > #include "i915_irq.h"
> > #include "i915_reg.h"
> > +#include "intel_alpm.h"
> > #include "intel_crtc.h"
> > #include "intel_de.h"
> > #include "intel_crtc_state_dump.h"
> > @@ -1542,6 +1543,7 @@ void intel_connector_debugfs_add(struct
> intel_connector *connector)
> > intel_drrs_connector_debugfs_add(connector);
> > intel_pps_connector_debugfs_add(connector);
> > intel_psr_connector_debugfs_add(connector);
> > + intel_alpm_lobf_debugfs_add(connector);
> >
>
RE: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, April 15, 2024 5:19 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Murthy, Arun R ;
> Manna, Animesh
> Subject: Re: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in
> ALPM_CTL
>
> On Fri, 12 Apr 2024, Animesh Manna wrote:
> > Set the Link Off Between Frames Enable bit in ALPM_CTL register.
> >
> > Signed-off-by: Animesh Manna
> > ---
> > drivers/gpu/drm/i915/display/intel_alpm.c | 5 +
> > drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 699f2f051766..ae894c85233c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -325,6 +325,11 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp)
> >ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp-
> >alpm_parameters.fast_wake_lines);
> > }
> >
> > + if (intel_dp->lobf_supported) {
> > + alpm_ctl |= ALPM_CTL_LOBF_ENABLE;
> > + intel_dp->lobf_enabled = true;
>
> Gut feeling says this should not be part of intel_dp but rather crtc state.
Kept with the same place with alpm parameters, will think over again.
Regards,
Animesh
>
> BR,
> Jani.
>
> > + }
> > +
> > alpm_ctl |=
> > ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp-
> >alpm_parameters.check_entry_lines)
> > ;
> >
> > intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl); diff
> > --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 6116c383b543..f61ba582429b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1884,6 +1884,7 @@ struct intel_dp {
> >
> > /* LOBF flags*/
> > bool lobf_supported;
> > + bool lobf_enabled;
> > };
> >
> > enum lspcon_vendor {
>
> --
> Jani Nikula, Intel
Re: linux-next: build warnings after merge of the drm-misc tree
On 16/04/2024 09:31, Stephen Rothwell wrote:
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced these warnings:
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Excess function parameter
'drm_scanout_buffer' description in 'drm_fb_dma_get_scanout_buffer'
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Function parameter or struct
member 'sb' not described in 'drm_fb_dma_get_scanout_buffer'
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Excess function parameter
'drm_scanout_buffer' description in 'drm_fb_dma_get_scanout_buffer'
Hi,
Thanks for pointing that out. The parameter name is 'sb' and not
'drm_scanout_buffer', I will send a fix.
Best regards,
--
Jocelyn
Introduced by commit
879b3b6511fe ("drm/fb_dma: Add generic get_scanout_buffer() for drm_panic")
RE: [PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf
> -Original Message- > From: Nikula, Jani > Sent: Monday, April 15, 2024 5:18 PM > To: Manna, Animesh ; intel- > g...@lists.freedesktop.org > Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni > ; Murthy, Arun R ; > Manna, Animesh > Subject: Re: [PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf > > On Fri, 12 Apr 2024, Animesh Manna wrote: > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h > > b/drivers/gpu/drm/i915/display/intel_alpm.h > > index c45d078e5a6b..c341d2c2b7f7 100644 > > --- a/drivers/gpu/drm/i915/display/intel_alpm.h > > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h > > @@ -10,9 +10,14 @@ > > > > struct intel_dp; > > struct intel_crtc_state; > > +struct drm_connector_state; > > > > +bool intel_dp_get_aux_less_alpm_status(struct intel_dp *intel_dp); > > The names here are supposed to be intel_alpm_*. Is the function in the > wrong place or is the name wrong? Sure, will change the function name to intel_alpm_get_auxless_status(). Regards, Animesh > > BR, > Jani. > > > bool intel_alpm_compute_params(struct intel_dp *intel_dp, > >struct intel_crtc_state *crtc_state); > > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, > > + struct intel_crtc_state *crtc_state, > > + struct drm_connector_state *conn_state); > > void intel_alpm_configure(struct intel_dp *intel_dp); > > > > #endif > > -- > Jani Nikula, Intel
✗ Fi.CI.BAT: failure for Disable DPLS Gating around PPS
== Series Details == Series: Disable DPLS Gating around PPS URL : https://patchwork.freedesktop.org/series/132489/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132489v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132489v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132489v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/index.html Participating hosts (37 -> 39) -- Additional (5): bat-dg1-7 fi-cfl-8109u fi-kbl-8809g bat-mtlp-8 bat-arls-3 Missing(3): bat-arls-4 fi-snb-2520m fi-elk-e7500 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132489v1: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-rkl-11600: [PASS][1] -> [SKIP][2] +5 other tests skip [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - fi-rkl-11600: NOTRUN -> [SKIP][3] +11 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-rkl-11600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-xr24.html Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-rkl-11600: [SKIP][4] ([i915#4103]) -> [SKIP][5] +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-rkl-11600: [SKIP][6] ([i915#3555] / [i915#3840]) -> [SKIP][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@kms_...@dsc-basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-rkl-11600/igt@kms_...@dsc-basic.html Known issues Here are the changes found in Patchwork_132489v1 that come from known issues: ### IGT changes ### Issues hit * igt@core_hotunplug@unbind-rebind: - fi-kbl-8809g: NOTRUN -> [DMESG-WARN][8] ([i915#10462]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-kbl-8809g/igt@core_hotunp...@unbind-rebind.html * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#9318]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-arls-3: NOTRUN -> [SKIP][10] ([i915#9318]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - fi-rkl-11600: [PASS][11] -> [SKIP][12] ([i915#2582]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@eof.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-rkl-11600/igt@fb...@eof.html * igt@fbdev@info: - fi-rkl-11600: [PASS][13] -> [SKIP][14] ([i915#1849] / [i915#2582]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14583/fi-rkl-11600/igt@fb...@info.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-rkl-11600/igt@fb...@info.html - fi-kbl-8809g: NOTRUN -> [SKIP][15] ([i915#1849]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-kbl-8809g/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - fi-cfl-8109u: NOTRUN -> [SKIP][16] ([i915#2190]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html - fi-kbl-8809g: NOTRUN -> [SKIP][17] ([i915#2190]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-8809g: NOTRUN -> [SKIP][18] ([i915#4613]) +3 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/fi-kbl-8809g/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][19] ([i915#10213]) +3 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132489v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html *
RE: [PATCH v2 2/6] drm/i915/alpm: Move alpm related code to a new file
> -Original Message- > From: Nikula, Jani > Sent: Monday, April 15, 2024 5:17 PM > To: Manna, Animesh ; intel- > g...@lists.freedesktop.org > Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni > ; Murthy, Arun R ; > Manna, Animesh > Subject: Re: [PATCH v2 2/6] drm/i915/alpm: Move alpm related code to a > new file > > On Fri, 12 Apr 2024, Animesh Manna wrote: > > Move ALPM feature related code as it will be used for non-psr panel > > also thorugh LOBF feature. > > > > Signed-off-by: Animesh Manna > > --- > > drivers/gpu/drm/i915/Makefile | 1 + > > drivers/gpu/drm/i915/display/intel_alpm.c | 292 > > ++ drivers/gpu/drm/i915/display/intel_alpm.h | > > 18 ++ drivers/gpu/drm/i915/display/intel_psr.c | 280 > > + > > 4 files changed, 314 insertions(+), 277 deletions(-) create mode > > 100644 drivers/gpu/drm/i915/display/intel_alpm.c > > create mode 100644 drivers/gpu/drm/i915/display/intel_alpm.h > > > > diff --git a/drivers/gpu/drm/i915/Makefile > > b/drivers/gpu/drm/i915/Makefile index af9e871daf1d..c12b7bd98320 > > 100644 > > --- a/drivers/gpu/drm/i915/Makefile > > +++ b/drivers/gpu/drm/i915/Makefile > > @@ -246,6 +246,7 @@ i915-y += \ > > display/intel_atomic.o \ > > display/intel_atomic_plane.o \ > > display/intel_audio.o \ > > + display/intel_alpm.o \ > > display/intel_bios.o \ > > display/intel_bw.o \ > > display/intel_cdclk.o \ > > That's not sorted. Agree. Will take care in next version. Regards, Animesh > > BR, > Jani. > > > -- > Jani Nikula, Intel
RE: [PATCH v2 6/6] drm/i915/alpm: Add debugfs for LOBF
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 15, 2024 3:44 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v2 6/6] drm/i915/alpm: Add debugfs for LOBF
>
> On Fri, 2024-04-12 at 21:22 +0530, Animesh Manna wrote:
> > For validation purpose add debugfs for LOBF.
> >
> > Signed-off-by: Animesh Manna
> > ---
> > drivers/gpu/drm/i915/display/intel_alpm.c | 47
> > +++
> > drivers/gpu/drm/i915/display/intel_alpm.h | 2 +
> > .../drm/i915/display/intel_display_debugfs.c | 2 +
> > 3 files changed, 51 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index ae894c85233c..21dfc06952d7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -339,3 +339,50 @@ void intel_alpm_configure(struct intel_dp
> > *intel_dp)
> > {
> > lnl_alpm_configure(intel_dp);
> > }
> > +
> > +static int i915_edp_lobf_support_show(struct seq_file *m, void
> > *data)
> > +{
> > + struct intel_connector *connector = m->private;
> > + struct intel_dp *intel_dp = intel_attached_dp(connector);
> > +
> > + seq_printf(m, "LOBF support: = %s",
> > + str_yes_no(intel_dp->lobf_supported));
> > +
> > + return 0;
>
> What this debugfs is telling? Lobf may be supported by platform, but not
> enabled because PSR is enabled. Saying LOBF support = no is misleading.
How about "LOBF entry criteria met = yes/no"?
>
> > +}
> > +
> > +DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_support);
> > +
> > +static int i915_edp_lobf_status_show(struct seq_file *m, void *data)
> > +{
> > + struct intel_connector *connector = m->private;
> > + struct intel_dp *intel_dp = intel_attached_dp(connector);
> > + const char *status;
> > +
> > + if (intel_dp->lobf_enabled)
>
> I think better option is to read it from the registers.
Sure, will add.
Regards,
Animesh
>
> BR,
>
> Jouni Högander
>
> > + status = "enabled";
> > + else
> > + status = "disabled";
> > +
> > + seq_printf(m, "LOBF: %s\n", status);
> > +
> > + return 0;
> > +}
> > +
> > +DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_status);
> > +
> > +void intel_alpm_lobf_debugfs_add(struct intel_connector *connector) {
> > + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> > + struct dentry *root = connector->base.debugfs_entry;
> > +
> > + if (DISPLAY_VER(i915) >= 20 &&
> > + connector->base.connector_type !=
> DRM_MODE_CONNECTOR_eDP)
> > + return;
> > +
> > + debugfs_create_file("i915_edp_lobf_supported", 0444, root,
> > + connector, _edp_lobf_support_fops);
> > +
> > + debugfs_create_file("i915_edp_lobf_status", 0444, root,
> > + connector, _edp_lobf_status_fops); }
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h
> > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > index c341d2c2b7f7..66e81ed8b2fb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > @@ -11,6 +11,7 @@
> > struct intel_dp;
> > struct intel_crtc_state;
> > struct drm_connector_state;
> > +struct intel_connector;
> >
> > bool intel_dp_get_aux_less_alpm_status(struct intel_dp *intel_dp);
> > bool intel_alpm_compute_params(struct intel_dp *intel_dp, @@ -19,5
> > +20,6 @@ void intel_alpm_compute_lobf_config(struct intel_dp
> > *intel_dp,
> > struct intel_crtc_state
> > *crtc_state,
> > struct drm_connector_state
> > *conn_state);
> > void intel_alpm_configure(struct intel_dp *intel_dp);
> > +void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index 0feffe8d4e45..ba1530149836 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -13,6 +13,7 @@
> > #include "i915_debugfs.h"
> > #include "i915_irq.h"
> > #include "i915_reg.h"
> > +#include "intel_alpm.h"
> > #include "intel_crtc.h"
> > #include "intel_de.h"
> > #include "intel_crtc_state_dump.h"
> > @@ -1542,6 +1543,7 @@ void intel_connector_debugfs_add(struct
> > intel_connector *connector)
> > intel_drrs_connector_debugfs_add(connector);
> > intel_pps_connector_debugfs_add(connector);
> > intel_psr_connector_debugfs_add(connector);
> > + intel_alpm_lobf_debugfs_add(connector);
> >
> > if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> > connector_type == DRM_MODE_CONNECTOR_HDMIA ||
RE: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 15, 2024 3:39 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in
> ALPM_CTL
>
> On Fri, 2024-04-12 at 21:22 +0530, Animesh Manna wrote:
> > Set the Link Off Between Frames Enable bit in ALPM_CTL register.
> >
> > Signed-off-by: Animesh Manna
> > ---
> > drivers/gpu/drm/i915/display/intel_alpm.c | 5 +
> > drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 699f2f051766..ae894c85233c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -325,6 +325,11 @@ static void lnl_alpm_configure(struct intel_dp
> > *intel_dp)
> > ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp-
> > >alpm_parameters.fast_wake_lines);
> > }
> >
> > + if (intel_dp->lobf_supported) {
> > + alpm_ctl |= ALPM_CTL_LOBF_ENABLE;
> > + intel_dp->lobf_enabled = true;
> > + }
> > +
>
> I don't see lnl_alpm_configure being called for lobf case in your patches.
Enabling/Disabling LOBF will be done along with alpm(aux-wake/aux-less)
enablement.
Here lobf_supported flag is the switch to enable LOBF or not.
Please let me know if I am missing anything.
Regards,
Animesh
>
> BR,
>
> Jouni Högander
>
> > alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp-
> > >alpm_parameters.check_entry_lines);
> >
> > intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 6116c383b543..f61ba582429b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1884,6 +1884,7 @@ struct intel_dp {
> >
> > /* LOBF flags*/
> > bool lobf_supported;
> > + bool lobf_enabled;
> > };
> >
> > enum lspcon_vendor {
✗ Fi.CI.SPARSE: warning for Disable DPLS Gating around PPS
== Series Details == Series: Disable DPLS Gating around PPS URL : https://patchwork.freedesktop.org/series/132489/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
RE: [PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 15, 2024 3:36 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf
>
> On Fri, 2024-04-12 at 21:22 +0530, Animesh Manna wrote:
> > Link Off Between Active Frames, is a new feature for eDP that allows
> > the panel to go to lower power state after transmission of data. This
> > is a feature on top of ALPM, AS SDP.
> > Add compute config during atomic-check phase.
> >
> > v1: RFC version.
> > v2: Add separate flag for auxless-alpm. [Jani]
> >
> > Signed-off-by: Animesh Manna
> > ---
> > drivers/gpu/drm/i915/display/intel_alpm.c | 44
> > +++
> > drivers/gpu/drm/i915/display/intel_alpm.h | 5 +++
> > .../drm/i915/display/intel_display_types.h | 4 ++
> > drivers/gpu/drm/i915/display/intel_dp.c | 5 +++
> > 4 files changed, 58 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 13bac3e8c8fa..699f2f051766 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -11,6 +11,16 @@
> > #include "intel_dp_aux.h"
> > #include "intel_psr_regs.h"
> >
> > +bool intel_dp_get_aux_less_alpm_status(struct intel_dp *intel_dp) {
> > + u8 alpm_caps = 0;
> > +
> > + if (drm_dp_dpcd_readb(_dp->aux, DP_RECEIVER_ALPM_CAP,
> > + _caps) != 1)
> > + return false;
> > + return alpm_caps & DP_ALPM_AUX_LESS_CAP; }
> > +
> > /*
> > * See Bspec: 71632 for the table
> > *
> > @@ -242,6 +252,40 @@ bool intel_alpm_compute_params(struct intel_dp
> > *intel_dp,
> > return true;
> > }
> >
> > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
> > + struct intel_crtc_state
> > *crtc_state,
> > + struct drm_connector_state
> > *conn_state)
> > +{
> > + struct drm_display_mode *adjusted_mode = _state-
> > >hw.adjusted_mode;
> > + int waketime_in_lines, first_sdp_position;
> > + int context_latency, guardband;
> > +
> > + intel_dp->lobf_supported = false;
> > +
> > + if (!intel_dp_is_edp(intel_dp))
> > + return;
> > +
> > + if (!intel_dp_as_sdp_supported(intel_dp))
> > + return;
> > +
> > + if (crtc_state->has_psr2 || crtc_state->has_panel_replay)
> > + return;
>
> LOBF is not supported with PSR1? I think checking crtc_state->has_psr is
> enough. That covers PSR1/2 and Panel Replay.
Ok.
>
> > +
> > + if (intel_alpm_compute_params(intel_dp, crtc_state)) {
> > + context_latency = adjusted_mode->crtc_vblank_start -
> > adjusted_mode->crtc_vdisplay;
> > + guardband = adjusted_mode->crtc_vtotal -
> > + adjusted_mode->crtc_vdisplay -
> > context_latency;
> > + first_sdp_position = adjusted_mode->crtc_vtotal -
> > adjusted_mode->crtc_vsync_start;
> > + if (intel_dp->alpm_parameters.auxless_alpm_supported)
> > + waketime_in_lines = intel_dp-
> > >alpm_parameters.io_wake_lines;
> > + else
> > + waketime_in_lines = intel_dp-
> > >alpm_parameters.fast_wake_lines;
> > +
> > + if ((context_latency + guardband) >
> > (first_sdp_position + waketime_in_lines))
> > + intel_dp->lobf_supported = true;
> > + }
>
> You are not checking display version here. This is supported only on LNL and
> onwards.
Sure will add, thought as-sdp-support will take care, but it has display_ver >=
13.
>
> > +}
> > +
> > static void lnl_alpm_configure(struct intel_dp *intel_dp)
> > {
> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); diff
> > --git a/drivers/gpu/drm/i915/display/intel_alpm.h
> > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > index c45d078e5a6b..c341d2c2b7f7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > @@ -10,9 +10,14 @@
> >
> > struct intel_dp;
> > struct intel_crtc_state;
> > +struct drm_connector_state;
> >
> > +bool intel_dp_get_aux_less_alpm_status(struct intel_dp *intel_dp);
> > bool intel_alpm_compute_params(struct intel_dp *intel_dp,
> > struct intel_crtc_state *crtc_state);
> > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
> > + struct intel_crtc_state
> > *crtc_state,
> > + struct drm_connector_state
> > *conn_state);
> > void intel_alpm_configure(struct intel_dp *intel_dp);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> >
[PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI
Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are
on HDMI TMDS operation for DISPLAY_VER >= 14.
--v2
-Wa to be mentioned in comments not in commit message [Jani]
-Remove blankline [Jani]
Bspec: 49273
Bspec: 69964
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 22 ++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index d5ed4c7dfbc0..4b1833742245 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -30,6 +30,26 @@
#define KEY_LOAD_TRIES 5
#define HDCP2_LC_RETRY_CNT 3
+/*
+ * WA: 16022217614
+ * Disable HDCP Line Rekeying when HDCP ver > 1.4
+ * and when we are on HDMI TMDS operation
+ * for DISPLAY_VEY >= 14.
+ */
+static void
+intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
+ struct intel_hdcp *hdcp)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
+ if (encoder->type != INTEL_OUTPUT_HDMI)
+ return;
+
+ if (DISPLAY_VER(dev_priv) >= 14)
+ intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(hdcp->cpu_transcoder),
+TRANS_DDI_HDCP_LINE_REKEY_DISABLE, 1);
+}
+
static int intel_conn_to_vcpi(struct intel_atomic_state *state,
struct intel_connector *connector)
{
@@ -2005,6 +2025,8 @@ static int _intel_hdcp2_enable(struct intel_atomic_state
*state,
connector->base.base.id, connector->base.name,
hdcp->content_type);
+ intel_hdcp_disable_hdcp_line_rekeying(connector->encoder, hdcp);
+
ret = hdcp2_authenticate_and_encrypt(state, connector);
if (ret) {
drm_dbg_kms(>drm, "HDCP2 Type%d Enabling Failed. (%d)\n",
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3f34efcd7d6c..fbf4623cd536 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5630,6 +5630,7 @@ enum skl_power_gate {
#define TRANS_DDI_EDP_INPUT_B_ONOFF (5 << 12)
#define TRANS_DDI_EDP_INPUT_C_ONOFF (6 << 12)
#define TRANS_DDI_EDP_INPUT_D_ONOFF (7 << 12)
+#define TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(12)
#define TRANS_DDI_MST_TRANSPORT_SELECT_MASK REG_GENMASK(11, 10)
#define TRANS_DDI_MST_TRANSPORT_SELECT(trans) \
REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, trans)
--
2.43.2
Re: [PATCH v3] drm/i915/vma: Fix UAF on reopen vs destroy race
Hi Rodrigo,
On Tuesday, 16 April 2024 03:16:31 CEST Rodrigo Vivi wrote:
> On Mon, Apr 15, 2024 at 09:53:09PM +0200, Janusz Krzysztofik wrote:
> > We defer actually closing, unbinding and destroying a VMA until next idle
> > point, or until the object is freed in the meantime. By postponing the
> > unbind, we allow for the VMA to be reopened by the client, avoiding the
> > work required to rebind the VMA.
> >
> > It was assumed that as long as a GT is held idle, no VMA would be reopened
> > while we destroy them. That assumption is no longer true in multi-GT
> > configurations, where a VMA we reopen may be handled by a GT different
> > from the one that we already keep active via its engine while we set up
> > an execbuf request.
> >
> > <4> [260.290809] [ cut here ]
> > <4> [260.290988] list_del corruption. prev->next should be
> > 888118c5d990, but was 888118c5a510. (prev=888118c5a510)
> > <4> [260.291004] WARNING: CPU: 2 PID: 1143 at lib/list_debug.c:62
> > __list_del_entry_valid_or_report+0xb7/0xe0
> > ..
> > <4> [260.291055] CPU: 2 PID: 1143 Comm: kms_plane Not tainted
> > 6.9.0-rc2-CI_DRM_14524-ga25d180c6853+ #1
> > <4> [260.291058] Hardware name: Intel Corporation Meteor Lake Client
> > Platform/MTL-P LP5x T3 RVP, BIOS MTLPFWI1.R00.3471.D91.2401310918 01/31/2024
> > <4> [260.291060] RIP: 0010:__list_del_entry_valid_or_report+0xb7/0xe0
> > ...
> > <4> [260.291087] Call Trace:
> > <4> [260.291089]
> > <4> [260.291124] i915_vma_reopen+0x43/0x80 [i915]
> > <4> [260.291298] eb_lookup_vmas+0x9cb/0xcc0 [i915]
> > <4> [260.291579] i915_gem_do_execbuffer+0xc9a/0x26d0 [i915]
> > <4> [260.291883] i915_gem_execbuffer2_ioctl+0x123/0x2a0 [i915]
> > ...
> > <4> [260.292301]
> > ...
> > <4> [260.292506] ---[ end trace ]---
> > <4> [260.292782] general protection fault, probably for non-canonical
> > address 0x6b6b6b6b6b6b6ca3: [#1] PREEMPT SMP NOPTI
> > <4> [260.303575] CPU: 2 PID: 1143 Comm: kms_plane Tainted: GW
> >6.9.0-rc2-CI_DRM_14524-ga25d180c6853+ #1
> > <4> [260.313851] Hardware name: Intel Corporation Meteor Lake Client
> > Platform/MTL-P LP5x T3 RVP, BIOS MTLPFWI1.R00.3471.D91.2401310918 01/31/2024
> > <4> [260.326359] RIP: 0010:eb_validate_vmas+0x114/0xd80 [i915]
> > ...
> > <4> [260.428756] Call Trace:
> > <4> [260.431192]
> > <4> [639.283393] i915_gem_do_execbuffer+0xd05/0x26d0 [i915]
> > <4> [639.305245] i915_gem_execbuffer2_ioctl+0x123/0x2a0 [i915]
> > ...
> > <4> [639.411134]
> > ...
> > <4> [639.449979] ---[ end trace ]---
> >
> > As soon as we start unbinding and destroying a VMA, marked it as parked,
> > and also keep it marked as closed for the rest of its life. When a VMA
> > to be opened occurs closed, reopen it only if not yet parked.
> >
> > v3: Fix misplaced brackets.
> > v2: Since we no longer re-init the VMA closed list link on VMA park so it
> > looks like still on a list, don't try to delete it from the list again
> > after the VMA has been marked as parked.
> >
> > Fixes: b0647a5e79b1 ("drm/i915: Avoid live-lock with i915_vma_parked()")
>
> what about reverting that?
I didn't think of that. Why you think that might be a better approach?
Anyway, that's a 4 years old patch and a few things have changed since then,
so simple revert won't work. Moreover, I've just checked that patch was
supposed to fix another patch, 77853186e547 ("drm/i915: Claim vma while under
closed_lock in i915_vma_parked()"), which in turn was supposed to fix
aa5e4453dc05 ("drm/i915/gem: Try to flush pending unbind events"), and that
one also referenced still another, cb6c3d45f948 ("drm/i915/gem: Avoid parking
the vma as we unbind") from December 2019, which finally wasn't a fix but an
improvement. Then, we would have to consider new fixes alternative to at least
some of those three, I guess. I'd rather not dig that deep, unless we invest
in a completely new solution (e.g. backport VMA handling from xe if more
effective while compatible to some extent?). Even then, we need a fix for
now.
Alternatively, we can try to revert my 1f33dc0c1189 ("drm/i915: Remove extra
multi-gt pm-references") which was a manual revert of f56fe3e91787 ("drm/i915:
Fix a VMA UAF for multi-gt platform") -- a workaround that was supposed to
address some multi-GT related VMA issues. While it didn't really resolve
those issues it was addressing, I think it may help with this one, which
started appearing after I reverted that workaround. However, its
effectiveness is limited to MTL topology.
Thanks,
Janusz
>
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10608
> > Signed-off-by: Janusz Krzysztofik
> > Cc: Chris Wilson
> > Cc: Tvrtko Ursulin
> > Cc: sta...@vger.kernel.org # v6.0+
> > ---
> > .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 10 --
> > drivers/gpu/drm/i915/i915_vma.c | 32 +++
> > drivers/gpu/drm/i915/i915_vma.h
Re: [REQUEST] Add support for Intel DPST (Display Power Saving Technology)
On Fri, 05 Apr 2024, José Relvas wrote: > The best approach here would probably be to expose a similar attribute to > amdgpu's > "panel_power_savings", with a scale that controls the feature's > aggressiveness, > then update userspace tools, including power-profiles-daemon, to set the value > based on the intended energy scheme. I don't really know what panel_power_savings does or how it works, but clearly it's not how this particular thing works on Intel hardware. There isn't a trivial knob you could adjust. Basically the goal is to reduce display brightness (and thus power consumption) based on display content with the high level idea of: reduced brightness, image enhancement params = fn(brightness, histogram) Where you have to add an API for reading the image histogram, add an API to set the image enhancement parameters, and how that function works is userspace policy that needs to be implemented in userspace. BR, Jani. -- Jani Nikula, Intel
RE: [PATCH 2/2] drm/i915/pps: Disable DPLS_GATING around pps sequence
> -Original Message-
> From: Kandpal, Suraj
> Sent: Tuesday, April 16, 2024 12:58 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Bhadane, Dnyaneshwar
> ; Kandpal, Suraj
>
> Subject: [PATCH 2/2] drm/i915/pps: Disable DPLS_GATING around pps
> sequence
>
> Disable bit 29 of SCLKGATE_DIS register around pps sequence when we turn
> panel power on.
> WA: 16023567976
> Bspec: 49304
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_pps.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index 3078dfac7817..a912e712ca63 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -919,6 +919,7 @@ void intel_pps_on_unlocked(struct intel_dp
> *intel_dp)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> u32 pp;
> i915_reg_t pp_ctrl_reg;
> + int dis_ver = DISPLAY_VER(dev_priv);
>
> lockdep_assert_held(_priv->display.pps.mutex);
>
> @@ -948,6 +949,13 @@ void intel_pps_on_unlocked(struct intel_dp
> *intel_dp)
> intel_de_posting_read(dev_priv, pp_ctrl_reg);
> }
>
> + /* WA: 16023567976
> + * Disable DPLS gating around power sequence.
> + */
> + if (dis_ver >= 12 && dis_ver <= 14)
Hi Suraj,
You might want to use IS_DISPLAY_IP_RANGE() as it is fixed IP based range.
Dnyaneshwar
> + intel_de_rmw(dev_priv, SCLKGATE_DIS,
> + DPLS_GATING_DISABLE, 1);
> +
> pp |= PANEL_POWER_ON;
> if (!IS_IRONLAKE(dev_priv))
> pp |= PANEL_POWER_RESET;
> @@ -958,6 +966,10 @@ void intel_pps_on_unlocked(struct intel_dp
> *intel_dp)
> wait_panel_on(intel_dp);
> intel_dp->pps.last_power_on = jiffies;
>
> + if (dis_ver >= 12 && dis_ver <= 14)
> + intel_de_rmw(dev_priv, SCLKGATE_DIS,
> + DPLS_GATING_DISABLE, 0);
> +
> if (IS_IRONLAKE(dev_priv)) {
> pp |= PANEL_POWER_RESET; /* restore panel reset bit */
> intel_de_write(dev_priv, pp_ctrl_reg, pp);
> --
> 2.43.2
Re: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are
> on HDMI TMDS operation for DISPLAY_VEY >= 14.
Blank line here.
> WA: 16022217614
The workarounds need to be listed in comments, not so much in the commit
message.
> Bspec: 49273
> Bspec: 69964
>
No blank line here.
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_hdcp.c | 16
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index d5ed4c7dfbc0..15af6e184ef8 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -30,6 +30,20 @@
> #define KEY_LOAD_TRIES 5
> #define HDCP2_LC_RETRY_CNT 3
>
> +static void
> +intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
> + struct intel_hdcp *hdcp)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
> + if (encoder->type != INTEL_OUTPUT_HDMI)
> + return;
> +
> + if (DISPLAY_VER(dev_priv) >= 14)
> + intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(hdcp->cpu_transcoder),
> + TRANS_DDI_HDCP_LINE_REKEY_DISABLE, 1);
> +}
> +
> static int intel_conn_to_vcpi(struct intel_atomic_state *state,
> struct intel_connector *connector)
> {
> @@ -2005,6 +2019,8 @@ static int _intel_hdcp2_enable(struct
> intel_atomic_state *state,
> connector->base.base.id, connector->base.name,
> hdcp->content_type);
>
> + intel_hdcp_disable_hdcp_line_rekeying(connector->encoder, hdcp);
> +
> ret = hdcp2_authenticate_and_encrypt(state, connector);
> if (ret) {
> drm_dbg_kms(>drm, "HDCP2 Type%d Enabling Failed. (%d)\n",
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3f34efcd7d6c..fbf4623cd536 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5630,6 +5630,7 @@ enum skl_power_gate {
> #define TRANS_DDI_EDP_INPUT_B_ONOFF (5 << 12)
> #define TRANS_DDI_EDP_INPUT_C_ONOFF (6 << 12)
> #define TRANS_DDI_EDP_INPUT_D_ONOFF (7 << 12)
> +#define TRANS_DDI_HDCP_LINE_REKEY_DISABLE REG_BIT(12)
> #define TRANS_DDI_MST_TRANSPORT_SELECT_MASK REG_GENMASK(11, 10)
> #define TRANS_DDI_MST_TRANSPORT_SELECT(trans) \
> REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, trans)
--
Jani Nikula, Intel
Re: [PATCH v2] drm/i915/hwmon: Get rid of devm
On Mon, 15 Apr 2024, "Dixit, Ashutosh" wrote:
> On Mon, 15 Apr 2024 16:35:02 -0700, Armin Wolf wrote:
>>
>
> Hi Armin,
>
>> Am 16.04.24 um 00:36 schrieb Ashutosh Dixit:
>> > @@ -818,10 +818,10 @@ void i915_hwmon_register(struct drm_i915_private
>> > *i915)
>> >hwm_get_preregistration_info(i915);
>> >
>> >/* hwmon_dev points to device hwmon */
>> > - hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat->name,
>> > - ddat,
>> > - _chip_info,
>> > - hwm_groups);
>> > + hwmon_dev = hwmon_device_register_with_info(dev, ddat->name,
>> > + ddat,
>> > + _chip_info,
>> > + hwm_groups);
>> >if (IS_ERR(hwmon_dev)) {
>> >i915->hwmon = NULL;
>>
>> you need to free hwmon here, since it is not managed by devres anymore.
>
> Thanks a lot for catching this, I had missed it in v2, it's fixed in v3. I
> am actually reusing i915_hwmon_unregister() for error unwinding in v3.
>
>>
>> >return;
>> > @@ -838,10 +838,10 @@ void i915_hwmon_register(struct drm_i915_private
>> > *i915)
>> >if (!hwm_gt_is_visible(ddat_gt, hwmon_energy,
>> > hwmon_energy_input, 0))
>> >continue;
>> >
>> > - hwmon_dev = devm_hwmon_device_register_with_info(dev,
>> > ddat_gt->name,
>> > - ddat_gt,
>> > -
>> > _gt_chip_info,
>> > - NULL);
>> > + hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt->name,
>> > + ddat_gt,
>> > + _gt_chip_info,
>> > + NULL);
>> >if (!IS_ERR(hwmon_dev))
>> >ddat_gt->hwmon_dev = hwmon_dev;
>> >}
>> > @@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private
>> > *i915)
>> >
>> > void i915_hwmon_unregister(struct drm_i915_private *i915)
>> > {
>> > - fetch_and_zero(>hwmon);
>> > + struct i915_hwmon *hwmon = fetch_and_zero(>hwmon);
>>
>> Why is fetch_and_zero() necessary here?
>
> As mentioned, in v3 i915_hwmon_unregister() itself is used for error
> unwinding so we need to prevent multiple device_unregister's etc. That is
> the purpose of setting i915->hwmon to NULL. But even earlier, though it is
> not obvious, i915_hwmon_unregister() is called multiple times. So e.g. it
> will be called at device unbind as well as module unload. So once again we
> prevent multiple device_unregister's by setting and checking for NULL
> i915->hwmon.
IMO it's more obvious to set i915->hwmon to NULL separately.
BR,
Jani.
>
>>
>> > + struct hwm_drvdata *ddat = >ddat;
>> > + struct intel_gt *gt;
>> > + int i;
>> > +
>> > + if (!hwmon)
>> > + return;
>> > +
>> > + for_each_gt(gt, i915, i) {
>> > + struct hwm_drvdata *ddat_gt = hwmon->ddat_gt + i;
>> > +
>> > + if (ddat_gt->hwmon_dev) {
>> > + hwmon_device_unregister(ddat_gt->hwmon_dev);
>> > + ddat_gt->hwmon_dev = NULL;
>> > + }
>> > + }
>> > +
>> > + if (ddat->hwmon_dev)
>> > + hwmon_device_unregister(ddat->hwmon_dev);
>> > +
>> > + mutex_destroy(>hwmon_lock);
>> > + kfree(hwmon);
>> > }
>
> Thanks.
> --
> Ashutosh
--
Jani Nikula, Intel
Re: [PATCH 2/2] drm/i915/pps: Disable DPLS_GATING around pps sequence
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Disable bit 29 of SCLKGATE_DIS register around pps sequence
> when we turn panel power on.
Add blank line here.
> WA: 16023567976
> Bspec: 49304
>
Remove blank line here.
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_pps.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index 3078dfac7817..a912e712ca63 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -919,6 +919,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> u32 pp;
> i915_reg_t pp_ctrl_reg;
> + int dis_ver = DISPLAY_VER(dev_priv);
Please don't do this. You don't see this done *anywhere* in the driver.
>
> lockdep_assert_held(_priv->display.pps.mutex);
>
> @@ -948,6 +949,13 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
> intel_de_posting_read(dev_priv, pp_ctrl_reg);
> }
>
> + /* WA: 16023567976
For multiline comments please don't add anything after /*.
> + * Disable DPLS gating around power sequence.
> + */
> + if (dis_ver >= 12 && dis_ver <= 14)
See IS_DISPLAY_VER().
> + intel_de_rmw(dev_priv, SCLKGATE_DIS,
> + DPLS_GATING_DISABLE, 1);
> +
> pp |= PANEL_POWER_ON;
> if (!IS_IRONLAKE(dev_priv))
> pp |= PANEL_POWER_RESET;
> @@ -958,6 +966,10 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
> wait_panel_on(intel_dp);
> intel_dp->pps.last_power_on = jiffies;
>
> + if (dis_ver >= 12 && dis_ver <= 14)
See IS_DISPLAY_VER().
> + intel_de_rmw(dev_priv, SCLKGATE_DIS,
> + DPLS_GATING_DISABLE, 0);
> +
> if (IS_IRONLAKE(dev_priv)) {
> pp |= PANEL_POWER_RESET; /* restore panel reset bit */
> intel_de_write(dev_priv, pp_ctrl_reg, pp);
--
Jani Nikula, Intel
Re: [PATCH v3 20/21] drm/i915/display: perform transient flush
On 15/04/2024 19:14, Matt Roper wrote:
On Mon, Apr 15, 2024 at 10:07:32AM -0700, Matt Roper wrote:
On Mon, Apr 15, 2024 at 01:44:22PM +0530, Balasubramani Vivekanandan wrote:
From: Matthew Auld
Perform manual transient cache flush prior to flip and at the end of
frontbuffer_flush. This is needed to ensure display engine doesn't see
garbage if the surface is L3:XD dirty.
Testcase: igt@xe-pat@display-vs-wb-transient
Has the IGT patch for this been sent yet? If not, we should probably
make sure that happens soon, and then use the CI Test-with: thing if
there winds up being another revision of this series so that this will
be included in the CI results.
Oh, it looks like this test already landed back in early March; I just
didn't look back far enough in the git history originally. You can
ignore this comment.
Yeah, my thinking was to upstream the IGT bits early for LNL, since it
is still applicable there. Only difference is we are verifying we don't
need the TDF on that platform, whereas on BMG the test will only pass
with this patch.
Matt
Anyway, the changes here look good to me,
Reviewed-by: Matt Roper
Signed-off-by: Matthew Auld
Signed-off-by: Balasubramani Vivekanandan
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
.../gpu/drm/i915/display/intel_frontbuffer.c | 2 ++
drivers/gpu/drm/i915/display/intel_tdf.h | 25 +++
drivers/gpu/drm/xe/Makefile | 3 ++-
drivers/gpu/drm/xe/display/xe_tdf.c | 13 ++
5 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h
create mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 67697d9a559c..4fc46edcb4ad 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -110,6 +110,7 @@
#include "intel_sdvo.h"
#include "intel_snps_phy.h"
#include "intel_tc.h"
+#include "intel_tdf.h"
#include "intel_tv.h"
#include "intel_vblank.h"
#include "intel_vdsc.h"
@@ -7242,6 +7243,8 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
intel_atomic_commit_fence_wait(state);
+ intel_td_flush(dev_priv);
+
drm_atomic_helper_wait_for_dependencies(>base);
drm_dp_mst_atomic_wait_for_dependencies(>base);
intel_atomic_global_state_wait_for_dependencies(state);
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 2ea37c0414a9..4923c340a0b6 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -65,6 +65,7 @@
#include "intel_fbc.h"
#include "intel_frontbuffer.h"
#include "intel_psr.h"
+#include "intel_tdf.h"
/**
* frontbuffer_flush - flush frontbuffer
@@ -93,6 +94,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
trace_intel_frontbuffer_flush(i915, frontbuffer_bits, origin);
might_sleep();
+ intel_td_flush(i915);
intel_drrs_flush(i915, frontbuffer_bits);
intel_psr_flush(i915, frontbuffer_bits, origin);
intel_fbc_flush(i915, frontbuffer_bits, origin);
diff --git a/drivers/gpu/drm/i915/display/intel_tdf.h
b/drivers/gpu/drm/i915/display/intel_tdf.h
new file mode 100644
index ..353cde21f6c2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_tdf.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef __INTEL_TDF_H__
+#define __INTEL_TDF_H__
+
+/*
+ * TDF (Transient-Data-Flush) is needed for Xe2+ where special L3:XD caching
can
+ * be enabled through various PAT index modes. Idea is to use this caching mode
+ * when for example rendering onto the display surface, with the promise that
+ * KMD will ensure transient cache entries are always flushed by the time we do
+ * the display flip, since display engine is never coherent with CPU/GPU
caches.
+ */
+
+struct drm_i915_private;
+
+#ifdef I915
+static inline void intel_td_flush(struct drm_i915_private *i915) {}
+#else
+void intel_td_flush(struct drm_i915_private *i915);
+#endif
+
+#endif
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 6015c9e41f24..97a8674cdd76 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -198,7 +198,8 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_dsb_buffer.o \
display/xe_fb_pin.o \
display/xe_hdcp_gsc.o \
- display/xe_plane_initial.o
+ display/xe_plane_initial.o \
+ display/xe_tdf.o
# SOC code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
diff --git a/drivers/gpu/drm/xe/display/xe_tdf.c
b/drivers/gpu/drm/xe/display/xe_tdf.c
new file mode 100644
index ..2c0d4e144e09
--- /dev/null
+++ b/drivers/gpu/drm/xe/display/xe_tdf.c
RE: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, April 16, 2024 1:08 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Bhadane, Dnyaneshwar
> ; Kandpal, Suraj
>
> Subject: Re: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
>
> On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> > Add SCLKGATE_DIS register and it's register definition which will be
> > used the next patch.
>
> Please just squash this into the next patch.
>
> (And please don't reference "the next patch" in commit messages, because
> it's meaningless once this becomes a commit in the history.)
> >
Sure will squash this with the next patch.
> > Signed-off-by: Suraj Kandpal
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 3f34efcd7d6c..beec91a2f493
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6250,6 +6250,10 @@ enum skl_power_gate {
> > #define SFUSE_STRAP_DDIC_DETECTED (1 << 1)
> > #define SFUSE_STRAP_DDID_DETECTED (1 << 0)
> >
> > +/* SCLKGATE_DIS */
>
> The comment is useless.
>
Will drop it
Regards,
Suraj Kandpal
> BR,
> Jani.
>
> > +#define SCLKGATE_DIS _MMIO(0xc2014)
> > +#define DPLS_GATING_DISABLE REG_BIT(29)
> > +
> > #define WM_MISC_MMIO(0x45260)
> > #define WM_MISC_DATA_PARTITION_5_6(1 << 0)
>
> --
> Jani Nikula, Intel
Re: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Add SCLKGATE_DIS register and it's register definition which
> will be used the next patch.
Please just squash this into the next patch.
(And please don't reference "the next patch" in commit messages, because
it's meaningless once this becomes a commit in the history.)
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3f34efcd7d6c..beec91a2f493 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6250,6 +6250,10 @@ enum skl_power_gate {
> #define SFUSE_STRAP_DDIC_DETECTED (1 << 1)
> #define SFUSE_STRAP_DDID_DETECTED (1 << 0)
>
> +/* SCLKGATE_DIS */
The comment is useless.
BR,
Jani.
> +#define SCLKGATE_DIS _MMIO(0xc2014)
> +#define DPLS_GATING_DISABLE REG_BIT(29)
> +
> #define WM_MISC _MMIO(0x45260)
> #define WM_MISC_DATA_PARTITION_5_6 (1 << 0)
--
Jani Nikula, Intel
linux-next: build warnings after merge of the drm-misc tree
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced these warnings:
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Excess function parameter
'drm_scanout_buffer' description in 'drm_fb_dma_get_scanout_buffer'
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Function parameter or struct
member 'sb' not described in 'drm_fb_dma_get_scanout_buffer'
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Excess function parameter
'drm_scanout_buffer' description in 'drm_fb_dma_get_scanout_buffer'
Introduced by commit
879b3b6511fe ("drm/fb_dma: Add generic get_scanout_buffer() for drm_panic")
--
Cheers,
Stephen Rothwell
pgpSFv3JO44i2.pgp
Description: OpenPGP digital signature
[PATCH 0/2] Disable DPLS Gating around PPS
Disable DPLS Gating around Panel Power on Sequence. WA:16023567976 Signed-off-by: Suraj Kandpal Suraj Kandpal (2): drm/i915: Add SCLKGATE_DIS register definition drm/i915/pps: Disable DPLS_GATING around pps sequence drivers/gpu/drm/i915/display/intel_pps.c | 12 drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 16 insertions(+) -- 2.43.2
[PATCH 2/2] drm/i915/pps: Disable DPLS_GATING around pps sequence
Disable bit 29 of SCLKGATE_DIS register around pps sequence
when we turn panel power on.
WA: 16023567976
Bspec: 49304
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_pps.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 3078dfac7817..a912e712ca63 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -919,6 +919,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u32 pp;
i915_reg_t pp_ctrl_reg;
+ int dis_ver = DISPLAY_VER(dev_priv);
lockdep_assert_held(_priv->display.pps.mutex);
@@ -948,6 +949,13 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
intel_de_posting_read(dev_priv, pp_ctrl_reg);
}
+ /* WA: 16023567976
+* Disable DPLS gating around power sequence.
+*/
+ if (dis_ver >= 12 && dis_ver <= 14)
+ intel_de_rmw(dev_priv, SCLKGATE_DIS,
+DPLS_GATING_DISABLE, 1);
+
pp |= PANEL_POWER_ON;
if (!IS_IRONLAKE(dev_priv))
pp |= PANEL_POWER_RESET;
@@ -958,6 +966,10 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
wait_panel_on(intel_dp);
intel_dp->pps.last_power_on = jiffies;
+ if (dis_ver >= 12 && dis_ver <= 14)
+ intel_de_rmw(dev_priv, SCLKGATE_DIS,
+DPLS_GATING_DISABLE, 0);
+
if (IS_IRONLAKE(dev_priv)) {
pp |= PANEL_POWER_RESET; /* restore panel reset bit */
intel_de_write(dev_priv, pp_ctrl_reg, pp);
--
2.43.2
[PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
Add SCLKGATE_DIS register and it's register definition which
will be used the next patch.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/i915_reg.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3f34efcd7d6c..beec91a2f493 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6250,6 +6250,10 @@ enum skl_power_gate {
#define SFUSE_STRAP_DDIC_DETECTED (1 << 1)
#define SFUSE_STRAP_DDID_DETECTED (1 << 0)
+/* SCLKGATE_DIS */
+#define SCLKGATE_DIS _MMIO(0xc2014)
+#define DPLS_GATING_DISABLE REG_BIT(29)
+
#define WM_MISC_MMIO(0x45260)
#define WM_MISC_DATA_PARTITION_5_6(1 << 0)
--
2.43.2
