Re: [Intel-gfx] [PATCH] drm/edid: Populate picture aspect ratio for CEA modes

this one is needed for the patch I just reviewed to populate the PAR bits. -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 3/3] drm/i915/vlv: use min brightness from VBT

On Mon, 31 Mar 2014 21:07:04 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Mon, Mar 31, 2014 at 11:13:57AM -0700, Jesse Barnes wrote: Going below the minimum value may affect the BLC_EN line, so try to use the VBT provided minimum where possible, otherwise use an experimentally derived

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Program VSYNCSHIFT in a more consistent manner

-crtc_htotal / 2; } if (INTEL_INFO(dev)-gen 3) My only concern here is that some chip might try to use a nonzero vsyncshift for a non-interlaced mode. But that should be easy to bisect to if so, so Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Fix the interlace mode selection for gmch platforms

Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Make sure vsyncshift is positive

mode timings!. Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915/vlv: use W_SYNC_SHIFT for interlaced modes on VLV

This makes HDMI testers happier on VLV platforms. It may be that we need it for any non-SVO platform, but I don't have any tests to back that up, so I'm leaving other pre-ILK platforms alone for now. Tested-by: Clint Taylor clinton.a.tay...@intel.com Signed-off-by: Jesse Barnes jbar

Re: [Intel-gfx] [PATCH 11/11] [v4] drm/i915/bdw: Ensure a context is loaded before RC6

! -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 11/11] [v4] drm/i915/bdw: Ensure a context is loaded before RC6

On Thu, 20 Mar 2014 10:30:32 -0700 Jesse Barnes jbar...@virtuousgeek.org wrote: On Thu, 20 Mar 2014 14:42:32 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Wed, Mar 19, 2014 at 05:41:37PM -0700, Ben Widawsky wrote: I can't say it's completely unexpected that this would be your response

Re: [Intel-gfx] [PATCH] drm/i915/vlv: no MCHBAR on VLV

Junxiao, can you add you reviewed-by to this patch? Thanks, Jesse On Mon, 3 Mar 2014 14:27:57 -0800 Jesse Barnes jbar...@virtuousgeek.org wrote: So don't try to allocate and program it, we're only fooling ourselves. Reported-by: Chang, Junxiao junxiao.ch...@intel.com Signed-off-by: Jesse

Re: [Intel-gfx] [PATCH 12/26] drm/i915: Page table helpers, and define renames

GTT_PAGE_SIZE here too? I'm worried the kernel PAGE_SIZE will change at some point and blow us up. At least in places where we're doing our own thing rather than using the x86 bits... -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing

Re: [Intel-gfx] [PATCH] drm/i915: Add a DRM property psr

this in Chromium for disabling PSR in cases where it doesn't work? Or to optimize power consumption when the kernel driver gets it wrong? Or just for debug? Seems potentially useful, just curious what motivated you guys. Thanks, -- Jesse Barnes, Intel Open Source Technology Center

[Intel-gfx] [PATCH 1/4] drm/i915: preserve SSC if previously set v2

) Reported-by: Kristian Høgsberg hoegsb...@gmail.com Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.h |2 ++ drivers/gpu/drm/i915/intel_display.c | 11 ++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 4/4] drm/i915: enable fastboot by default

Let them eat cake. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_params.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index a66ffb6..5f81047 100644

[Intel-gfx] [PATCH 3/4] drm/i915: use current mode if the size matches the preferred mode

-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/drm_modes.c|8 drivers/gpu/drm/i915/intel_fbdev.c | 37 ++-- include/drm/drm_crtc.h |2 ++ 3 files changed, 28 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 2/4] drm/i915: don't bother enabling swizzle bits on gen7+ v2

As of IVB, the memory controller does internal swizzling already, so we shouldn't need to enable these. Based on an earlier fix from Kristian. v2: preserve swizzling if BIOS had it set (Daniel) Reported-by: Kristian Høgsberg hoegsb...@gmail.com Signed-off-by: Jesse Barnes jbar

Re: [Intel-gfx] [RFC] Documentation requirements for drm/i915 feature work

there was a bit of momentum awhile back, but it seems to have dissipated. We could try to extract it from kernel source somehow, but for user API stuff, I think we really want man pages in libdrm, in addition to whatever web based documentation we make available. -- Jesse Barnes, Intel Open Source

Re: [Intel-gfx] [RFC] Documentation requirements for drm/i915 feature work

On Fri, 14 Mar 2014 19:16:01 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Fri, Mar 14, 2014 at 7:03 PM, Jesse Barnes jbar...@virtuousgeek.org wrote: Yeah just saying a man page should be required as part of any new ioctl. Yeah I agree and long-term we'll get there. Otherwise I wouldn't

Re: [Intel-gfx] [PATCH] drm/i915: Fix runtime pm inbalance due to reg I/O forcewake dance

instead? -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 8/8] drm/i915: remove early fb allocation dependency on CONFIG_FB v2

On Sat, 8 Mar 2014 11:33:15 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Fri, Mar 07, 2014 at 08:57:55AM -0800, Jesse Barnes wrote: By stuffing the fb allocation into the crtc, we get mode set lifetime refcounting for free, but have to handle the initial pin fence slightly differently

Re: [Intel-gfx] [PATCH 6/8] drm/i915: don't bother enabling swizzle bits on gen7+

On Sat, 8 Mar 2014 11:36:24 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Fri, Mar 07, 2014 at 08:57:53AM -0800, Jesse Barnes wrote: As of IVB, the memory controller does internal swizzling already, so we shouldn't need to enable these. Based on an earlier fix from Kristian. Reported

Re: [Intel-gfx] [PATCH v8 3/5] drm/i915: Make sprite updates atomic

we're both holding the crtc mutex and prepare_to_wait() will take the crtc vbl_wait queue lock, but since things look safe as-is I guess it's not a big deal. Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

[Intel-gfx] [PATCH 1/8] drm/i915: add plane_config fetching infrastructure v2

Early at init time, we can try to read out the plane config structure and try to preserve it if possible. v2: alloc fb obj at init time after fetching plane config Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915

[Intel-gfx] [PATCH 3/8] drm/i915: get_plane_config support for ILK+ v3

This should allow BIOS fb inheritance to work on ILK+ machines too. v2: handle tiled BIOS fbs (Kristian) split out common bits (Jesse) v3: alloc fb obj out in _init Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c | 62

[Intel-gfx] [PATCH 6/8] drm/i915: don't bother enabling swizzle bits on gen7+

As of IVB, the memory controller does internal swizzling already, so we shouldn't need to enable these. Based on an earlier fix from Kristian. Reported-by: Kristian Høgsberg hoegsb...@gmail.com Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_gem.c| 7

[Intel-gfx] [PATCH 8/8] drm/i915: remove early fb allocation dependency on CONFIG_FB v2

(Daniel) take fbdev fb ref and remove unused error path (Daniel) Requested-by: Daniel Vetter dan...@ffwll.ch Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c | 145 --- drivers/gpu/drm/i915/intel_drv.h | 1

[Intel-gfx] [PATCH 4/8] drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon v12

(Daniel) v12:fix up fb vs pipe size checking (Chris) Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c | 1 - drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_fbdev.c | 174 +-- 3 files changed

[Intel-gfx] [PATCH 2/8] drm/i915: get_plane_config for i9xx v13

(Kristian) pull out common bits (Jesse) v13: move fb obj alloc out to _init Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c | 63 1 file changed, 63 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 7/8] drm/i915: use current mode if the size matches the preferred mode

-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/drm_modes.c| 8 drivers/gpu/drm/i915/intel_fbdev.c | 37 ++--- include/drm/drm_crtc.h | 2 ++ 3 files changed, 28 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 5/8] drm/i915: preserve SSC if previously set

Some machines may have a broken VBT or no VBT at all, but we still want to use SSC there. So check for it and keep it enabled if we see it already on. Based on an earlier fix from Kristian. Reported-by: Kristian Høgsberg hoegsb...@gmail.com Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org

Re: [Intel-gfx] [PATCH 1/6] drm/i915: make CRTC enable/disable asynchronous

On Thu, 6 Mar 2014 09:35:23 + Chris Wilson ch...@chris-wilson.co.uk wrote: On Wed, Mar 05, 2014 at 02:48:26PM -0800, Jesse Barnes wrote: @@ -7554,6 +7610,8 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, goto fail; } + intel_sync_crtc(crtc

Re: [Intel-gfx] [PATCH 2/6] drm/i915: make fbdev initialization asynchronous

On Thu, 6 Mar 2014 09:12:40 + Chris Wilson ch...@chris-wilson.co.uk wrote: On Wed, Mar 05, 2014 at 02:48:27PM -0800, Jesse Barnes wrote: This gets us out of our init code and out to userspace quite a bit faster, but does open us up to some bugs given the state of our init time locking

Re: [Intel-gfx] [PATCH 5/6] drm/i915/dp: push eDP caching out into a work queue

On Thu, 6 Mar 2014 11:28:13 +0200 Ville Syrjälä ville.syrj...@linux.intel.com wrote: On Wed, Mar 05, 2014 at 02:48:30PM -0800, Jesse Barnes wrote: It takes awhile to fetch the DPCD and EDID for caching, so take it out of the critical path to improve init time. Signed-off-by: Jesse

Re: [Intel-gfx] Why Baytrail Gfx driver not always uses pipe A when it's free?

No special reason. It shouldn't matter on BYT either, really, since pipe A doesn't have special characteristics like it does on HSW. Jesse On Thu, 6 Mar 2014 17:19:22 +0800 Lin, Mengdong mengdong@intel.com wrote: Hi Jesse, Could you tell us why Baytrail Gfx driver does not always

Re: [Intel-gfx] [PATCH] drm/i915: Disable full ppgtt by default

them, or it'll end up staying disabled forever, and then we'll be stuck without a command checker and some advanced features coming up... -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http

Re: [Intel-gfx] [PATCH v2 01/21] drm/i915: use drm_i915_private everywhere in the power domain api

-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_dma.c | 14 drivers/gpu/drm/i915/i915_drv.c | 4 +-- drivers/gpu/drm/i915/i915_drv.h | 4 +-- drivers/gpu/drm/i915/intel_display.c | 27

Re: [Intel-gfx] [PATCH v2 04/21] drm/i915: move power domain macros to intel_pm.c

, + .domains = BDW_DISPLAY_POWER_DOMAINS, .is_enabled = hsw_power_well_enabled, .set = hsw_set_power_well, }, Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [PATCH v2 05/21] drm/i915: add init power domain to always-on power wells

(POWER_DOMAIN_TRANSCODER_EDP) | \ + BIT(POWER_DOMAIN_INIT)) #define HSW_DISPLAY_POWER_DOMAINS ( \ (POWER_DOMAIN_MASK ~HSW_ALWAYS_ON_POWER_DOMAINS) |\ BIT(POWER_DOMAIN_INIT)) Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel

Re: [Intel-gfx] [PATCH v2 07/21] drm/i915: add noop power well handlers instead of NULL checking them

) - power_well-ops-sync_hw(dev_priv, power_well); - } + for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) + power_well-ops-sync_hw(dev_priv, power_well); mutex_unlock(power_domains-lock); } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse

Re: [Intel-gfx] [PATCH v3 11/21] drm/i915: check pipe power domain when reading its hw state

= DPLL_ID_PRIVATE; Same goes here, though I suppose there's more room for additional, specific domains down at this level... Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing

Re: [Intel-gfx] [PATCH v2 12/21] drm/i915: vlv: keep first level vblank IRQs masked

| - I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; + dev_priv-irq_mask = ~enable_mask; I915_WRITE(PORT_HOTPLUG_EN, 0); POSTING_READ(PORT_HOTPLUG_EN); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [PATCH v2 14/21] drm/i915: factor out reset_vblank_counter

Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 17/21] drm/i915: sanity check power well sw state against hw state

); } mutex_unlock(power_domains-lock); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo

Re: [Intel-gfx] [PATCH v3 09/21] drm/i915: get port power domain in connector detect handlers

, power_domain); + return has_audio; } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman

Re: [Intel-gfx] [PATCH v3 10/21] drm/i915: check port power domain when reading the encoder hw state

seemed nicer... but either way works I guess. Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman

Re: [Intel-gfx] [PATCH v2 18/21] drm/i915: vlv: factor out valleyview_display_irq_install

-display_irqs_enabled = true; + + if (dev_priv-dev-irq_enabled) + valleyview_display_irqs_install(dev_priv); +} This made me do a double take, then I saw you were checking the actual drm_device irq enabled state rather than checking the new field again... Looks good. Reviewed-by: Jesse Barnes

Re: [Intel-gfx] [PATCH v2 19/21] drm/i915: move hsw power domain comment to its right place

well to be always enabled. */ Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 20/21] drm/i915: factor out intel_set_cpu_fifo_underrun_reporting_nolock

. :) Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 21/21] drm/i915: power domains: add vlv power wells

{ set_power_wells(power_domains, i9xx_always_on_power_well); } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org

Re: [Intel-gfx] [PATCH] drm/i915: print connector mode list in display_info

On Wed, 5 Mar 2014 13:55:00 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Thu, Feb 20, 2014 at 08:50:59PM +, Chris Wilson wrote: On Thu, Feb 20, 2014 at 12:39:57PM -0800, Jesse Barnes wrote: Useful for bug reports. Hey, this would be useful for error state as well :) I seem

Re: [Intel-gfx] [PATCH 2/2] drm/i915: ignore bios output config if not all outputs are on

On Tue, 4 Mar 2014 22:08:12 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Tue, Mar 04, 2014 at 12:33:01PM -0800, Jesse Barnes wrote: On Tue, 4 Mar 2014 21:08:42 +0100 Daniel Vetter daniel.vet...@ffwll.ch wrote: Both Ville and QA rather immediately complained that with the new

Re: [Intel-gfx] [PATCH 2/2] drm/i915: ignore bios output config if not all outputs are on

On Wed, 5 Mar 2014 19:34:45 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Wed, Mar 05, 2014 at 08:27:08AM -0800, Jesse Barnes wrote: On Tue, 4 Mar 2014 22:08:12 +0100 Daniel Vetter dan...@ffwll.ch wrote: On Tue, Mar 04, 2014 at 12:33:01PM -0800, Jesse Barnes wrote: On Tue, 4 Mar

[Intel-gfx] [PATCH 4/6] drm: take modeset locks around initial fb helper probing

Drivers ought to complain otherwise. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/drm_fb_helper.c | 2 ++ drivers/gpu/drm/i915/intel_dp.c | 4 drivers/gpu/drm/i915/intel_drv.h | 3 +++ 3 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 1/6] drm/i915: make CRTC enable/disable asynchronous

This lets us return to userspace more quickly and should improve init and suspend/resume times as well, allowing us to return to userspace sooner. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 4

[Intel-gfx] [PATCH 6/6] drm/i915/dp: make sure VDD is on around link status checking

In the hotplug case, nothing was grabbing VDD, leading to some warnings. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_dp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 763f235

[Intel-gfx] Make init and mode set more asynchronous

I'm worried about the locking in this... I've also commented out the state checker, but that can be re-added as a check after any queued CRTC changes as another queued item, so should be easy to fix. This set drastically improves the init time of the i915 module (based on initcall_debug timing),

[Intel-gfx] [PATCH 2/6] drm/i915: make fbdev initialization asynchronous

This gets us out of our init code and out to userspace quite a bit faster, but does open us up to some bugs given the state of our init time locking. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_dma.c| 3 ++- drivers/gpu/drm/i915/i915_drv.h| 1

[Intel-gfx] [PATCH 3/6] drm/i915/dp: put power sequence info into intel_dp

Reduces params in a few places and makes workqueueing the eDP caching work easier. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_dp.c | 23 +-- drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 10 insertions(+), 14 deletions

Re: [Intel-gfx] [PATCH 1/6] drm/i915: make CRTC enable/disable asynchronous

On Thu, 06 Mar 2014 01:29:14 +0200 Imre Deak imre.d...@intel.com wrote: On Wed, 2014-03-05 at 14:48 -0800, Jesse Barnes wrote: This lets us return to userspace more quickly and should improve init and suspend/resume times as well, allowing us to return to userspace sooner. IMHO

Re: [Intel-gfx] [PATCH] drm/i915: Reject changes of fb base when we have a flip pending

, then doing a mode set that ends up doing just a pipe base update, right? Otherwise, Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http

Re: [Intel-gfx] [PATCH 1/2] drm/i915: s/any_enabled/!fallback/ in fbdev_initial_config

. Cc: Jesse Barnes jbar...@virtuousgeek.org Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/intel_fbdev.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index

Re: [Intel-gfx] [PATCH 2/2] drm/i915: ignore bios output config if not all outputs are on

as possible (it even has hotplug handling and all that) fall back if more outputs could have been enabled. v2: Fix up my confusion about what enabled means - it's passed from the fbdev helper, we need to check for a non-zero connector-encoder link. Spotted by Ville. Cc: Jesse Barnes jbar

Re: [Intel-gfx] [PATCH] drm/i915: reverse dp link param selection, prefer fast over wide again

commit 2514bc510d0c3aadcc5204056bb440fa36845147 Author: Jesse Barnes jbar...@virtuousgeek.org Date: Thu Jun 21 15:13:50 2012 -0700 drm/i915: prefer wide slow to fast narrow in DP configs I'm pretty sure I'll regret this patch, but otoh I expect we won't make progress here without

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Resolving the memory region conflict for Stolen area

On Thu, 27 Feb 2014 11:01:08 +0200 Jani Nikula jani.nik...@linux.intel.com wrote: On Thu, 27 Feb 2014, Jani Nikula jani.nik...@linux.intel.com wrote: On Wed, 26 Feb 2014, Jesse Barnes jbar...@virtuousgeek.org wrote: On Mon, 13 Jan 2014 16:25:21 +0530 akash.g...@intel.com wrote: From

[Intel-gfx] [PATCH] drm/i915/vlv: no MCHBAR on VLV

So don't try to allocate and program it, we're only fooling ourselves. Reported-by: Chang, Junxiao junxiao.ch...@intel.com Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_dma.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Resolving the memory region conflict for Stolen area

On Mon, 3 Mar 2014 11:14:09 -0800 Jesse Barnes jbar...@virtuousgeek.org wrote: On Thu, 27 Feb 2014 11:01:08 +0200 Jani Nikula jani.nik...@linux.intel.com wrote: On Thu, 27 Feb 2014, Jani Nikula jani.nik...@linux.intel.com wrote: On Wed, 26 Feb 2014, Jesse Barnes jbar

Re: [Intel-gfx] [PATCH 3/9] drm/i915: make crtc enable/disable asynchronous

On Fri, 7 Feb 2014 18:37:01 -0200 Rodrigo Vivi rodrigo.v...@gmail.com wrote: From: Jesse Barnes jbar...@virtuousgeek.org The intent is to get back to userspace as quickly as possible so it can start doing drawing or whatever. It should also allow our suspend/resume/init time to improve

Re: [Intel-gfx] [PATCH 12/23] drm/i915: get runtime PM references when the GPU is idle/busy

; } @@ -8131,7 +8131,7 @@ void intel_mark_idle(struct drm_device *dev) gen6_rps_idle(dev-dev_private); out: - hsw_enable_package_c8(dev_priv); + intel_runtime_pm_put(dev_priv); } void intel_mark_fb_busy(struct drm_i915_gem_object *obj, Reviewed-by: Jesse Barnes jbar

Re: [Intel-gfx] [PATCH 14/23] drm/i915: remove an indirection level on PC8 functions

); + intel_runtime_pm_get(dev_priv); mutex_unlock(dev_priv-pc8.lock); } Oh here it is, the next patch in the series. :) Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx

Re: [Intel-gfx] [PATCH 13/23] drm/i915: kill pc8.disable_count

it looks like these functions are just documentation around the runtime PM bits. I don't see them get remove totally in favor of the runtime_pm_get|put calls later on, is that possible or desirable? Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology

Re: [Intel-gfx] [PATCH 16/23] drm/i915: get/put runtime PM references for GMBUS and DP AUX

-dev; But OTOH, in cases where we have a separate, explicit power well for display, doesn't the aux_display_runtime_get|put make sense? We don't want just global runtime get/put everywhere since we can be finer grained in may cases, right? -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [PATCH 18/23] drm/i915: remove dev_priv-pc8.enabled

-rps.delayed_resume_work, intel_gen6_powersave_work); } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http

Re: [Intel-gfx] [PATCH 20/23] drm/i915: kill struct i915_package_c8

-pc8.lock); INIT_DELAYED_WORK(dev_priv-rps.delayed_resume_work, intel_gen6_powersave_work); Yay, this is a nice simplification overall. Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [PATCH 19/23] drm/i915: move pc8.irqs_disabled to pm.irqs_disabled

issue really... Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 21/23] drm/i915: rename __hsw_do_{en, dis}able_pc8

intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org

Re: [Intel-gfx] [PATCH 15/23] drm/i915: don't get/put PC8 reference on freeze/thaw

(dev_priv-modeset_restore_lock); dev_priv-modeset_restore = MODESET_DONE; mutex_unlock(dev_priv-modeset_restore_lock); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing

Re: [Intel-gfx] [PATCH 22/23] drm/i915: update the PC8 and runtime PM documentation

intel_init_runtime_pm), but + * it can be changed with the standard runtime PM files frmo sysfs. typo from Otherwise, Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org

Re: [Intel-gfx] [PATCH 17/23] drm/i915: don't get/put PC8 when getting/putting power wells

); - hsw_enable_package_c8(dev_priv); - } } void intel_display_power_get(struct drm_device *dev, Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 23/23] drm/i915: init pm.suspended earlier

= false; dev_priv-pm.irqs_disabled = false; } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org Though my earlier comments about getting rid of the init special case still apply... I think it would be a little easier to understand in that case (though maybe not, I guess we'd have to see

Re: [Intel-gfx] [PATCH 16/23] drm/i915: get/put runtime PM references for GMBUS and DP AUX

On Fri, 28 Feb 2014 19:38:17 +0200 Imre Deak imre.d...@intel.com wrote: On Fri, 2014-02-28 at 09:13 -0800, Jesse Barnes wrote: On Thu, 27 Feb 2014 19:26:43 -0300 Paulo Zanoni przan...@gmail.com wrote: From: Paulo Zanoni paulo.r.zan...@intel.com We had

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Resolving the memory region conflict for Stolen area

, + base, base + (uint32_t)dev_priv-gtt.stolen_size); + base = 0; + } } return base; Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org Tested-by: Arjan van de Ven ar...@linux.intel.com Thanks, -- Jesse Barnes, Intel Open

Re: [Intel-gfx] [PATCH 1/5] drm: Use correct spinlock flavor in drm_vblank_get()

); } } - spin_unlock_irqrestore(dev-vblank_time_lock, irqflags2); + spin_unlock(dev-vblank_time_lock); } else { if (!dev-vblank[crtc].enabled) { atomic_dec(dev-vblank[crtc].refcount); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org

Re: [Intel-gfx] [PATCH 2/5] drm: Make the vblank disable timer per-crtc

;/** Protects vblank count and time updates during vblank enable/disable */ spinlock_t vbl_lock; - struct timer_list vblank_disable_timer; u32 max_vblank_count; /** size of vblank counter register */ Yeah this looks like a good fix. Reviewed-by: Jesse Barnes

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Allow vblank interrupts during modeset and eliminate some vblank races

. Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 3/5] drm: Allow the driver to reject vblank requests only when it really has the vblank interrupts disabled

, struct timeval *tvblank, unsigned flags); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo

Re: [Intel-gfx] [PATCH 19/19] drm/i915: power domains: add vlv power wells

On Wed, 26 Feb 2014 20:02:19 +0200 Imre Deak imre.d...@intel.com wrote: On Thu, 2014-02-20 at 11:58 -0800, Jesse Barnes wrote: On Wed, 19 Feb 2014 14:29:44 +0200 Ville Syrjälä ville.syrj...@linux.intel.com wrote: On Tue, Feb 18, 2014 at 12:02:20AM +0200, Imre Deak wrote: Based

Re: [Intel-gfx] 3.13 i915 brightness settings broken when going from docked - undocked

and 3.14-rc1 didn't prove fruitful, either because I messed it up or there's a combination of things that fix the issue. So instead I did a regular git bisect between 3.12 and 3.13 to see which commit _broke_ things and caused the above behavior. That landed me at: Author: Jesse Barnes

Re: [Intel-gfx] [PATCH 03/11] drm/i915: put runtime PM only when we actually release force_wake

addressed: Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 02/11] drm/i915: put runtime PM only at the end of intel_mark_idle

(struct drm_device *dev) if (INTEL_INFO(dev)-gen = 6) gen6_rps_idle(dev-dev_private); + +out: + hsw_package_c8_gpu_idle(dev_priv); } void intel_mark_fb_busy(struct drm_i915_gem_object *obj, Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes

Re: [Intel-gfx] [PATCH 04/11] drm/i915: get runtime PM at intel_set_mode

) intel_modeset_check_state(crtc-dev); + intel_runtime_pm_put(dev_priv); return ret; } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 05/11] drm/i915: get runtime PM while trying to detect CRT

drm_connector *connector, bool force) } else status = connector_status_unknown; +out: + intel_runtime_pm_put(dev_priv); return status; } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [PATCH 06/11] drm/i915: get/put runtime PM in more places at i915_debugfs.c

there are more places we need this too.. wonder if it would be better to put the get into some wrapper around our sysfs files... But these bits look correct, if not sufficient, so: Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [RFC 1/6] drm/i915: cover ioctls with runtime_get/put

the Gunit goes away too. But in that case the GT will be shut down as well, so I don't think the display vs GT thing by itself is a problem. -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http

[Intel-gfx] [PATCH] drm/i915: re-add locking around hw state readout

To silence locking complaints. This was a rebase failure on my part in commit fa9fa083d0606cb323f6105c17702460ea0a6780 Author: Jesse Barnes jbar...@virtuousgeek.org Date: Tue Feb 11 15:28:56 2014 -0800 drm/i915: read out hw state earlier v2 Reported-by: Ville Syrjälä ville.syrj

Re: [Intel-gfx] [PATCH] drm/i915: Revert workaround for disabling L3 cache aging on BYT

(GEN7_L3SQCREG4) ~L3SQ_URB_READ_CAM_MATCH_DISABLE); I don't think we have good docs on this, but since it works empirically: Acked-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel

Re: [Intel-gfx] [PATCH 02/19] drm/i915: fold in __intel_power_well_get/put functions

); + hsw_enable_package_c8(dev_priv); + } + } mutex_unlock(power_domains-lock); } Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel

Re: [Intel-gfx] [PATCH 03/19] drm/i915: move modeset_update_power_wells earlier

]; - } - - intel_display_set_init_power(dev_priv, false); -} - static void haswell_modeset_global_resources(struct drm_device *dev) { modeset_update_power_wells(dev); Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center

Re: [Intel-gfx] [PATCH 01/19] drm/i915: use drm_i915_private everywhere in the power domain api

any requests made by it since Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 04/19] drm/i915: move power domain macros to intel_pm.c

, }, Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 07/19] drm/i915: add port power domains

~HSW_ALWAYS_ON_POWER_DOMAINS) |\ Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org I wonder if we want a way to parameterize the lane count instead, in case we end up doing 1 lane for example in the future, or have some other power domain that can provide multiple levels of power. But I suppose we can

Re: [Intel-gfx] [PATCH 05/19] drm/i915: power domains: add power well ops

issue, the rest looks like a good change and pulls some of the HSW bits out of the generic routines. Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx

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