-
From: Gupta, Anshuman
Sent: Thursday, September 2, 2021 6:40 PM
To: Li, Juston ; intel-gfx@lists.freedesktop.org; Kandpal,
Suraj
Cc: seanp...@chromium.org; C, Ramalingam ; Vivi,
Rodrigo
Subject: RE: [Intel-gfx] [PATCH v6 3/3] drm/i915/hdcp: reuse rx_info for mst
stream type1 capability check
: Gupta, Anshuman
Sent: Thursday, September 2, 2021 6:38 PM
To: Li, Juston ; intel-gfx@lists.freedesktop.org; Kandpal,
Suraj
Cc: seanp...@chromium.org; C, Ramalingam ; Vivi,
Rodrigo
Subject: RE: [Intel-gfx] [PATCH v6 1/3] drm/i915/hdcp: update
cp_irq_count_cached in intel_dp_hdcp2_read_msg
: Gupta, Anshuman
Sent: Thursday, September 2, 2021 6:39 PM
To: Li, Juston ; intel-gfx@lists.freedesktop.org; Kandpal,
Suraj
Cc: seanp...@chromium.org; C, Ramalingam ; Vivi,
Rodrigo
Subject: RE: [Intel-gfx] [PATCH v6 2/3] drm/i915/hdcp: read RxInfo once when
reading
From: suraj kandpal
Adding WD Types, WD transcoder to enum list and WD Transcoder offsets
Signed-off-by: suraj kandpal
---
drivers/gpu/drm/i915/display/intel_display.h | 6 ++
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/i915_reg.h
From: suraj kandpal
Adding support for writeback transcoder to start capturing frames using
interrupt mechanism
Signed-off-by: suraj kandpal
---
drivers/gpu/drm/i915/Makefile |2 +
drivers/gpu/drm/i915/display/intel_acpi.c |1 +
The following series of patches add writeback support for i915. This has been
validated on TGL using IGT.
Note:Only a single instance of WD transcoder is being considered for now, using
multiple WD transcoder may not work. The support for the same will be added in
next
set of patches.
suraj
From: suraj kandpal
Adding drm_writeback_connector to drm_connector so that
writeback_connector can be fetched from drm_connector
Adding drm_connector and drm_encoder pointers in drm_writeback_connector
Signed-off-by: suraj kandpal
---
drivers/gpu/drm/drm_writeback.c | 19 ++-
From: suraj kandpal
Changing driver to use drm_writeback_connector.base pointer
Signed-off-by: suraj kandpal
---
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2 +-
drivers/gpu/drm/arm/display/komeda/komeda_kms.h | 3 ++-
> > Adding support for writeback transcoder to start capturing frames using
> > interrupt mechanism
>
> I stopped reviewing this after a while, because there's just way too
> much unrelated noise in the patch to even be able to focus on what's
> actually being done functionally here. There are
> > Adding WD Types, WD transcoder to enum list and WD Transcoder offsets
>
> This should be part of the patch that uses them.
Got it will squash this patch with the one using the above
Thanks,
Suraj Kandpal
>
> BR,
> Jani.
> > Adding drm_connector and drm_encoder pointers in
> > drm_writeback_connector
>
> Why?
The elements of struct drm_writeback_connector are
struct drm_writeback_connector {
Struct drm_connector base;
Struct drm_encoder encoder;
Similarly the elements of intel_encoder and
> Every commit should build and work on its own, so this makes me believe
> the previous patch breaks the build.
>
Sure Jani will address this in the next set of patches
Thanks,
Suraj Kandpal
Changing vkms driver to accomadate the change of
drm_writeback_connector.base to a pointer the reason for which is
explained in the Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal, Suraj
---
drivers/gpu/drm/vkms/vkms_writeback.c | 6 +++---
1 file changed, 3
Making changes to komeda driver because we had to change
drm_writeback_connector.base into a pointer the reason for which is
expained in the Patch (drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal, Suraj
---
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2
ripple effect due to the above changes namely in
two drivers as I can see it komeda and vkms have been dealt with in the
upcoming patches of this series.
Signed-off-by: Kandpal, Suraj
---
drivers/gpu/drm/drm_writeback.c | 19 ++-
include/drm/drm_connector.h | 3 +++
include
Hi Abhinav,
> > Hi,
> >>> Hi,
> > Hi Abhinav,
> >> Hi Laurent
> >>
> >> Ok sure, I can take this up but I need to understand the proposal
> >> a little bit more before proceeding on this. So we will discuss
> >> this in another email where we specifically talk about the
>
Hi Abhinav,
> Based on the discussion in this thread [1] , it seems like having drm_encoder
> as a pointer seems to have merits for both of us and also in agreement with
> the folks on this thread and has a better chance of an ack.
>
> However drm_connector is not.
>
> I had a brief look at
Hey,
> The connector/encoder funcs you do have to pass to
> drm_writeback_connector_init() can't use any of the shared driver
> infrastructure that assume a certain inheritance.
>
> See also my reply to Laurent [1].
>
> > It well might be that we all misunderstand your design. Do you have a
> >
Hi Abhinav,
> Hi Laurent
>
> Ok sure, I can take this up but I need to understand the proposal a little bit
> more before proceeding on this. So we will discuss this in another email
> where we specifically talk about the connector changes.
>
> Also, I am willing to take this up once the encoder
Hi,
> > Hi Abhinav,
> > > Hi Laurent
> > >
> > > Ok sure, I can take this up but I need to understand the proposal a
> > > little bit more before proceeding on this. So we will discuss this
> > > in another email where we specifically talk about the connector changes.
> > >
> > > Also, I am
Hi,
> > Hi,
> > > > Hi Abhinav,
> > > > > Hi Laurent
> > > > >
> > > > > Ok sure, I can take this up but I need to understand the
> > > > > proposal a little bit more before proceeding on this. So we will
> > > > > discuss this in another email where we specifically talk about the
> connector
Hi All,
Gentle Reminder
Regards,
Suraj Kandpal
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
> drivers/gpu/drm/i915/display/intel_display.c | 89 +-
> drivers/gpu/drm/i915/display/intel_display.h | 9 +
>
ripple effect due to the above changes namely in
two drivers as I can see it komeda and vkms have been dealt with in the
upcoming patches of this series.
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/drm_writeback.c | 19 ++-
include/drm/drm_connector.h | 3 +++
include
Making changes to komeda driver because we had to change
drm_writeback_connector.base into a pointer the reason for which is
expained in the Patch (drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2
Changing vc4 driver to accomadate the change of
drm_writeback_connector.base and drm_writeback_connector.encoder
to a pointer the reason for which is explained in the
Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/vc4/vc4_txp.c | 20
Changing rcar_du driver to accomadate the change of
drm_writeback_connector.base and drm_writeback_connector.encoder
to a pointer the reason for which is explained in the
Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.h
Changing malidp driver to accomadate the change of
drm_writeback_connector.base and drm_writeback_connector.encoder
to a pointer the reason for which is explained in the
Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/arm/malidp_crtc.c | 2
Changing vkms driver to accomadate the change of
drm_writeback_connector.base to a pointer the reason for which is
explained in the Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/vkms/vkms_writeback.c | 9 ++---
1 file changed, 6
Making changes to komeda driver because we had to change
drm_writeback_connector.base into a pointer the reason for which is
expained in the Patch (drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
Reviewed-by: Carsten Haitzler
---
drivers/gpu/drm/arm/display/komeda
Changing vkms driver to accomadate the change of
drm_writeback_connector.base to a pointer the reason for which is
explained in the Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/vkms/vkms_writeback.c | 9 ++---
1 file changed, 6
Changing vc4 driver to accomadate the change of
drm_writeback_connector.base and drm_writeback_connector.encoder
to a pointer the reason for which is explained in the
Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/vc4/vc4_txp.c | 20
by it.
I had perviously floated a patch series but missed some of the drivers
that were effected by the change hence refloating the patch series
Kandpal Suraj (6):
drm: add writeback pointers to drm_connector
drm/arm/komeda : change driver to use drm_writeback_connector.base
pointer
drm
ripple effect due to the above changes namely in
two drivers as I can see it komeda and vkms have been dealt with in the
upcoming patches of this series.
Signed-off-by: Kandpal Suraj
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/drm_writeback.c | 19 ++-
include/drm
Changing rcar_du driver to accomadate the change of
drm_writeback_connector.base and drm_writeback_connector.encoder
to a pointer the reason for which is explained in the
Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.h
Changing malidp driver to accomadate the change of
drm_writeback_connector.base and drm_writeback_connector.encoder
to a pointer the reason for which is explained in the
Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal Suraj
---
drivers/gpu/drm/arm/malidp_crtc.c | 2
Hi Dmitry,
Thanks for your comments
> Could you please clarify, why do you want to use intel_connector for the
> writeback connector?
> I can see a usecase for sharing an encoder between the display and writback
> pipelines (and if I'm not mistaken, this is the case for Abhinav's case).
>
>
> + laurent on this
>
> Hi Suraj
> Jani pointed me to this thread as i had posted something similar here :
> https://patchwork.freedesktop.org/patch/470296/ but since this thread was
> posted earlier, we can discuss further here.
>
> Overall, its similar to what I had posted in the RFC and
Hey,
> I think there are more places affected with this change. I can get below
> compilation issues while trying to compile my branch:
>
> drivers/gpu/drm/vc4/vc4_txp.c: In function ‘encoder_to_vc4_txp’:
> ./include/linux/build_bug.h:78:41: error: static assertion failed:
> "pointer type
Hi All,
Gentle Reminder! Any Review comments?
> Changing vkms driver to accomadate the change of
> drm_writeback_connector.base to a pointer the reason for which is
> explained in the Patch(drm: add writeback pointers to drm_connector).
>
> Signed-off-by: Kandpal, Suraj
> ---
Hi All,
Gentle Reminder.
++Uma
Regards
Suraj Kandapal
> A patch series was floated in the drm mailing list which aimed to change the
> drm_connector and drm_encoder fields to pointer in the
> drm_connector_writeback structure, this received a huge pushback from the
> community but since i915
++Uma
Regards,
Suraj Kandpal
> Changes to create a i915 private pipeline to enable the WD transcoder
> without relying on the current drm_writeback framework.
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
>
Hi All,
++Uma
Regards,
Suraj Kandpal
> -Original Message-
> From: Kandpal, Suraj
> Sent: Thursday, March 17, 2022 2:09 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; ville.syrj...@linux.intel.com;
> Murthy, Arun R ; Kandpal, Suraj
>
> Subject: [RF
Hi All,
++Uma
Regards,
Suraj Kandpal
> Adding support for writeback transcoder to start capturing frames using
> interrupt mechanism
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
>
> Subject: [Intel-gfx] [PATCH 3/3] drm/i915/display: Configure and initialize
> HDMI
> audio capabilities
>
> Initialize the source audio capabilities in the crtc_state property, setting
> them to
Nit: maybe mention the above as intel_crtc_state rather than crtc_state
property as
property
> Subject: [Intel-gfx] [PATCH 2/3] drm: Add Wrapper Functions for ELD SAD
> Extraction
>
> Add wrapper functions to facilitate extracting Short Audio Descriptor (SAD)
> information from EDID-Like Data (ELD) pointers with different constness
> requirements.
>
> 1. `drm_eld_sad`: This function
> Subject: [PATCH 1/8] drm/i915/dsc: improve clarify of the pps reg read/write
> helpers
Should be clarity here in the commit header
With that fixed
Reviewed-by: Suraj Kandpal
>
> Make it clear what's the number of vdsc per pipe, and what's the number of
> registers to grab. Have
> Subject: [PATCH 3/8] drm/i915/dsc: have intel_dsc_pps_read() return the value
>
> Register read functions usually return the value instead of passing via
> pointer
> parameters. Return the multiple register verification results via a pointer
> parameter, which can also be NULL to skip the
> Subject: [PATCH 7/8] drm/i915/dsc: add the PPS number to the register content
> macros
>
> Improve clarity by specifying the PPS number in the register content macros.
> It's
> easier to notice if macros are being used for the wrong register.
LGTM.
Reviewed-by : Suraj Kandpal
>
> Cc:
> Subject: [PATCH 2/8] drm/i915/dsc: have intel_dsc_pps_read_and_verify()
> return the value
>
> Register read functions usually return the value instead of passing via
> pointer
> parameters. The calling code becomes easier to read.
>
> Make the name conform to existing style better while at
> Subject: [PATCH 6/8] drm/i915/dsc: clean up pps comments
>
> Unify comments to be the simple "PPS n" instead of all sorts of variants.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Cc: Suraj Kandpal
> Cc: Ankit Nautiyal
> Signed-off-by: Jani Nikula
> ---
>
> Subject: [PATCH 8/8] drm/i915/dsc: use REG_BIT, REG_GENMASK, and friends
> for PPS0 and PPS1
>
> Use the register helper macros for PPS0 and PPS1 register contents.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Cc: Suraj Kandpal
> Cc: Ankit Nautiyal
> Signed-off-by: Jani Nikula
> ---
>
> Subject: [PATCH 4/8] drm/i915/dsc: rename pps write to intel_dsc_pps_write()
>
> Make the function name conform to existing style better.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Cc: Suraj Kandpal
> Cc: Ankit Nautiyal
> Signed-off-by: Jani Nikula
> ---
>
> Subject: [PATCH 7/8] drm/i915/dsc: add the PPS number to the register content
> macros
>
> Improve clarity by specifying the PPS number in the register content macros.
> It's
> easier to notice if macros are being used for the wrong register.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Cc: Suraj
> Subject: [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4 format
>
> From: Ankit Nautiyal
>
> DSC parameter bits_per_pixel is stored in U6.4 format.
> The 4 bits represent the fractional part of the bpp.
> Currently we use compressed_bpp member of dsc structure to store only the
>
> Subject: [PATCH 6/8] drm/i915/dp: Iterate over output bpp with fractional step
> size
>
> From: Ankit Nautiyal
>
> This patch adds support to iterate over compressed output bpp as per the
> fractional step, supported by DP sink.
>
> v2:
> -Avoid ending up with compressed bpp, same as pipe
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp
> prescision
>
> From: Ankit Nautiyal
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
I think this should also be floated in drm-devel mailing list.
Regards,
Suraj Kandpal
>
> Signed-off-by:
> Subject: [PATCH 4/8] drm/i915/audio : Consider fractional vdsc bpp while
> computing tu_data
>
> From: Ankit Nautiyal
>
> MTL+ supports fractional compressed bits_per_pixel, with precision of
> 1/16. This compressed bpp is stored in U6.4 format.
> Accommodate the precision during calculation
> Subject: [PATCH 8/8] drm/i915/dsc: Allow DSC only with fractional bpp when
> forced from debugfs
>
> From: Swati Sharma
>
> If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
> compressed bpp is fractional. Continue if the computed compressed bpp turns
> out to be a integer.
> Subject: [PATCH 3/8] drm/i915/display: Consider fractional vdsc bpp while
> computing m_n values
>
> From: Ankit Nautiyal
>
> MTL+ supports fractional compressed bits_per_pixel, with precision of
> 1/16. This compressed bpp is stored in U6.4 format.
> Accommodate this precision while
> Subject: [PATCH 5/8] drm/i915/dsc/mtl: Add support for fractional bpp
>
> From: Vandita Kulkarni
>
> Consider the fractional bpp while reading the qp values.
>
> v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
>
LGTM.
Reviewed-by: Suraj Kandpal
> Signed-off-by:
> Subject: RE: [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4
> format
>
> > Subject: [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4
> > format
> >
> > From: Ankit Nautiyal
> >
> > DSC parameter bits_per_pixel is stored in U6.4 format.
> > The 4 bits represent the
> Subject: [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC
> fractional
> bpp
>
> From: Swati Sharma
>
> DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show to
> depict sink's precision.
> Also, new debugfs entry is created to enforce fractional bpp.
> If
> >> Subject: [Intel-gfx] [PATCH 09/42] drm/i915/tc: move legacy code out
> >> of the main _max_lane_count() func
> >>
> >> From: Luca Coelho
> >>
> >> This makes the code a bit more symmetric and readable, especially
> >> when we start adding more display version-specific alternatives.
> >>
> >>
> Subject: [Intel-gfx] [PATCH 2/9] drm/i915/display: Store compressed bpp in
> U6.4 format
>
> DSC parameter bits_per_pixel is stored in U6.4 format.
> The 4 bits represent the fractional part of the bpp.
> Currently we use compressed_bpp member of dsc structure to store only the
> integral part
> On Wed, 2023-08-16 at 08:54 +0000, Kandpal, Suraj wrote:
> > > This makes the code a bit more symmetric and readable, especially
> > > when we start adding more display version-specific alternatives.
> > >
> > > Signed-off-by: Luca Coelho
> &
> On Wed, 2023-08-16 at 08:54 +0000, Kandpal, Suraj wrote:
> > > This makes the code a bit more symmetric and readable, especially
> > > when we start adding more display version-specific alternatives.
> > >
> > > Signed-off-by: Luca Coelho
> > > --
> Subject: [Intel-gfx] [PATCH 4/9] drm/i915/audio : Consider fractional vdsc bpp
> while computing tu_data
>
> MTL+ supports fractional compressed bits_per_pixel, with precision of
> 1/16. This compressed bpp is stored in U6.4 format.
> Accommodate the precision during calculation of transfer
>
> > Add helper to get the DSC bits_per_pixel precision for the DP sink.
> >
> > Signed-off-by: Ankit Nautiyal
Wouldn't we also need to send this patch to dri-devel
Regards,
Suraj Kandpal
> > ---
> > drivers/gpu/drm/display/drm_dp_helper.c | 27
> > +
> >
> Subject: [Intel-gfx] [PATCH 3/9] drm/i915/display: Consider fractional vdsc
> bpp while computing m_n values
>
> MTL+ supports fractional compressed bits_per_pixel, with precision of
> 1/16. This compressed bpp is stored in U6.4 format.
> Accommodate this precision while computing m_n values.
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
>
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/gpu/drm/display/drm_dp_helper.c | 27
> +
> include/drm/display/drm_dp_helper.h | 1 +
> 2 files changed, 28 insertions(+)
>
> diff --git
> Subject: RE: [Intel-gfx] [PATCH 2/9] drm/i915/display: Store compressed bpp in
> U6.4 format
>
> > Subject: [Intel-gfx] [PATCH 2/9] drm/i915/display: Store compressed
> > bpp in
> > U6.4 format
> >
> > DSC parameter bits_per_pixel is stored in U6.4 format.
> > The 4 bits represent the
> Subject: [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4 format
>
> From: Ankit Nautiyal
>
> DSC parameter bits_per_pixel is stored in U6.4 format.
> The 4 bits represent the fractional part of the bpp.
> Currently we use compressed_bpp member of dsc structure to store only the
>
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp
> prescision
>
> From: Ankit Nautiyal
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
>
I think you forgot to add my reviewed by that I gave in the last revision
Anyways,
LGTM.
Reviewed-by:
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp
> prescision
>
> From: Ankit Nautiyal
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Signed-off-by: Ankit Nautiyal
> ---
>
> Subject: [PATCH 5/8] drm/i915/dsc: drop redundant = 0 assignments
>
> Directly assign the values instead of first assigning 0 and then |= the
> values.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Cc: Suraj Kandpal
> Cc: Ankit Nautiyal
> Signed-off-by: Jani Nikula
> ---
>
> Subject: [Intel-gfx] [PATCH v5] drm/i915: Added Wa_18022495364
>
Commit message style should be imperative so the header becomes something
Around the lines of
"Add Wa_18022495364"
> Set the instruction and state cache invalidate bit using INDIRECT_CTX on every
> gpu context switch.
> The
> Subject: RE: [Intel-gfx] [PATCH 3/3] drm/i915/display: Configure and
> initialize
> HDMI audio capabilities
>
> Hi Suraj,
>
> > -Original Message-
> > From: Kandpal, Suraj
> > Sent: 05 September 2023 14:47
> > To: Golani, Mitulkumar Ajitkumar
> -Original Message-
> From: Intel-gfx On Behalf Of Ankit
> Nautiyal
> Sent: Monday, October 16, 2023 10:51 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/vdsc: Remove old comment about
> DSC 444 support
>
> DSC with YCbCr420 is now supported, so
> -Original Message-
> From: Intel-gfx On Behalf Of Ankit
> Nautiyal
> Sent: Monday, October 16, 2023 10:51 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915/dsc: Use helper to calculate
> range_bpg_offset
>
> We get range_bpg_offset for different
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, October 26, 2023 1:02 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nautiyal, Ankit K
> ; Kandpal, Suraj
> Subject: Re: [PATCH 1/2] drm/i915/hdcp: Create a blanket
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, October 26, 2023 3:34 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nautiyal, Ankit K
> ; Kandpal, Suraj
> Subject: Re: [PATCH 2/3] drm/i915/hdcp: Create a blanket
> Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/hdcp: Move common message
> filling function to its own file
>
> On Wed, 20 Sep 2023, Suraj Kandpal wrote:
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
> > b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
> > index
> Subject: Re: [PATCH v3 2/2] drm/i915/hdcp: Move common message filling
> function to its own file
>
> On Wed, 20 Sep 2023, Suraj Kandpal wrote:
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.h
> > b/drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.h
> > new file mode
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/ddi: Fix i2c_adapter assignment
>
> On Thu, 05 Oct 2023, Ville Syrjälä wrote:
> > On Thu, Oct 05, 2023 at 12:12:58PM +0530, Suraj Kandpal wrote:
> >> i2c_adapter is being assigned using intel_connector even before the
> >> NULL check occurs and even
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/ddi: Fix i2c_adapter assignment
>
> Hi Suraj,
>
> On Thu, Oct 05, 2023 at 12:12:58PM +0530, Suraj Kandpal wrote:
> > i2c_adapter is being assigned using intel_connector even before the
> > NULL check occurs and even though it shouldn't be a problem
> -Original Message-
> From: Jani Nikula
> Sent: Monday, October 9, 2023 4:07 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Free crtc_state in
> verify_crtc_state
>
> On Mon, 09 Oct 2023, Suraj
> -Original Message-
> From: Jani Nikula
> Sent: Monday, October 9, 2023 3:37 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v5 1/2] drm/i915/hdcp: Move checks for gsc
> health status
>
> On Mon, 09 Oct 2023, Suraj
> -Original Message-
> From: Ville Syrjälä
> Sent: Monday, October 9, 2023 6:08 PM
> To: Kandpal, Suraj
> Cc: Jani Nikula ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Free crtc_state in
> verify_crtc_state
>
> On
0/4] drm/i915/tc: some clean-ups in max
> lane count handling code
>
> On Fri, Jul 21, 2023 at 02:11:17PM +0300, Luca Coelho wrote:
> >Hi,
> >
> >Here are four patches with some clean-ups in the code that handles the
> >max lane count of Type-C connections.
> >
> >This is done mostly in
> This function is only used locally, so make it static and remove the
> definition
> from the header file.
>
> Signed-off-by: Luca Coelho
LGTM
Reviewed-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_tc.h | 1 -
> 2 files
> >
> > On Wed, 16 Aug 2023, Jani Nikula wrote:
> > > On Wed, 16 Aug 2023, "Kandpal, Suraj"
> wrote:
> > >>> On Mon, 07 Aug 2023, Suraj Kandpal
> wrote:
> > >>> > Assign explicit value of 12 at 8bpp as per Table E2 of DSC 1.1
>
> On Wed, 16 Aug 2023, Jani Nikula wrote:
> > On Wed, 16 Aug 2023, "Kandpal, Suraj" wrote:
> >>> On Mon, 07 Aug 2023, Suraj Kandpal wrote:
> >>> > Assign explicit value of 12 at 8bpp as per Table E2 of DSC 1.1 for
> >>> >
> This makes the code a bit more symmetric and readable, especially when we
> start adding more display version-specific alternatives.
>
> Signed-off-by: Luca Coelho
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 32 +++--
> 1 file changed, 19 insertions(+), 13
>
> On Tue, 08 Aug 2023, Suraj Kandpal wrote:
> > Add function to read any PPS register based on the intel_dsc_pps enum
> > provided. Add a function which will call the new pps read function and
> > place it in crtc state. Only PPS0 and
> > PPS1 are readout the rest of the registers will be read
++ Ankit
> >
> > On Tue, 08 Aug 2023, Suraj Kandpal wrote:
> > > Add function to read any PPS register based on the intel_dsc_pps
> > > enum provided. Add a function which will call the new pps read
> > > function and place it in crtc state. Only PPS0 and
> > > PPS1 are readout the rest of the
> This function doesn't really return the pin assignment mask, but the max lane
> count derived from that. So rename the function to
> mtl_tc_port_get_max_lane_count() to better reflect what it really does.
>
Maybe also add the version changes on commit messages here as cover letter ends
up
>
> On Wed, 16 Aug 2023, "Kandpal, Suraj" wrote:
> >>
> >> On Tue, 08 Aug 2023, Suraj Kandpal wrote:
> >> > Add function to read any PPS register based on the intel_dsc_pps
> >> > enum provided. Add a function which will call the new
> Subject: [PATCH 28/42] drm/i915/xe2lpd: enable odd size and panning for
> planar yuv on xe2lpd
>
> From: Juha-Pekka Heikkilä
>
> Enable odd size and panning for planar yuv formats.
>
> Cc: Suraj Kandpal
> Signed-off-by: Juha-Pekka Heikkilä
> Signed-off-by: Lucas De Marchi
Maybe add the
> -Original Message-
> From: Intel-gfx On Behalf Of Lucas
> De Marchi
> Sent: Wednesday, August 23, 2023 10:37 PM
> To: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Coelho, Luciano
> Subject: [Intel-gfx] [PATCH 09/42] drm/i915/tc: move legacy code out of the
>
> It is irrelevant for the caller that the max lane count is being derived from
> a FIA
> register, so having "fia" in the function name is irrelevant. Rename the
> function accordingly.
>
> Signed-off-by: Luca Coelho
LGTM.
Reviewed-by: Suraj Kandpal
> ---
>
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