[Intel-gfx] [PATCH v12 7/9] drm/i915: Introduce execlist context status change notification

2016-06-16 Thread Zhi Wang
.@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/

[Intel-gfx] [PATCH v12 5/9] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-16 Thread Zhi Wang
htinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 2 +- 3 fil

[Intel-gfx] [PATCH v12 4/9] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-16 Thread Zhi Wang
t;joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com&g

[Intel-gfx] [PATCH v12 9/9] drm/i915: Introduce GVT context creation API

2016-06-16 Thread Zhi Wang
;tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 34 + 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v12 1/9] drm/i915: Factor out i915_pvinfo.h

2016-06-16 Thread Zhi Wang
structure (Joonas) Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 113 + drivers/gpu/

[Intel-gfx] [PATCH v12 3/9] drm/i915: Fold vGPU active check into inner functions

2016-06-16 Thread Zhi Wang
ian <kevin.t...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ---

[Intel-gfx] [PATCH v12 2/9] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page

2016-06-16 Thread Zhi Wang
Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH v12 8/9] drm/i915: Support LRC context single submission

2016-06-16 Thread Zhi Wang
hti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers

[Intel-gfx] [PATCH v12 0/9] Introduce the implementation of GVT context

2016-06-16 Thread Zhi Wang
075397.html Zhi Wang (9): drm/i915: Factor out i915_pvinfo.h drm/i915: Use offsetof() to calculate the offset of members in PVINFO page drm/i915: Fold vGPU active check into inner functions drm/i915: gvt: Introduce the basic architecture of GVT-g drm/i915: Make ring buffer size of a LRC c

[Intel-gfx] [PATCH v11 5/9] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-14 Thread Zhi Wang
htinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 2 +- 3 fil

[Intel-gfx] [PATCH v11 8/9] drm/i915: Support LRC context single submission

2016-06-14 Thread Zhi Wang
hti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers

[Intel-gfx] [PATCH v11 6/9] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-14 Thread Zhi Wang
by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> (v9) Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm

[Intel-gfx] [PATCH v11 9/9] drm/i915: Introduce GVT context creation API

2016-06-14 Thread Zhi Wang
;tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 34 + 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v11 7/9] drm/i915: Introduce execlist context status change notification

2016-06-14 Thread Zhi Wang
.@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/

[Intel-gfx] [PATCH v11 3/9] drm/i915: Fold vGPU active check into inner functions

2016-06-14 Thread Zhi Wang
ian <kevin.t...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ---

[Intel-gfx] [PATCH v11 4/9] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-14 Thread Zhi Wang
.@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/Kconfig | 22 ++ drivers/gpu/dr

[Intel-gfx] [PATCH v11 2/9] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page

2016-06-14 Thread Zhi Wang
Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH v11 1/9] drm/i915: Factor out i915_pvinfo.h

2016-06-14 Thread Zhi Wang
structure (Joonas) Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 113 + drivers/gpu/

[Intel-gfx] [PATCH v11 0/9] Introduce the implementation of GVT context

2016-06-14 Thread Zhi Wang
ake iGVT-g a great component in i915 to support graphics virtualization. Thanks! Reference - [1] https://01.org/igvt-g [2] http://lists.freedesktop.org/archives/intel-gfx/2014-September/053098.html [3] http://lists.freedesktop.org/archives/intel-gfx/2015-September/075397.html Zhi Wang

[Intel-gfx] [PATCH v10 08/10] drm/i915: Introduce execlist context status change notification

2016-06-09 Thread Zhi Wang
.@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/

[Intel-gfx] [PATCH v10 03/10] drm/i915: Fold vGPU active check into inner functions

2016-06-09 Thread Zhi Wang
ian <kevin.t...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ---

[Intel-gfx] [PATCH v10 06/10] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-09 Thread Zhi Wang
htinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 2 +- 3 fil

[Intel-gfx] [PATCH v10 09/10] drm/i915: Support LRC context single submission

2016-06-09 Thread Zhi Wang
hti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers

[Intel-gfx] [PATCH v10 10/10] drm/i915: Introduce GVT context creation API

2016-06-09 Thread Zhi Wang
;tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 34 + 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v10 05/10] drm/i915: Introduce host graphics memory partition for GVT-g

2016-06-09 Thread Zhi Wang
linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Kevin Tian <kevin.t...@intel.com> Cc: Daniel Vetter <dan...@ffwll.ch> Signed-off-by: Bing Niu <bing@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_vgpu.c |

[Intel-gfx] [PATCH v10 07/10] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-09 Thread Zhi Wang
by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> (v9) Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm

[Intel-gfx] [PATCH v10 02/10] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page

2016-06-09 Thread Zhi Wang
Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH v10 04/10] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-09 Thread Zhi Wang
.@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/Kconfig | 22 ++ drivers/gpu/dr

[Intel-gfx] [PATCH v10 01/10] drm/i915: Factor out i915_pvinfo.h

2016-06-09 Thread Zhi Wang
structure (Joonas) Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 113 + drivers/gpu/

[Intel-gfx] [PATCH v10 00/10] Introduce the implementation of GVT context

2016-06-09 Thread Zhi Wang
partition for GVT-g Zhi Wang (9): drm/i915: Factor out i915_pvinfo.h drm/i915: Use offsetof() to calculate the offset of members in PVINFO page drm/i915: Fold vGPU active check into inner functions drm/i915: gvt: Introduce the basic architecture of GVT-g drm/i915: Make ring buffer size

[Intel-gfx] [PATCH v9 01/10] drm/i915: Factor out i915_pvinfo.h

2016-06-09 Thread Zhi Wang
structure (Joonas) Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 113 + drivers/gpu/

[Intel-gfx] [PATCH v9 08/10] drm/i915: Introduce execlist context status change notification

2016-06-09 Thread Zhi Wang
;ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 22

[Intel-gfx] [PATCH v9 07/10] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-09 Thread Zhi Wang
intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + driv

[Intel-gfx] [PATCH v9 05/10] drm/i915: Introduce host graphics memory partition for GVT-g

2016-06-09 Thread Zhi Wang
linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Kevin Tian <kevin.t...@intel.com> Cc: Daniel Vetter <dan...@ffwll.ch> Signed-off-by: Bing Niu <bing@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_vgpu.c |

[Intel-gfx] [PATCH v9 04/10] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-09 Thread Zhi Wang
.@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/Kconfig | 22 ++ drivers/gpu/dr

[Intel-gfx] [PATCH v9 03/10] drm/i915: Fold vGPU active check into inner functions

2016-06-09 Thread Zhi Wang
ian <kevin.t...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ---

[Intel-gfx] [PATCH v9 09/10] drm/i915: Support LRC context single submission

2016-06-09 Thread Zhi Wang
hti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers

[Intel-gfx] [PATCH v9 02/10] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page

2016-06-09 Thread Zhi Wang
Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH v9 06/10] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-09 Thread Zhi Wang
htinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 2 +- 3 fil

[Intel-gfx] [PATCH v9 10/10] drm/i915: Introduce GVT context creation API

2016-06-09 Thread Zhi Wang
;tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 34 + 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v9 00/10] Introduce the implementation of GVT context

2016-06-09 Thread Zhi Wang
! Reference - [1] https://01.org/igvt-g [2] http://lists.freedesktop.org/archives/intel-gfx/2014-September/053098.html [3] http://lists.freedesktop.org/archives/intel-gfx/2015-September/075397.html Bing Niu (1): drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang (9

[Intel-gfx] [PATCH v8 08/10] drm/i915: Introduce execlist context status change notification

2016-06-08 Thread Zhi Wang
e notifier header, so it could be switched on/off at runtime. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT is enabled.(Tvrtko) Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.urs

[Intel-gfx] [PATCH v8 09/10] drm/i915: Support LRC context single submission

2016-06-08 Thread Zhi Wang
hti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 15 +++ 2 files changed, 16 i

[Intel-gfx] [PATCH v8 03/10] drm/i915: Fold vGPU active check into inner functions

2016-06-08 Thread Zhi Wang
ian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 --- drivers/gpu/drm/i915/i915_vgpu.c| 13 + drivers/gpu/drm/i915/i915_vgpu.h| 4 ++-- 3 files changed, 15 insertions(+), 13 deletions(-) diff --gi

[Intel-gfx] [PATCH v8 06/10] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-08 Thread Zhi Wang
; Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/dr

[Intel-gfx] [PATCH v8 04/10] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-08 Thread Zhi Wang
.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Cc: Kevin Tian <kevin.t...@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/Kconfig | 22 ++ drivers/gpu/drm/i915/Makefile| 5 ++ drivers/gpu/drm/i915/gvt/Make

[Intel-gfx] [PATCH v8 07/10] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-08 Thread Zhi Wang
gt; Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 2 ++ drivers/gpu/drm/i915/i915_reg.h | 12 drivers/gp

[Intel-gfx] [PATCH v8 05/10] drm/i915: Introduce host graphics memory partition for GVT-g

2016-06-08 Thread Zhi Wang
ilson.co.uk> Cc: Kevin Tian <kevin.t...@intel.com> Cc: Daniel Vetter <dan...@ffwll.ch> Signed-off-by: Bing Niu <bing....@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_vgpu.c | 23 +---

[Intel-gfx] [PATCH v8 10/10] drm/i915: Introduce GVT context creation API

2016-06-08 Thread Zhi Wang
gic of GEM context creation service and LRC context creation service to create the GVT context. Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> Signed-off-by: Zh

[Intel-gfx] [PATCH v8 02/10] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page

2016-06-08 Thread Zhi Wang
Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h index 68bdf60..7b3c

[Intel-gfx] [PATCH v8 01/10] drm/i915: Factor out i915_pvinfo.h

2016-06-08 Thread Zhi Wang
structure (Joonas) Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 113 + drivers/gpu/drm/i915/i915_vgpu.h | 86 +---

[Intel-gfx] [PATCH v8 00/10] Introduce the implementation of GVT context

2016-06-08 Thread Zhi Wang
-gfx/2015-September/075397.html Bing Niu (1): drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang (9): drm/i915: Factor out i915_pvinfo.h drm/i915: Use offsetof() to calculate the offset of members in PVINFO page drm/i915: Fold vGPU active check into inner functions

[Intel-gfx] [PATCH v7 08/11] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-07 Thread Zhi Wang
ssing mode bits into intel_lrc.h. (Chris) v5: - Change USES_FULL_48BIT(dev) to USES_FULL_48BIT(dev_priv) (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 2 ++ drivers/gpu/drm/i915/i915_re

[Intel-gfx] [PATCH v7 11/11] drm/i915: Introduce GVT context creation API

2016-06-07 Thread Zhi Wang
ment about the ring buffer size. (Joonas) v2: Mostly based on Daniel's idea. Call the refactored core logic of GEM context creation service and LRC context creation service to create the GVT context. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_ge

[Intel-gfx] [PATCH v7 06/11] drm/i915: Introduce host graphics memory partition for GVT-g

2016-06-07 Thread Zhi Wang
meters. (Joonas) v2: - Address all coding-style comments from Joonas previously. - Fix errors and warnning reported by checkpatch.pl. (Joonas) - Move the graphs into the header files. (Daniel) Signed-off-by: Bing Niu <bing@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --

[Intel-gfx] [PATCH v7 07/11] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-07 Thread Zhi Wang
This patch introduces an option for configuring the ring buffer size of a LRC context after the context creation. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH v7 10/11] drm/i915: Support LRC context single submission

2016-06-07 Thread Zhi Wang
: - Fix typos in commit message. (Joonas) v6: - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/dr

[Intel-gfx] [PATCH v7 09/11] drm/i915: Introduce execlist context status change notification

2016-06-07 Thread Zhi Wang
. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT is enabled.(Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel_lrc.c| 25 +++

[Intel-gfx] [PATCH v7 01/11] drm/i915: Factor out i915_pvinfo.h

2016-06-07 Thread Zhi Wang
structure (Joonas) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.h | 113 + drivers/gpu/drm/i915/i915_vgpu.h | 86 +--- 2 files changed, 114 insertions(+), 85 deletions(-) create mode 100644

[Intel-gfx] [PATCH v7 05/11] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-07 Thread Zhi Wang
ove empty and unused functions. - Replace magic number with marcos. - Set GVT-g in kernel config to "n" by default. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/Kconfig | 22 + drivers/gpu/drm/i915/Makefile| 5 ++ drivers/gpu/drm/i9

[Intel-gfx] [PATCH v7 03/11] drm/i915: Fold vGPU active check into inner functions

2016-06-07 Thread Zhi Wang
v5: - Let functions take struct drm_i915_private *. (Tvrtko) - Fold vGPU related active check into the inner functions. (Kevin) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 --- drivers/gpu/drm/i915/i915_vgpu.c

[Intel-gfx] [PATCH v7 02/11] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page

2016-06-07 Thread Zhi Wang
To get the offset of the members in PVINFO page, offsetof() looks much better than the tricky approach in current code. v7: - Move "offsetof()" modification into a dedicated patch. (Joonas) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_pvinfo.

[Intel-gfx] [PATCH v7 04/11] drm/i915: Add teardown path in intel_vgt_ballon()

2016-06-07 Thread Zhi Wang
This function needs to be changed to have a proper goto teardown path. Destructors/fini functions are only expected to be called after a successful initialization, so calling it at random phase in init function is bad. (Joonas) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/g

[Intel-gfx] [PATCH v7 00/11] Introduce the implementation of GVT context

2016-06-07 Thread Zhi Wang
(1): drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang (10): drm/i915: Factor out i915_pvinfo.h drm/i915: Use offsetof() to calculate the offset of members in PVINFO page drm/i915: Fold vGPU active check into inner functions drm/i915: Add teardown path

[Intel-gfx] [PATCH v6 6/9] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-02 Thread Zhi Wang
of a LRC context should be configurable under this case. v6: - Directly save the addressing mode bits inside i915_gem_context. (Chris) - Move the LRC context addressing mode bits into intel_lrc.h. (Chris) v5: - Change USES_FULL_48BIT(dev) to USES_FULL_48BIT(dev_priv) (Tvrtko) Signed-off-by: Zhi Wang

[Intel-gfx] [PATCH v6 9/9] drm/i915: Introduce GVT context creation API

2016-06-02 Thread Zhi Wang
M_I915_GVT is enabled. (Tvrtko) - Rebase the code into new repo. - Add a comment about the ring buffer size. (Joonas) v2: Mostly based on Daniel's idea. Call the refactored core logic of GEM context creation service and LRC context creation service to create the GVT context. Signed-off-by: Zhi Wan

[Intel-gfx] [PATCH v6 8/9] drm/i915: Support LRC context single submission

2016-06-02 Thread Zhi Wang
: - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 15 +++ 2 files c

[Intel-gfx] [PATCH v6 7/9] drm/i915: Introduce execlist context status change notification

2016-06-02 Thread Zhi Wang
notifier header, so it could be switched on/off at runtime. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT is enabled.(Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 24 +++

[Intel-gfx] [PATCH v6 4/9] drm/i915: Introduce host graphics memory partition for GVT-g

2016-06-02 Thread Zhi Wang
Joonas previously. - Fix errors and warnning reported by checkpatch.pl. (Joonas) - Move the graphs into the header files. (Daniel) Signed-off-by: Bing Niu <bing@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_vgpu.c | 23 +-

[Intel-gfx] [PATCH v6 5/9] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-02 Thread Zhi Wang
This patch introduces an option for configuring the ring buffer size of a LRC context after the context creation. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH v6 3/9] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-02 Thread Zhi Wang
. - Replace customized info/warn/debug macros with DRM macros. - Document all non-static functions like i915. - Remove empty and unused functions. - Replace magic number with marcos. - Set GVT-g in kernel config to "n" by default. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- driv

[Intel-gfx] [PATCH v6 1/9] drm/i915: Factor out i915_pvinfo.h

2016-06-02 Thread Zhi Wang
As the PVINFO page definition is used by both GVT-g guest (vGPU) and GVT-g host (GVT-g kernel device model), factor it out for better code structure. v3: Take Joonas's comments: - Use offsetof to calculate the member offset of PVINFO structure Signed-off-by: Zhi Wang <zhi.a.w...@intel.

[Intel-gfx] [PATCH v6 2/9] drm/i915: Fold vGPU active check into inner functions

2016-06-02 Thread Zhi Wang
v5: - Let functions take struct drm_i915_private *. (Tvrtko) - Fold vGPU related active check into the inner functions. (Kevin) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 --- drivers/gpu/drm/i915/i915_vgpu.c

[Intel-gfx] [PATCH v6 0/9] Introduce the implementation of GVT context

2016-06-02 Thread Zhi Wang
: Introduce host graphics memory partition for GVT-g Zhi Wang (8): drm/i915: Factor out i915_pvinfo.h drm/i915: Fold vGPU active check into inner functions drm/i915: gvt: Introduce the basic architecture of GVT-g drm/i915: Make ring buffer size of a LRC context configurable drm/i915: Make

[Intel-gfx] [PATCH 9/9] drm/i915: Introduce GVT context creation API

2016-06-02 Thread Zhi Wang
M_I915_GVT is enabled. (Tvrtko) - Rebase the code into new repo. - Add a comment about the ring buffer size. (Joonas) v2: Mostly based on Daniel's idea. Call the refactored core logic of GEM context creation service and LRC context creation service to create the GVT context. Signed-off-by: Zhi Wan

[Intel-gfx] [PATCH 8/9] drm/i915: Support LRC context single submission

2016-06-02 Thread Zhi Wang
: - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 15 +++ 2 files c

[Intel-gfx] [PATCH 5/9] drm/i915: Make ring buffer size of a LRC context configurable

2016-06-02 Thread Zhi Wang
This patch introduces an option for configuring the ring buffer size of a LRC context after the context creation. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH 6/9] drm/i915: Make addressing mode bits in context descriptor configurable

2016-06-02 Thread Zhi Wang
of a LRC context should be configurable under this case. v6: - Directly save the addressing mode bits inside i915_gem_context. (Chris) - Move the LRC context addressing mode bits into intel_lrc.h. (Chris) v5: - Change USES_FULL_48BIT(dev) to USES_FULL_48BIT(dev_priv) (Tvrtko) Signed-off-by: Zhi Wang

[Intel-gfx] [PATCH 7/9] drm/i915: Introduce execlist context status change notification

2016-06-02 Thread Zhi Wang
notifier header, so it could be switched on/off at runtime. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT is enabled.(Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 24 +++

[Intel-gfx] [PATCH 4/9] drm/i915: Introduce host graphics memory partition for GVT-g

2016-06-02 Thread Zhi Wang
Joonas previously. - Fix errors and warnning reported by checkpatch.pl. (Joonas) - Move the graphs into the header files. (Daniel) Signed-off-by: Bing Niu <bing@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_vgpu.c | 23 +-

[Intel-gfx] [PATCH 3/9] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-06-02 Thread Zhi Wang
. - Replace customized info/warn/debug macros with DRM macros. - Document all non-static functions like i915. - Remove empty and unused functions. - Replace magic number with marcos. - Set GVT-g in kernel config to "n" by default. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- driv

[Intel-gfx] [PATCH 1/9] drm/i915: Factor out i915_pvinfo.h

2016-06-02 Thread Zhi Wang
As the PVINFO page definition is used by both GVT-g guest (vGPU) and GVT-g host (GVT-g kernel device model), factor it out for better code structure. v3: Take Joonas's comments: - Use offsetof to calculate the member offset of PVINFO structure Signed-off-by: Zhi Wang <zhi.a.w...@intel.

[Intel-gfx] [PATCH 0/9] Introduce the implementation of GVT context

2016-06-02 Thread Zhi Wang
: Introduce host graphics memory partition for GVT-g Zhi Wang (8): drm/i915: Factor out i915_pvinfo.h drm/i915: Fold vGPU active check into inner functions drm/i915: gvt: Introduce the basic architecture of GVT-g drm/i915: Make ring buffer size of a LRC context configurable drm/i915: Make

[Intel-gfx] [PATCH 2/9] drm/i915: Fold vGPU active check into inner functions

2016-06-02 Thread Zhi Wang
v5: - Let functions take struct drm_i915_private *. (Tvrtko) - Fold vGPU related active check into the inner functions. (Kevin) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 --- drivers/gpu/drm/i915/i915_vgpu.c

[Intel-gfx] [PATCH 9/9] drm/i915: Introduce GVT context creation API

2016-05-17 Thread Zhi Wang
ment about the ring buffer size. v2: Mostly based on Daniel's idea. Call the refactored core logic of GEM context creation service and LRC context creation service to create the GVT context. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + driv

[Intel-gfx] [PATCH 7/9] drm/i915: Introduce execlist context status change notification

2016-05-17 Thread Zhi Wang
s function is configurable in the context creation service. Currently, Only GVT-g will create the "status-change-notification" enabled GEM context. v5: - Only compile this feature when CONFIG_DRM_I915_GVT is enabled.(Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu

[Intel-gfx] [PATCH 6/9] drm/i915: Generate addressing mode bit from flag in context.

2016-05-17 Thread Zhi Wang
. v5: - Change USES_FULL_48BIT(dev) to USES_FULL_48BIT(dev_priv) (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 2 ++ drivers/gpu/drm/i915/intel_lrc.c| 9 + 3 files chan

[Intel-gfx] [PATCH 2/9] drm/i915/gvt: Fold vGPU active check into inner functions

2016-05-17 Thread Zhi Wang
v5: - Let functions take struct drm_i915_private *. (Tvrtko) - Fold vGPU related active check into the inner functions. (Kevin) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 --- drivers/gpu/drm/i915/i915_vgpu.c

[Intel-gfx] [PATCH 8/9] drm/i915: Support context single submission

2016-05-17 Thread Zhi Wang
. Only GVT-g will create this kinds of GEM context currently. v5: - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_lrc.c | 15 +++ 2 files chang

[Intel-gfx] [PATCH 5/9] drm/i915: Make ring buffer size configurable

2016-05-17 Thread Zhi Wang
This patch introduces an option for configuring ring buffer size during context creation. If no ring buffer size is specified, the default size (4 * PAGE_SIZE) will be used. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/dr

[Intel-gfx] [PATCH 4/9] drm/i915: Introduce host graphics memory partition for GVT-g

2016-05-17 Thread Zhi Wang
<bing@intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 22 + drivers/gpu/drm/i915/i915_vgpu.c | 21 +++- drivers/gpu/drm/i915/intel_gvt.c | 42 drivers/gpu/dr

[Intel-gfx] [PATCH 0/9] Introduce the implementation of GVT context

2016-05-17 Thread Zhi Wang
partition for GVT-g Zhi Wang (8): drm/i915: Factor out i915_pvinfo.h drm/i915/gvt: Fold vGPU active check into inner functions drm/i915: gvt: Introduce the basic architecture of GVT-g drm/i915: Make ring buffer size configurable drm/i915: Generate addressing mode bit from flag in context

[Intel-gfx] [PATCH 3/9] drm/i915: gvt: Introduce the basic architecture of GVT-g

2016-05-17 Thread Zhi Wang
boolean return value with int. - Replace customized info/warn/debug macros with DRM macros. - Document all non-static functions like i915. - Remove empty and unused functions. - Replace magic number with marcos. - Set GVT-g in kernel config to "n" by default. Signed-off-by: Zhi Wan

[Intel-gfx] [PATCH 1/9] drm/i915: Factor out i915_pvinfo.h

2016-05-17 Thread Zhi Wang
As the PVINFO page definition is used by both GVT-g guest (vGPU) and GVT-g host (GVT-g kernel device model), factor it out for better code structure. v3: Take Joonas's comments: - Use offsetof to calculate the member offset of PVINFO structure Signed-off-by: Zhi Wang <zhi.a.w...@intel.

[Intel-gfx] [PATCH 08/15] drm/i915: Introduce an option for skipping engine context initialization

2016-05-15 Thread Zhi Wang
GVT-g will copy guest context into GVT LRC context before using it, so engine context initialization is not necessary. This patch introduces an option, and caller could configure it to choose if the engine context initialization should be skipped. Signed-off-by: Zhi Wang <zhi.a.w...@intel.

[Intel-gfx] [PATCH 11/15] drm/i915: Introduce execlist context status change notification

2016-05-15 Thread Zhi Wang
s function is configurable in the context creation service. Currently, Only GVT-g will create the "status-change-notification" enabled GEM context. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 5 + drivers/gpu/drm/i915/intel_lrc.c | 23 ++

[Intel-gfx] [PATCH 14/15] drm/i915: Factor out and expose i915_steal_fence()

2016-05-15 Thread Zhi Wang
Factor out and expose fence stealing functionality for GVT-g. GVT-g will use i915_find_fence_reg() to find a free/unpin fence register and use i915_steal_fence() to steal it. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/dr

[Intel-gfx] [PATCH 13/15] drm/i915: Introduce GVT context creation API

2016-05-15 Thread Zhi Wang
t creation service to create the GVT context. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 34 + 2 files changed, 35 insertions(+) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH 07/15] drm/i915: Populate context PDPs if it has a PPGTT

2016-05-15 Thread Zhi Wang
As we allow contexts without PPGTT to be created, we should check if a context has a PPGTT before populating PDPs from it. Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> --- drivers/gpu/drm/i915/intel_lrc.c | 29 - 1 file changed, 16 insertions(+), 13 del

[Intel-gfx] [PATCH 05/15] drm/i915: Set ctx->ppgtt for aliasing PPGTT in context creation

2016-05-15 Thread Zhi Wang
Currently ctx->ppgtt would only be initialized when full PPGTT is used. For aliasing PPGTT mode, ctx->ppgtt will be set when LRC context is populated. This patch moves the assignment into i915_gem_create_context() for better code structure. Signed-off-by: Zhi Wang <zhi.a.w...@

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