Re: [Intel-gfx] [PATCH 4/5] drm/i915: Check live status before reading edid

PM To: Daniel Vetter <dan...@ffwll.ch>; Jindal, Sonika <sonika.jin...@intel.com>; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 4/5] drm/i915: Check live status before reading edid On Tue, Jul 12, 2016 at 02:39:47PM +0300, David Weinehall wrote: > I'm feeling

Re: [Intel-gfx] [PATCH 2/7] drm/i915/psr: Try to program link training times correctly

On 5/18/2016 10:17 PM, Daniel Vetter wrote: Oops. Hw default for programming these fields to 0 is "skip link training". Display won't take that too well usually. But we were defaulting it to value 0, which means 500us for both TP1 and TP2 or TP3 time. I dont think it means skip link training.

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Enable edp psr error interrupts on hsw

On 5/18/2016 11:56 PM, Ville Syrjälä wrote: On Wed, May 18, 2016 at 06:47:10PM +0200, Daniel Vetter wrote: The definitions for the error register should be valid on bdw/skl too, but there we haven't even enabled DE_MISC handling yet. Somewhat confusing the the moved register offset on bdw is

Re: [Intel-gfx] [PATCH] drm/i915/psr: Implement PSR2 w/a for gen9

Looks good to me. Reviewed-by: Sonika Jindal On 5/19/2016 12:44 PM, Daniel Vetter wrote: Found this while browsing Bspec. Looks like it applies to both skl and kbl. v2: Also for bxt (Art). Cc: Rodrigo Vivi Cc: Sonika Jindal

Re: [Intel-gfx] [PATCH] drm/i915: Check live status before reading edid

+Shashank Shashank was planning to give a patch to bypass live status checks for older platforms. Regards, Sonika -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Wednesday, March 9, 2016 2:34 AM To: Jindal, Sonika <sonika.jin...@intel.com> Cc: int

Re: [Intel-gfx] [4.4-rc1][Regression] drm/i915: Check live status before reading edid

On 2/26/2016 12:11 AM, Joseph Salisbury wrote: On 02/24/2016 10:53 PM, Jindal, Sonika wrote: Hi Joe, Yes, first thing to try is to increase the tries. We testing with 300 retries, but the second monitor still did not show up. However, it did show up in lspci. Can you please point me

Re: [Intel-gfx] [4.4-rc1][Regression] drm/i915: Check live status before reading edid

-Original Message- From: Joseph Salisbury [mailto:joseph.salisb...@canonical.com] Sent: Thursday, February 25, 2016 3:09 AM To: Jindal, Sonika <sonika.jin...@intel.com> Cc: Sharma, Shashank <shashank.sha...@intel.com>; Vivi, Rodrigo <rodrigo.v...@intel.com>; Daniel

Re: [Intel-gfx] [REGRESSION] i915: No HDMI output with 4.4

On 2/23/2016 8:38 PM, Ville Syrjälä wrote: On Mon, Feb 22, 2016 at 02:32:32PM +0200, Oleksandr Natalenko wrote: Ville, Daniel, any additional info I could provide? I have to return dual-link DVI cable back, so let me know if I could reveal more details if necessary. Unfortunately I'm out of

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Call encoder hotplug for init and resume cases

On 12/16/2015 7:16 PM, Daniel Vetter wrote: On Wed, Dec 16, 2015 at 04:18:05PM +0530, Sonika Jindal wrote: Call the encoders, call the hot_plug if it is registered. This is required for connected boot and resume cases to generate fake hpd resulting in reading of edid. Removing the initial

Re: [Intel-gfx] [PATCH] drm/i915: mdelay(10) considered harmful

%s/cpy/cpu Reviewed-by: Sonika Jindal On 12/12/2015 12:14 AM, Daniel Vetter wrote: I missed this myself when reviewing commit 237ed86c693d8a8e4db476976aeb30df4deac74b Author: Sonika Jindal Date: Tue Sep 15 09:44:20 2015 +0530

Re: [Intel-gfx] [PATCH] drm/i915: Add hot_plug hook for hdmi encoder

removed the check. If required we can add a check there. Regards, Sonika -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Thursday, December 10, 2015 2:00 PM To: Jindal, Sonika <sonika.jin...@intel.com> Cc: intel-gfx@lists.freedeskt

Re: [Intel-gfx] [PATCH] drm/i915: Add hot_plug hook for hdmi encoder

om: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Thursday, December 10, 2015 2:24 PM To: Jindal, Sonika <sonika.jin...@intel.com> Cc: Daniel Vetter <dan...@ffwll.ch>; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: Add hot_plug

Re: [Intel-gfx] [PATCH] drm/i915: Correct max delay for HDMI hotplug live status checking

How about following instead of two levels of check in the while loop: unsigned int retry = 3; do { live_status = intel_digital_port_connected(dev_priv, hdmi_to_dig_port(intel_hdmi)); if (live_status) break; mdelay(10); } while

Re: [Intel-gfx] [PATCH] drm/i915: Correct max delay for HDMI hotplug live status checking

, 2015 11:34 AM To: Jindal, Sonika <sonika.jin...@intel.com>; intel-gfx@lists.freedesktop.org Subject: RE: [Intel-gfx] [PATCH] drm/i915: Correct max delay for HDMI hotplug live status checking Hi Sonika, Thanks for your comment, and it's more readability on code. But it only delay 2 integ

Re: [Intel-gfx] [PATCH] drm/i915: Also disable PSR on Sink when disabling it on Source.

Reviewed-by: Sonika Jindal <sonika.jin...@intel.com> -Original Message- From: Vivi, Rodrigo Sent: Tuesday, November 24, 2015 3:50 AM To: intel-gfx@lists.freedesktop.org Cc: Vivi, Rodrigo; Jindal, Sonika Subject: [PATCH] drm/i915: Also disable PSR on Sink when disabling it on

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove PSR Perf Counter for SKL+

...@gmail.com] Sent: Friday, November 20, 2015 12:01 AM To: Jindal, Sonika Cc: R, Durgadoss; Vivi, Rodrigo; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove PSR Perf Counter for SKL+ On Wed, Nov 18, 2015 at 11:45 PM, Jindal, Sonika <sonika.jin...@intel.com> wrote

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Also disable PSR on Sink when disabling it on Source.

Why not move it inside the mutex_lock/unlock on psr.lock ? Regards, Sonika -Original Message- From: Vivi, Rodrigo Sent: Thursday, November 19, 2015 6:10 AM To: intel-gfx@lists.freedesktop.org Cc: Vivi, Rodrigo; Jindal, Sonika Subject: [PATCH 3/3] drm/i915: Also disable PSR on Sink when

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove PSR Perf Counter for SKL+

Hi Rodrigo, Which platform have you observed this issue on? This looks really strange. Have you checked whether we are able to enter PSR at sink side or not in such cases? Are we sure we are not entering PSR? I mean the PSR_STATE register says it correctly? Regards, Sonika -Original

Re: [Intel-gfx] [PATCH 2/2] drm/i915: force link training when requested by Sink

Looks good to me. Reviewed-by: Sonika Jindal

Re: [Intel-gfx] [PATCH] drm/i915: Cleanup test data during long/short hotplug

Looks good to me. Reviewed-by: Sonika Jindal

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Cleanup test data during long/short hotplug

For the edid read test, if we are capturing i2c_nack_count and i2c_defer_count, it will be better if you move the resetting of these variable just before the edid read. Also, please add some comment why we need to reset compliance_test_* at two places. Regards, Sonika -Original

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Call encoder hotplug for init and resume cases

2, 2015 5:54 PM To: Ville Syrjälä; Vetter, Daniel Cc: intel-gfx@lists.freedesktop.org; Mukherjee, Indranil; Jindal, Sonika Subject: RE: [Intel-gfx] [PATCH 1/2] drm/i915: Call encoder hotplug for init and resume cases We were debugging this issue, and we could find the root cause: In function: Intel

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Call encoder hotplug for init and resume cases

On 10/9/2015 1:24 AM, Daniel Vetter wrote: On Thu, Oct 08, 2015 at 05:38:58PM +0300, Jani Nikula wrote: On Thu, 08 Oct 2015, Ville Syrjälä wrote: On Mon, Oct 05, 2015 at 04:43:14PM +0530, Sonika Jindal wrote: For all the encoders, call the hot_plug if it is

Re: [Intel-gfx] [PATCH] drm/i915: Consider plane rotation when calculating stride in skl_do_mmio_flip

On 10/7/2015 3:31 PM, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Previously rotation was ignored and wrong stride programmed into the plane registers resulting in a corrupt image on screen. Signed-off-by: Tvrtko Ursulin Cc: Sonika Jindal

Re: [Intel-gfx] [PATCH] drm/i915: Add hot_plug hook for hdmi encoder

On 9/28/2015 7:04 PM, Daniel Vetter wrote: On Mon, Sep 28, 2015 at 02:26:04PM +0530, Sonika Jindal wrote: This patch adds a separate probe function for HDMI EDID read over DDC channel. This function has been registered as a .hot_plug handler for HDMI encoder. The current implementation of

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Set oscaledcompmethod to enable scale value

Thanks Imre for the explanation. I will repost the patch.. Regards, Sonika -Original Message- From: Deak, Imre Sent: Wednesday, September 23, 2015 5:15 PM To: Jindal, Sonika Cc: Thulasimani, Sivakumar; intel-gfx@lists.freedesktop.org; Ville Syrjälä Subject: Re: [Intel-gfx] [PATCH 1/2

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Set oscaledcompmethod to enable scale value

On 9/23/2015 1:02 AM, Imre Deak wrote: On Wed, 2015-09-23 at 00:01 +0530, Sivakumar Thulasimani wrote: On 9/22/2015 6:32 PM, Imre Deak wrote: On ma, 2015-09-21 at 23:00 +0530, Sivakumar Thulasimani wrote: Reviewed-by: Sivakumar Thulasimani On 9/18/2015

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Use intel_encoder->hpd_pin to check live status

On 9/14/2015 2:04 PM, Daniel Vetter wrote: On Fri, Sep 11, 2015 at 04:58:32PM +0530, Sonika Jindal wrote: Using intel_encoder's hpd_pin to check the live status because of BXT A0/A1 WA for HPD pins and hpd_pin contains the updated pin for the corresponding port. Signed-off-by: Sonika Jindal

Re: [Intel-gfx] [PATCH] drm/i915: Check live status before reading edid

On 9/14/2015 2:12 PM, Daniel Vetter wrote: On Fri, Sep 11, 2015 at 05:56:47PM +, Rodrigo Vivi wrote: Thanks Reviewed-by: Rodrigo Vivi On Fri, Sep 11, 2015 at 4:38 AM Sonika Jindal wrote: The Bspec is very clear that Live status must

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Use intel_encoder->hpd_pin to check live status

Thanks Rodrigo. This is always true. The hpd_pin is the right pin which we set for particular port. So no fallback needed. Regards, Sonika From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com] Sent: Friday, September 11, 2015 11:31 PM To: Jindal, Sonika; intel-gfx@lists.freedesktop.org Subject: Re

Re: [Intel-gfx] [PATCH 2/6] drm/i915: Add HDMI probe function

On 9/10/2015 12:25 AM, Rodrigo Vivi wrote: I liked the approach and agree with Daniel, so with his suggestions feel free to use: Reviewed-by: Rodrigo Vivi > On Fri, Sep 4, 2015 at 7:46 AM Daniel Vetter

Re: [Intel-gfx] [PATCH 6/6] drm/i915/bxt: Fix irq_port for eDP

AM To: Jindal, Sonika; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 6/6] drm/i915/bxt: Fix irq_port for eDP Nak: I don't believe we need this... Actually I believe we need the opposite... we need to enable HPD on port A for eDP errors handling... On Fri, Sep 4, 2015 at 6:38

Re: [Intel-gfx] [PATCH 5/6] drm/i915: drm/i915: Process hpd only for hdmi inside hotplug_work_func

rigo.v...@gmail.com] Sent: Thursday, September 10, 2015 12:51 AM To: Jindal, Sonika; Daniel Vetter Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 5/6] drm/i915: drm/i915: Process hpd only for hdmi inside hotplug_work_func I was also going to say that I believe this breaks DP h

Re: [Intel-gfx] [PATCH] drm/i915: Call encoder hot_plug hook only for hdmi

-Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, September 9, 2015 8:48 PM To: Jindal, Sonika Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org; Sharma, Shashank Subject: Re: [Intel-gfx] [PATCH] drm/i915: Call encoder

Re: [Intel-gfx] [PATCH] drm/i915: Call encoder hot_plug hook only for hdmi

On 9/8/2015 10:12 AM, Jindal, Sonika wrote: On 9/7/2015 9:56 PM, Daniel Vetter wrote: On Mon, Sep 07, 2015 at 10:34:34AM +0530, Sonika Jindal wrote: If the same port is enumerated as hdmi as well as DP, this will call hot_plug hook for DP as well which is not required here. This splitting

Re: [Intel-gfx] [PATCH] drm/i915: Call encoder hot_plug hook only for hdmi

On 9/7/2015 9:56 PM, Daniel Vetter wrote: On Mon, Sep 07, 2015 at 10:34:34AM +0530, Sonika Jindal wrote: If the same port is enumerated as hdmi as well as DP, this will call hot_plug hook for DP as well which is not required here. This splitting of edid read and detect is done only for HDMI

Re: [Intel-gfx] [PATCH 5/6] drm/i915: drm/i915: Process hpd only for hdmi inside hotplug_work_func

On 9/4/2015 8:17 PM, Daniel Vetter wrote: On Fri, Sep 04, 2015 at 06:56:15PM +0530, Sonika Jindal wrote: If the same port is enumerated as hdmi as well as DP, this will get called for DP connector as well which is not required because i915_hotplug_work_func is solely to handle hdmi HPD.

Re: [Intel-gfx] [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list

Reviewed-by: Sonika Jindal -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Kumar, Mahesh Sent: Thursday, September 3, 2015 4:17 PM To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 2/2]

Re: [Intel-gfx] [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel

Reviewed-by: Sonika Jindal -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Kumar, Mahesh Sent: Thursday, September 3, 2015 4:17 PM To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 1/2] drm/i915/skl:

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix irq_port for eDP

for hdmi to work on bxt. Regards, Sonika -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, September 2, 2015 5:21 PM To: Jindal, Sonika Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix irq_port for eDP

To: Jindal, Sonika Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix irq_port for eDP On Mon, Aug 31, 2015 at 02:35:32PM +0530, Sonika Jindal wrote: > From: Durgadoss R <durgados...@intel.com> > > Currently, HDMI hotplug with eDP as local panel is

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Retry for live status

[mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, August 26, 2015 3:10 PM To: Jindal, Sonika Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Retry for live status On Tue, Aug 25, 2015 at 05:31:33PM +0530, Sonika Jindal wrote: Some monitors

Re: [Intel-gfx] [PATCH v2 4/7] drm/i915: add common intel_digital_port_connected function

So, looks like I can use intel_digital_port_connected for hdmi case. In that case, we can make this function global and add a case for bxt as well. Regards, Sonika -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Jani Nikula Sent:

Re: [Intel-gfx] [PATCH v2 1/7] drm/i915: move ibx_digital_port_connected to intel_dp.c

Hmm, so we might need to make it global again, because we would want to check the live status for hdmi in the hdmi optimization series: http://lists.freedesktop.org/archives/intel-gfx/2015-August/074306.html Maybe we can drop this patch alone? Regards, Sonika -Original Message- From:

Re: [Intel-gfx] [PATCH v2 7/7] drm/i915/bxt: Use correct live status register for BXT platform

Oh, bxt is here..:) Spoke too soon.. But will need to make it based upon intel_encoder-hpd_pin because of the A0/A1 WA for BXT. Also, we need to make intel_digital_port_connected global to be accessed from intel_hdmi.c Regards, Sonika -Original Message- From: Intel-gfx

Re: [Intel-gfx] [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list

Can you please add the test case name to the commit message? Also, this should be split into two patches one addressing the divide by zero error and another one to add plane formats. Regards, Sonika -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On

Re: [Intel-gfx] [PATCH] drm/i915: Use dpcd read wake for sink crc calls.

So, sink crc during psr works now? Great, I will give a try with this patch.. Regards, Sonika -Original Message- From: Vivi, Rodrigo Sent: Friday, August 21, 2015 4:53 AM To: intel-gfx@lists.freedesktop.org Cc: Vivi, Rodrigo; Antognolli, Rafael; Jindal, Sonika Subject: [PATCH] drm/i915

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Check live status before reading edid

On 8/10/2015 11:14 AM, Sivakumar Thulasimani wrote: On 7/14/2015 5:21 PM, Sonika Jindal wrote: Adding this for SKL onwards. v2: Adding checks for VLV/CHV as well. Reusing old ibx and g4x functions to check digital port status. Adding a separate function to get bxt live status (Daniel)

Re: [Intel-gfx] [PATCH] drm/i915: fix checksum write for automated test reply

Looks good to me. Reviewed-by: Sonika Jindal sonika.jin...@intel.com -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Sivakumar Thulasimani Sent: Friday, August 7, 2015 3:15 PM To: dan...@ffwll.ch; intel-gfx@lists.freedesktop.org Subject:

Re: [Intel-gfx] [PATCH 7/6] drm/i915/skl: DDI-E and DDI-A shares 4 lanes.

On 8/13/2015 8:57 AM, Zhang, Xiong Y wrote: On Wed, 2015-08-12 at 02:20 +, Zhang, Xiong Y wrote: On Tue, 2015-08-11 at 07:05 +, Zhang, Xiong Y wrote: -Original Message- From: Vivi, Rodrigo Sent: Saturday, August 8, 2015 8:34 AM To: intel-gfx@lists.freedesktop.org Cc: Vivi,

Re: [Intel-gfx] [PATCH] drm/i915: Update HAS_PSR macro to include all gen=8 platforms

] On Behalf Of Daniel Vetter Sent: Tuesday, July 21, 2015 3:18 PM To: Lespiau, Damien Cc: Jindal, Sonika; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: Update HAS_PSR macro to include all gen=8 platforms On Tue, Jul 21, 2015 at 10:31:19AM +0100, Damien Lespiau wrote

Re: [Intel-gfx] [PATCH 0/3] HDMI optimization series

On 8/10/2015 1:38 PM, Daniel Vetter wrote: On Mon, Aug 10, 2015 at 04:50:37AM +, Jindal, Sonika wrote: Hi Daniel, That patch was already merged: http://lists.freedesktop.org/archives/intel-gfx/2015-July/071142.html For SKL, the above patch helped in getting the correct ISR bits set. One

Re: [Intel-gfx] [PATCH 0/3] HDMI optimization series

. Regards, Sonika -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Friday, August 7, 2015 6:54 PM To: Jindal, Sonika Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 0/3] HDMI optimization series On Tue, Jul 14, 2015

Re: [Intel-gfx] [PATCH] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/22/2015 4:03 PM, Sivakumar Thulasimani wrote: On 7/22/2015 3:37 PM, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic and interrupts to check the external panel connection and DDIC HPD logic for edp panel. v2: For DP, irq_port is used to determine

Re: [Intel-gfx] [PATCH] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/22/2015 5:01 PM, Sivakumar Thulasimani wrote: On 7/22/2015 4:39 PM, Jindal, Sonika wrote: On 7/22/2015 4:03 PM, Sivakumar Thulasimani wrote: On 7/22/2015 3:37 PM, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic and interrupts to check

Re: [Intel-gfx] [PATCH 0/3] drm/i915/bxt: HPD long/short pulse detect support on port A

For the patch 3, the commit message can be changed to only long pulse detection instead of long/short because you are not adding support for short pulse detection. Otherwise, this series looks good to me. Reviewed-by: Sonika Jindal sonika.jin...@intel.com On 7/21/2015 3:13 AM, Imre Deak

Re: [Intel-gfx] [PATCH] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/18/2015 5:17 AM, Imre Deak wrote: On Fri, 2015-07-17 at 13:47 +0530, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic and interrupts to check the external panel connection and DDIC HPD logic for edp panel. v2: For DP, irq_port is used to determine the

Re: [Intel-gfx] [PATCH 2/2] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/15/2015 2:37 PM, Daniel Vetter wrote: On Wed, Jul 15, 2015 at 01:34:29PM +0530, Jindal, Sonika wrote: On 7/15/2015 12:05 PM, Jindal, Sonika wrote: On 7/14/2015 7:52 PM, Imre Deak wrote: On ti, 2015-07-14 at 11:18 +0530, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs

Re: [Intel-gfx] [PATCH 2/2] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/15/2015 12:05 PM, Jindal, Sonika wrote: On 7/14/2015 7:52 PM, Imre Deak wrote: On ti, 2015-07-14 at 11:18 +0530, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic and interrupts to check the external panel connection and DDIC HPD logic for edp panel

Re: [Intel-gfx] [PATCH 2/2] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/14/2015 7:52 PM, Imre Deak wrote: On ti, 2015-07-14 at 11:18 +0530, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic and interrupts to check the external panel connection and DDIC HPD logic for edp panel. Signed-off-by: Sonika Jindal

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Check live status before reading edid

On 7/14/2015 7:59 PM, Imre Deak wrote: On ti, 2015-07-14 at 17:21 +0530, Sonika Jindal wrote: Adding this for SKL onwards. v2: Adding checks for VLV/CHV as well. Reusing old ibx and g4x functions to check digital port status. Adding a separate function to get bxt live status (Daniel)

Re: [Intel-gfx] [PATCH] drm/i915: Set edid from init and not from detect

On 7/13/2015 5:10 PM, Chris Wilson wrote: On Mon, Jul 13, 2015 at 04:19:15PM +0530, Sonika Jindal wrote: During init_connector set the edid, then edid will be set/unset only during hotplug. For the sake of older platforms where HPD is not stable, let edid read happen from detect as well only

Re: [Intel-gfx] [PATCH] drm/i915: Check live status before reading edid

On 7/13/2015 8:25 PM, Daniel Vetter wrote: On Mon, Jul 13, 2015 at 04:35:00PM +0530, Sonika Jindal wrote: Adding this for SKL onwards. v2: Adding checks for VLV/CHV as well. Reusing old ibx and g4x functions to check digital port status. Adding a separate function to get bxt live status

Re: [Intel-gfx] [PATCH] drm/i915/bxt: WA for swapped HPD pins in A stepping

On 7/13/2015 12:01 PM, Sivakumar Thulasimani wrote: On 7/13/2015 9:47 AM, Sonika Jindal wrote: As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic and interrupts to check the external panel connection. And remove the redundant comment. v2: Remove redundant IS_BROXTON check, Add

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Check live status before reading edid

On 7/9/2015 10:57 PM, Daniel Vetter wrote: On Thu, Jul 09, 2015 at 05:34:29PM +0530, Sonika Jindal wrote: Adding this for SKL onwards. Signed-off-by: Sonika Jindal sonika.jin...@intel.com I think this is the critical piece really, and I'd like to roll it out for all platforms. git has the

Re: [Intel-gfx] [PATCH] drm/i915: Handle HPD when it has actually occurred

On 7/7/2015 6:51 PM, Ville Syrjälä wrote: On Tue, Jul 07, 2015 at 02:22:20PM +0530, Sonika Jindal wrote: Writing to PCH_PORT_HOTPLUG for each interrupt is not required. Handle it only if hpd has actually occurred like we handle other interrupts. v2: Make few variables local to if block

Re: [Intel-gfx] [PATCH] [RFC] drm/i915: Handle HPD when it has actually occurred

On 7/6/2015 2:06 PM, Daniel Vetter wrote: On Mon, Jul 06, 2015 at 11:23:53AM +0530, Sonika Jindal wrote: Writing to PCH_PORT_HOTPLUG for each interrupt is not required. Handle it only if hpd has actually occurred like we handle other interrupts. Signed-off-by: Sonika Jindal

Re: [Intel-gfx] [PATCH] [RFC] drm/i915: Handle HPD when it has actually occurred

On 7/6/2015 2:19 PM, Ville Syrjälä wrote: On Mon, Jul 06, 2015 at 11:23:53AM +0530, Sonika Jindal wrote: Writing to PCH_PORT_HOTPLUG for each interrupt is not required. Handle it only if hpd has actually occurred like we handle other interrupts. Signed-off-by: Sonika Jindal

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Read HDMI EDID only when required

On 7/6/2015 1:08 PM, Daniel Vetter wrote: On Thu, Jul 02, 2015 at 08:24:12AM +0530, Sharma, Shashank wrote: Regards Shashank On 7/1/2015 6:26 PM, Daniel Vetter wrote: On Tue, Jun 30, 2015 at 09:49:57PM +0530, Shashank Sharma wrote: Userspace always sets force. Are you sure this actually

Re: [Intel-gfx] [PATCH v2] drm/i915/bxt: BUNs related to port PLL

Looks good to me.. Reviewed-by: Sonika Jindal sonika.jin...@intel.com -Original Message- From: Kannan, Vandana Sent: Wednesday, July 1, 2015 11:04 AM To: intel-gfx@lists.freedesktop.org Cc: Thulasimani, Sivakumar; Jindal, Sonika; Deak, Imre; Kannan, Vandana Subject: [PATCH v2] drm/i915

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Calculate port clock

I think Imre already has a patch for this: [Intel-gfx] [PATCH v2 5/5] drm/i915/bxt: add DDI port HW readoutsupport -Original Message- From: Kannan, Vandana Sent: Tuesday, June 30, 2015 1:27 PM To: intel-gfx@lists.freedesktop.org Cc: Thulasimani, Sivakumar; Jindal, Sonika; Deak

Re: [Intel-gfx] [PATCH] drm/i915/bxt: BUNs related to port PLL

On 7/1/2015 10:06 AM, Vandana Kannan wrote: This patch contains changes based on 2 updates to the spec: Port PLL VCO restriction raised up to 6700. Port PLL now needs DCO amp override enable for all VCO frequencies. Signed-off-by: Vandana Kannan vandana.kan...@intel.com ---

Re: [Intel-gfx] [PATCH v2 4/5] drm/i915/vlv: move the vlv PLL helper next to its platform counterparts

Reviewed-by: Sonika Jindal sonika.jin...@intel.com On 6/23/2015 2:05 AM, Imre Deak wrote: Move the helper next to the PLL helpers of the other platforms for clarity. No functional change. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 20

Re: [Intel-gfx] [PATCH 4/5] drm/i915/vlv: factor out vlv_calc_port_clock

On 6/18/2015 7:55 PM, Imre Deak wrote: This functionality will be needed by the next patch adding HW readout support for DDI ports on BXT, so factor it out. No functional change. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 18 ++

Re: [Intel-gfx] [PATCH 2/5] drm/i915/bxt: add missing DDI PLL registers to the state checking

On 6/18/2015 7:55 PM, Imre Deak wrote: Although we have a fixed setting for the PLL9 and EBB4 registers, it still makes sense to check them together with the rest of PLL registers. While at it also remove a redundant comment about 10 bit clock enabling. Signed-off-by: Imre Deak

Re: [Intel-gfx] [PATCH 1/5] drm/i915/bxt: mask off the DPLL state checker bits we don't program

Looks good to me. Reviewed-by: Sonika Jindal sonika.jin...@intel.com On 6/18/2015 7:55 PM, Imre Deak wrote: For the purpose of state checking we only care about the DPLL HW flags that we actually program, so mask off the ones that we don't. This fixes one set of DPLL state check failures.

Re: [Intel-gfx] [PATCH 3/5] drm/i915/bxt: add PLL10 to the PLL state dumper

Looks good to me: Reviewed-by: Sonika Jindal sonika.jin...@intel.com On 6/18/2015 7:55 PM, Imre Deak wrote: Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

Re: [Intel-gfx] [PATCH 2/5] drm/i915/bxt: add missing DDI PLL registers to the state checking

Looks good to me: Reviewed-by: Sonika Jindal sonika.jin...@intel.com On 6/24/2015 3:49 PM, Imre Deak wrote: On ke, 2015-06-24 at 15:37 +0530, Jindal, Sonika wrote: On 6/18/2015 7:55 PM, Imre Deak wrote: Although we have a fixed setting for the PLL9 and EBB4 registers, it still makes sense

Re: [Intel-gfx] [PATCH] drm/i915/skl: Buffer translation improvements

On 6/23/2015 4:42 PM, David Weinehall wrote: On Thu, Jun 18, 2015 at 05:05:21PM +0200, Daniel Vetter wrote: On Thu, Jun 18, 2015 at 12:50:33PM +0300, David Weinehall wrote: @@ -3520,6 +3545,9 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP) } else if

Re: [Intel-gfx] [PATCH v5] drm/i915/bxt: eDP Panel Power sequencing

Looks good to me. Reviewed-by: Sonika Jindal sonika.jin...@intel.com -Original Message- From: Kannan, Vandana Sent: Thursday, June 18, 2015 11:01 AM To: intel-gfx@lists.freedesktop.org Cc: Jindal, Sonika; Kannan, Vandana Subject: [PATCH v5] drm/i915/bxt: eDP Panel Power sequencing

Re: [Intel-gfx] [PATCH v4] drm/i915/bxt: eDP Panel Power sequencing

On 6/12/2015 3:57 PM, Vandana Kannan wrote: Changes for BXT - added a IS_BROXTON check to use the macro related to PPS registers for BXT. BXT does not have PP_DIV register. Making changes to handle this. Second set of PPS registers have been defined but will be used when VBT provides a

Re: [Intel-gfx] [PATCH v2 04/10] drm: Add Gamma correction structure

On 6/4/2015 7:12 PM, Kausal Malladi wrote: From: Kausal Malladi kausal.mall...@intel.com This patch adds a new structure in DRM layer for Gamma color correction. This structure will be used by all user space agents to configure appropriate Gamma precision and Gamma level. struct

Re: [Intel-gfx] [PATCH v2 07/10] drm/i915: Add pipe level Gamma correction for CHV/BSW

On 6/4/2015 7:12 PM, Kausal Malladi wrote: From: Kausal Malladi kausal.mall...@intel.com This patch does the following: 1. Adds the core function to program Gamma correction values for CHV/BSW platform 2. Adds Gamma correction macros/defines 3. Adds drm_mode_crtc_update_color_property

Re: [Intel-gfx] [PATCH v2 00/10] Color Manager Implementation

the patches using --in-reply-to tag. Regards, Sonika -Original Message- From: Malladi, Kausal Sent: Thursday, June 4, 2015 7:13 PM To: Roper, Matthew D; Barnes, Jesse; Lespiau, Damien; Jindal, Sonika; R, Durgadoss; Purushothaman, Vijay A; intel-gfx@lists.freedesktop.org; dri-de

Re: [Intel-gfx] [PATCH] drm/i915/bxt: edp1.4 Intermediate Freq support

Hi Vandana, Can you please review the v6 of this patch? This was rebased recently on top of your patch: commit b6dc71f38a84e36c5445b95f9f7a2dac6b25636f Author: Vandana Kannan vandana.kan...@intel.com Date: Wed May 13 12:18:52 2015 +0530 drm/i915/bxt: Port PLL programming BUN

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Initialize Color Manager

On 6/2/2015 1:22 AM, Kausal Malladi wrote: From: Kausal Malladi kausal.mall...@intel.com Color Manager is an extension in i915 driver to handle color correction and enhancements across various Intel platforms. This patch initializes color manager framework by : 1. Adding two new files,

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Add Set property interface for CRTC

On 6/2/2015 1:22 AM, Kausal Malladi wrote: From: Kausal Malladi kausal.mall...@intel.com This patch adds set property interface for Intel CRTC. This interface will be used to set color correction DRM properties. Signed-off-by: Shashank Sharma shashank.sha...@intel.com Signed-off-by: Kausal

Re: [Intel-gfx] [PATCH 4/7] drm: Add Gamma correction structure

On 6/2/2015 1:22 AM, Kausal Malladi wrote: From: Kausal Malladi kausal.mall...@intel.com This patch adds a new structure in DRM layer for Gamma color correction. This structure will be used by all user space agents to configure appropriate Gamma precision and Gamma level. struct

Re: [Intel-gfx] [PATCH 5/7] drm/i915: Add pipe level Gamma correction for CHV/BSW

On 6/2/2015 1:22 AM, Kausal Malladi wrote: From: Kausal Malladi kausal.mall...@intel.com This patch does the following: 1. Adds the core function to program Gamma correction values for CHV/BSW platform 2. Adds Gamma correction macros/defines 3. Adds drm_mode_crtc_update_color_property

Re: [Intel-gfx] [PATCH] drm/i915/bxt: edp1.4 Intermediate Freq support

On 5/26/2015 3:29 PM, Daniel Vetter wrote: On Tue, May 26, 2015 at 12:57:26PM +0300, Jani Nikula wrote: On Tue, 26 May 2015, Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 26, 2015 at 02:51:38PM +0530, Sonika Jindal wrote: BXT supports following intermediate link rates for edp: 2.16GHz,

Re: [Intel-gfx] [PATCH i-g-t] kms_rotation_crc: Update rotation direction for kernel changes

@lists.freedesktop.org Cc: Ursulin, Tvrtko; Ville Syrjälä; Jindal, Sonika Subject: [PATCH i-g-t] kms_rotation_crc: Update rotation direction for kernel changes From: Tvrtko Ursulin tvrtko.ursu...@intel.com commit 1e8df16778b0d8fd8102b3ee799b028f8f961089 Author: Sonika Jindal sonika.jin...@intel.com Date: Wed May

Re: [Intel-gfx] [PATCH] Documentation/drm: Update rotation property with 90/270 and description

On 5/13/2015 9:57 AM, Jindal, Sonika wrote: On 5/12/2015 6:20 PM, Ville Syrjälä wrote: On Wed, Apr 15, 2015 at 04:05:19PM +0530, Sonika Jindal wrote: Cc: dri-de...@lists.freedesktop.org Signed-off-by: Sonika Jindal sonika.jin...@intel.com --- Documentation/DocBook/drm.tmpl |7

Re: [Intel-gfx] [PATCH] Documentation/drm: Update rotation property with 90/270 and description

On 5/13/2015 9:57 AM, Jindal, Sonika wrote: On 5/12/2015 6:20 PM, Ville Syrjälä wrote: On Wed, Apr 15, 2015 at 04:05:19PM +0530, Sonika Jindal wrote: Cc: dri-de...@lists.freedesktop.org Signed-off-by: Sonika Jindal sonika.jin...@intel.com --- Documentation/DocBook/drm.tmpl |7

Re: [Intel-gfx] [PATCH] Documentation/drm: Update rotation property with 90/270 and description

On 5/12/2015 6:20 PM, Ville Syrjälä wrote: On Wed, Apr 15, 2015 at 04:05:19PM +0530, Sonika Jindal wrote: Cc: dri-de...@lists.freedesktop.org Signed-off-by: Sonika Jindal sonika.jin...@intel.com --- Documentation/DocBook/drm.tmpl |7 +-- 1 file changed, 5 insertions(+), 2

Re: [Intel-gfx] [PATCH 3/3] drm/i915/bxt: edp1.4 Intermediate Freq support

On 5/7/2015 2:11 PM, Ville Syrjälä wrote: On Thu, May 07, 2015 at 09:52:09AM +0530, Sonika Jindal wrote: BXT supports following intermediate link rates for edp: 2.16GHz, 2.43GHz, 3.24GHz, 4.32GHz. Adding support for programming the intermediate rates. Signed-off-by: Sonika Jindal

Re: [Intel-gfx] [PATCH] Removing redundant is_edp_psr

Oh great then :) Thanks, Sonika -Original Message- From: R, Durgadoss Sent: Thursday, May 7, 2015 11:19 AM To: Jindal, Sonika; intel-gfx@lists.freedesktop.org Subject: RE: [PATCH] Removing redundant is_edp_psr -Original Message- From: Jindal, Sonika Sent: Thursday, May 7, 2015

Re: [Intel-gfx] [PATCH] drm/i915/skl: Add module parameter to select edp vswing table

On 5/5/2015 7:28 PM, Jani Nikula wrote: On Tue, 05 May 2015, Damien Lespiau damien.lesp...@intel.com wrote: On Tue, May 05, 2015 at 02:39:48PM +0300, Jani Nikula wrote: There's still the question whether we can default to using the vbt value if that can be broken... This is a workaround

Re: [Intel-gfx] [PATCH i-g-t 7/7] kms_rotation_crc: Use main test for negative cases

Thanks Tvrtko. This series makes kms_rotation_crc much cleaner :) Reviewed-by: Sonika Jindal sonika.jin...@intel.com On 4/22/2015 9:16 PM, Tvrtko Ursulin wrote: From: Tvrtko Ursulin tvrtko.ursu...@intel.com Saves a good amount of code duplication by supporting expected failures from the main

Re: [Intel-gfx] [PATCH 2/2] Documentation/drm: Update rotation property with 90/270 and description

On 4/15/2015 3:57 PM, Daniel Vetter wrote: On Wed, Apr 15, 2015 at 03:35:08PM +0530, Sonika Jindal wrote: Signed-off-by: Sonika Jindal sonika.jin...@intel.com --- Documentation/DocBook/drm.tmpl |7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git

Re: [Intel-gfx] [PATCH 2/2] drm/i915/skl: Support for 90/270 rotation

On 4/14/2015 5:09 AM, Matt Roper wrote: On Mon, Apr 13, 2015 at 01:49:22PM +0300, Ville Syrjälä wrote: On Mon, Apr 13, 2015 at 03:53:22PM +0530, Jindal, Sonika wrote: On 4/13/2015 3:40 PM, Ville Syrjälä wrote: On Mon, Apr 13, 2015 at 09:36:02AM +0530, Jindal, Sonika wrote: On 4/10/2015

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