Re: [Intel-gfx] [PATCH] drm/i915: eDP Panel Power sequencing

2015-05-06 Thread Kannan, Vandana
On 5/6/2015 8:35 PM, Jani Nikula wrote: On Mon, 04 May 2015, Vandana Kannan vandana.kan...@intel.com wrote: Changes based on future platform readiness patches related to HAS_PCH_SPLIT(). Use HAS_GMCH_DISPLAY() instead of HAS_PCH_SPLIT. This needs an update to reflect the patch. BXT does

Re: [Intel-gfx] [PATCH] drm/i915: eDP Panel Power sequencing

2015-05-06 Thread Jani Nikula
On Mon, 04 May 2015, Vandana Kannan vandana.kan...@intel.com wrote: Changes based on future platform readiness patches related to HAS_PCH_SPLIT(). Use HAS_GMCH_DISPLAY() instead of HAS_PCH_SPLIT. This needs an update to reflect the patch. BXT does not have PP_DIV register. Making changes to

[Intel-gfx] [PATCH] drm/i915: eDP Panel Power sequencing

2015-05-04 Thread Vandana Kannan
Changes based on future platform readiness patches related to HAS_PCH_SPLIT(). Use HAS_GMCH_DISPLAY() instead of HAS_PCH_SPLIT. BXT does not have PP_DIV register. Making changes to handle this. Second set of PPS registers have been defined but will be used when VBT provides a selection between the

Re: [Intel-gfx] [PATCH] drm/i915: eDP Panel Power sequencing

2015-05-04 Thread shuang . he
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 6309 -Summary- Platform Delta drm-intel-nightly Series Applied PNV