While reading HW state for C10 and C20 chips, let's update the PLL clock rates. For C20 the clock rate differs from link bit rate on DP2.0 cases and hence a conversion from link bitrate to clock is needed.
Signed-off-by: Mika Kahola <mika.kah...@intel.com> Mika Kahola (3): drm/i915/display: Move C20 HW readout drm/i915/display: Convert link bitrate to corresponding PLL clock drm/i915/display: Print out debug messages for clock rates drivers/gpu/drm/i915/display/intel_cx0_phy.c | 161 +++++++++++-------- drivers/gpu/drm/i915/display/intel_cx0_phy.h | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- 3 files changed, 100 insertions(+), 64 deletions(-) -- 2.34.1
