We never added any other CNL A0 workaround because we never
got any A0 platform.
So besides never being executed it is not valid for
reference anymore since it is not applicable to ICL.
So let's start some clean up here.
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mahesh Kumar <mahesh1.ku...@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1c2f824b1238..17ff3b200010 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4718,11 +4718,6 @@ static void cnl_compute_transition_wm(struct
intel_crtc_state *cstate,
trans_offset_b;
} else {
res_blocks = wm_l0->plane_res_b + trans_offset_b;
-
- /* WA BUG:1938466 add one block for non y-tile planes */
- if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))
- res_blocks += 1;
-
}
res_blocks += 1;
--
2.13.6
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