Enable and initialize plane color features.

v2: Rebase and some cleanup

v3: Updated intel_plane_color_init to call
drm_plane_color_create_prop function, which will
in turn create plane color properties.

Signed-off-by: Uma Shankar <uma.shan...@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          |  5 +++++
 drivers/gpu/drm/i915/intel_color.c       | 14 ++++++++++++++
 drivers/gpu/drm/i915/intel_device_info.h |  5 +++++
 drivers/gpu/drm/i915/intel_drv.h         |  9 +++++++++
 4 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7eec99d7..cfbb0e0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -434,6 +434,11 @@ struct drm_i915_display_funcs {
 
        void (*load_csc_matrix)(struct drm_crtc_state *crtc_state);
        void (*load_luts)(struct drm_crtc_state *crtc_state);
+       /* Add Plane Color callbacks */
+       void (*load_plane_csc_matrix)(const struct drm_plane_state
+                                     *plane_state);
+       void (*load_plane_luts)(const struct drm_plane_state
+                               *plane_state);
 };
 
 #define CSR_VERSION(major, minor)      ((major) << 16 | (minor))
diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index 89ab0f7..2d38ab8 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -648,6 +648,20 @@ int intel_color_check(struct drm_crtc *crtc,
        return -EINVAL;
 }
 
+void intel_plane_color_init(struct drm_plane *plane)
+{
+       struct drm_i915_private *dev_priv = to_i915(plane->dev);
+
+       drm_plane_color_create_prop(plane->dev, plane);
+
+       /* Enable color management support when we have degamma & gamma LUTs. */
+       if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 &&
+           INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0)
+               drm_plane_enable_color_mgmt(plane,
+               INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size,
+               true, INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size);
+}
+
 void intel_color_init(struct drm_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index ab5bfd3..d277926 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -167,6 +167,11 @@ struct intel_device_info {
                u16 degamma_lut_size;
                u16 gamma_lut_size;
        } color;
+
+       struct plane_color_luts {
+               u16 plane_degamma_lut_size;
+               u16 plane_gamma_lut_size;
+       } plane_color;
 };
 
 struct intel_driver_caps {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1a7c5ad..0a58fce 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -529,6 +529,14 @@ struct intel_plane_state {
         */
        int scaler_id;
 
+       /*
+        * Use reduced/limited/broadcast rbg range, compressing from the full
+        * range fed into the crtcs.
+        */
+       bool limited_color_range;
+       /* Gamma mode programmed on the plane */
+       uint32_t gamma_mode;
+
        struct drm_intel_sprite_colorkey ckey;
 };
 
@@ -2123,6 +2131,7 @@ int intel_plane_atomic_check_with_state(const struct 
intel_crtc_state *old_crtc_
 int intel_color_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
 void intel_color_set_csc(struct drm_crtc_state *crtc_state);
 void intel_color_load_luts(struct drm_crtc_state *crtc_state);
+void intel_plane_color_init(struct drm_plane *plane);
 
 /* intel_lspcon.c */
 bool lspcon_init(struct intel_digital_port *intel_dig_port);
-- 
1.9.1

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