> -----Original Message-----
> From: Hogander, Jouni <jouni.hogan...@intel.com>
> Sent: Tuesday, March 19, 2024 2:33 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kahola, Mika <mika.kah...@intel.com>; Hogander, Jouni 
> <jouni.hogan...@intel.com>
> Subject: [PATCH 2/5] drm/i915/psr: Move writing early transport pipe src
> 
> Currently PIPE_SRCSZ_ERLY_TPT is written in 
> intel_display.c:intel_set_pipe_src_size. This doesn't work as 
> intel_set_pipe_src_size
> is called only on modeset.
> 
> Bspec: 68927
> 
> Fixes: 3291bbb93e16 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 
> early transport")

Reviewed-by: Mika Kahola <mika.kah...@intel.com>

> Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 9 ---------
>  drivers/gpu/drm/i915/display/intel_psr.c     | 7 +++++++
>  2 files changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d366a103a707..55c2a0fbd797 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2709,15 +2709,6 @@ static void intel_set_pipe_src_size(const struct 
> intel_crtc_state *crtc_state)
>        */
>       intel_de_write(dev_priv, PIPESRC(pipe),
>                      PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
> -
> -     if (!crtc_state->enable_psr2_su_region_et)
> -             return;
> -
> -     width = drm_rect_width(&crtc_state->psr2_su_area);
> -     height = drm_rect_height(&crtc_state->psr2_su_area);
> -
> -     intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),
> -                    PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
>  }
> 
>  static bool intel_pipe_is_interlaced(const struct intel_crtc_state 
> *crtc_state) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index cbf9495c7072..961f92d10241 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2018,6 +2018,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp 
> *intel_dp)
> 
>  void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state 
> *crtc_state)  {
> +     struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>       struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
>       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>       struct intel_encoder *encoder;
> @@ -2037,6 +2038,12 @@ void intel_psr2_program_trans_man_trk_ctl(const struct 
> intel_crtc_state *crtc_st
> 
>       intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder),
>                      crtc_state->psr2_man_track_ctl);
> +
> +     if (!crtc_state->enable_psr2_su_region_et)
> +             return;
> +
> +     intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),
> +                    crtc_state->pipe_srcsz_early_tpt);
>  }
> 
>  static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
> --
> 2.34.1

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