On Thu, May 25, 2017 at 10:18 AM, Stefan Agner wrote:
> On 2017-05-24 07:51, Daniel Vetter wrote:
>> Again cleanup before irq disabling doesn't really stop the races,
>> so just drop it. Proper fix would be to put drm_atomic_helper_shutdown
>> before everything gets cleaned up.
>
> Hm, I already u
On Thu, May 25, 2017 at 05:06:26PM +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> Implement support for this DisplayPort feature.
>
> The cec device is created whenever it detects an adapter that
> has this feature. It is only removed when a new adapter is connected
> that does not support
On Thu, May 25, 2017 at 05:06:25PM +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> This adds support for the DisplayPort CEC-Tunneling-over-AUX
> feature that is part of the DisplayPort 1.3 standard.
>
> Unfortunately, not all DisplayPort/USB-C to HDMI adapters with a
> chip that has this ca
On Fri, 26 May 2017, Daniel Vetter wrote:
> On Thu, May 25, 2017 at 7:44 PM, Sean Paul wrote:
>> The pull is noisy
>> because it includes -rc2.
>
> dim has you covered for this, in case you've rolled forward but Dave
> hasn't yet, you can regenerate against linus upstream branch for a
> cleaner p
Hi Daniel,
On Wed, 2017-05-24 at 16:51 +0200, Daniel Vetter wrote:
> CRTC don't seem to get shut down in a controlled fashion, but no one
> bothers to stop interrupts either so this races no matter what. Might
> as well remove it. A call to drm_atomic_helper_shutdown would be
> pretty sweet somewh
On Wed, May 24, 2017 at 04:52:11PM +0200, Daniel Vetter wrote:
> It again looks all cargo-culted for no good reasons.
drm_vblank_cleanup() is called to release the resources allocated by
drm_vblank_init(). I think that's the reason, no?
Shawn
>
> Cc: Shawn Guo
> Signed-off-by: Daniel Vetter
On Mon, May 22, 2017 at 10:13:44AM +0100, Chris Wilson wrote:
> On Mon, May 22, 2017 at 10:55:01AM +0200, Daniel Vetter wrote:
> > On Wed, May 17, 2017 at 02:02:50PM +0100, Chris Wilson wrote:
> > > Older gen use a physical address for the hardware status page, for which
> > > we use cache-coherent
On Mon, May 22, 2017 at 10:40:13AM +0100, Chris Wilson wrote:
> On Mon, May 15, 2017 at 04:03:50PM +0200, Daniel Vetter wrote:
> > What would probably help the CI folks is a gem testcase list that includes
> > all the important stuff (so much more than BAT), but also completes in a
> > reasonable a
On Fri, 26 May 2017, Quanxian Wang wrote:
> According to the bspec, when set N/M, should disable
> and enable transcoder which attaching DP audio. However
> with that implementation will affect performance more.
>
> But with current implementation, KBL could not work with defined N/M.
> By default
On Thu, May 25, 2017 at 02:28:25PM +0100, Chris Wilson wrote:
> On Tue, May 23, 2017 at 06:32:00PM +0800, Xiaoguang Chen wrote:
> > + gtt_entries = (gen8_pte_t __iomem *)dev_priv->ggtt.gsm +
> > + (fb_gma >> PAGE_SHIFT);
> > + for_each_sg(st->sgl, sg, fb_size, i) {
> > + sg-
From: Chris Wilson
This is the minimal backport for stable of the upstream commit:
commit dd19674bacba227ae5d3ce680cbc5668198894dc
Author: Chris Wilson
Date: Wed Feb 15 08:43:46 2017 +
drm/i915: Remove bitmap tracking for used-ptes
Due to a race with the shrinker, when we try to all
On Thu, 25 May 2017, Hans Verkuil wrote:
> From: Clint Taylor
>
> Adding DPCD register definitions from the DP 1.3 specification for CEC
> over AUX support.
>
> V2: Add DP_ prefix to all defines.
> V3: missed prefixes from the ESI1 defines
>
> Cc: Jani Nikula
>
> Reviewed-by: Jani Nikula
> Sign
Hi,
On 18-05-17 15:59, Hans de Goede wrote:
Hi,
On 16-05-17 12:34, Jani Nikula wrote:
On Tue, 16 May 2017, Ville Syrjälä wrote:
mn Tue, May 16, 2017 at 10:47:48AM +0300, Jani Nikula wrote:
On Mon, 15 May 2017, Hans de Goede wrote:
Hi,
I'm seeing this on suspend/resume on a GPD-win,
cherr
On 05/26/2017 01:21 AM, Gustavo Padovan wrote:
From: Gustavo Padovan
After converting legacy cursor updates to atomic async commits
mdp5_cursor_plane_funcs just duplicates mdp5_plane_funcs now.
Tested-by: Archit Taneja
Cc: Rob Clark
Cc: Archit Taneja
Signed-off-by: Gustavo Padovan
--
On 05/26/2017 01:21 AM, Gustavo Padovan wrote:
From: Gustavo Padovan
Add support to async updates of cursors by using the new atomic
interface for that. Basically what this commit does is do what
mdp5_update_cursor_plane_legacy() did but through atomic.
Tested-by: Archit Taneja
v4: add
On 05/26/2017 01:21 AM, Gustavo Padovan wrote:
From: Gustavo Padovan
In some cases, like cursor updates, it is interesting to update the
plane in an asynchronous fashion to avoid big delays. The current queued
update could be still waiting for a fence to signal and thus block any
subsequent u
On Fri, 26 May 2017, Hans de Goede wrote:
> Hi,
>
> On 18-05-17 15:59, Hans de Goede wrote:
>> Hi,
>>
>> On 16-05-17 12:34, Jani Nikula wrote:
>>> On Tue, 16 May 2017, Ville Syrjälä wrote:
mn Tue, May 16, 2017 at 10:47:48AM +0300, Jani Nikula wrote:
> On Mon, 15 May 2017, Hans de Goede
Hi,
On 26-05-17 10:55, Jani Nikula wrote:
On Fri, 26 May 2017, Hans de Goede wrote:
Hi,
On 18-05-17 15:59, Hans de Goede wrote:
Hi,
On 16-05-17 12:34, Jani Nikula wrote:
On Tue, 16 May 2017, Ville Syrjälä wrote:
mn Tue, May 16, 2017 at 10:47:48AM +0300, Jani Nikula wrote:
On Mon, 15 May
On Fri, May 26, 2017 at 10:18:30AM +0200, Daniel Vetter wrote:
> On Mon, May 22, 2017 at 10:13:44AM +0100, Chris Wilson wrote:
> > On Mon, May 22, 2017 at 10:55:01AM +0200, Daniel Vetter wrote:
> > > On Wed, May 17, 2017 at 02:02:50PM +0100, Chris Wilson wrote:
> > > > Older gen use a physical addr
On Fri, May 26, 2017 at 11:04:18AM +0800, Chuanxiao Dong wrote:
> GVT-g relies on the enable_execlists parameter in i915. If this option
> is not enabled for GVT-g, should return -EIO to make i915 driver loading
> failed.
>
> Suggested-by: Joonas Lahtinen
> Cc: Joonas Lahtinen
> Signed-off-by: C
On Fri, May 26, 2017 at 11:04:19AM +0800, Chuanxiao Dong wrote:
> Currently GVT-g cannot work properly when host GuC submission is
> enabled, so make i915 driver loading failed in this case.
>
> Suggested-by: Joonas Lahtinen
> Suggested-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
Hi, Jani
Thanks for your comment. My comment below.
-Original Message-
From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
Sent: Friday, May 26, 2017 4:31 PM
To: Wang, Quanxian ; intel-gfx@lists.freedesktop.org
Cc: Yang, Libin ; Wang, Quanxian
Subject: Re: [PATCH] Defined NM doesn't
On Thu, 25 May 2017, "Du, Changbin" wrote:
> Hi, Jani, just relized you are in i915 team. :)
>
>> > +menu "Intel GVT-g graphics virtualization host support"
>> > + depends on DRM_I915
>> > + depends on 64BIT
>> > +
>> > config DRM_I915_GVT
>> > -bool "Enable Intel GVT-g graphics virtual
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, May 26, 2017 5:35 PM
> To: Dong, Chuanxiao
> Cc: intel-gvt-...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/gvt: Return -EIO if host
> ena
On Thu, 25 May 2017, Zhenyu Wang wrote:
> Hi,
>
> Please pull these two gvt fixes for 4.12, one to fix
> vGPU workload cleanup in destroy and another one is
> important to fix vGPU hang in stress test.
Pulled, thanks. They'll make it to v4.12-rc4.
BR,
Jani.
>
> Thanks.
> --
> The following chan
On Thu, 25 May 2017, Hans Verkuil wrote:
> @@ -4179,6 +4181,33 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
> return -EINVAL;
> }
>
> +static bool
> +intel_dp_check_cec_status(struct intel_dp *intel_dp)
> +{
> + bool handled = false;
> +
> + for (;;) {
> + u
On 05/26/2017 12:13 PM, Jani Nikula wrote:
> On Thu, 25 May 2017, Hans Verkuil wrote:
>> @@ -4179,6 +4181,33 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
>> return -EINVAL;
>> }
>>
>> +static bool
>> +intel_dp_check_cec_status(struct intel_dp *intel_dp)
>> +{
>> +bool handle
On 05/26/2017 09:15 AM, Daniel Vetter wrote:
> On Thu, May 25, 2017 at 05:06:26PM +0200, Hans Verkuil wrote:
>> From: Hans Verkuil
>>
>> Implement support for this DisplayPort feature.
>>
>> The cec device is created whenever it detects an adapter that
>> has this feature. It is only removed when
According to the bspec, when set M/N, should disable
and enable transcoder which attaching DP audio. However
the implementation will affect performance much more.
Therefore, only KBL changed to use automatic M/N.
Testing:
DP audio testing on SKL/KBL works (MP4, speaker test case).
no audio delay
On Thu, May 25, 2017 at 10:48:19AM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 25/05/17 04:36, Michal Wajdeczko wrote:
> > Buffer based command transport can replace MMIO based mechanism.
> > It may be used to perform host-2-guc and guc-to-host communication.
> >
> > Portions of this patch are
On Fri, May 26, 2017 at 12:58:55PM +0300, Jani Nikula wrote:
> On Thu, 25 May 2017, "Du, Changbin" wrote:
> >> Note:
> >>select should be used with care. select will force
> >>a symbol to a value without visiting the dependencies.
> >>By abusing select you are able to select a symbol
On 05/26/2017 09:18 AM, Daniel Vetter wrote:
> On Thu, May 25, 2017 at 05:06:25PM +0200, Hans Verkuil wrote:
>> From: Hans Verkuil
>>
>> This adds support for the DisplayPort CEC-Tunneling-over-AUX
>> feature that is part of the DisplayPort 1.3 standard.
>>
>> Unfortunately, not all DisplayPort/US
On Fri, 26 May 2017, "Wang, Quanxian" wrote:
> [Wang, Quanxian] in Ubuntu 17.04, we do audio testing on KBL/SKL/APL
> and more, the audio doesn't work on KBL specially, and other platform
> works fine. Even if with latest upstream kernel, but it works on 4.8
> kernel. Therefore It is a regression
On Fri, May 26, 2017 at 08:57:32AM +0200, Daniel Vetter wrote:
> On Thu, May 25, 2017 at 5:01 AM, Shawn Guo wrote:
> > On Wed, May 24, 2017 at 04:52:11PM +0200, Daniel Vetter wrote:
> >> It again looks all cargo-culted for no good reasons.
> >
> > drm_vblank_cleanup() is called to release the reso
== Series Details ==
Series: drm/i915/audio:Defined M/N doesn't work on KBL and uses automatic M/N.
URL : https://patchwork.freedesktop.org/series/24947/
State : warning
== Summary ==
Series 24947v1 drm/i915/audio:Defined M/N doesn't work on KBL and uses
automatic M/N.
https://patchwork.freed
On Fri, May 26, 2017 at 11:04:17AM +0800, Chuanxiao Dong wrote:
> The intel_gvt_sanitize_options will sanitize the GVT-g related
> options before doing GVT-g init.
>
> Suggested-by: Joonas Lahtinen
> Cc: Joonas Lahtinen
> Signed-off-by: Chuanxiao Dong
> ---
> drivers/gpu/drm/i915/i915_drv.c |
From: Tvrtko Ursulin
AM_PROG_FLEX macro will set the LEX variable using the missing
script when the flex is not present. This will confuse the
configure.ac check, which expects the AC_PROG_FLEX behaviour,
and will so fail to detect the missing flex:
AS_IF([test x"$LEX" != "x:" -a x"$YACC
Buffer based command transport can replace MMIO based mechanism.
It may be used to perform host-2-guc and guc-to-host communication.
Portions of this patch are based on work by:
Michel Thierry
Robert Beckett
Daniele Ceraolo Spurio
v2: use gem_object_pin_map (Chris)
don't use DEBUG_RATEL
Buffer based command transport can replace MMIO based mechanism.
It may be used to perform host-2-guc and guc-to-host communication.
v3: using static owner id (Daniele)
v4: but keep channel initialization generic (Daniele)
and introduce owner_sub_id (Daniele)
(1/3 added Chris r-b from IRC)
(2
This is just for CI testing, *** DO NOT MERGE ***
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index b6a7e36..abd2894 100
In earlier patch 789a625 we were enabling send function only
after successful init. For completeness, we should make sure
that we disable it on fini.
v2: don't group steps by submission flag (Chris)
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
Stable team, please backport upstream commits
665788572c64 ("drm/i915/vbt: don't propagate errors from intel_bios_init()")
bb1d132935c2 ("drm/i915/vbt: split out defaults that are set when there is no
VBT")
to stable kernels v4.9+. The first is a small refactor that makes the
actual fix in seco
On Wed, 24 May 2017, Daniel Drake wrote:
> On Fri, May 5, 2017 at 4:29 AM, Ville Syrjälä
> wrote:
>> On Thu, May 04, 2017 at 02:52:09PM -0600, Daniel Drake wrote:
>>> On Thu, May 4, 2017 at 2:37 PM, Ville Syrjälä
>>> wrote:
>>> > Please check if commit bb1d132935c2 ("drm/i915/vbt: split out defa
== Series Details ==
Series: Introduce buffer based cmd transport (rev3)
URL : https://patchwork.freedesktop.org/series/24786/
State : warning
== Summary ==
Series 24786v3 Introduce buffer based cmd transport
https://patchwork.freedesktop.org/api/1.0/series/24786/revisions/3/mbox/
Test kms_bu
On Fri, May 26, 2017 at 12:34 PM, Hans Verkuil wrote:
>>> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
>>> index 78d7fc0ebb57..dd771ce8a3d0 100644
>>> --- a/drivers/gpu/drm/Kconfig
>>> +++ b/drivers/gpu/drm/Kconfig
>>> @@ -120,6 +120,9 @@ config DRM_LOAD_EDID_FIRMWARE
>>>
If we do a shallow probe of the connector and it reports the link failed
previous (link-status != GOOD), force a full probe of the connector to
give the kernel a chance to validate the mode list.
Signed-off-by: Chris Wilson
---
lib/igt_kms.c | 29 +
1 file changed, 29
On Fri, 26 May 2017, Wolfram Sang wrote:
> Yes, I wanted to do this for years now... The I2C core became a huge
> monolithic
> blob getting harder and harder to maintain. This series breaks out some
> functional parts into seperate files. This makes the code easier to handle
> because of the smal
On Fri, May 26, 2017 at 12:48:46PM +0100, Chris Wilson wrote:
> If we do a shallow probe of the connector and it reports the link failed
> previous (link-status != GOOD), force a full probe of the connector to
> give the kernel a chance to validate the mode list.
Do we also need to do a SetCrtc on
Hi,
Here are the changes from v13 :
* there is no more locking mechanism of the SSEU configuration on
the whole system, instead we now make the i915 driver monitors
the changes on submissions when OA is enabled and events are
inserted in the perf stream to enable userspa
From: Robert Bragg
Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all
share (more-or-less) the same OA unit design.
Of particular note in comparison to Haswell: some OA unit HW config
state has become per-context state and as a consequence it is somewhat
more complicated to ma
From: Chris Wilson
When we query the available eu on each subslice, we currently only
report the max. It would also be useful to report the minimum found as
well.
When we set RPCS (power gating over the EU), we can also specify both
the min and max number of eu to configure on each slice; curren
From: Robert Bragg
Adds a static OA unit, MUX, B Counter + Flex EU configurations for basic
render metrics on Broadwell, Cherryview, Skylake and Broxton. These are
auto generated from an XML description of metric sets, currently
maintained in gputop, ref:
https://github.com/rib/gputop
> gputop
Gen8+ might have mux configurations per slices/subslices. Depending on
whether slices/subslices have been fused off, only part of the
configuration needs to be applied. This change reworks the mux
configurations query mechanism to allow more than one set of registers
to be programmed.
v2: s/n_mux_
From: Chris Wilson
Currently we only configure the power gating for Skylake and above, but
the configuration should equally apply to Broadwell and Braswell. Even
though, there is not as much variation as for later generations, we want
to expose control over the configuration to userspace and may
Add macros to detect GT2/GT3 skus so we can apply the proper OA
configuration later.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_drv.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915
From: Chris Wilson
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configuration pe
From: Robert Bragg
In earlier iterations of the i915-perf driver we had a number of
callbacks/hooks from other parts of the i915 driver to e.g. notify us
when a legacy context was pinned and these could run asynchronously with
respect to the stream file operations and might also run in atomic
con
From: Robert Bragg
An oa_exponent_to_ns() utility and per-gen timebase constants where
recently removed when updating the tail pointer race condition WA, and
this restores those so we can update the _PROP_OA_EXPONENT validation
done in read_properties_unlocked() to not assume we have a 12.5MHz
ti
This adds the ability for userspace to request that the kernel track &
record sseu configuration changes. These changes are inserted into the
perf stream so that userspace can interpret the OA reports using the
configuration applied at the time the OA reports where generated.
Signed-off-by: Lionel
Add OA support for Geminilake (pretty much identical to Broxton), and
also add the associated OA configurations.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/Makefile |3 +-
drivers/gpu/drm/i915/i915_oa_glk.c | 2602 +++
Dynamic slices/subslices shutdown will effectivelly loose the NOA
configuration uploaded in the slices/subslices. When i915 perf is in
use, we therefore need to reprogram it.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_perf.c
On Wed, 24 May 2017, Jani Nikula wrote:
> On Tue, 23 May 2017, Puthikorn Voravootivat wrote:
>> There are some panel that
>> (1) does not support display backlight enable via AUX
>> (2) support display backlight adjustment via AUX
>> (3) support display backlight enable via eDP BL_ENABLE pin
>>
>
On Fri, May 26, 2017 at 11:13:25AM +, Michal Wajdeczko wrote:
> Buffer based command transport can replace MMIO based mechanism.
> It may be used to perform host-2-guc and guc-to-host communication.
>
> Portions of this patch are based on work by:
> Michel Thierry
> Robert Beckett
> Danie
On Wed, 24 May 2017, Jani Nikula wrote:
> On Tue, 23 May 2017, Puthikorn Voravootivat wrote:
>> This patch adds the following definition
>> - Bit mask for EDP_PWMGEN_BIT_COUNT and min/max cap
>> register which only use bit 0:4
>> - Base frequency (27 MHz) for backlight PWM frequency
>> genera
On Fri, May 26, 2017 at 11:32:59AM -, Patchwork wrote:
> == Series Details ==
>
> Series: Introduce buffer based cmd transport (rev3)
> URL : https://patchwork.freedesktop.org/series/24786/
> State : warning
>
> == Summary ==
>
> Series 24786v3 Introduce buffer based cmd transport
> https:
== Series Details ==
Series: series starting with [v2,9/15] drm/i915: expose _SLICE_MASK GETPARM
(rev2)
URL : https://patchwork.freedesktop.org/series/23896/
State : success
== Summary ==
Series 23896v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/23896/revisio
On Tue, 23 May 2017, Puthikorn Voravootivat wrote:
> Read desired PWM frequency from panel vbt and calculate the
> value for divider in DPCD address 0x724 and 0x728 to have
> as many bits as possible for PWM duty cyle for granularity of
> brightness adjustment while the frequency divisor is still
On Thu, May 25, 2017 at 04:49:56PM +0300, Joonas Lahtinen wrote:
> On to, 2017-05-25 at 08:25 +0100, Chris Wilson wrote:
> > As only GGTT vma may be permanently pinned and are always at the head of
> > the object's vma list, as soon as we seen a ppGTT vma we can stop
> > searching for any_vma_pinne
On Thu, May 25, 2017 at 11:58:25AM -0700, Michel Thierry wrote:
> On 25/05/17 08:31, Daniele Ceraolo Spurio wrote:
> >
> >
> >On 22/05/17 12:56, Michal Wajdeczko wrote:
> >>On Mon, May 22, 2017 at 10:50:28AM -0700, Daniele Ceraolo Spurio wrote:
> >>>We're currently deleting the GuC logs if the FW f
Currently the timer is armed for 1ms after the first use and is killed
immediately, dropping the forcewake as early as possible. However, for
very frequent operations the forcewake dance has a large impact on
latency and keeping the timer alive until we are idle is preferred. To
achieve this, if we
On Wed, May 24, 2017 at 11:28:12AM +0200, Daniel Vetter wrote:
> We can't check this when applying (since r-b/a-b tags often get added
> afterwards), but we can check this when pushing. This only looks at
> patches authored by the pusher.
>
> Also update the docs to highlight that review requireme
On Fri, May 26, 2017 at 10:40:15AM +0300, Jani Nikula wrote:
> On Fri, 26 May 2017, Daniel Vetter wrote:
> > On Thu, May 25, 2017 at 7:44 PM, Sean Paul wrote:
> >> The pull is noisy
> >> because it includes -rc2.
> >
> > dim has you covered for this, in case you've rolled forward but Dave
> > has
== Series Details ==
Series: drm/i915: Keep the forcewake timer alive for 1ms past the most recent
use
URL : https://patchwork.freedesktop.org/series/24956/
State : success
== Summary ==
Series 24956v1 drm/i915: Keep the forcewake timer alive for 1ms past the most
recent use
https://patchwor
This series contains remaining two patches from wm cleanup series
https://patchwork.freedesktop.org/series/20152/
Initial 10 patches already got merged in tree so sending remaining 2
separately.
This series also includes a patch to solve underrun issue, when i915 is
build as a module.
Mahesh Kum
Don't trust cached DDB values. Recalculate the ddb value if cached value
is zero.
If i915 is build as a module, there may be a race condition when
cursor_disable call comes even before intel_fbdev_initial_config.
Which may lead to cached value being 0. And further commit will fail
until a modeset.
This patch implements new DDB allocation algorithm as per HW team
recommendation. This algo takecare of scenario where we allocate less DDB
for the planes with lower relative pixel rate, but they require more DDB
to work.
It also takes care of enabling same watermark level for each
plane in crtc, f
A display resolution is only supported if it meets all the restrictions
below for Maximum Pipe Pixel Rate.
The display resolution must fit within the maximum pixel rate output
from the pipe. Make sure that the display pipe is able to feed pixels at
a rate required to support the desired resolution
== Series Details ==
Series: Remaining patches for WM cleanup series (rev3)
URL : https://patchwork.freedesktop.org/series/24615/
State : warning
== Summary ==
Series 24615v3 Remaining patches for WM cleanup series
https://patchwork.freedesktop.org/api/1.0/series/24615/revisions/3/mbox/
Test
Currently our PARAMS_FOR_EACH macro contains only param type and name.
We use this macro to define struct members, but later on we initialize
this struct using handcrafted code, which leads in some cases to use
mismatched value vs. type. Let's extend our root macro with param
default value to keep
On Fri, May 26, 2017 at 03:44:29PM +, Michal Wajdeczko wrote:
> Currently our PARAMS_FOR_EACH macro contains only param type and name.
> We use this macro to define struct members, but later on we initialize
> this struct using handcrafted code, which leads in some cases to use
> mismatched val
== Series Details ==
Series: drm/i915: Extend PARAMS_FOR_EACH macro with more data
URL : https://patchwork.freedesktop.org/series/24962/
State : warning
== Summary ==
Series 24962v1 drm/i915: Extend PARAMS_FOR_EACH macro with more data
https://patchwork.freedesktop.org/api/1.0/series/24962/rev
I believe we need to cc:stable on this right?!
Jani, is this ok to go ahead and merge after stable is cc'ed?
On Thu, May 25, 2017 at 9:43 AM, vathsala nagaraju
wrote:
> psr1 is also disabled for panel resolution greater than 32X20.
> Added psr2 check to disable only for psr2 panels having resol
Hi Dave,
Here's another misc-next pull for you. We have some nice improvements in core
adding mode_valid hooks and de-duping the allocation code. Daniel continues to
improve documentation (\o/), and a bunch of little stuff was fixed up.
Also noteworthy is that I backmerged -next so Daniel could pi
On Fri, May 26, 2017 at 8:15 AM, Mahesh Kumar wrote:
> Don't trust cached DDB values. Recalculate the ddb value if cached value
> is zero.
>
> If i915 is build as a module, there may be a race condition when
> cursor_disable call comes even before intel_fbdev_initial_config.
> Which may lead to ca
"The patch is probably fine. But I can't invent an explanation if I don't know
what the problem is."
@Jani @libin, is it possible for you to help contact Intel graphics hardware
design engineer to get the reason why M/N doesn't work as you implemented in
kernel code in Kabylake platform? I don'
Good catch.
It will use default frequency in this case. But it is better to not
set DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP in this case.
I will add return value to intel_dp_aux_set_pwm_freq() and set
DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP based on that.
On Fri, May 26, 2017 at 5:49 AM, Jani Nikula
wrote:
Based on patch submited to intel-gfx:
"drm/i915/cnl: don't apply the GEN9/CNL:A WM WAs to CNL:B+"
and subsequential tests on CNL, it seems that
this part is not required if we are not applying WA#0893.
Cc: Paulo Zanoni
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 fi
No detection will ever be needed. So let's simplify
and clean it up.
Cc: Mahesh Kumar
Cc: Paulo Zanoni
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/intel_pm.c | 21 ++---
2 files changed, 6 insertions(+), 19 deletions(-)
diff
According to spec this WA is needed for every gen9.
Cc:Arthur Runyan
Cc: Ander Conselvan de Oliveira
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_drv.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i
Both nouveau and i915, the only 2 kernel space lid notification listeners,
invoke acpi_lid_open() API to obtain _LID returning value instead of using
the notified value.
So this patch moves this logic from listeners to lid driver, always notify
kernel space listeners using _LID returning value.
T
Read desired PWM frequency from panel vbt and calculate the
value for divider in DPCD address 0x724 and 0x728 to have
as many bits as possible for PWM duty cyle for granularity of
brightness adjustment while the frequency divisor is still
within 25% of the desired value.
Signed-off-by: Puthikorn V
This patch adds option to enable dynamic backlight for eDP
panel that supports this feature via DPCD register and
set minimum / maximum brightness to 0% and 100% of the
normal brightness.
Signed-off-by: Puthikorn Voravootivat
---
drivers/gpu/drm/i915/i915_params.c| 5
drivers/g
This patch set contain 3 patches. Another 6 patches in previous version
was already merged in v7 and v9.
- First patch adds heuristic to determine whether we should use AUX
or PWM pin to adjust panel backlight brightness.
- Next patch adds support for dynamic brightness.
- Last patch sets the PWM
Add heuristic to decide that AUX or PWM pin should use for
backlight brightness adjustment and modify i915 param description
to have auto, force disable, and force enable.
The heuristic to determine that using AUX pin is better than using
PWM pin is that the panel support any of the feature list h
== Series Details ==
Series: Enhancement to intel_dp_aux_backlight driver (rev9)
URL : https://patchwork.freedesktop.org/series/21086/
State : success
== Summary ==
Series 21086v9 Enhancement to intel_dp_aux_backlight driver
https://patchwork.freedesktop.org/api/1.0/series/21086/revisions/9/mb
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