Re: [Intel-gfx] [PATCH] drm/i915: fix the issue DP-1 not working in guest

2018-02-21 Thread Jani Nikula
On Wed, 21 Feb 2018, "Mustaffa, Mustamin B" wrote: > Hi Jani, > > In GVT (virtualization) environment, it only can use DP. Therefore, > we want to enable Port A as DP so that display panel on Port A can be > used by GVT. Why not just disable port A in the guest VBT? Or are you saying that hos

[Intel-gfx] [CI v3] drm/i915: GuC test run

2018-02-21 Thread Tvrtko Ursulin
From: Tvrtko Ursulin With disabled aggressive idling from IGT. To see how shard run fares. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 3 --- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_uc.c | 2 ++ 3 files changed, 3 insertions(+), 4

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure

2018-02-21 Thread Sagar Arun Kamble
On 2/21/2018 4:27 AM, Michal Wajdeczko wrote: Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure") we believed that we correctly handle all errors encountered during GuC initialization, including special one that indicates request to run driver with disabled GPU submission (-E

Re: [Intel-gfx] [PATCH] drm/i915: fix the issue DP-1 not working in guest

2018-02-21 Thread Mustaffa, Mustamin B
Hi Jani, We cannot disable any port as we might use all the ports for display. And yes, we fake the DP to use EDP panel. Hi Nuhairi, please correct me if I'm wrong. Best regard Mustamin -Original Message- From: Jani Nikula [mailto:jani.nik...@linux.intel.com] Sent: Wednesday, Fe

[Intel-gfx] [CI igt] igt/gem_ctx_isolation: Check isolation of registers between contexts

2018-02-21 Thread Chris Wilson
A new context assumes that all of its registers are in the default state when it is created. What may happen is that a register written by one context may leak into the second, causing mass confusion. v2: Extend back to Sandybridge (etc) v3: Check context preserves registers across suspend/hiberna

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure

2018-02-21 Thread Chris Wilson
Quoting Michal Wajdeczko (2018-02-20 22:57:10) > Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure") > we believed that we correctly handle all errors encountered during > GuC initialization, including special one that indicates request to > run driver with disabled GPU submissio

Re: [Intel-gfx] [PATCH] drm/i915/huc: Mark firmware as failed on auth failure

2018-02-21 Thread Chris Wilson
Quoting Michal Wajdeczko (2018-02-20 22:52:55) > If we fail to authenticate HuC firmware, we should change > its load status to FAIL. While around, print HUC_STATUS > on firmware verification failure. > > Signed-off-by: Michal Wajdeczko > Cc: Rodrigo Vivi > Cc: Anusha Srivatsa > --- > drivers/

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable VBT based BL control for DP (v3) (rev5)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Enable VBT based BL control for DP (v3) (rev5) URL : https://patchwork.freedesktop.org/series/38559/ State : success == Summary == Test kms_cursor_crc: Subgroup cursor-256x256-suspend: incomplete -> PASS (shard-hsw) fdo#10337

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/doc: Fix documentation for _vblank_restore().

2018-02-21 Thread Patchwork
== Series Details == Series: drm/doc: Fix documentation for _vblank_restore(). URL : https://patchwork.freedesktop.org/series/38662/ State : success == Summary == Series 38662v1 drm/doc: Fix documentation for _vblank_restore(). https://patchwork.freedesktop.org/api/1.0/series/38662/revisions/1

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex

2018-02-21 Thread Dhinakaran Pandiyan
On Tuesday, February 20, 2018 6:23:47 PM PST José Roberto de Souza wrote: > When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it > self, so lets use the mutex register that is available in gen9+ to > avoid concurrent access by hardware and driver. > > Reference: > https://01.org/sit

Re: [Intel-gfx] [igt-dev] [PATCH igt] igt/perf_pmu: Disable all cpus

2018-02-21 Thread Tvrtko Ursulin
On 20/02/2018 21:40, Chris Wilson wrote: Rather than iteratively disable and then immediately reenable a CPU, turn off each in turn, forcing the PMU events onto the next CPU without allowing them to retreat back to CPU0 after the first. If this fails, Hm, interesting and I think it possibly ma

Re: [Intel-gfx] [igt-dev] [PATCH igt] igt/perf_pmu: Disable all cpus

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 09:11:15) > > On 20/02/2018 21:40, Chris Wilson wrote: > > Rather than iteratively disable and then immediately reenable a CPU, > > turn off each in turn, forcing the PMU events onto the next CPU without > > allowing them to retreat back to CPU0 after the first.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: GuC test run (rev3)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: GuC test run (rev3) URL : https://patchwork.freedesktop.org/series/38615/ State : failure == Summary == Series 38615v3 drm/i915: GuC test run https://patchwork.freedesktop.org/api/1.0/series/38615/revisions/3/mbox/ Test core_auth: Subgroup basic-

Re: [Intel-gfx] [igt-dev] [PATCH igt] igt/perf_pmu: Disable all cpus

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 09:17, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-02-21 09:11:15) On 20/02/2018 21:40, Chris Wilson wrote: Rather than iteratively disable and then immediately reenable a CPU, turn off each in turn, forcing the PMU events onto the next CPU without allowing them to retreat

[Intel-gfx] [CI igt] igt/gem_ctx_isolation: Check isolation of registers between contexts

2018-02-21 Thread Chris Wilson
A new context assumes that all of its registers are in the default state when it is created. What may happen is that a register written by one context may leak into the second, causing mass confusion. v2: Extend back to Sandybridge (etc) v3: Check context preserves registers across suspend/hiberna

[Intel-gfx] [PATCH] drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset

2018-02-21 Thread Maarten Lankhorst
Moving the check upwards will mean we we no longer have to add planes and connectors manually, because everything is handled correctly by drm_atomic_helper_check_modeset() as intended. Signed-off-by: Maarten Lankhorst Cc: Lyude Paul Cc: Daniel Vetter Reviewed-by: Daniel Vetter --- drivers/gpu

Re: [Intel-gfx] [igt-dev] [PATCH igt] igt/perf_pmu: Disable all cpus

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 09:24:46) > As I said, it would be easy to support opening our PMU regardless on > which CPU it currently lives on by wrapping the "try the next cpu" logic > in the perf open wrappers. In kernel perf tool for instance does that > already. > > I could also chan

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev10)

2018-02-21 Thread Patchwork
== Series Details == Series: igt/gem_ctx_isolation: Check isolation of registers between contexts (rev10) URL : https://patchwork.freedesktop.org/series/32531/ State : success == Summary == IGT patchset tested on top of latest successful build 0aeba6e81ad3e00021548093f258c7feb8df415d igt/gem_

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset URL : https://patchwork.freedesktop.org/series/38678/ State : warning == Summary == $ dim checkpatch origin/drm-tip a339d719bb21 drm/i915: Check for I915_MODE_FLAG_INHERITED before

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset URL : https://patchwork.freedesktop.org/series/38678/ State : failure == Summary == Series 38678v1 drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_mode

Re: [Intel-gfx] [CI v3] drm/i915: GuC test run

2018-02-21 Thread Tvrtko Ursulin
Hi guys, I was trying to do a test run with GuC enabled but I am possibly doing something wrong, or something is broken on SKL GVT machine. Could you please check: On 21/02/2018 08:08, Tvrtko Ursulin wrote: > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev11)

2018-02-21 Thread Patchwork
== Series Details == Series: igt/gem_ctx_isolation: Check isolation of registers between contexts (rev11) URL : https://patchwork.freedesktop.org/series/32531/ State : success == Summary == IGT patchset tested on top of latest successful build 0aeba6e81ad3e00021548093f258c7feb8df415d igt/gem_

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Rename drm_i915_gem_request to i915_request (rev2)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Rename drm_i915_gem_request to i915_request (rev2) URL : https://patchwork.freedesktop.org/series/37958/ State : warning == Summary == $ dim checkpatch origin/drm-tip b2421aad8a23 drm/i915: Rename drm_i915_gem_request to i915_request -:1381: WARNING: adde

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Rename drm_i915_gem_request to i915_request (rev2)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Rename drm_i915_gem_request to i915_request (rev2) URL : https://patchwork.freedesktop.org/series/37958/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Rename drm_i915_gem_request to i915_request -drivers/gpu/drm/i915/i915_req

[Intel-gfx] [PATCH 00/16] Adding NV12 support

2018-02-21 Thread Vidya Srinivas
This patch series is adding NV12 support for Broxton display after rebasing on latest drm-tip. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Previous revision history: The first version of patches were reviewed when floated b

[Intel-gfx] [PATCH 01/16] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar skl_wm_values struct contains values of pipe/plane DDB only. so rename it for better readability of code. Similarly skl_copy_wm_for_pipe copies DDB values. s/skl_wm_values/skl_ddb_values s/skl_copy_wm_for_pipe/skl_copy_ddb_for_pipe Changes since V1: - also change name of skl

[Intel-gfx] [PATCH 04/16] drm/i915/skl+: support verification of DDB HW state for NV12

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar For YUV 420 Planar formats like NV12, buffer allocation is done for Y and UV surfaces separately. For NV12 plane formats, the UV buffer allocation must be programmed in the Plane Buffer Config register and the Y buffer allocation must be programmed in the Plane NV12 Buffer Conf

[Intel-gfx] [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar Add support of recognizing DRM_FORMAT_NV12 from plane_format register value. v2: Added reviewed by tag from Mika Kahola Reviewed-by: Mika Kahola Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_display.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drive

[Intel-gfx] [PATCH 07/16] drm/i915/skl+: make sure higher latency level has higher wm value

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar DDB allocation optimization algorithm requires/assumes ddb allocation for any memory C-state level DDB value to be as high as level below the current level. Render decompression requires level WM to be as high as wm level-0. This patch fulfils both the requirements. v2: Change

[Intel-gfx] [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar This patch passes skl_wm_level structure itself to watermark computation function skl_compute_plane_wm function (instead of its internal parameters). It reduces number of arguments required to be passed. v2: Addressed review comments by Shashank Sharma v3: Adding reviewed by

[Intel-gfx] [PATCH 02/16] drm/i915/skl+: refactor WM calculation for NV12

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar Current code calculates DDB for planar formats in such a way that we store DDB of plane-0 in plane 1 & vice-versa. In order to make this clean this patch refactors WM/DDB calculation for NV12 planar formats. v2: Addressed review comments by Maarten v3: Rebased and addressed r

[Intel-gfx] [PATCH 05/16] drm/i915/skl+: NV12 related changes for WM

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar NV12 requires WM calculation for UV plane as well. UV plane WM should also fulfill all the WM related restrictions. v2: Addressed review comments from Shashank Sharma. v3: Addressed review comments from Shashank Sharma Changed plane_num to plane_id in skl_compute_plane_wm_par

[Intel-gfx] [PATCH i-g-t] lib/igt_perf: Find active perf CPU

2018-02-21 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Instead of assuming PMU runs on CPU0, try all possible CPUs if that is not the case. This makes the callers handle fallout from broken tests better, as well as sysadmin interventions where callers are not tests. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson --- lib/igt_p

Re: [Intel-gfx] [CI v3] drm/i915: GuC test run

2018-02-21 Thread Sagar Arun Kamble
Hi Tvrtko, On 2/21/2018 3:42 PM, Tvrtko Ursulin wrote: Hi guys, I was trying to do a test run with GuC enabled but I am possibly doing something wrong, or something is broken on SKL GVT machine. Could you please check: This is known issue where movntdqa support is disabled for hypervisor. GuC

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rename drm_i915_gem_request to i915_request (rev2)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Rename drm_i915_gem_request to i915_request (rev2) URL : https://patchwork.freedesktop.org/series/37958/ State : success == Summary == Series 37958v2 drm/i915: Rename drm_i915_gem_request to i915_request https://patchwork.freedesktop.org/api/1.0/series/37

[Intel-gfx] [PATCH 15/16] drm/i915: Add NV12 support to intel_framebuffer_init

2018-02-21 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 as supported format to intel_framebuffer_init and performs various checks. v2: -Fix an issue in checks added (Chandra Konduru) v3: rebased (me) v4: Review comments by Ville addressed Added platform check for NV12 in intel_framebuffer_init Removed offs

[Intel-gfx] [PATCH 14/16] drm/i915: Add NV12 as supported format for sprite plane

2018-02-21 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments

Re: [Intel-gfx] [PATCH i-g-t] lib/igt_perf: Find active perf CPU

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 10:29:57) > From: Tvrtko Ursulin > > Instead of assuming PMU runs on CPU0, try all possible CPUs if that is not > the case. This makes the callers handle fallout from broken tests better, > as well as sysadmin interventions where callers are not tests. > > Sign

[Intel-gfx] [PATCH 11/16] drm/i915: Update format_is_yuv() to include NV12

2018-02-21 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to format_is_yuv() function for sprite planes. v2: -Use intel_ prefix for format_is_yuv (Ville) v3: Rebased (me) v4: Rebased and addressed review comments from Clinton A Taylor. "static function in intel_sprite.c is not available to the primary plane

[Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane

2018-02-21 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to list of supported formats for primary plane v2: Rebased (Chandra Konduru) v3: Rebased (me) v4: Review comments by Ville addressed Removed the skl_primary_formats_with_nv12 and added NV12 case in existing skl_primary_formats v5: Rebased (me) v6: M

[Intel-gfx] [PATCH 08/16] drm/i915/skl+: nv12 workaround disable WM level 1-7

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar Display Workaround #0826 (SKL:ALL BXT:ALL) & #1059(CNL:A) Hardware sometimes fails to wake memory from pkg C states fetching the last few lines of planar YUV 420 (NV12) planes. This causes intermittent underflow and corruption. WA: Disable package C states or do not enable late

[Intel-gfx] [PATCH 10/16] drm/i915: Set scaler mode for NV12

2018-02-21 Thread Vidya Srinivas
From: Chandra Konduru This patch sets appropriate scaler mode for NV12 format. In this mode, skylake scaler does either chroma-upsampling or chroma-upsampling and resolution scaling v2: Review comments from Ville addressed NV12 case to be checked first for setting the scaler v3: Rebased (me) v

[Intel-gfx] [PATCH 16/16] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg

2018-02-21 Thread Vidya Srinivas
If the fb format is YUV, enable the plane CSC mode bits for the conversion. v2: Addressed review comments from Shashank Sharma Alignment issue fixed in i915_reg.h v3: Adding Reviewed By from Shashank Sharma Reviewed-by: Shashank Sharma Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/i9

[Intel-gfx] [PATCH 12/16] drm/i915: Upscale scaler max scale for NV12

2018-02-21 Thread Vidya Srinivas
From: Chandra Konduru This patch updates scaler max limit support for NV12 v2: Rebased (me) v3: Rebased (me) v4: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. v5: Addressed review comments from Ville and rebased - calculation of max

[Intel-gfx] [PATCH 09/16] drm/i915/skl: split skl_compute_ddb function

2018-02-21 Thread Vidya Srinivas
From: Mahesh Kumar This patch splits skl_compute_wm/ddb functions into two parts. One adds all affected pipes after the commit to atomic_state structure and second part does compute the DDB. v2: Added reviewed by tag from Shashank Sharma Reviewed-by: Shashank Sharma Signed-off-by: Mahesh Kumar

Re: [Intel-gfx] [igt-dev] [PATCH igt v2] igt/perf_pmu: Use a self-correcting busy pwm

2018-02-21 Thread Tvrtko Ursulin
On 20/02/2018 13:50, Chris Wilson wrote: Convert the busy pwm from using a single calibration pass with a fixed target into a self-correcting pwm that tries to adjust how long to sleep on each pwm in order to converge at the target busy %%. Being self-correcting, it should fare better against t

Re: [Intel-gfx] [CI v3] drm/i915: GuC test run

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 10:32, Sagar Arun Kamble wrote: Hi Tvrtko, On 2/21/2018 3:42 PM, Tvrtko Ursulin wrote: Hi guys, I was trying to do a test run with GuC enabled but I am possibly doing something wrong, or something is broken on SKL GVT machine. Could you please check: This is known issue where

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] lib/igt_perf: Find active perf CPU

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 10:34, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-02-21 10:29:57) From: Tvrtko Ursulin Instead of assuming PMU runs on CPU0, try all possible CPUs if that is not the case. This makes the callers handle fallout from broken tests better, as well as sysadmin interventions whe

[Intel-gfx] [CI v4] drm/i915: GuC test run

2018-02-21 Thread Tvrtko Ursulin
From: Tvrtko Ursulin With disabled aggressive idling from IGT. To see how shard run fares. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 3 --- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_uc.c | 2 ++ 3 files changed, 3 insertions(+), 4

Re: [Intel-gfx] [igt-dev] [PATCH igt v2] igt/perf_pmu: Use a self-correcting busy pwm

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 10:39:29) > > On 20/02/2018 13:50, Chris Wilson wrote: > > Convert the busy pwm from using a single calibration pass with a fixed > > target into a self-correcting pwm that tries to adjust how long to sleep > > on each pwm in order to converge at the target busy

[Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Skip hotplug test on Broxton

2018-02-21 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Apollolake machine in the shards cannot bring the CPU0 back online so skip the test on all Broxtons for now. Signed-off-by: Tvrtko Ursulin --- tests/perf_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index 0beb91976102..b6deb

Re: [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Skip hotplug test on Broxton

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 10:57:38) > From: Tvrtko Ursulin > > Apollolake machine in the shards cannot bring the CPU0 back online so > skip the test on all Broxtons for now. > > Signed-off-by: Tvrtko Ursulin > --- > tests/perf_pmu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --

[Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Skip hotplug test on Broxton

2018-02-21 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Apollolake machine in the shards cannot bring the CPU0 back online so skip the test on all Broxtons for now. v2: Fix inverted check. Signed-off-by: Tvrtko Ursulin --- tests/perf_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2] tests/perf_pmu: Skip hotplug test on Broxton

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 10:59:32) > From: Tvrtko Ursulin > > Apollolake machine in the shards cannot bring the CPU0 back online so > skip the test on all Broxtons for now. > > v2: Fix inverted check. > > Signed-off-by: Tvrtko Ursulin > --- > tests/perf_pmu.c | 1 + > 1 file changed

[Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Skip hotplug test on Broxton

2018-02-21 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Apollolake machine in the shards cannot bring the CPU0 back online so skip the test on all Broxtons for now. v2: Fix inverted check. v3: igt_skip_on. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- tests/perf_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/test

Re: [Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Skip hotplug test on Broxton

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 11:03:32) > From: Tvrtko Ursulin > > Apollolake machine in the shards cannot bring the CPU0 back online so > skip the test on all Broxtons for now. > > v2: Fix inverted check. > v3: igt_skip_on. (Chris Wilson) > > Signed-off-by: Tvrtko Ursulin Acked-by: Chris

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/doc: Fix documentation for _vblank_restore().

2018-02-21 Thread Patchwork
== Series Details == Series: drm/doc: Fix documentation for _vblank_restore(). URL : https://patchwork.freedesktop.org/series/38662/ State : success == Summary == Test kms_flip: Subgroup 2x-flip-vs-expired-vblank: pass -> FAIL (shard-hsw) fdo#102887 +1

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev11)

2018-02-21 Thread Patchwork
== Series Details == Series: igt/gem_ctx_isolation: Check isolation of registers between contexts (rev11) URL : https://patchwork.freedesktop.org/series/32531/ State : success == Summary == Test perf: Subgroup blocking: pass -> FAIL (shard-hsw) fdo#102252 T

[Intel-gfx] [PATCH igt] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Chris Wilson
How much do I want this uABI to rot away? Say "Never again!" to implicit aliasing. In the meantime, we do not need to perform duplicate work on bsd2 machines, as especially we do not know which engine bsd relates to. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- lib/ioctl_wrappers.c | 2 +

[Intel-gfx] [PATCH igt 1/2] lib: Export kmsg()

2018-02-21 Thread Chris Wilson
Export the kmsg() function for use by tests to write into the kernel message log, useful for tests to inline their progress with kernel error messages. Signed-off-by: Chris Wilson --- lib/igt_core.c | 20 ++-- lib/igt_core.h | 17 + 2 files changed, 23 insertions(

[Intel-gfx] [PATCH igt 2/2] igt/debugfs_tests: Record which file is being opened in kmsg

2018-02-21 Thread Chris Wilson
When tracking down the cause of a particular kernel warning, knowing which file it is associated with can be a big clue. So write the filename into the kernel message log prior to opening it. Signed-off-by: Chris Wilson --- tests/debugfs_test.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletio

Re: [Intel-gfx] [PATCH v13 0/6] drm/i915: expose RCS topology to userspace

2018-02-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2018-02-15 12:01:56) > Hi all, > > After some discussion with Joonas we agreed on changing some of the > rcs topology structs in the uAPI. It now uses a single struct instead > of 3. > > I've also changed the bit the query uAPI to make it more sensible to > userspace (p

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Rename drm_i915_gem_request to i915_request (rev2)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Rename drm_i915_gem_request to i915_request (rev2) URL : https://patchwork.freedesktop.org/series/37958/ State : success == Summary == Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-b: pass -> FAIL (shard-apl) fdo

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding NV12 support (rev12)

2018-02-21 Thread Patchwork
== Series Details == Series: Adding NV12 support (rev12) URL : https://patchwork.freedesktop.org/series/28103/ State : warning == Summary == $ dim checkpatch origin/drm-tip 74d9f6f867c3 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values 98b6c62d8823 drm/i915/skl+: refactor WM calcula

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Add NV12 as supported format for sprite plane

2018-02-21 Thread Sharma, Shashank
Reviewed-by: Shashank Sharma Regards Shashank On 2/21/2018 3:50 PM, Vidya Srinivas wrote: From: Chandra Konduru This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 ca

Re: [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request

2018-02-21 Thread Mika Kuoppala
Chris Wilson writes: > We want to de-emphasize the link between the request (dependency, > execution and fence tracking) from GEM and so rename the struct from > drm_i915_gem_request to i915_request. That is we may implement the GEM > user interface on top of requests, but they are an abstraction

[Intel-gfx] [PATCH igt v3] igt/perf_pmu: Use a self-correcting busy pwm

2018-02-21 Thread Chris Wilson
Convert the busy pwm from using a single calibration pass with a fixed target into a self-correcting pwm that tries to adjust how long to sleep on each pwm in order to converge at the target busy %%. Being self-correcting, it should fare better against the more variable systems CI presents. v2: B

[Intel-gfx] ✗ Fi.CI.BAT: failure for Adding NV12 support (rev12)

2018-02-21 Thread Patchwork
== Series Details == Series: Adding NV12 support (rev12) URL : https://patchwork.freedesktop.org/series/28103/ State : failure == Summary == Series 28103v12 Adding NV12 support https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/12/mbox/ Test gem_mmap_gtt: Subgroup basic-

[Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Chris Wilson
How much do I want this uABI to rot away? Say "Never again!" to implicit aliasing. In the meantime, we do not need to perform duplicate work on bsd2 machines, as especially we do not know which engine bsd relates to. v2: When in doubt, shout! Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure

2018-02-21 Thread Michal Wajdeczko
On Wed, 21 Feb 2018 09:08:08 +0100, Sagar Arun Kamble wrote: On 2/21/2018 4:27 AM, Michal Wajdeczko wrote: Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure") we believed that we correctly handle all errors encountered during GuC initialization, including special one tha

Re: [Intel-gfx] [PATCH igt] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 11:21, Chris Wilson wrote: How much do I want this uABI to rot away? Say "Never again!" to implicit aliasing. In the meantime, we do not need to perform duplicate work on bsd2 machines, as especially we do not know which engine bsd relates to. Signed-off-by: Chris Wilson Cc: Tvr

Re: [Intel-gfx] [PATCH igt] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 12:25:55) > > On 21/02/2018 11:21, Chris Wilson wrote: > > How much do I want this uABI to rot away? Say "Never again!" to implicit > > aliasing. > > > > In the meantime, we do not need to perform duplicate work on bsd2 > > machines, as especially we do not know

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: GuC test run (rev4)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: GuC test run (rev4) URL : https://patchwork.freedesktop.org/series/38615/ State : success == Summary == Series 38615v4 drm/i915: GuC test run https://patchwork.freedesktop.org/api/1.0/series/38615/revisions/4/mbox/ Test kms_pipe_crc_basic: Subgro

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset URL : https://patchwork.freedesktop.org/series/38678/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2914152024df drm/i915: Check for I915_MODE_FLAG_INHERITED before

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 12:17, Chris Wilson wrote: How much do I want this uABI to rot away? Say "Never again!" to implicit aliasing. In the meantime, we do not need to perform duplicate work on bsd2 machines, as especially we do not know which engine bsd relates to. v2: When in doubt, shout! Signed-of

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset URL : https://patchwork.freedesktop.org/series/38678/ State : warning == Summary == Series 38678v1 drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_mode

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 12:53, Tvrtko Ursulin wrote: On 21/02/2018 12:17, Chris Wilson wrote: How much do I want this uABI to rot away? Say "Never again!" to implicit aliasing. In the meantime, we do not need to perform duplicate work on bsd2 machines, as especially we do not know which engine bsd rela

Re: [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request

2018-02-21 Thread Michał Winiarski
On Wed, Feb 21, 2018 at 09:56:36AM +, Chris Wilson wrote: > We want to de-emphasize the link between the request (dependency, > execution and fence tracking) from GEM and so rename the struct from > drm_i915_gem_request to i915_request. That is we may implement the GEM > user interface on top o

[Intel-gfx] [PATCH v2] drm/i915/hsw: add missing disabled EUs registers reads

2018-02-21 Thread Lionel Landwerlin
It turns out that HSW has a register that tells us how many EUs are disabled per half-slice (roughly a similar notion to subslice). We didn't read those registers so far as most userspace drivers didn't need those values prior to Gen8, but an internal library would like to have access to this. Sin

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding NV12 support (rev12)

2018-02-21 Thread Patchwork
== Series Details == Series: Adding NV12 support (rev12) URL : https://patchwork.freedesktop.org/series/28103/ State : warning == Summary == $ dim checkpatch origin/drm-tip bcaef9063e6b drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values 2f18b9726ab8 drm/i915/skl+: refactor WM calcula

Re: [Intel-gfx] [igt-dev] [PATCH igt v3] igt/perf_pmu: Use a self-correcting busy pwm

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 12:10, Chris Wilson wrote: Convert the busy pwm from using a single calibration pass with a fixed target into a self-correcting pwm that tries to adjust how long to sleep on each pwm in order to converge at the target busy %%. Being self-correcting, it should fare better against t

[Intel-gfx] [PATCH 4.14 036/167] x86/gpu: add CFL to early quirks

2018-02-21 Thread Greg Kroah-Hartman
4.14-stable review patch. If anyone has any objections, please let me know. -- From: Lucas De Marchi commit 33aa69ed8aacd92dea12671e52eb3ca6ac2d7a49 upstream. CFL was missing from intel_early_ids[]. The PCI ID needs to be there to allow the memory region to be stolen, otherwis

Re: [Intel-gfx] [PATCH 10/16] drm/i915: Set scaler mode for NV12

2018-02-21 Thread Sharma, Shashank
Reviewed-by: Shashank Sharma Regards Shashank On 2/21/2018 3:50 PM, Vidya Srinivas wrote: From: Chandra Konduru This patch sets appropriate scaler mode for NV12 format. In this mode, skylake scaler does either chroma-upsampling or chroma-upsampling and resolution scaling v2: Review comments

[Intel-gfx] [PATCH 4.15 035/163] x86/gpu: add CFL to early quirks

2018-02-21 Thread Greg Kroah-Hartman
4.15-stable review patch. If anyone has any objections, please let me know. -- From: Lucas De Marchi commit 33aa69ed8aacd92dea12671e52eb3ca6ac2d7a49 upstream. CFL was missing from intel_early_ids[]. The PCI ID needs to be there to allow the memory region to be stolen, otherwis

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 12:55:17) > > On 21/02/2018 12:53, Tvrtko Ursulin wrote: > > > > On 21/02/2018 12:17, Chris Wilson wrote: > >> How much do I want this uABI to rot away? Say "Never again!" to implicit > >> aliasing. > >> > >> In the meantime, we do not need to perform duplicate

Re: [Intel-gfx] [PATCH] drm/i915: Explicit Raw and Adjusted WM latencies.

2018-02-21 Thread Ville Syrjälä
On Tue, Feb 20, 2018 at 05:51:47PM -0800, Rodrigo Vivi wrote: > Current code has some limitations: > > 1. debugfs only shows raw latency we read from PCODE, > not the ones we are configuring. > > 2. When determining if SAGV can be enabled we only > apply adjusted wa, but we don't apply the IPC on

[Intel-gfx] ✓ Fi.CI.BAT: success for Adding NV12 support (rev12)

2018-02-21 Thread Patchwork
== Series Details == Series: Adding NV12 support (rev12) URL : https://patchwork.freedesktop.org/series/28103/ State : success == Summary == Series 28103v12 Adding NV12 support https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/12/mbox/ Test kms_pipe_crc_basic: Subgroup

Re: [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP

2018-02-21 Thread Ville Syrjälä
On Wed, Feb 21, 2018 at 12:04:43AM +, Mustaffa, Mustamin B wrote: > Hi Ville, > > Can you point out what makes you says the git diff is broken? > > Best regard > > Mustamin > > > -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Tuesday, Fe

Re: [Intel-gfx] Thinkpad X1 Carbon 3rd - Reducing the compressed framebuffer size

2018-02-21 Thread Ville Syrjälä
On Mon, Feb 19, 2018 at 10:36:50AM +0100, Pali Rohár wrote: > On Tuesday 13 February 2018 19:45:56 Ville Syrjälä wrote: > > On Tue, Feb 13, 2018 at 06:43:41PM +0100, Pali Rohár wrote: > > > On Tuesday 13 February 2018 18:12:21 Ville Syrjälä wrote: > > > > On Tue, Feb 13, 2018 at 05:04:37PM +0100, P

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hsw: add missing disabled EUs registers reads (rev2)

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915/hsw: add missing disabled EUs registers reads (rev2) URL : https://patchwork.freedesktop.org/series/38441/ State : success == Summary == Series 38441v2 drm/i915/hsw: add missing disabled EUs registers reads https://patchwork.freedesktop.org/api/1.0/series/

[Intel-gfx] [PATCH] drm/i915/execlists: Remove the ring advancement under preemption

2018-02-21 Thread Chris Wilson
Load an empty ringbuffer for preemption, ignoring the lite-restore workaround as we know the preempt context is always idle before preemption. Note that after some digging by Michal Winiarski, we found that RING_HEAD is no longer being updated (due to inhibiting context save restore) so this patch

Re: [Intel-gfx] Thinkpad X1 Carbon 3rd - Reducing the compressed framebuffer size

2018-02-21 Thread Pali Rohár
On Wednesday 21 February 2018 15:28:53 Ville Syrjälä wrote: > On Mon, Feb 19, 2018 at 10:36:50AM +0100, Pali Rohár wrote: > > On Tuesday 13 February 2018 19:45:56 Ville Syrjälä wrote: > > > On Tue, Feb 13, 2018 at 06:43:41PM +0100, Pali Rohár wrote: > > > > On Tuesday 13 February 2018 18:12:21 Vill

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 13:07, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-02-21 12:55:17) On 21/02/2018 12:53, Tvrtko Ursulin wrote: On 21/02/2018 12:17, Chris Wilson wrote: How much do I want this uABI to rot away? Say "Never again!" to implicit aliasing. In the meantime, we do not need to pe

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 13:35:38) > > On 21/02/2018 13:07, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-02-21 12:55:17) > >> > >> On 21/02/2018 12:53, Tvrtko Ursulin wrote: > >>> > >>> On 21/02/2018 12:17, Chris Wilson wrote: > How much do I want this uABI to rot away? Say

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Tvrtko Ursulin
On 21/02/2018 13:35, Tvrtko Ursulin wrote: On 21/02/2018 13:07, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-02-21 12:55:17) On 21/02/2018 12:53, Tvrtko Ursulin wrote: On 21/02/2018 12:17, Chris Wilson wrote: How much do I want this uABI to rot away? Say "Never again!" to implicit al

Re: [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available

2018-02-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-21 13:42:29) > > On 21/02/2018 13:35, Tvrtko Ursulin wrote: > > > > On 21/02/2018 13:07, Chris Wilson wrote: > >> Quoting Tvrtko Ursulin (2018-02-21 12:55:17) > >>> > >>> On 21/02/2018 12:53, Tvrtko Ursulin wrote: > > On 21/02/2018 12:17, Chris Wilson wro

Re: [Intel-gfx] [igt-dev] [PATCH igt 1/2] igt/kms_frontbuffer_tracking: Disable FBC testing for -ENODEV

2018-02-21 Thread Lofstedt, Marta
While you are at it could you fix the kms_fbcon_fbt test in the same manner? And you'll have my R-b > -Original Message- > From: igt-dev [mailto:igt-dev-boun...@lists.freedesktop.org] On Behalf Of > Chris Wilson > Sent: Friday, February 16, 2018 11:00 AM > To: intel-gfx@lists.freedesktop.

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make global seqno known in i915_gem_request_execute tracepoint

2018-02-21 Thread Tvrtko Ursulin
On 20/02/2018 11:18, Patchwork wrote: == Series Details == Series: drm/i915: Make global seqno known in i915_gem_request_execute tracepoint URL : https://patchwork.freedesktop.org/series/38578/ State : success == Summary == Series 38578v1 drm/i915: Make global seqno known in i915_gem_reques

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Remove the ring advancement under preemption

2018-02-21 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Remove the ring advancement under preemption URL : https://patchwork.freedesktop.org/series/38698/ State : success == Summary == Series 38698v1 drm/i915/execlists: Remove the ring advancement under preemption https://patchwork.freedesktop.org/ap

Re: [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane

2018-02-21 Thread Juha-Pekka Heikkila
On 21.02.2018 12:20, Vidya Srinivas wrote: From: Chandra Konduru This patch adds NV12 to list of supported formats for primary plane v2: Rebased (Chandra Konduru) v3: Rebased (me) v4: Review comments by Ville addressed Removed the skl_primary_formats_with_nv12 and added NV12 case in existing

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