[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4)

== Series Details == Series: drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin() (rev4) URL : https://patchwork.freedesktop.org/series/69524/ State : success == Summary == CI Bug Log - changes from CI_DRM_7356_full -> Patchwork_15293_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/irq: Disable display interrupt control during handler on gen11+

== Series Details == Series: drm/i915/irq: Disable display interrupt control during handler on gen11+ URL : https://patchwork.freedesktop.org/series/69556/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7357_full -> Patchwork_15298_full

Re: [Intel-gfx] [PATCH 3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed

On 2019-10-31 at 17:14:22 -0700, José Roberto de Souza wrote: > A recent change in BSpec allow us to change EXTLINE while transcoder > is enabled so this allow us to change it even when doing the first > fastset after taking over previous hardware state set by BIOS. > BIOS don't enable PSR, so if

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/mst: Check uapi enable not intel one during mst atomic check

== Series Details == Series: drm/i915/mst: Check uapi enable not intel one during mst atomic check URL : https://patchwork.freedesktop.org/series/69557/ State : success == Summary == CI Bug Log - changes from CI_DRM_7357_full -> Patchwork_15299_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for VBT "generic DTD" block (rev3)

== Series Details == Series: VBT "generic DTD" block (rev3) URL : https://patchwork.freedesktop.org/series/69481/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7357_full -> Patchwork_15300_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Random pile of core stuff

== Series Details == Series: drm: Random pile of core stuff URL : https://patchwork.freedesktop.org/series/69554/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7357_full -> Patchwork_15297_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission (rev5)

== Series Details == Series: drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission (rev5) URL : https://patchwork.freedesktop.org/series/68685/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7357_full -> Patchwork_15301_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Exercise the per-batch whitelist from the context (rev2)

== Series Details == Series: drm/i915/gem: Exercise the per-batch whitelist from the context (rev2) URL : https://patchwork.freedesktop.org/series/69527/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7356_full -> Patchwork_15290_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Flush idle barriers when waiting

== Series Details == Series: series starting with [1/3] drm/i915: Flush idle barriers when waiting URL : https://patchwork.freedesktop.org/series/69546/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7356_full -> Patchwork_15291_full

Re: [Intel-gfx] [RFC 1/7] drm/dp: get/set phy compliance pattern

On Fri, Nov 15, 2019 at 08:55:43PM +0530, Animesh Manna wrote: > During phy complaince auto test mode source need to read ^^ typo Please also send this patch to dri-devel M-L > requested test pattern from sink through DPCD. After processing > the request source need to set the

[Intel-gfx] [PATCH V12 0/6] mdev based hardware virtio offloading support

Hi all: There are hardwares that can do virtio datapath offloading while having its own control path. This path tries to implement a mdev based unified API to support using kernel virtio driver to drive those devices. This is done by introducing a new mdev transport for virtio (virtio_mdev) and

[Intel-gfx] [PATCH V12 2/6] mdev: split out VFIO bus specific parent ops

The only thing left for generalizing mdev is the VFIO specific parent ops. This is basically the open/release/read/write/ioctl/mmap. To support this, mdev core is extend to support a specific size of structure during create, this will allow to compose mdev structure into mdev vfio structure and

[Intel-gfx] ✗ Fi.CI.BUILD: failure for mdev based hardware virtio offloading support

== Series Details == Series: mdev based hardware virtio offloading support URL : https://patchwork.freedesktop.org/series/69596/ State : failure == Summary == Applying: mdev: make mdev bus agnostic Using index info to reconstruct a base tree... M MAINTAINERS M

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/bios: do not discard address space (rev2)

== Series Details == Series: series starting with [1/3] drm/i915/bios: do not discard address space (rev2) URL : https://patchwork.freedesktop.org/series/69567/ State : success == Summary == CI Bug Log - changes from CI_DRM_7359 -> Patchwork_15308

Re: [Intel-gfx] [CI v2] drm/fbdev: Fallback to non tiled mode if all tiles not present

Pushed tod rm-misc-next, thanks a lot Dave all the feedback and reviews. Regards Manasi On Wed, Nov 13, 2019 at 02:29:52PM -0800, Manasi Navare wrote: > In case of tiled displays, if we hotplug just one connector, > fbcon currently just selects the preferred mode and if it is > tiled mode then

Re: [Intel-gfx] [RFC 5/7] drm/i915/dp: Register definition for DP compliance register

On Fri, Nov 15, 2019 at 08:55:47PM +0530, Animesh Manna wrote: > DP_COMP_CTL and DP_COMP_PAT register used to program DP > compliance pattern. > > Signed-off-by: Animesh Manna Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/i915_reg.h | 20 > 1 file

Re: [Intel-gfx] [RFC 4/7] drm/i915/dp: Notify testapp using uevent and debugfs entry

On Sun, Nov 17, 2019 at 08:58:45PM -0800, Manasi Navare wrote: > On Fri, Nov 15, 2019 at 08:55:46PM +0530, Animesh Manna wrote: > > To align with link compliance design existing intel_dp_compliance > > tool will be used to get the phy request in userspace through uevent. > > > > Signed-off-by:

[Intel-gfx] [PATCH V12 1/6] mdev: make mdev bus agnostic

Current mdev is tied to a VFIO specific "mdev" bus. This prevent mdev from being used by other types of API/buses. So this patch tries to make mdev bus agnostic through making a mdev core a thin module: - decouple VFIO bus specific bits from mdev_core.c to mdev_vfio.c and introduce mdev_vfio

[Intel-gfx] [PATCH V12 3/6] mdev: move to drivers/

Mdev now is nothing VFIO specific, let's move it to upper directory. Signed-off-by: Jason Wang --- MAINTAINERS | 7 +-- drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/mdev/Kconfig

Re: [Intel-gfx] [RFC 3/7] drm/i915/dp: Preparation for DP phy compliance auto test

On Fri, Nov 15, 2019 at 08:55:45PM +0530, Animesh Manna wrote: > During DP phy compliance auto test mode, sink will request > combination of different test pattern with differnt level of > vswing, pre-emphasis. Function added to prepare for it. > > Signed-off-by: Animesh Manna This looks good

[Intel-gfx] [PATCH V12 6/6] docs: sample driver to demonstrate how to implement virtio-mdev framework

This sample driver creates mdev device that simulate virtio net device over virtio mdev transport. The device is implemented through vringh and workqueue. A device specific dma ops is to make sure HVA is used directly as the IOVA. This should be sufficient for kernel virtio driver to work. Only

[Intel-gfx] [PATCH V12 5/6] virtio: introduce a mdev based transport

This patch introduces a new mdev transport for virtio. This is used to use kernel virtio driver to drive the mediated device that is capable of populating virtqueue directly. A new virtio-mdev driver will be registered to the mdev bus, when a new virtio-mdev device is probed, it will register the

[Intel-gfx] [PATCH V12 4/6] mdev: introduce mediated virtio bus

This patch implements a mediated virtio bus over mdev framework. This will be used by the future virtio-mdev and vhost-mdev on top to allow driver from either userspace or kernel to control the device which is capable of offloading virtio datapath. Signed-off-by: Jason Wang --- MAINTAINERS

Re: [Intel-gfx] [RFC 7/7] drm/i915/dp: Program vswing, pre-emphasis, test-pattern

On Fri, Nov 15, 2019 at 08:55:49PM +0530, Animesh Manna wrote: > This patch process phy compliance request by programming requested > vswing, pre-emphasis and test pattern. Again here a slightly detailed description of where in the atomic modeset do we process the PHY com request would be good.

[Intel-gfx] [PATCH 10/14] drm/i915/gt: Flush the requests after wedging on suspend

Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Intel-gfx] [PATCH 11/14] drm/i915/selftests: Flush the active callbacks

Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 02/14] drm/i915: Mark up the calling context for intel_wakeref_put()

Previously, we assumed we could use mutex_trylock() within an atomic context, falling back to a working if contended. However, such trickery is illegal inside interrupt context, and so we need to always use a worker under such circumstances. As we normally are in process context, we can typically

[Intel-gfx] [PATCH 06/14] drm/i915: Wait until the intel_wakeref idle callback is complete

When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH 14/14] drm/i915/gt: Track engine round-trip times

Knowing the round trip time of an engine is useful for tracking the health of the system as well as providing a metric for the baseline responsiveness of the engine. We can use the latter metric for automatically tuning our waits in selftests and when idling so we don't confuse a slower system

Re: [Intel-gfx] [RFC 4/7] drm/i915/dp: Notify testapp using uevent and debugfs entry

On Fri, Nov 15, 2019 at 08:55:46PM +0530, Animesh Manna wrote: > To align with link compliance design existing intel_dp_compliance > tool will be used to get the phy request in userspace through uevent. > > Signed-off-by: Animesh Manna I would prefer splitting this patch since sending a uevent

Re: [Intel-gfx] [RFC 6/7] drm/i915/dp: Update the pattern as per request

On Fri, Nov 15, 2019 at 08:55:48PM +0530, Animesh Manna wrote: > set pattern in DP_COMP_CTL. It would be nice to have some brief description here on context of setting a PHY pattern for PHY compliance and that this will be called during pre enable in atomic commit in case of phy compliance

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/bios: do not discard address space (rev2)

== Series Details == Series: series starting with [1/3] drm/i915/bios: do not discard address space (rev2) URL : https://patchwork.freedesktop.org/series/69567/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/bios: do not discard address

[Intel-gfx] [PATCH 07/14] drm/i915/gt: Declare timeline.lock to be irq-free

Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9 -

[Intel-gfx] [PATCH 13/14] drm/i915/selftests: Exercise rc6 handling

Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13 ++

[Intel-gfx] [PATCH 09/14] drm/i915/gt: Schedule next retirement worker first

As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

The general concept was that intel_timeline.active_count was locked by the intel_timeline.mutex. The exception was for power management, where the engine->kernel_context->timeline could be manipulated under the global wakeref.mutex. This was quite solid, as we always manipulated the timeline only

[Intel-gfx] [PATCH 12/14] drm/i915/selftests: Be explicit in ERR_PTR handling

When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 03/14] drm/i915/gem: Merge GGTT vma flush into a single loop

We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git

[Intel-gfx] [PATCH 08/14] drm/i915/gt: Move new timelines to the end of active_list

When adding a new active timeline, place it at the end of the list. This allows for intel_gt_retire_requests() to pick up the newcomer more quickly and hopefully complete the retirement sooner. References: 7936a22dd466 ("drm/i915/gt: Wait for new requests in intel_gt_retire_requests()")

[Intel-gfx] [PATCH 05/14] drm/i915: Protect the obj->vma.list during iteration

Take the obj->vma.lock to prevent modifications to the list as we iterate, to avoid the dreaded the NULL pointer. <1>[ 347.820823] BUG: kernel NULL pointer dereference, address: 0150 <1>[ 347.820856] #PF: supervisor read access in kernel mode <1>[ 347.820874] #PF:

[Intel-gfx] [PATCH 04/14] drm/i915/gt: Only wait for register chipset flush if active

Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Intel-gfx] ✓ Fi.CI.IGT: success for Improve error handling on DSB (rev4)

== Series Details == Series: Improve error handling on DSB (rev4) URL : https://patchwork.freedesktop.org/series/69319/ State : success == Summary == CI Bug Log - changes from CI_DRM_7358_full -> Patchwork_15304_full Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

== Series Details == Series: series starting with [01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests URL : https://patchwork.freedesktop.org/series/69591/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4195647761fd drm/i915/gt: Close race between

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

== Series Details == Series: series starting with [01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests URL : https://patchwork.freedesktop.org/series/69591/ State : success == Summary == CI Bug Log - changes from CI_DRM_7358 -> Patchwork_15307

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/bios: do not discard address space

== Series Details == Series: series starting with [1/3] drm/i915/bios: do not discard address space URL : https://patchwork.freedesktop.org/series/69567/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7357_full -> Patchwork_15302_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

== Series Details == Series: series starting with [01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests URL : https://patchwork.freedesktop.org/series/69591/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7358_full -> Patchwork_15307_full