[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Improve execute_cb struct packing (rev2)

2020-05-26 Thread Patchwork
== Series Details == Series: drm/i915: Improve execute_cb struct packing (rev2) URL : https://patchwork.freedesktop.org/series/77281/ State : success == Summary == CI Bug Log - changes from CI_DRM_8537 -> Patchwork_1 Summary ---

[Intel-gfx] [PATCH i-g-t] lib: Randomise spinner location to reduce relocation risk

2020-05-26 Thread Chris Wilson
Randomise the position of the spinner to reduce the number of relocations we might require. Signed-off-by: Chris Wilson --- lib/igt_dummyload.c | 33 ++--- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix wrong CDCLK adjustment changes

2020-05-26 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong CDCLK adjustment changes URL : https://patchwork.freedesktop.org/series/77654/ State : success == Summary == CI Bug Log - changes from CI_DRM_8537_full -> Patchwork_17776_full Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915/params: don't expose inject_probe_failure in debugfs

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [CI,1/4] drm/i915/params: don't expose inject_probe_failure in debugfs URL : https://patchwork.freedesktop.org/series/77661/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8685c3c6d218 drm/i915/params: don't expose

[Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Update inter-engine semaphore detection

2020-05-26 Thread Chris Wilson
The kernel no longer uses semaphores between engines, unless it can do so by preempting them with timeslices. Update the semaphore-busy to only run when we expect semaphore usage, i.e. not on bdw/bsw. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1939 Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH i-g-t] lib/i915: Restore hangcheck modparams between tests

2020-05-26 Thread Chris Wilson
The hangcheck/reset modparam has far reaching effects and disables functionality if switch off. This can surprise a few tests causing them to skip. References: https://gitlab.freedesktop.org/drm/intel/-/issues/1929 Signed-off-by: Chris Wilson --- lib/i915/gem.c | 8 1 file changed, 8

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Clear LOCAL_BIND from shared GGTT on resume

2020-05-26 Thread Patchwork
== Series Details == Series: drm/i915/gt: Clear LOCAL_BIND from shared GGTT on resume URL : https://patchwork.freedesktop.org/series/77666/ State : success == Summary == CI Bug Log - changes from CI_DRM_8539 -> Patchwork_17779 Summary

[Intel-gfx] [CI 4/4] drm/i915/params: switch to device specific parameters

2020-05-26 Thread Jani Nikula
Start using device specific parameters instead of module parameters for most things. The module parameters become the immutable initial values for i915 parameters. The device specific parameters in i915->params start life as a copy of i915_modparams. Any later changes are only reflected in the

[Intel-gfx] [CI 3/4] drm/i915/params: prevent changing module params runtime

2020-05-26 Thread Jani Nikula
Only support runtime changes through the debugfs. i915.verbose_state_checks remains an exception, and is not exposed via debugfs. This depends on IGT having been updated to use the debugfs for modifying the parameters. Cc: Juha-Pekka Heikkilä Cc: Venkata Sandeep Dhanalakota Reviewed-by:

[Intel-gfx] [CI 2/4] drm/i915/params: fix i915.fake_lmem_start module param sysfs permissions

2020-05-26 Thread Jani Nikula
fake_lmem_start does not need to be mutable via module param sysfs. It's only used during driver probe. Fixes: 1629224324b6 ("drm/i915/lmem: add the fake lmem region") Cc: Matthew Auld Cc: Joonas Lahtinen Cc: Chris Wilson Reviewed-by: Rodrigo Vivi Signed-off-by: Jani Nikula ---

[Intel-gfx] [CI 1/4] drm/i915/params: don't expose inject_probe_failure in debugfs

2020-05-26 Thread Jani Nikula
The parameter only makes sense as a module parameter only. Fixes: c43c5a8818d4 ("drm/i915/params: add i915 parameters to debugfs") Cc: Juha-Pekka Heikkilä Cc: Venkata Sandeep Dhanalakota Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_params.h | 2 +-

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Reorder await_execution before await_request

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Reorder await_execution before await_request URL : https://patchwork.freedesktop.org/series/77653/ State : success == Summary == CI Bug Log - changes from CI_DRM_8537_full -> Patchwork_17775_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/4] drm/i915/params: don't expose inject_probe_failure in debugfs

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [CI,1/4] drm/i915/params: don't expose inject_probe_failure in debugfs URL : https://patchwork.freedesktop.org/series/77661/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8539 -> Patchwork_17778

[Intel-gfx] [PATCH] drm/i915/gt: Clear LOCAL_BIND from shared GGTT on resume

2020-05-26 Thread Chris Wilson
We only restore GLOBAL binds upon resume as we expect these to be pinned for use by HW, whereas the LOCAL binds can be recreated on demand once userspace is resumed. For the LOCAL bind to be recreated in the global GTT, we need to clear its presence flag on deciding not to restore the mapping upon

Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Do not schedule normal requests immediately along virtual

2020-05-26 Thread Tvrtko Ursulin
On 25/05/2020 21:28, Chris Wilson wrote: When we push a virtual request onto the HW, we update the rq->engine to point to the physical engine. A request that is then submitted by the user that waits upon the virtual engine, but along the physical engine in use, will then see that it is due to

[Intel-gfx] [PATCH 1/2] drm/i915: Reorder await_execution before await_request

2020-05-26 Thread Chris Wilson
Reorder the code so that we can reuse the await_execution from a special case in await_request in the next patch. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_request.c | 264 ++-- 1 file changed, 132 insertions(+), 132 deletions(-) diff --git

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Do not schedule normal requests immediately along virtual

2020-05-26 Thread Chris Wilson
When we push a virtual request onto the HW, we update the rq->engine to point to the physical engine. A request that is then submitted by the user that waits upon the virtual engine, but along the physical engine in use, will then see that it is due to be submitted to the same engine and take a

Re: [Intel-gfx] [PATCH] drm/i915/gt: Force the GT reset on shutdown

2020-05-26 Thread Mika Kuoppala
Chris Wilson writes: > Before we return control to the system, and letting it reuse all the > pages being accessed by HW, we must disable the HW. At the moment, we > dare not reset the GPU if it will clobber the display, but once we know > the display has been disabled, we can proceed with the

Re: [Intel-gfx] [RFC 02/17] dma-fence: basic lockdep annotations

2020-05-26 Thread Maarten Lankhorst
Op 12-05-2020 om 10:59 schreef Daniel Vetter: > Design is similar to the lockdep annotations for workers, but with > some twists: > > - We use a read-lock for the execution/worker/completion side, so that > this explicit annotation can be more liberally sprinkled around. > With read locks

Re: [Intel-gfx] [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors

2020-05-26 Thread Ramalingam C
On 2020-05-20 at 09:11:38 -0400, Sean Paul wrote: > On Mon, May 18, 2020 at 12:41 PM Ramalingam C wrote: > > > > On 2020-05-18 at 10:32:09 -0400, Sean Paul wrote: > > > On Fri, May 15, 2020 at 10:48 AM Ramalingam C > > > wrote: > > > > > > > > On 2020-04-29 at 15:54:46 -0400, Sean Paul wrote: >

[Intel-gfx] [PATCH v1] drm/i915: Fix wrong CDCLK adjustment changes

2020-05-26 Thread Stanislav Lisovskiy
Previous patch didn't take into account all pipes but only those in state, which could cause wrong CDCLK conclcusions and calculations. Also there was a severe issue with min_cdclk being assigned to 0 every compare cycle. Too bad this was found by me only after merge. This could be also causing

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Reorder await_execution before await_request

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Reorder await_execution before await_request URL : https://patchwork.freedesktop.org/series/77653/ State : success == Summary == CI Bug Log - changes from CI_DRM_8537 -> Patchwork_17775

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix wrong CDCLK adjustment changes

2020-05-26 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong CDCLK adjustment changes URL : https://patchwork.freedesktop.org/series/77654/ State : success == Summary == CI Bug Log - changes from CI_DRM_8537 -> Patchwork_17776 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/rkl: Disable PSR2

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/rkl: Disable PSR2 URL : https://patchwork.freedesktop.org/series/77676/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3b5607178b4a drm/i915/rkl: Disable PSR2 54e02163a7f7 drm/i915: Add plane damage clips property

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/rkl: Disable PSR2

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/rkl: Disable PSR2 URL : https://patchwork.freedesktop.org/series/77676/ State : success == Summary == CI Bug Log - changes from CI_DRM_8540 -> Patchwork_17781 Summary ---

[Intel-gfx] [PATCH 2/6] drm/i915: Add plane damage clips property

2020-05-26 Thread José Roberto de Souza
This property will be used by PSR2 software tracking, adding it to GEN12+. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_display.c | 4 drivers/gpu/drm/i915/display/intel_sprite.c | 4 2 files changed, 8 insertions(+) diff --git

[Intel-gfx] [PATCH 5/6] drm/i915: Implement PSR2 selective fetch

2020-05-26 Thread José Roberto de Souza
All GEN12 platforms supports PSR2 selective fetch but not all GEN12 platforms supports PSR2 hardware tracking(aka RKL). This feature consists in software program registers with the damaged area of each plane this way hardware will only fetch from memory those areas and sent the PSR2 selective

[Intel-gfx] [PATCH 4/6] drm/i915: Add PSR2 software tracking registers

2020-05-26 Thread José Roberto de Souza
This registers will be used to implement PSR2 software tracking. BSpec: 55229 BSpec: 50424 BSpec: 50420 Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h | 68 ++--- 1 file changed, 63 insertions(+), 5 deletions(-) diff --git

[Intel-gfx] [PATCH 1/6] drm/i915/rkl: Disable PSR2

2020-05-26 Thread José Roberto de Souza
RKL doesn't have PSR2 HW tracking, it was replaced by software/manual tracking. The driver is required to track the areas that needs update and program hardware to send selective updates. So until the software tracking is implemented, PSR2 needs to be disabled for platforms without PSR2 HW

[Intel-gfx] [PATCH 3/6] drm/i915: Reorder intel_psr2_config_valid()

2020-05-26 Thread José Roberto de Souza
Future patches will bring PSR2 selective fetch configuration validation but most of the configuration checks will be used for HW tracking and selective fetch so the reoder was necessary. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_psr.c | 50

[Intel-gfx] [PATCH 6/6] drm/i915: Implement PSR2 selective fetch WAs

2020-05-26 Thread José Roberto de Souza
This feature have 3 WAs and as commented WA 14010103792 and WA 14010254185 conflicts, so leaving the feature disabled in the affected steppings. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_psr.c | 30 ++-- drivers/gpu/drm/i915/i915_reg.h

Re: [Intel-gfx] [PATCH v2 0/4] mm/gup, drm/i915: refactor gup_fast, convert to pin_user_pages()

2020-05-26 Thread John Hubbard
On 2020-05-23 02:41, Chris Wilson wrote: Quoting John Hubbard (2020-05-22 06:19:27) The purpose of posting this series is to launch a test in the intel-gfx-ci tree. (The patches have already been merged into Andrew's linux-mm tree.) This applies to today's linux.git (note the base-commit tag

[Intel-gfx] [PATCH] drm/i915/selftests: Fix runtime PM imbalance on error

2020-05-26 Thread Dinghao Liu
When drm_dev_init() returns an error code, a pairing runtime PM usage counter decrement is needed to keep the counter balanced. For error paths after this call, things are the same. Signed-off-by: Dinghao Liu --- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 + 1 file changed, 1

Re: [Intel-gfx] [PATCH 35/37] drm/i915/dg1: Load DMC

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:38 -0700, Lucas De Marchi wrote: > From: Matt Atwood > > Add support to load DMC v2.0.2 on DG1 > > While we're at it, tweak the TGL and RKL firmware size definition to > follow the convention used in previous platforms. Remove obsolete > commenting. > > Bpec: 49230 >

Re: [Intel-gfx] [PATCH 11/37] drm/i915/dg1: add initial DG-1 definitions

2020-05-26 Thread Lucas De Marchi
On Tue, May 26, 2020 at 10:34:47AM -0700, Jose Souza wrote: On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: From: Abdiel Janulgue Bspec: 33617, 33617 Cc: José Roberto de Souza Cc: Daniele Ceraolo Spurio Cc: Stuart Summers Cc: Vanshidhar Konda Cc: Lucas De Marchi Cc: Aravind

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Clear LOCAL_BIND from shared GGTT on resume

2020-05-26 Thread Patchwork
== Series Details == Series: drm/i915/gt: Clear LOCAL_BIND from shared GGTT on resume URL : https://patchwork.freedesktop.org/series/77666/ State : success == Summary == CI Bug Log - changes from CI_DRM_8539_full -> Patchwork_17779_full

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Do not schedule normal requests immediately along virtual

2020-05-26 Thread Tvrtko Ursulin
On 26/05/2020 10:07, Chris Wilson wrote: When we push a virtual request onto the HW, we update the rq->engine to point to the physical engine. A request that is then submitted by the user that waits upon the virtual engine, but along the physical engine in use, will then see that it is due to

[Intel-gfx] [PATCH 2/2] drm/i915/mst: filter out the display mode exceed sink's capability

2020-05-26 Thread Lyude Paul
From: Lee Shawn C So far, max dot clock rate for MST mode rely on physcial bandwidth limitation. It would caused compatibility issue if source display resolution exceed MST hub output ability. For example, source DUT had DP 1.2 output capability. And MST docking just support HDMI 1.4 spec. When

[Intel-gfx] [PATCH 0/2] drm/probe_helper, i915: Validate MST modes against PBN limits

2020-05-26 Thread Lyude Paul
Something we've been missing for a while with drivers that support MST is being able to prune modes that can't be set due to bandwidth limitations. So, let's go ahead and add that. This also adds a new hook that was needed, mode_valid_ctx, so that we can grab additional locks as needed when

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/selftests: Fix runtime PM imbalance on error

2020-05-26 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Fix runtime PM imbalance on error URL : https://patchwork.freedesktop.org/series/77667/ State : failure == Summary == Applying: drm/i915/selftests: Fix runtime PM imbalance on error Using index info to reconstruct a base tree... M

Re: [Intel-gfx] [PATCH 09/37] drm/i915: Add has_master_unit_irq flag

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: > From: Stuart Summers > > Add flag to differentiate platforms with and without the master > IRQ control bit. Reviewed-by: José Roberto de Souza > > Signed-off-by: Stuart Summers > Signed-off-by: Lucas De Marchi > --- >

Re: [Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Update inter-engine semaphore detection

2020-05-26 Thread Tvrtko Ursulin
On 26/05/2020 15:17, Chris Wilson wrote: The kernel no longer uses semaphores between engines, unless it can do so by preempting them with timeslices. Update the semaphore-busy to only run when we expect semaphore usage, i.e. not on bdw/bsw. Closes:

Re: [Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Update inter-engine semaphore detection

2020-05-26 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-05-26 16:58:05) > > On 26/05/2020 15:17, Chris Wilson wrote: > > The kernel no longer uses semaphores between engines, unless it can do > > so by preempting them with timeslices. Update the semaphore-busy to only > > run when we expect semaphore usage, i.e. not on

Re: [Intel-gfx] [PATCH 18/37] drm/i915/dg1: add support for the master unit interrupt

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: > DG1 has master unit interrupt register which is used to indicate the > correct source of interrupt. > Reviewed-by: José Roberto de Souza > Cc: Radhakrishna Sripada > Cc: Daniele Spurio Ceraolo > Cc: Matt Roper > Signed-off-by:

Re: [Intel-gfx] [PATCH 11/37] drm/i915/dg1: add initial DG-1 definitions

2020-05-26 Thread Souza, Jose
On Tue, 2020-05-26 at 10:51 -0700, Lucas De Marchi wrote: > On Tue, May 26, 2020 at 10:34:47AM -0700, Jose Souza wrote: > > On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: > > > From: Abdiel Janulgue > > > > > > Bspec: 33617, 33617 > > > > > > Cc: José Roberto de Souza > > > Cc:

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Do not schedule normal requests immediately along virtual

2020-05-26 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-05-26 17:00:06) > > On 26/05/2020 10:07, Chris Wilson wrote: > > When we push a virtual request onto the HW, we update the rq->engine to > > point to the physical engine. A request that is then submitted by the > > user that waits upon the virtual engine, but along

Re: [Intel-gfx] [PATCH 12/37] drm/i915/dg1: Add DG1 PCI IDs

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: > From: Abdiel Janulgue > > Bspec: 44463 Reviewed-by: José Roberto de Souza > > Cc: Matthew Auld > Cc: James Ausmus > Cc: Joonas Lahtinen > Cc: Matt Roper > Signed-off-by: Abdiel Janulgue > Signed-off-by: Lucas De Marchi > --- >

Re: [Intel-gfx] [PATCH 11/37] drm/i915/dg1: add initial DG-1 definitions

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: > From: Abdiel Janulgue > > Bspec: 33617, 33617 > > Cc: José Roberto de Souza > Cc: Daniele Ceraolo Spurio > Cc: Stuart Summers > Cc: Vanshidhar Konda > Cc: Lucas De Marchi > Cc: Aravind Iddamsetty > Cc: Matt Roper >

Re: [Intel-gfx] [PATCH 37/37] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:38 -0700, Lucas De Marchi wrote: > From: Anusha Srivatsa > > Bspec asks us to remove the special programming of the > SHPD_FILTER_CNT register which we have been doing since CNP+. > > Bspec: 49305 > Reviewed-by: José Roberto de Souza > Cc: Matt Roper >

Re: [Intel-gfx] [PATCH 11/37] drm/i915/dg1: add initial DG-1 definitions

2020-05-26 Thread Souza, Jose
On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote: > From: Abdiel Janulgue > > Bspec: 33617, 33617 > > Cc: José Roberto de Souza > Cc: Daniele Ceraolo Spurio > Cc: Stuart Summers > Cc: Vanshidhar Konda > Cc: Lucas De Marchi > Cc: Aravind Iddamsetty > Cc: Matt Roper >

Re: [Intel-gfx] [PATCH 35/37] drm/i915/dg1: Load DMC

2020-05-26 Thread Lucas De Marchi
On Tue, May 26, 2020 at 10:42:30AM -0700, Jose Souza wrote: On Wed, 2020-05-20 at 17:38 -0700, Lucas De Marchi wrote: From: Matt Atwood Add support to load DMC v2.0.2 on DG1 While we're at it, tweak the TGL and RKL firmware size definition to follow the convention used in previous platforms.

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/6] drm/i915/rkl: Disable PSR2

2020-05-26 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/rkl: Disable PSR2 URL : https://patchwork.freedesktop.org/series/77676/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8540_full -> Patchwork_17781_full

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Improve execute_cb struct packing

2020-05-26 Thread Mika Kuoppala
Chris Wilson writes: > Reduce the irq_work llist for attaching the callbacks to the signal for > both smaller structs (two fewer pointers!) and simpler [debug] code: > > Function old new delta > irq_execute_cb35 34

[Intel-gfx] [CI] drm/i915: Improve execute_cb struct packing

2020-05-26 Thread Chris Wilson
Reduce the irq_work llist for attaching the callbacks to the signal for both smaller structs (two fewer pointers!) and simpler [debug] code: Function old new delta irq_execute_cb35 34 -1

Re: [Intel-gfx] [PATCH 04/12] drm/i915/execlists: Shortcircuit queue_prio() for no internal levels

2020-05-26 Thread Mika Kuoppala
Chris Wilson writes: > If there are no internal levels and the user priority-shift is zero, we > can help the compiler eliminate some dead code: > > Function old new delta > start_timeslice 169 154 -15 >