the consistent error value from
drm_dev_init() and embed it in the pointer return value.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/i915_drv.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index
> > struct intel_device_info *device_info;
> > struct drm_i915_private *i915;
> > + int err;
> >
> > i915 = kzalloc(sizeof(*i915), GFP_KERNEL);
> > if (!i915)
> > return NULL;
>
> Ahem.
oh yes :)
Thanks,
Andi
the consistent error value from
drm_dev_init() and embed it in the pointer return value.
Signed-off-by: Andi Shyti
---
Hi,
I did forget in the version 1 to return -ENOMEM in case of
kzalloc failure. Thanks Chris!
Andi
drivers/gpu/drm/i915/i915_drv.c | 12 +++-
1 file changed, 7 insertions(+), 5
Hi Chris,
On Fri, Mar 08, 2019 at 06:11:27PM +, Chris Wilson wrote:
> To exercise the new I915_CONTEXT_PARAM_ENGINES and interactions with
> gem_execbuf().
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Andi Shyti
> ---
I received three times this patch,
Hi Chris,
just a nitpick, a warning that came out when I applied the
patches.
> struct i915_context_engines_load_balance balancer = {
> - { .name = I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE },
> + {
^
trailing whitespace
> +
Hi again,
I was thinking...
> +static void bonded(int i915, unsigned int flags)
> +#define CORK 0x1
> +{
> + struct class_instance *master_engines;
... shall we just make 'struct class_instance' generic in the
uapi? I do not expect every test that uses class and instance to
define its own
e {
> + igt_assert_eq(busy.busy, 0);
> + }
> +
(from the last review) this is not kernel style, not that I care
much, but I thought you did.
You can add Reviewed-by: Andi Shyti
Thanks,
Andi
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On Thu, Apr 11, 2019 at 02:40:45PM +0100, Chris Wilson wrote:
> Quoting Andi Shyti (2019-04-11 14:01:01)
> > On Thu, Apr 11, 2019 at 01:32:03PM +0100, Chris Wilson wrote:
> > > Quoting Tvrtko Ursulin (2019-04-11 13:26:54)
> > > > From: Andi Shyti
>
On Thu, Apr 11, 2019 at 01:32:03PM +0100, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-04-11 13:26:54)
> > From: Andi Shyti
> >
> > Replace the legacy for_each_engine* defines with the ones
> > implemented in the gem_engine_topology library.
>
rtko Ursulin
> Cc: Lionel Landwerlin
> Cc: Dmitry Rogozhkin
> Cc: Tony Ye
> Cc: Andi Shyti
I was looking forward to a similar patch, it was also my intention
to send a similar one.
Reviewed-by: Andi Shyti
Thanks,
Andi
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> > > +static void query_engines(void)
> > > +{
> > > + struct i915_engine_class_instance *engines;
> > > + unsigned int num;
> > > +
> > > + if (__engines_queried)
> > > + return;
> > > +
> > > + __engines_queried = true;
> > > +
> > > + if (!has_query(fd) || !has_engine_query(fd)) {
Hi Tvrtko,
> +static int
> +__i915_query(int i915, struct drm_i915_query *q)
> +{
> + if (igt_ioctl(i915, DRM_IOCTL_I915_QUERY, q))
> + return -errno;
> + return 0;
> +}
> +
> +static int
> +__i915_query_items(int i915, struct drm_i915_query_item *items, uint32_t
> n_items)
>
Hi Tvrtko,
> > > +static int
> > > +__i915_query(int i915, struct drm_i915_query *q)
> > > +{
> > > + if (igt_ioctl(i915, DRM_IOCTL_I915_QUERY, q))
> > > + return -errno;
> > > + return 0;
> > > +}
> > > +
> > > +static int
> > > +__i915_query_items(int i915, struct drm_i915_query_item
On Fri, May 17, 2019 at 12:25:25PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Instead of hardcoding the VCS balancing engines, discover, both with the
> new engines query, or with the legacy get_param in the fallback case, so
> class based addressing always works.
>
>
verything "but" what you say in the
commit log :)
>
> Reported-by: Petri Latvala
> Fixes: 17c77e7b0c3c ("lib/i915: add gem_engine_topology library and for_each
> loop definition")
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
> Cc: Petri Lat
Hi Tvrtko,
On Mon, May 20, 2019 at 03:47:34PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Test the new engine discovery query.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Andi Shyti
Thanks,
Andi
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Hi Tvrtko,
On Wed, May 22, 2019 at 04:04:13PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Use from_user_pointer when casting __u64 to a pointer.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Andi Shyti
Reviewed-by: Andi Sh
Hi Tvrtko,
On Wed, May 22, 2019 at 05:06:58PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Otherwise debug output looks messy when we trigger this.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Andi Shyti
Reviewed-by: Andi Sh
Chris didn't
like the boolean true/false meaning, indeed here I still check
with:
if ((flags & HANG) == 0) {
but then I forgot to update the test cases.
This means that this line needs to be
basic(i915, e, 0);
as the rest.
I'm sorry about the confusion! In any case,
R
> Signed-off-by: Tvrtko Ursulin
Acked-by: Andi Shyti
Thanks,
Andi
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Hi Tvrtko,
On Wed, May 22, 2019 at 02:14:17PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> This enables static test enumeration to see the engine.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Andi Shyti
Thanks,
Andi
__
> - if (!gem_class_can_store_dword(fd, e->class))
> + if (!gem_class_can_store_dword(fd, e2->class))
> continue;
ops!
Reviewed-by: Andi Shyti
Thanks,
Andi
> igt_debug("Testin
all engines can be addressed using the legacy
> execbuf API.)
>
> Instead extract the code into lower level __gem_class_instance_to_eb_flags
> helper which can return errors the caller can manually handle then.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Andi S
Hi Chris,
On Thu, May 23, 2019 at 09:06:49AM +0100, Chris Wilson wrote:
> We need to keep igt working on linus and dif, or Joonas gets very upset.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Andi Shyti
> Cc: Joonas Lahtinen
looks good.
Reviewed-by: Andi Sh
ng always works.
>
> v2:
> * Simplify has_engine_query check. (Andi)
> * Fix assert on uninitialized variable. (Andi)
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Andi Shyti
Thanks,
Andi
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Inte
signed int engine[16], e;
> - const char *name[16];
> + struct intel_engine_data engines = { };
> uint32_t contexts[65];
> - unsigned int nengine;
> int n, qlen;
>
> - nengine = 0;
> - for_each_physical_engine(fd, e) {
> - e
falling of 80 char so I tidied it alongside.
I'm not saying that this change is wrong, just that it's
out of the context of the patch and it should lay in a different
change (I'm not very strong in this case, though, but I've seen
such cases too many times in this list).
>
Hi Chris,
On Tue, Aug 13, 2019 at 07:20:12AM +0100, Chris Wilson wrote:
> Still trying to hit a deadlock with userptr from kcompatcd.
>
> Signed-off-by: Chris Wilson
This looks all right, as well.
Reveiwed-by: Andi Shyti
Andi
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not be run in fence order and fall back to submission
> order, we will time out waiting for our incremental results and trigger
> a few GPU hangs.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
> Signed-off-by: Chris Wils
Hi Chris,
On Tue, Aug 13, 2019 at 07:20:11AM +0100, Chris Wilson wrote:
> Trying to hit a deadlock for invalidating dirty userptr pages (via
> kcompactd).
>
> Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
Andi
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> Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
Andi
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scheduler, it
> is in order submission (and so the batch is after the main setup
> anyway!).
>
> Signed-off-by: Chris Wilson
looks straight forward to me.
Reviewed-by: Andi Shyti
Andi
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checking.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Acked-by: Andi Shyti
Andi
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Hi Chris,
On Sat, Aug 10, 2019 at 10:03:29AM +0100, Chris Wilson wrote:
> Check that the engine w/a persist after we performed a context switch
> and record those w/a into the default context state.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Acked-by: Andi Shyti
Hi Chris,
On Mon, Sep 02, 2019 at 05:15:43AM +0100, Chris Wilson wrote:
> Any use of __for_each_physical_engine breaks library use of
> for_each_physical_ring and in this case (e.g. gem_busy/close-race) leads
> to GPU hangs.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
&g
6384);
> + scratch = gem_create(i915, 64<<10);
I guess this is a leftover, right?
Reviewed-by: Andi Shyti
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Hi Chris,
> - num_threads = gem_available_fences(fd);
> + num_threads = gem_available_fences(fd) + 1;
any reason for this?
Andi
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Hi Chris,
just a few quick question from a first look,
> +/**
> + * __gem_context_set_persistence:
> + * @i915: open i915 drm file descriptor
> + * @ctx: i915 context id
> + * @state: desired persistence
> + *
> + * Like __gem_context_set_persistence(), except we assert on failure.
> + */
>
Refactor the GT power management interface to work through the GT now
that it is under the control of gt/
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt.c | 46
for the reduced mempressure (albeit we do not
> remove the swapping, the raison d'etre of the test), we increase the
> number of threads to force the system to reuse active fences, making it
> more stressful on the fence code.
Ah... OK :)
> Signed-off-by: Chris Wilson
> Cc: A
On Thu, Sep 05, 2019 at 02:34:55PM +0300, Mika Kuoppala wrote:
> From: Michel Thierry
>
> Gen12 has subtle changes in the reg state context offsets (some fields
> are gone, some are in a different location), compared to previous Gens.
>
> The simplest approach seems to be keeping Gen12 (and
On Thu, Sep 05, 2019 at 02:14:03PM +0300, Andi Shyti wrote:
> Refactor the GT power management interface to work through the GT now
> that it is under the control of gt/
>
> Based on a patch by Chris Wilson.
>
> Signed-off-by: Andi Shyti
> Cc: Chris Wilson
Reviewed-by
Refactor the GT power management interface to work through the GT now
that it is under the control of gt/
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt.c | 45
sometimes^W
> - * often trashed across a GPU reset! Instead we have to rely on
> - * guessing the missed context-switch events by looking at what
> - * requests were completed.
> - */
> - execlists_cancel_port_requests(execlists);
> -
why did this end up
Hi Chris,
> /**
> - * i915_gem_shrinker_register - Register the i915 shrinker
> + * i915_gem_driver_register__shrinker - Register the i915 shrinker
> * @i915: i915 device
> *
> * This function registers and sets up the i915 shrinker and OOM handler.
> */
> -void
ice to have _any_ change documented in the log. In any
case:
Reviewed-by: Andi Shyti
Andi
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Hi Chris,
On Tue, Jul 30, 2019 at 02:30:30PM +0100, Chris Wilson wrote:
> Use the same mechanism to determine if a backend engine exists for a
> uabi mapping as used internally.
Looks OK,
Reviewed-by: Andi Shyti
Andi
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Hi Chris,
On Tue, Jul 30, 2019 at 02:30:27PM +0100, Chris Wilson wrote:
> Push the ring creation flags from the outer GEM context to the inner
> intel_cotnext to avoid an unsightly back-reference from inside the
> backend.
>
> Signed-off-by: Chris Wilson
looks nice!
Reviewed
Hi Chris,
> static void i915_switcheroo_set_state(struct pci_dev *pdev, enum
> vga_switcheroo_state state)
> {
> - struct drm_device *dev = pci_get_drvdata(pdev);
> + struct drm_i915_private *i915 = pdev_to_i915(pdev);
> pm_message_t pmm = { .event = PM_EVENT_SUSPEND };
>
> +
Hi Chris,
On Tue, Jul 30, 2019 at 10:24:53PM +0100, Chris Wilson wrote:
> Check for viability of store-dword before use.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
Andi
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use i915 inside drv_get_drvdata()
> v3: Only expect i915 inside drv_get_drvdata() so drop the assumed
> i915/drm equivalence.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Reviewed-by: Andi Shyti
Thanks,
Andi
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In
em_context_is_banned(ctx))
> + return;
just a question, if a context is "banned", don't we want to check
on the requests anyway?
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
heartbeat? I like it :)
Reviewed-by: Andi Shyti
Thanks,
Andi
nce could
> be used be directly rather than via dirtying the fb with a dummyload.
>
> Signed-off-by: Chris Wilson
looks OK,
Reviewed-by: Andi Shyti
Andi
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Continuing the theme of breaking intel_pm.c up in a reasonable chunk of
powermanagement utilities, pull out the rc6 setup into its GT handler.
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm
On Wed, Sep 11, 2019 at 11:15:00AM +0100, Chris Wilson wrote:
> When using a spinner to trigger a hang, make it unpreemptable so that it
> appears like a true hang.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
> Signed-off-by: Chris Wilson
Reviewed-by: An
on
> Cc: Ville Syrjälä
Is Ville Cc'ed for real or just nominally?
looks straight forward,
Reviewed-by: Andi Shyti
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Hi Chris,
On Thu, Sep 26, 2019 at 02:10:06PM +0100, Chris Wilson wrote:
> Make it easier to discern in the noise of the module reload where each
> begins.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
thanks for this patch!
Acked-by: Andi Shyti
Andi
> ---
> tes
iggest part of the
patch)
- the mock-reset part (baskically the function)
right?
Andi
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 32 +--
&g
Hi Chris,
On Fri, Sep 27, 2019 at 08:14:43PM +0100, Chris Wilson wrote:
> If we are mocking the device, skip trying to sanitize the pm HW state.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
> ---
> drivers/gpu/drm/i915/gt/intel_gt_pm.c | 3 ++-
> 1 file change
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Thanks!
Reviewed-by: Andi Shyti
Andi
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On Fri, Sep 27, 2019 at 10:17:49PM +0100, Chris Wilson wrote:
> For those mock tests that may wish to pretend triggering a GPU reset and
> processing the cleanup.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
looks better! Thanks!
Reviewed-by: An
!
-1 (EPERM) is an error value as well, -ENODEV looks cleaner and
more appropriate, in any case:
Reviewed-by: Andi Shyti
Thanks,
Andi
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
> ---
> drivers/gpu/drm/i915/gt/intel_gt_pm.h| 2 +-
> drivers/gpu/drm/i915/self
ou are going to provide an fd
of "some sort" :)
Reveiwed-by: Andi Shyti
Thanks,
Andi
> + test_reset_stress(i915, 0);
> + test_reset_stress(i915, TEST_WEDGE);
> + }
>
> *shared = 1;
> igt_waitchildren();
___
Hi Chris,
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1186,6 +1186,21 @@ static void execlists_submit_ports(struct
> intel_engine_cs *engine)
> /* we need to manually load the submit queue */
> if (execlists->ctrl_reg)
>
ounter:
yes, makes sense! Thanks!
Acked-by: Andi Shyti
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and so must disable any HW access to dangling
> memory.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909
> Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
> Testcase: igt/gem_exec_suspend/power-S0
> Signed-off-by: Chris Wilson
>
; workaround.
>
> Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
> Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
> Cc: Chris Wilson
> Cc: Andi Shyti
> Signed-off-by: Imre Deak
Acked-by: Andi Shyti
Thanks,
Andi
_
Hi Chris,
On Fri, Nov 15, 2019 at 11:48:00AM +, Chris Wilson wrote:
> RC6 is tracked underneath the intel_gt, so use our local pointers.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Andi Shyti
Acked-by: Andi Shyti
ał Wajdeczko
> Cc: Andi Shyti
Acked-by: Andi Shyti
Andi
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e8e ("drm/i915: Defer rc6 shutdown to suspend_late")
> Cc: Andi Shyti
> Cc: Joonas Lahtinen
Reviewed-by: Andi Shyti
Thanks,
Andi
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interval.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
Hi,
in this RC6 test the live_rc6_threshold doesn't work, either
because I misinterpreted the concept, or the GPU I am using does
not support something or the code I am posting is junk. Either
way, ideas?
Thanks,
Andi
drivers/gpu/drm/i915
Hi Chris,
> > @@ -1633,21 +1633,11 @@ static int i915_rps_boost_info(struct seq_file *m,
> > void *data)
> > {
> > struct drm_i915_private *dev_priv = node_to_i915(m->private);
> > struct intel_rps *rps = _priv->gt.rps;
> > - u32 act_freq = rps->cur_freq;
> > + u32
Add two helpers that for reading the actual GT's frequency. The
two helpers are:
- intel_cagf_read: reads the frequency and returns it not
normalized
- intel_cagf_freq_read: provides the frequency in Hz.
Use the above helpers in sysfs and debugfs.
Signed-off-by: Andi Shyti
---
drivers
> > > }
> > > +
> > > +static bool test_rc6(struct intel_rc6 *rc6, bool enabled)
> >
> > I keep getting confused as to the meaning of the result, forgetting it
> > changes based on bool enabled.
> >
> > Maybe u32 measure_rc6() and leave the pass/fail to the caller?
thinking a bit better...
Hi Chris,
> > }
> > +
> > +static bool test_rc6(struct intel_rc6 *rc6, bool enabled)
>
> I keep getting confused as to the meaning of the result, forgetting it
> changes based on bool enabled.
>
> Maybe u32 measure_rc6() and leave the pass/fail to the caller?
yes, I was thinking the same, it
interval.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
Hi,
this is the first patche from the pm selftest series. Now it's
rebased on top of drm-tip.
Changelog:
* v1 -> v2:
- some changes from Chris (thank you!).
* v2 -> v3:
- rebased on top of the latest drm-tip
-
Hi Chris,
On Sat, Dec 07, 2019 at 06:29:37PM +, Chris Wilson wrote:
> Include all the number fields for describing the GT, as well as the
> current boolean flags, primarily for inclusion in error states.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Reviewed-by: Andi
From: Andi Shyti
Get rid of the last remaining I915_WRITEs and replace them with
intel_uncore_write().
Signed-off-by: Andi Shyti
---
.../gpu/drm/i915/gt/intel_ring_submission.c | 48 ++-
1 file changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
Hi Chris,
[...]
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 808eb327a29b..53e28e417cc9 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -187,21 +187,23 @@ int
> +
> + /* ppGTT is not part of the legacy context image */
> + if (gen6_ppgtt_pin(i915_vm_to_ppgtt(ce->vm)))
> + return true;
> +
> + return false;
looks correct, a bit tricky, but I don't see any issue.
Reviewed-by: Andi Shyti
Andi
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From: Andi Shyti
Hi,
this two patches are few debugfs improvements. The first adds
some helpers for reading the GT frequency, while the second patch
moves all the power management debufs functions into gt/
Thanks,
Andi
Andi Shyti (2):
drm/i915/rps: Add frequency translation helpers
drm
> > +int intel_gt_pm_debugfs_register(struct intel_gt *gt)
> > +{
> > + struct drm_minor *minor = gt->i915->drm.primary;
> > +
> > + return drm_debugfs_create_files(i915_gt_pm_debugfs_list,
> > + ARRAY_SIZE(i915_gt_pm_debugfs_list),
> > +
From: Andi Shyti
Add two helpers that for reading the actual GT's frequency. The
two helpers are:
- intel_cagf_read: reads the frequency and returns it not
normalized
- intel_cagf_freq_read: provides the frequency in Hz.
Use the above helpers in sysfs and debugfs.
Signed-off-by: Andi
From: Andi Shyti
rc6, rps and llc debugfs files are gt related, move them into the
gt directory.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 593 ++
drivers/gpu/drm/i915/gt
Hi Chris,
> > +int intel_gt_pm_debugfs_register(struct intel_gt *gt)
> > +{
> > + struct dentry *root = gt->debugfs_entry;
> > + int i;
> > +
> > + pr_info("ANDIII function start\n");
> > + if (unlikely(!root))
> > + return -ENODEV;
> > +
> > + for (i =
From: Andi Shyti
The GT system is becoming more and more a stand-alone system in
i915 and it's fair to assign it its own debugfs directory.
rc6, rps and llc debugfs files are gt related, move them into the
gt debugfs directory.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/Makefile
From: Andi Shyti
Hi,
this two patches are few debugfs improvements. The first adds
some helpers for reading the GT frequency, while the second patch
moves all the power management debufs functions into gt/
Thanks Chris for the reviews.
Thanks,
Andi
Changelog:
==
v2-v3: (v2:
https
From: Andi Shyti
Add two helpers that for reading the actual GT's frequency. The
two helpers are:
- intel_rps_read_cagf: reads the frequency and returns it not
normalized
- intel_rps_read_actual_frequency: provides the frequency in Hz.
Use the above helpers in sysfs and debugfs.
Signed
Hi Michal,
> > @@ -75,6 +75,8 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
> > # "Graphics Technology" (aka we talk to the gpu)
> > obj-y += gt/
> > gt-y += \
> > + gt/debugfs_gt.o \
> > + gt/debugfs_pm.o \
>
> hm, maybe this should be:
> gt/intel_gt_debugfs.o
> and
>
> > The GT system is becoming more and more a stand-alone system in
> > i915 and it's fair to assign it its own debugfs directory.
> >
> > rc6, rps and llc debugfs files are gt related, move them into the
> > gt debugfs directory.
> >
> > Signed-off-by
From: Andi Shyti
The GT system is becoming more and more a stand-alone system in
i915 and it's fair to assign it its own debugfs directory.
rc6, rps and llc debugfs files are gt related, move them into the
gt debugfs directory.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/Makefile
From: Andi Shyti
Hi,
this two patches are few debugfs improvements. The first adds
some helpers for reading the GT frequency, while the second patch
moves all the power management debufs functions into gt/
Thanks Chris for the reviews.
Thanks,
Andi
Changelog:
==
v3-v4: (v3:
https
From: Andi Shyti
Add two helpers that for reading the actual GT's frequency. The
two helpers are:
- intel_rps_read_cagf: reads the frequency and returns it not
normalized
- intel_rps_read_actual_frequency: provides the frequency in Hz.
Use the above helpers in sysfs and debugfs.
Signed
From: Andi Shyti
The GT system is becoming more and more a stand-alone system in
i915 and it's fair to assign it its own debugfs directory.
rc6, rps and llc debugfs files are gt related, move them into the
gt debugfs directory.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/Makefile
From: Andi Shyti
Hi,
this two patches are few debugfs improvements. The first adds
some helpers for reading the GT frequency, while the second patch
moves all the power management debufs functions into gt/
Thanks Chris and Michal for the reviews.
Thanks,
Andi
Changelog:
==
v4-v5: (v4
From: Andi Shyti
Add two helpers that for reading the actual GT's frequency. The
two helpers are:
- intel_rps_read_cagf: reads the frequency and returns it not
normalized
- intel_rps_read_actual_frequency: provides the frequency in Hz.
Use the above helpers in sysfs and debugfs.
Signed
reedesktop.org/drm/intel/issues/763
> Fixes: 730eaeb52426 ("drm/i915/gt: Manual rc6 entry upon parking")
> Testcase: igt/perf/rc6-disable
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
> Cc: Mika Kuoppala
> Cc: Imre Deak
> ---
> drivers/gpu/drm/i915/gt
From: Andi Shyti
Add two helpers that for reading the actual GT's frequency. The
two helpers are:
- intel_rps_read_cagf: reads the frequency and returns it not
normalized
- intel_rps_read_actual_frequency: provides the frequency in Hz.
Use the above helpers in sysfs and debugfs.
Signed
From: Andi Shyti
Hi,
this two patches are few debugfs improvements. The first adds
some helpers for reading the GT frequency, while the second patch
moves all the power management debufs functions into gt/
Thanks,
Andi
Changelog:
==
v1-v2:
- renamed functions from
From: Andi Shyti
The GT system is becoming more and more a stand-alone system in
i915 and it's fair to assign it its own debugfs directory.
rc6, rps and llc debugfs files are gt related, move them into the
gt debugfs directory.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/Makefile
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