-Original Message-
From: Vivi, Rodrigo
Sent: Friday, April 20, 2018 11:06 PM
To: Nagaraju, Vathsala
Cc: intel-gfx@lists.freedesktop.org; Pandiyan, Dhinakaran
Subject: Re: [PATCH] drm/i915/psr : Add psr1 live status
On Fri, Apr 20, 2018 at 03:06:03PM +0530, vathsala nagaraju wrote
;↵
Selection 0x01, "100 usec"↵
Selection 0x02, "2.5 msec"↵
Selection 0x03, "0 (Skip)"↵
EndList↵
Regards,
Vathsala
-Original Message-
From: Vivi, Rodrigo
Sent: Thursday, May 3, 2018 9:15 PM
To: Nagaraju, Vathsala
Cc: jani.nik...@linux
Selective update testing
play a video and check 0x60094 , (03, 06) will indicated that system
is in su state.
-Original Message-
From: Vivi, Rodrigo
Sent: Wednesday, March 28, 2018 3:07 AM
To: Pandiyan, Dhinakaran
Cc: Souza, Jose ; intel-gfx@lists.freedesktop.org;
Nagaraju
On 5/18/2018 3:01 PM, Jani Nikula wrote:
On Fri, 18 May 2018, vathsala nagaraju wrote:
From: Vathsala Nagaraju
For psr block #9, the vbt description has moved to options [0-3] for
TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt
structure. Since spec does not mention fr
On 5/22/2018 1:35 PM, Jani Nikula wrote:
On Tue, 22 May 2018, "Nagaraju, Vathsala" wrote:
On 5/18/2018 3:01 PM, Jani Nikula wrote:
On Fri, 18 May 2018, vathsala nagaraju wrote:
From: Vathsala Nagaraju
For psr block #9, the vbt description has moved to options [0-3] for
T
On 5/12/2018 1:21 AM, Dhinakaran Pandiyan wrote:
While touching the code around this, I noticed that absence of ALPM
capability does not stop us from enabling PSR2. But, the spec
unambiguously states that ALPM is required for PSR2 and so does this
commit that introduced this code
drm/i915/psr:
On 5/12/2018 1:21 AM, Dhinakaran Pandiyan wrote:
Ville noticed that we are unncessarily reading DPCD's after knowing
panel did not support PSR. Looks like this check that was present
earlier got removed unintentionally, let's put it back.
While we do this, add the PSR version number in the deb
On 5/12/2018 1:21 AM, Dhinakaran Pandiyan wrote:
intel_dp->psr_dpcd already has the required values.
Cc: Jose Roberto de Souza
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_psr.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
Reviewed-by: Vathsala N
On 5/23/2018 1:28 AM, Dhinakaran Pandiyan wrote:
On Tue, 2018-05-22 at 14:27 +0530, vathsala nagaraju wrote:
From: Vathsala Nagaraju
Prints live state of psr1.Extending the existing
PSR2 live state function to cover psr1.
Tested on KBL with psr2 and psr1 panel.
v2: rebase
v3: DK
Renam
On 5/23/2018 3:33 PM, Jani Nikula wrote:
On Wed, 23 May 2018, vathsala nagaraju wrote:
From: Vathsala Nagaraju
For psr block #9, the vbt description has moved to options [0-3] for
TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt
structure. Since spec does not mention fr
On 6/12/2018 2:30 PM, Jani Nikula wrote:
On Tue, 12 Jun 2018, vathsala nagaraju wrote:
From: Vathsala Nagaraju
Adds new psrwake options defined in the below table.
PlatformPSR wake options vbt version
KBL/CFL/WHL All
SKL All PV releases (Check for 203+ might help but
On 6/13/2018 11:10 PM, Dhinakaran Pandiyan wrote:
On Wed, 2018-06-13 at 10:32 -0700, Dhinakaran Pandiyan wrote:
On Wed, 2018-06-13 at 09:41 +0300, Jani Nikula wrote:
On Wed, 13 Jun 2018, "Nagaraju, Vathsala" wrote:
On 6/12/2018 2:30 PM, Jani Nikula wrote:
On Tue, 12 Jun 2018
On 6/13/2018 11:10 PM, Dhinakaran Pandiyan wrote:
On Wed, 2018-06-13 at 10:32 -0700, Dhinakaran Pandiyan wrote:
On Wed, 2018-06-13 at 09:41 +0300, Jani Nikula wrote:
On Wed, 13 Jun 2018, "Nagaraju, Vathsala" wrote:
On 6/12/2018 2:30 PM, Jani Nikula wrote:
On Tue, 12 Jun 2018
On 6/13/2018 11:10 PM, Dhinakaran Pandiyan wrote:
On Wed, 2018-06-13 at 10:32 -0700, Dhinakaran Pandiyan wrote:
On Wed, 2018-06-13 at 09:41 +0300, Jani Nikula wrote:
On Wed, 13 Jun 2018, "Nagaraju, Vathsala" wrote:
On 6/12/2018 2:30 PM, Jani Nikula wrote:
On Tue, 12 Jun 2018
kula, Jani
; Nagaraju, Vathsala
Cc: put...@chromium.org; intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/psr: Adds psrwake options for all platforms
On Thu, 2018-06-14 at 11:59 +0530, Nagaraju, Vathsala wrote:
>
> On 6/13/2018 11:10 PM, Dhinakaran Pandiyan wrote:
> >
Hi Shablin,
I will look In to it and provide the fix.
Regards,
Vathsala
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Yaroslav Shabalin
Sent: Tuesday, May 23, 2017 2:45 PM
To: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/psr: disable
Hi Yaroslav Shabalin,
This restriction is only for PSR2. Will provide the fix.
Regards,
Vathsala
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Yaroslav Shabalin
Sent: Tuesday, May 23, 2017 4:59 AM
To: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PAT
In DP V1.3 spec , Table 2-149 , page number-374 , for Register 0x2210 ,
bit 7:4 is reserved.
-Original Message-
From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
Sent: Friday, December 23, 2016 6:57 PM
To: Nagaraju, Vathsala ;
dri-de...@lists.freedesktop.org; intel-gfx
w_psr_setup_vsc(intel_dp);
}
If psr2_support=0 , then it calls hsw_psr_setup_vsc(intel_dp); {psr1 vsc setup)
If psr2_support=1 then it calls skl_psr_setup_su_vsc(intel_dp); (psr2 vsc setup)
Regards,
vathsala
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, January 6, 2
om: Vivi, Rodrigo
Sent: Friday, January 6, 2017 11:08 PM
To: Nagaraju, Vathsala
Cc: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
jim.br...@linux.intel.com; Patil, Deepti
Subject: Re: [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels
I was going to write the rv-b,
but s
Signed-off-by: Vatsala Nagaraju
It's Vathsala Nagaraju
Commit message: Removed byte swapping for csr firmware.
Commit message does not convey as to why the change was made. "This change is
needed as DMC firmware loading failed on skylake due byte swap done in the
driver"
-Original
memcpy(dmc_payload, &fw->data[readcount], dmc_header->fw_size);
dmc_header->fw_size is wrong.
This will result in 0's after 0x80734 location, results in system hang.
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Animesh Manna
Sent:
Hang is due to patch 18 not mmio access.
-Original Message-
From: Manna, Animesh
Sent: Sunday, July 26, 2015 12:31 AM
To: intel-gfx@lists.freedesktop.org
Cc: Manna, Animesh; Lespiau, Damien; Deak, Imre; Kamath, Sunil; Nagaraju,
Vathsala; Bhardwaj, Rajneesh
Subject: [PATCH 15/18] drm
intel-gfx@lists.freedesktop.org
Cc: Manna, Animesh; Vetter, Daniel; Lespiau, Damien; Deak, Imre; Kamath, Sunil;
Nagaraju, Vathsala
Subject: [SKL-DMC-BUGFIX 1/5] drm/i915/gen9: Removed byte swapping for csr
firmware
This patch contains the changes to remove the byte swapping logic introduced
wi
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