== Series Details == Series: series starting with [1/5] drm/i915/icl: Add reset control register changes (rev3) URL : https://patchwork.freedesktop.org/series/41214/ State : warning
== Summary == $ dim checkpatch origin/drm-tip 27c0b6b10865 drm/i915/icl: Add reset control register changes -:68: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #68: FILE: drivers/gpu/drm/i915/intel_uncore.c:1926: + unsigned engine_mask) total: 0 errors, 1 warnings, 0 checks, 93 lines checked 610cea61c2b7 drm/i915/icl: Use hw engine class, instance to find irq handler 9c914d23015b drm/i915/icl: Handle RPS interrupts correctly for Gen11 be4a43139251 drm/i915/icl: Deal with GT INT DW correctly -:84: WARNING:TYPO_SPELLING: 'succesfully' may be misspelled - perhaps 'successfully'? #84: FILE: drivers/gpu/drm/i915/i915_irq.c:269: + * to) recover from this succesfully, we need to clear total: 0 errors, 1 warnings, 0 checks, 157 lines checked 0472e52dace0 drm/i915/icl: Enable RC6 and RPS in Gen11 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
