Re: [Intel-gfx] [PATCH 17/40] drm/i915: Add chv cmnlane power wells

2014-07-28 Thread Ville Syrjälä
On Fri, Jul 25, 2014 at 02:55:00PM +0300, Imre Deak wrote: On Sat, 2014-06-28 at 02:04 +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com CHV has two display PHYs so there are also two cmnlane power wells. Add the approriate code to power the

Re: [Intel-gfx] [PATCH 17/40] drm/i915: Add chv cmnlane power wells

2014-07-25 Thread Imre Deak
On Sat, 2014-06-28 at 02:04 +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com CHV has two display PHYs so there are also two cmnlane power wells. Add the approriate code to power the wells up/down. Like on VLV we do the cmnreset assert/deassert