Hi,
We are unable to boot Acer Aspire E5-553G (AMD FX-9800P RADEON R7) nor
Acer Aspire E5-523 with standard configurations because during boot
the screen is flooded with the following error message over and over:
AMD-Vi: Completion-Wait loop timed out
We have left the system for quite a while
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Daniel Drake
> Sent: Monday, March 13, 2017 3:50 PM
> To: j...@8bytes.org
> Cc: Chris Chiu; iommu@lists.linux-foundation.org; Linux Upstreaming Team;
> amd-...@lists.freedesktop.org
>
On Mon, Mar 13, 2017 at 9:38 AM, wrote:
> Hi Rob,
>
> [..]
>
>
>> +static int qcom_iommu_init_domain(struct iommu_domain *domain,
>> + struct qcom_iommu_dev *qcom_iommu,
>> + struct iommu_fwspec *fwspec)
>>
Hi Robin,
On 13/03/2017 15:24, Robin Murphy wrote:
> On 13/03/17 13:08, Auger Eric wrote:
>> Hi Robin,
>>
>> On 09/03/2017 20:50, Robin Murphy wrote:
>>> Whilst it doesn't matter much to VFIO at the moment, when parsing
>>> reserved regions on the host side we really needs to be able to tell
>>
On 13/03/17 13:08, Auger Eric wrote:
> Hi Robin,
>
> On 09/03/2017 20:50, Robin Murphy wrote:
>> Whilst it doesn't matter much to VFIO at the moment, when parsing
>> reserved regions on the host side we really needs to be able to tell
> s/needs/need
Oops!
>> the difference between the
Hi Eric,
On 13/03/17 13:07, Auger Eric wrote:
> Hi Robin,
>
> On 09/03/2017 20:50, Robin Murphy wrote:
>> Now that it's simple to discover the necessary reservations for a given
>> device/IOMMU combination, let's wire up the appropriate handling. Basic
>> reserved regions and direct-mapped
Hi Robin,
On 09/03/2017 20:50, Robin Murphy wrote:
> Whilst it doesn't matter much to VFIO at the moment, when parsing
> reserved regions on the host side we really needs to be able to tell
s/needs/need
> the difference between the software-reserved region used to map MSIs
> translated by an
Hi,
On 09/03/2017 20:50, Robin Murphy wrote:
> Even if a host controller's CPU-side MMIO windows into PCI I/O space do
> happen to leak into PCI memory space such that it might treat them as
> peer addresses, trying to reserve the corresponding I/O space addresses
> doesn't do anything to help
Hi Robin,
On 09/03/2017 20:50, Robin Murphy wrote:
> Now that it's simple to discover the necessary reservations for a given
> device/IOMMU combination, let's wire up the appropriate handling. Basic
> reserved regions and direct-mapped regions are obvious enough to handle;
> hardware MSI regions
On 13/03/17 10:39, Robert Richter wrote:
> Firmware is responsible for properly enabling smmu workarounds. Print
> a message for better diagnostics when Cavium erratum 27704 was
> detected.
The wording there could possibly be misinterpreted as the firmware
actively having to do something to the
Hi Robin,
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: Thursday, March 09, 2017 7:51 PM
> To: j...@8bytes.org
> Cc: iommu@lists.linux-foundation.org; will.dea...@arm.com;
> marc.zyng...@arm.com; Gabriele Paoloni; John Garry; Shameerali Kolothum
> Thodi;
Firmware is responsible for properly enabling smmu workarounds. Print
a message for better diagnostics when Cavium erratum 27704 was
detected.
Signed-off-by: Robert Richter
---
drivers/iommu/arm-smmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git
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