On Fri, Sep 20, 2019 at 08:07:38AM +0800, Guo Ren wrote:
> On Thu, Sep 19, 2019 at 11:18 PM Jean-Philippe Brucker
> wrote:
>
> >
> > The SMMU does support PCI Virtual Function - an hypervisor can assign a
> > VF to a guest, and let that guest partition the VF into smaller contexts
> > by using
On Thu, Sep 19, 2019 at 11:18 PM Jean-Philippe Brucker
wrote:
>
> The SMMU does support PCI Virtual Function - an hypervisor can assign a
> VF to a guest, and let that guest partition the VF into smaller contexts
> by using PASID. What it can't support is assigning partitions of a PCI
>
On Thu, Sep 19, 2019 at 09:07:15PM +0800, Guo Ren wrote:
> > The solution I had to this problem is pinning the ASID [1] used by the
> > IOMMU, to prevent the CPU from recycling the ASID on rollover. This way
> > the CPU doesn't have to wait for IOMMU invalidations to complete, when
> > scheduling
Hi,
On Tue, Sep 17, 2019 at 11:42 AM Anup Patel wrote:
> >
> > With a reply stating that the patch "absolutely does not work" ;)
>
> This patch was tested on existing HW (which does not have ASID implementation)
> and tested on QEMU (which has very simplistic Implementation of ASID).
>
> When I
Hi,
On Mon, Sep 16, 2019 at 8:57 PM Jean-Philippe Brucker
wrote:
> On 13/09/2019 09:13, Guo Ren wrote:
> > Another idea is seperate remote TLB invalidate into two instructions:
> >
> > - sfence.vma.b.asyc
> > - sfence.vma.b.barrier // wait all async TLB invalidate operations
> > finished for
; christoffer.d...@arm.com; linux-
> ri...@lists.infradead.org; kvm...@lists.cs.columbia.edu; linux-arm-
> ker...@lists.infradead.org; iommu@lists.linux-foundation.org
> Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a
> separate file
>
> O
gt; r...@linux.ibm.com; Christoph Hellwig ; Atish Patra
> ; julien.gr...@arm.com; g...@garyguo.net; Paul
> Walmsley ; christoffer.d...@arm.com; linux-
> ri...@lists.infradead.org; kvm...@lists.cs.columbia.edu; linux-arm-
> ker...@lists.infradead.org; iommu@lists.linux-foundation.org
> r...@linux.ibm.com; Christoph Hellwig ; Atish Patra
> > ; julien.gr...@arm.com; g...@garyguo.net; Paul
> > Walmsley ; christoffer.d...@arm.com; linux-
> > ri...@lists.infradead.org; kvm...@lists.cs.columbia.edu; linux-arm-
> > ker...@lists.infradead.org; iommu@l
Hi,
On 13/09/2019 09:13, Guo Ren wrote:
> Another idea is seperate remote TLB invalidate into two instructions:
>
> - sfence.vma.b.asyc
> - sfence.vma.b.barrier // wait all async TLB invalidate operations
> finished for all harts.
It's not clear to me how this helps, but I probably don't have
; christoffer.d...@arm.com; linux-
> ri...@lists.infradead.org; kvm...@lists.cs.columbia.edu; linux-arm-
> ker...@lists.infradead.org; iommu@lists.linux-foundation.org
> Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a
> separate file
>
> On Thu, 12 Sep 2019 07:
On Thu, 12 Sep 2019 07:02:56 PDT (-0700), w...@kernel.org wrote:
On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
On Mon, Jun 24, 2019 at 6:40 PM Will Deacon wrote:
> > I'll keep my system use the same ASID for SMP + IOMMU :P
>
> You will want a separate allocator for that:
>
>
Here is the presentation, any comments is welcome.
https://docs.google.com/presentation/d/1sc295JznVAfDIPieAqzjcyUkcHnNFQsK8FFqdoCY854/edit?usp=sharing
On Fri, Sep 13, 2019 at 3:13 PM Guo Ren wrote:
>
> Another idea is seperate remote TLB invalidate into two instructions:
>
> -
Another idea is seperate remote TLB invalidate into two instructions:
- sfence.vma.b.asyc
- sfence.vma.b.barrier // wait all async TLB invalidate operations
finished for all harts.
(I remember who mentioned me separate them into two instructions after
session. Anup? Is the idea right ?)
Thx Will for reply.
On Thu, Sep 12, 2019 at 3:03 PM Will Deacon wrote:
>
> On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
> > On Mon, Jun 24, 2019 at 6:40 PM Will Deacon wrote:
> > > > I'll keep my system use the same ASID for SMP + IOMMU :P
> > >
> > > You will want a separate
On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
> On Mon, Jun 24, 2019 at 6:40 PM Will Deacon wrote:
> > > I'll keep my system use the same ASID for SMP + IOMMU :P
> >
> > You will want a separate allocator for that:
> >
> >
Thx Will,
On Mon, Jun 24, 2019 at 6:40 PM Will Deacon wrote:
> > I'll keep my system use the same ASID for SMP + IOMMU :P
>
> You will want a separate allocator for that:
>
> https://lkml.kernel.org/r/20190610184714.6786-2-jean-philippe.bruc...@arm.com
Yes, it is hard to maintain ASID between
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