[PATCH -next] iommu/tegra-smmu: Fix return value check in tegra_smmu_group_get()

2017-12-19 Thread Wei Yongjun
In case of error, the function iommu_group_alloc() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: 7f4c9176f760 ("iommu/tegra: Allow devices to be grouped") Signed-off-by: Wei Yongjun ---

Re: [PATCH v4 0/5] Add Intel IOMMU debugfs support

2017-12-19 Thread Mehta, Sohil
On Tue, 2017-12-19 at 23:25 +0200, Andy Shevchenko wrote: >  > Perhaps you need to switch to SPDX license pointer. > I dunno if Thomas' patch with documentation how to do this made > upstream >  / linux-next yet. > Thanks. I found the information at https://patchwork.kernel.org/patch/1 0091607/. 

Re: [PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping

2017-12-19 Thread Mehta, Sohil
On Tue, 2017-12-19 at 23:30 +0200, Andy Shevchenko wrote: > On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote: > > > > Debugfs extension for Intel IOMMU to dump Interrupt remapping table > > entries for Interrupt remapping and Interrupt posting. > > > > The file

[PATCH V2] iommu/amd - Set the device table entry PPR bit for IOMMU V2 devices

2017-12-19 Thread Gary R Hook
The AMD IOMMU specification Rev 3.00 (December 2016) introduces a new Enhanced PPR Handling Support (EPHSup) bit in the MMIO register offset 0030h (IOMMU Extended Feature Register). When EPHSup=1, the IOMMU hardware requires the PPR bit of the device table entry (DTE) to be set in order to

Re: [PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping

2017-12-19 Thread Andy Shevchenko
On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote: > Debugfs extension for Intel IOMMU to dump Interrupt remapping table > entries for Interrupt remapping and Interrupt posting. > > The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides > detailed information, such as Index,

Re: [PATCH v4 0/5] Add Intel IOMMU debugfs support

2017-12-19 Thread Andy Shevchenko
On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote: > Hi All, > > This series aims to add debugfs support for Intel IOMMU. It exposes > IOMMU > registers, internal context and dumps individual table entries to help > debug > Intel IOMMUs. > > The first patch does the ground work for the

[PATCH v4 1/5] iommu/vt-d: Add debugfs support for Intel IOMMU internals

2017-12-19 Thread Sohil Mehta
From: Gayatri Kammela Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs Cc: Sohil Mehta Cc: Fenghua Yu Cc: Ashok Raj Signed-off-by: Jacob Pan

[PATCH v4 3/5] iommu/vt-d: Add debugfs support to show register contents

2017-12-19 Thread Sohil Mehta
From: Gayatri Kammela Debugfs extension to dump all the register contents for each IOMMU device to the user space via debugfs. example: root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset DMAR: dmar1: reg_base_addr fed9 Name Offset

[PATCH v4 2/5] iommu/vt-d: Add debugfs support to show context internals

2017-12-19 Thread Sohil Mehta
From: Gayatri Kammela IOMMU internals states such as root and context can be exported to the userspace. Example of such dump in Kabylake: root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/dmar_translation_struct IOMMU dmar0: Extended Root Table Addr:402b9e800

[PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping

2017-12-19 Thread Sohil Mehta
Debugfs extension for Intel IOMMU to dump Interrupt remapping table entries for Interrupt remapping and Interrupt posting. The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides detailed information, such as Index, Source Id, Destination Id, Vector and the raw values for entries

[PATCH v4 4/5] iommu/vt-d: Add debugfs support to show Pasid table contents

2017-12-19 Thread Sohil Mehta
From: Gayatri Kammela Debugfs extension to dump the internals such as pasid table entries for each IOMMU to the userspace. Example of such dump in Kabylake: root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/dmar_translation_struct IOMMU dmar0: Extended Root

Re: [PATCH V1 1/1] iommu: Make sure device's ID array elements are unique

2017-12-19 Thread Alex Williamson
On Tue, 19 Dec 2017 16:20:21 +0100 Tomasz Nowicki wrote: > While iterating over DMA aliases for a PCI device, for some rare cases > (i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child > device. In turn, the same ID may get registered

Re: [PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-19 Thread Robin Murphy
Hi Tomasz, On 19/12/17 15:13, Tomasz Nowicki wrote: Here is my lspci output of ThunderX2 for which I am observing kernel panic coming from SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live): # lspci -vt -[:00]-+-00.0-[01-1f]--+ [...] + [...]

[PATCH V1 1/1] iommu: Make sure device's ID array elements are unique

2017-12-19 Thread Tomasz Nowicki
While iterating over DMA aliases for a PCI device, for some rare cases (i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child device. In turn, the same ID may get registered for a device multiple times. Eventually IOMMU driver may try to configure the same ID within domain

[PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-19 Thread Tomasz Nowicki
Here is my lspci output of ThunderX2 for which I am observing kernel panic coming from SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live): # lspci -vt -[:00]-+-00.0-[01-1f]--+ [...] + [...]