Turn all stream mappings marked as valid into BYPASS. This allows the
platform specific implementation to configure stream mappings to match
the boot loader's configuration for e.g. display to continue to function
through the reset of the SMMU.
Suggested-by: Robin Murphy
Signed-off-by: Bjorn
translation.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm-smmu-qcom.c | 21 +
drivers/iommu/arm-smmu.c | 14 --
drivers/iommu/arm-smmu.h | 3 +++
3 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers
to allow booting SDM845, SDM850, SM8150,
SM8250 with boot splash screen setup by the bootloader. Specifically it also
allows the Lenovo Yoga C630 to boot with SMMU and efifb enabled.
Bjorn Andersson (5):
iommu/arm-smmu: Make all valid stream mappings BYPASS
iommu/arm-smmu: Emulate bypass
context bank is used and
streams are diverted here during initialization.
This also performs the readback of SMR registers for the Qualcomm
platform, to trigger the mechanism.
This is based on prior work by Thierry Reding and Laurentiu Tudor.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm-smmu
On Fri 03 Jul 05:31 PDT 2020, Will Deacon wrote:
> On Tue, Jun 09, 2020 at 03:40:18PM -0400, Jonathan Marek wrote:
> > Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
> >
> > Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
> > few changes. Notably, the
On Tue 09 Jun 12:40 PDT 2020, Jonathan Marek wrote:
> Use the qcom implementation for IOMMU hardware on sm8150 and sm8250 SoCs.
>
> Signed-off-by: Jonathan Marek
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm-smmu-impl.c | 4 +++-
> 1 file changed,
On Sat 04 Jul 06:09 PDT 2020, Will Deacon wrote:
> [Adding Bjorn, Jordan and John because I really don't want a bunch of
> different ways to tell the driver that the firmware is screwing things up]
>
Thanks Will.
> On Sat, Jul 04, 2020 at 02:28:09PM +0200, Konrad Dybcio wrote:
> > This adds
On Wed 03 Jun 04:00 PDT 2020, Robin Murphy wrote:
> On 2020-06-02 07:32, Bjorn Andersson wrote:
> > On Wed 27 May 04:03 PDT 2020, Will Deacon wrote:
> >
> > > Hi John, Bjorn,
> > >
> > > On Tue, May 26, 2020 at 01:34:45PM -0700, John Stultz wrote:
>
SCM || QCOM_SCM=n" on all
entries in the Kconfig that selects PINCTRL_MSM, or switch PINCTRL_MSM
to be user selectable and make all the others depend on it.
> Cc: Andy Gross
> Cc: Bjorn Andersson
> Cc: Joerg Roedel
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc
On Wed 03 Jun 03:24 PDT 2020, Thierry Reding wrote:
> On Tue, Jun 02, 2020 at 12:32:49PM -0700, Bjorn Andersson wrote:
> > On Tue 02 Jun 04:02 PDT 2020, Thierry Reding wrote:
> >
> > > On Wed, May 27, 2020 at 12:03:44PM +0100, Will Deacon wrote:
> > > > Hi
On Wed 03 Jun 04:11 PDT 2020, Will Deacon wrote:
> On Mon, Jun 01, 2020 at 11:32:10PM -0700, Bjorn Andersson wrote:
> > On Wed 27 May 04:03 PDT 2020, Will Deacon wrote:
> >
> > > Hi John, Bjorn,
> > >
> > > On Tue, May 26, 2020 at 01:34:45PM -0700,
>
> > > > On Thu 27 Feb 18:57 PST 2020, Bjorn Andersson wrote:
> > > >
> > > > Rob, Will, we're reaching the point where upstream has enough
> > > > functionality that this is becoming a critical issue for us.
> > > >
> > >
On Wed 27 May 04:03 PDT 2020, Will Deacon wrote:
> Hi John, Bjorn,
>
> On Tue, May 26, 2020 at 01:34:45PM -0700, John Stultz wrote:
> > On Thu, May 14, 2020 at 12:34 PM wrote:
> > >
> > > On Thu 27 Feb 18:57 PST 2020, Bjorn Andersson wrote:
> > >
>
tional clock, so that platforms that have this
> clock can pass it over DT.
>
> While adding the third clock, let's switch to bulk clk API to simplify
> the enable/disable calls. clk_bulk_get() cannot used because the
> existing two clocks are required while the new one is optio
On Thu 27 Feb 18:57 PST 2020, Bjorn Andersson wrote:
Rob, Will, we're reaching the point where upstream has enough
functionality that this is becoming a critical issue for us.
E.g. Lenovo Yoga C630 is lacking this and a single dts patch to boot
mainline with display, GPU, WiFi and audio working
On Thu 14 May 07:39 PDT 2020, Shawn Guo wrote:
> Hi Bjorn,
>
> On Mon, May 11, 2020 at 10:52:42PM -0700, Bjorn Andersson wrote:
> > On Sat 09 May 06:08 PDT 2020, Shawn Guo wrote:
> >
> > > On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> &
On Sat 09 May 06:08 PDT 2020, Shawn Guo wrote:
> On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> will not be correctly reflected, causing the system to go into a bad
> state. Add it as an optional
On Mon 11 May 19:17 PDT 2020, Samuel Zou wrote:
> Fix the following sparse warning:
>
> drivers/iommu/msm_iommu.c:37:1: warning: symbol 'msm_iommu_lock' was not
> declared.
>
> The msm_iommu_lock has only call site within msm_iommu.c
> It should be static
>
Revi
programming the modem SIDs to the
> kernel. Let's add compatibles here so that we can have the kernel
> program the SIDs for the modem in these cases.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Sibi Sankar
> ---
>
> V6
> * Rebased on Will's fo
On Sat 18 Apr 06:47 PDT 2020, Tang Bin wrote:
> The function qcom_iommu_device_probe() does not perform sufficient
> error checking after executing devm_ioremap_resource(), which can
> result in crashes if a critical error path is encountered.
>
Thanks, that's much better.
Review
On Wed 01 Apr 23:33 PDT 2020, Tang Bin wrote:
> Release resources when exiting on error.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Tang Bin
> ---
> drivers/iommu/qcom_iommu.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> di
On Mon 09 Dec 07:07 PST 2019, Thierry Reding wrote:
> From: Thierry Reding
>
Sorry for the slow response on this, finally got the time to go through
this in detail and try it out on some Qualcomm boards.
> On some platforms, the firmware will setup hardware to read from a given
> region of
on. Also add SC7180 SMMU
> compatible for calling into QCOM specific implementation.
>
> Signed-off-by: Sai Prakash Ranjan
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm-smmu-impl.c | 8 +---
> drivers/iommu/arm-smmu-qcom.c | 16 +---
>
On Mon 13 Jan 14:01 PST 2020, Saravana Kannan wrote:
> I added everyone from the other thread, but somehow managed to miss
> the Bjorn who sent the emails! Fixing that now.
>
Thanks for looping me in Saravana.
> On Mon, Jan 13, 2020 at 6:07 AM Thierry Reding
> wrote:
> >
> > On Fri, Jan 10,
Move the arm_smmu_s2cr and arm_smmu_smr structs to the internal header
file, in order to expose them to the platform specific arm-smmu
implementations.
Signed-off-by: Bjorn Andersson
---
Changes since RFC:
- New patch
drivers/iommu/arm-smmu.c | 14 --
drivers/iommu/arm-smmu.h | 14
then involves the
rebase and migration of the read-back code to the Qualcomm specific
implementation, the mapping is maintained indefinitely - to handle probe
deferring clients - and rewritten commit messages.
[1]
https://lore.kernel.org/linux-arm-msm/20190605210856.20677-1-bjorn.anders...@linaro.org/
Bjorn
the code to the Qualcomm implementation for reading out the
stream mapping from the bootloader, with the result of maintaining the
display hardware's access to DDR until the context bank is enabled.
Heavily based on downstream implementation by Patrick Daly
.
Signed-off-by: Bjorn Andersson
---
Changes
With the SMRs inherited from the bootloader the first SMR might actually
be valid and in use. As such probing the SMR mask using the first SMR
might break a stream in use. Search for an unused stream and use this to
probe the SMR mask.
Signed-off-by: Bjorn Andersson
---
Changes since RFC
t; > > > comment
> > > > on this.
> > >
> > > The rumors of my demise have been greatly exaggerated. All kidding
> > > aside, I
> > > ack'ed both. Bjorn will indeed be coming on as a co-maintener at some
> > > point.
> >
ime dd if=/dev/sda of=/dev/zero bs=1048576 count=300 conv=sync
> 300+0 records in
> 300+0 records out
> 314572800 bytes (300.0MB) copied, 1.030541 seconds, 291.1MB/s
> real 0m 1.03s
> user0m 0.00s
> sys 0m 0.54s
>
> Signed-off-by: Vivek Gautam
> Reviewed-by: R
On Tue 01 Oct 15:01 PDT 2019, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> Some Qualcomm Family-B SoCs have got a different version of the QCOM
> IOMMU, specifically v2 and 500, which perfectly adhere to the current
> qcom_iommu driver, but need some variations due to
On Tue 17 Sep 02:45 PDT 2019, Sai Prakash Ranjan wrote:
> From: Vivek Gautam
>
> Add reset hook for sdm845 based platforms to turn off
> the wait-for-safe sequence.
>
> Understanding how wait-for-safe logic affects USB and UFS performance
> on MTP845 and DB845 boards:
>
> Qcom's
; can remove the dma_declare_coherent_memory export and prevent other
> drivers from "accidentally" using it like remoteproc. Note that the
> driver would also leak the declared coherent memory on unload if it
> actually was built as a module at the moment.
>
> Signed-off-by: C
On Sun 11 Aug 09:08 PDT 2019, Vivek Gautam wrote:
> On Tue, Aug 6, 2019 at 3:56 AM Bjorn Andersson
> wrote:
> >
> > On Wed 12 Jun 00:15 PDT 2019, Vivek Gautam wrote:
> >
> > > Indicate on MTP SDM845 that firmware implements handler to
> > > TLB inval
8191b38ef086274943f353ea7")
> > >
> > > Signed-off-by: Vivek Gautam
> > > Reviewed-by: Bjorn Andersson
> > > ---
> > > drivers/firmware/qcom_scm-64.c | 136
> > > -
> > > 1 file changed, 92
On Wed 12 Jun 00:15 PDT 2019, Vivek Gautam wrote:
> Indicate on MTP SDM845 that firmware implements handler to
> TLB invalidate erratum SCM call where SAFE sequence is toggled
> to achieve optimum performance on real-time clients, such as
> display and camera.
>
> Signed-off-by: Vivek Gautam
>
On Mon 01 Apr 08:40 PDT 2019, Marc Gonzalez wrote:
> The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
> (*) Aggregate Network-on-Chip #1
>
> Based on the following DTS downstream:
>
f-by: Vivek Gautam
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 78ec373a2b18..6a73d9744a71 100644
>
mu-500")
> &&
> + smmu->options & ARM_SMMU_OPT_QCOM_FW_IMPL_SAFE_ERRATA) {
> + err = qcom_scm_qsmmu500_wait_safe_toggle(0);
> + if (err)
> + dev_warn(dev, "Failed to turn off SAFE logic\n");
> +
On Thu 13 Jun 04:23 PDT 2019, Robin Murphy wrote:
> On 05/06/2019 22:08, Bjorn Andersson wrote:
> > Boot splash screen or EFI framebuffer requires the display hardware to
> > operate while the Linux iommu driver probes. Therefore, we cannot simply
> > wipe out the SMR registe
On Wed 12 Jun 11:07 PDT 2019, Jeffrey Hugo wrote:
> On Wed, Jun 5, 2019 at 3:09 PM Bjorn Andersson
> wrote:
> >
> > Boot splash screen or EFI framebuffer requires the display hardware to
> > operate while the Linux iommu driver probes. Therefore, we cannot simply
>
On Wed 12 Jun 10:58 PDT 2019, Jeffrey Hugo wrote:
> On Wed, Jun 5, 2019 at 3:09 PM Bjorn Andersson
> wrote:
> >
> > With the SMRs inherited from the bootloader the first SMR might actually
> > be valid and in use. As such probing the SMR mask using the first SMR
> &g
With the SMRs inherited from the bootloader the first SMR might actually
be valid and in use. As such probing the SMR mask using the first SMR
might break a stream in use. Search for an unused stream and use this to
probe the SMR mask.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm-smmu.c
they are associated with. Reserve these context banks for the
first Linux device whose stream-id matches the SMR register.
Any existing page-tables will be discarded.
Heavily based on downstream implementation by Patrick Daly
.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm-smmu-regs.h | 2
,
writes to the SMR registers are ignored. But as we inherit the preconfigured
mapping from the bootloader we can use the arm-smmu driver on these platforms.
Bjorn Andersson (2):
iommu: arm-smmu: Handoff SMR registers and context banks
iommu: arm-smmu: Don't blindly use first SMR to calculate mask
On Wed 15 May 23:47 PDT 2019, Vivek Gautam wrote:
> On Thu, May 16, 2019 at 5:03 AM Bjorn Andersson
> wrote:
> >
> > Describe the memory related to page table walks as non-cachable for iommu
> > instances that are not DMA coherent.
> >
> > Signed-off-by: B
Describe the memory related to page table walks as non-cachable for iommu
instances that are not DMA coherent.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/io-pgtable-arm.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm.c b
> dev_err_ratelimited(smmu->dev,
> - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n",
> - fsr, iova, fsynr, cfg->cbndx);
> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra
>
t;
> Signed-off-by: Vivek Gautam
Tested-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm-smmu-regs.h | 2 +
> drivers/iommu/arm-smmu.c | 133
> +-
> 2 files changed, 133 insertions(+), 2 deletions(-)
>
> diff --g
Signed-off-by: Vivek Gautam
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/firmware/qcom_scm-32.c | 5 +
> drivers/firmware/qcom_scm-64.c | 13 +
> drivers/firmware/qcom_scm.c| 6 ++
> drivers/firmware/qcom_scm.h| 5 +
> incl
On Sun 09 Sep 23:25 PDT 2018, Vivek Gautam wrote:
> Add atomic versions of qcom_scm_io_readl/writel to enable
> reading/writing secure registers from atomic context.
>
> Signed-off-by: Vivek Gautam
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/firmware/
tree/drivers/iommu/arm-smmu.c?h=msm-4.9#n4842")
>
> Signed-off-by: Vivek Gautam
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/firmware/qcom_scm-64.c | 136
> -
> 1 file changed, 92 insertions(+), 44 deletions(-)
>
On Tue 08 Jan 03:18 PST 2019, Vivek Gautam wrote:
>
> On 1/8/2019 12:29 PM, Bjorn Andersson wrote:
> > On Thu 11 Oct 02:49 PDT 2018, Vivek Gautam wrote:
> >
> > > Add device node for arm,mmu-500 available on sdm845.
> > > This MMU-500 with sing
On Thu 11 Oct 02:49 PDT 2018, Vivek Gautam wrote:
> Add device node for arm,mmu-500 available on sdm845.
> This MMU-500 with single TCU and multiple TBU architecture
> is shared among all the peripherals except gpu.
>
Hi Vivek,
Applying this patch together with UFS ([1] and [2]) ontop of
On Fri, Mar 2, 2018 at 8:59 AM, Robin Murphy wrote:
> On 02/03/18 14:55, srinivas.kandaga...@linaro.org wrote:
>>
>> From: Srinivas Kandagatla
>>
>> On Qualcomm SoCs, ADSP exposes many functions like audio and
>> others. These services need
On Fri 02 Mar 08:14 PST 2018, Robin Murphy wrote:
> On 02/03/18 14:55, srinivas.kandaga...@linaro.org wrote:
> > From: Srinivas Kandagatla
> >
> > Many of the rpmsg clients like audio drivers need to allocate
> > dma memory. Make this bus DMA capable so that the
Signed-off-by: Geert Uytterhoeven <ge...@linux-m68k.org>
> Reviewed-by: Mark Brown <broo...@kernel.org>
> Acked-by: Robin Murphy <robin.mur...@arm.com>
Acked-by: Bjorn Andersson <bjorn.anders...@linaro.org>
Regards,
Bjorn
> ---
> v2:
> - Add Reviewed-by, A
ode to use the synchronized
> functions so that it will behave as before.
>
> Cc: Ohad Ben-Cohen <o...@wizery.com>
> Cc: Bjorn Andersson <bjorn.anders...@linaro.org>
> Cc: linux-remotep...@vger.kernel.org
> Signed-off-by: Joerg Roedel <jroe...@suse.de>
Acked-by:
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