Hi Linus,
The following changes since commit d8768d7eb9c21ef928adb93402d9348bcc4a6915:
Merge branches 'apple/dart', 'arm/smmu', 'iommu/fixes', 'x86/amd', 'x86/vt-d'
and 'core' into next (2021-08-20 17:14:35 +0200)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/k
:
https://lore.kernel.org/r/20210820202957.187572-3-suravee.suthikulpa...@amd.com
Fixes: 8bda0cfbdc1a ("iommu/amd: Detect and initialize guest vAPIC log")
Signed-off-by: Joerg Roedel
---
drivers/iommu/amd/init.c | 31 ---
1 file changed, 24 insertions(+), 7
On Wed, Sep 08, 2021 at 09:47:03AM -0700, Linus Torvalds wrote:
> I'm assuming I'll get it through the iommu tree eventually (no need to
> expedite this)
Yes, I just applied it along with a couple of other fixes to the iommu
tree and will send a pull-request tomorrow.
Thanks,
Joerg
_
On Sat, Aug 28, 2021 at 03:06:20PM +0800, Lu Baolu wrote:
> Hi Joerg,
>
> Two small fixes are queued for v5.15. They aim to fix:
>
> - PASID leakage in intel_svm_unbind_mm();
> - Deadlock in intel_svm_drain_prq().
>
> Please consider them for the iommu/fix branch.
Applied, thanks Baolu.
_
Hi Suravee,
On Thu, Sep 02, 2021 at 09:13:00AM -0700, Suthikulpanit, Suravee wrote:
> I'll do that.
New plan: I queued them now and added the Fixes tag. Will send a
pull-request tomorrow to get them upstream together with a couple of
other fixes.
Regards,
Joerg
_
On Fri, Sep 03, 2021 at 11:43:31AM -0700, Linus Torvalds wrote:
> choice
> prompt "IOMMU default domain type"
> depends on IOMMU_API
> default IOMMU_DEFAULT_DMA_LAZY if AMD_IOMMU || INTEL_IOMMU
> default IOMMU_DEFAULT_DMA_STRICT
Huh, yeah, that is bogus. Seems lik
iommu/io-pgtable-arm-v7s: Implement arm_v7s_map_pages()
iommu/arm-smmu: Implement the unmap_pages() IOMMU driver callback
iommu/arm-smmu: Implement the map_pages() IOMMU driver callback
Joerg Roedel (4):
Merge remote-tracking branch 'korg/core' into x86/amd
iommu/a
Hi Suravee,
On Tue, Aug 31, 2021 at 12:10:27PM -0500, Suthikulpanit, Suravee wrote:
> Here is an dditional tags for this series:
>
> Fixes: 8bda0cfbdc1a ("iommu/amd: Detect and initialize guest vAPIC log")
>
> Are there any concerns with this series?
No concerns, please add the tag and re-post
On Tue, Aug 24, 2021 at 04:33:16PM +0100, Robin Murphy wrote:
> > Tested-by: Geert Uytterhoeven
>
> Thanks for confirming!
Sorry for the delay, the new tree containing this fix has been pushed
out now.
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On Fri, Aug 20, 2021 at 02:14:42PM +0100, Robin Murphy wrote:
> drivers/iommu/io-pgtable-arm-v7s.c | 2 +-
> drivers/iommu/io-pgtable-arm.c | 2 +-
> include/linux/iommu.h | 10 ++
> 3 files changed, 12 insertions(+), 2 deletions(-)
Applied, thanks Robin.
_
On Fri, Aug 20, 2021 at 11:41:11AM +0100, Will Deacon wrote:
> Joerg -- please can you throw this on top?
Sure, now applied, thanks.
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Hi Linus,
The following changes since commit ff1176468d368232b684f75e82563369208bc371:
Linux 5.14-rc3 (2021-07-25 15:35:14 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v5.14-rc6
for you to fetch changes up to
On Wed, Aug 18, 2021 at 09:48:43PM +0800, Lu Baolu wrote:
> Andy Shevchenko (1):
> iommu/vt-d: Drop the kernel doc annotation
>
> Liu Yi L (2):
> iommu/vt-d: Use pasid_pte_is_present() helper function
> iommu/vt-d: Add present bit check in pasid entry setup helpers
>
> Lu Baolu (5):
> iom
On Wed, Aug 18, 2021 at 01:17:29PM +0100, Will Deacon wrote:
> Ok, I won't hold my breath!
Compile tests went fine and the kernel booted fine on my workstation, so
I pushed things out. Let's see whether testing in linux-next breaks
anything.
Regards,
Joerg
___
On Fri, Aug 13, 2021 at 05:47:35PM +0100, Will Deacon wrote:
> This applies cleanly against iommu/next, but I suspect it will conflict
> with Robin's series on the list. Please shout if you need anything from
> me to help with that (e.g. rebase, checking a merge conflict).
For now there were at le
size nor member offset changes to struct ivhd_entry.
> "objdump -d" shows no object code changes.
>
> Cc: Joerg Roedel
> Cc: Will Deacon
> Cc: iommu@lists.linux-foundation.org
> Signed-off-by: Kees Cook
Acked-by: Joerg Roedel
_
On Wed, Aug 11, 2021 at 01:21:14PM +0100, Robin Murphy wrote:
> Robin Murphy (24):
> iommu: Pull IOVA cookie management into the core
> iommu/amd: Drop IOVA cookie management
> iommu/arm-smmu: Drop IOVA cookie management
> iommu/vt-d: Drop IOVA cookie management
> iommu/exynos: Drop IOVA
On Tue, Aug 17, 2021 at 08:43:19PM +0800, Lu Baolu wrote:
> Fenghua Yu (1):
> iommu/vt-d: Fix PASID reference leak
>
> Liu Yi L (1):
> iommu/vt-d: Fix incomplete cache flush in
> intel_pasid_tear_down_entry()
Applied both, thanks.
___
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Hi Sven,
On Tue, Aug 10, 2021 at 08:09:53AM +0200, Sven Peter wrote:
> This happens because apple/dart is missing the "Optimizing iommu_[map/unmap]
> performance"
> series which is already in the core branch [1].
> The same commit works fine in iommu/next since that branch merges both
> iommu/co
On Tue, Aug 10, 2021 at 03:47:19PM +0200, Geert Uytterhoeven wrote:
> The Apple DART (Device Address Resolution Table) IOMMU is only present
> on Apple ARM SoCs like the M1. Hence add a dependency on ARCH_APPLE, to
> prevent asking the user about this driver when configuring a kernel
> without sup
On Tue, Aug 03, 2021 at 02:16:48PM +0200, Sven Peter wrote:
> Sven Peter (3):
> iommu/io-pgtable: Add DART pagetable format
> dt-bindings: iommu: add DART iommu bindings
> iommu/dart: Add DART iommu driver
Applied, thanks. This driver now lives in the apple/dart branch of the
IOMMU tree.
__
From: Joerg Roedel
Remove the new use of the variable introduced in the AMD driver branch.
The variable was removed already in the iommu core branch, causing build
errors when the brances are merged.
Cc: Nadav Amit
Cc: Zhen Lei
Signed-off-by: Joerg Roedel
---
drivers/iommu/amd/init.c | 6
On Mon, Aug 02, 2021 at 03:43:20PM +0100, Will Deacon wrote:
> For both patches:
>
> Acked-by: Will Deacon
>
> Joerg -- please can you take these directly? They build on top of the
> changes from Isaac which you have queued on your 'core' branch.
Sure, applied to core branch now.
Thanks,
On Sat, Jul 31, 2021 at 09:47:37AM +0200, Frank Wunderlich wrote:
> Fixes: d72e31c93746 ("iommu: IOMMU Groups")
> Signed-off-by: Frank Wunderlich
> ---
> v2:
> - commit-message with captial letters on beginning of sentenence
> - added more information, many thanks to Yong Wu
Applied, thanks.
On Mon, Aug 02, 2021 at 03:11:40PM +0200, Juergen Gross wrote:
> As those cases are all mutually exclusive, wouldn't a static_call() be
> the appropriate solution?
Right, static_call() is even better, thanks.
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On Wed, Jul 28, 2021 at 10:52:28AM -0400, Tianyu Lan wrote:
> In Isolation VM, all shared memory with host needs to mark visible
> to host via hvcall. vmbus_establish_gpadl() has already done it for
> storvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_
> mpb_desc() still need to ha
On Mon, Aug 02, 2021 at 08:56:29PM +0800, Tianyu Lan wrote:
> Both second and third are HV_GPADL_RING type. One is send ring and the
> other is receive ring. The driver keeps the order to allocate rx and
> tx buffer. You are right this is not robust and will add a mutex to keep
> the order.
Or you
On Wed, Jul 28, 2021 at 10:52:22AM -0400, Tianyu Lan wrote:
> + if (hv_is_isolation_supported()) {
> + vmbus_connection.monitor_pages_va[0]
> + = vmbus_connection.monitor_pages[0];
> + vmbus_connection.monitor_pages[0]
> + = memrem
On Wed, Jul 28, 2021 at 10:52:21AM -0400, Tianyu Lan wrote:
> + hv_ghcb->ghcb.protocol_version = 1;
> + hv_ghcb->ghcb.ghcb_usage = 1;
The values set to ghcb_usage deserve some defines (here and below).
> +
> + hv_ghcb->hypercall.outputgpa = (u64)output;
> + hv_ghcb->hypercall.hype
On Wed, Jul 28, 2021 at 10:52:20AM -0400, Tianyu Lan wrote:
> +void hv_ghcb_msr_write(u64 msr, u64 value)
> +{
> + union hv_ghcb *hv_ghcb;
> + void **ghcb_base;
> + unsigned long flags;
> +
> + if (!ms_hyperv.ghcb_base)
> + return;
> +
> + WARN_ON(in_nmi());
> +
> +
On Wed, Jul 28, 2021 at 10:52:19AM -0400, Tianyu Lan wrote:
> + if (type == HV_GPADL_BUFFER)
> + index = 0;
> + else
> + index = channel->gpadl_range[1].gpadlhandle ? 2 : 1;
Hmm... This doesn't look very robust. Can you set fixed indexes for
different buffer types?
On Wed, Jul 28, 2021 at 08:29:41AM -0700, Dave Hansen wrote:
> __set_memory_enc_dec() is turning into a real mess. SEV, TDX and now
> Hyper-V are messing around in here.
I was going to suggest a PV_OPS call where the fitting implementation
for the guest environment can be plugged in at boot. Ther
On Wed, Jul 28, 2021 at 10:52:16AM -0400, Tianyu Lan wrote:
> +static int hyperv_init_ghcb(void)
> +{
> + u64 ghcb_gpa;
> + void *ghcb_va;
> + void **ghcb_base;
> +
> + if (!ms_hyperv.ghcb_base)
> + return -EINVAL;
> +
> + rdmsrl(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa);
> +
On Tue, Jul 27, 2021 at 05:26:11PM -0500, Tom Lendacky wrote:
> The mem_encrypt_active() function has been replaced by prot_guest_has(),
> so remove the implementation.
>
> Signed-off-by: Tom Lendacky
Reviewed-by: Joerg Roedel
___
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On Tue, Jul 27, 2021 at 05:26:12PM -0500, Tom Lendacky wrote:
> The mem_encrypt_active() function has been replaced by prot_guest_has(),
> so remove the implementation.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Signed-off-by: Tom Lendacky
Revi
On Tue, Jul 27, 2021 at 05:26:09PM -0500, Tom Lendacky wrote:
> @@ -48,7 +47,7 @@ static void sme_sev_setup_real_mode(struct
> trampoline_header *th)
> if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT))
> th->flags |= TH_FLAGS_SME_ACTIVE;
>
> - if (sev_es_active()) {
> + if
Signed-off-by: Tom Lendacky
Reviewed-by: Joerg Roedel
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er memory
> encryption technologies, the use of PATTR_HOST_MEM_ENCRYPT can be
> updated, as required, to use PATTR_SME.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: Dave Hansen
> Cc: Andy Lutomirski
> Cc: Peter Zijlstra
> Cc: Joerg Roedel
> Cc:
nsen
> Cc: Andy Lutomirski
> Cc: Peter Zijlstra
> Co-developed-by: Andi Kleen
> Signed-off-by: Andi Kleen
> Co-developed-by: Kuppuswamy Sathyanarayanan
>
> Signed-off-by: Kuppuswamy Sathyanarayanan
>
> Signed-off-by: Tom Lendacky
Reviewed-by: Joerg Roedel
>
> Signed-off-by: Tom Lendacky
Reviewed-by: Joerg Roedel
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include/soc/mediatek/smi.h| 20
> 28 files changed, 92 insertions(+), 321 deletions(-)
So this is likely not going through the IOMMU tree, given Matthias has
reviewed the IOMMU changes you can add my Acked-by: Joerg Roedel
__
On Fri, Jul 23, 2021 at 02:32:02AM -0700, Nadav Amit wrote:
> Nadav Amit (6):
> iommu/amd: Selective flush on unmap
> iommu/amd: Do not use flush-queue when NpCache is on
> iommu: Factor iommu_iotlb_gather_is_disjoint() out
> iommu/amd: Tailored gather logic for AMD
> iommu/amd: Sync once
On Mon, Jul 26, 2021 at 02:09:00PM +0100, Robin Murphy wrote:
> Ha, I had exactly that at one point, except I think in the order of
> iommu_is_dma_domain() :)
That name is fine too :)
> The end result didn't seem to give enough extra clarity to justify the
> header churn for me, but I'm happy to
Hi Robin,
On Wed, Jul 21, 2021 at 07:20:11PM +0100, Robin Murphy wrote:
> Robin Murphy (23):
> iommu: Pull IOVA cookie management into the core
> iommu/amd: Drop IOVA cookie management
> iommu/arm-smmu: Drop IOVA cookie management
> iommu/vt-d: Drop IOVA cookie management
> iommu/exynos:
On Wed, Jul 21, 2021 at 07:20:27PM +0100, Robin Murphy wrote:
> - if (type == IOMMU_DOMAIN_DMA && using_legacy_binding)
> + if ((type & __IOMMU_DOMAIN_DMA_API) && using_legacy_binding)
Hmm, I wonder whether it is time to introduce helpers for these checks?
Something like iommu_domain_is_d
[ Adding Suravee, reviewer for AMD IOMMU ]
On Fri, Jul 23, 2021 at 02:32:02AM -0700, Nadav Amit wrote:
> Nadav Amit (6):
> iommu/amd: Selective flush on unmap
> iommu/amd: Do not use flush-queue when NpCache is on
> iommu: Factor iommu_iotlb_gather_is_disjoint() out
> iommu/amd: Tailored g
On Thu, Jul 22, 2021 at 10:05:52PM -0300, Ezequiel Garcia wrote:
> drivers/iommu/dma-iommu.c | 1 +
> 1 file changed, 1 insertion(+)
Applied to iommu/fixes, thanks.
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On Wed, Jul 21, 2021 at 09:24:53PM -0700, Kyung Min Park wrote:
> When the dmar translation fault happens, the kernel prints a single line
> fault reason with corresponding hexadecimal code defined in the Intel VT-d
> specification.
>
> Currently, when user wants to debug the translation fault in
On Wed, Jul 21, 2021 at 04:44:53PM +0300, Lennert Buytenhek wrote:
> drivers/iommu/amd/iommu.c | 28 +---
> 1 file changed, 17 insertions(+), 11 deletions(-)
Applied, thanks.
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On Tue, Jul 20, 2021 at 10:06:12AM +0800, Lu Baolu wrote:
> Lu Baolu (3):
> iommu/vt-d: Report real pgsize bitmap to iommu core
> iommu/vt-d: Implement map/unmap_pages() iommu_ops callback
> iommu/vt-d: Move clflush'es from iotlb_sync_map() to map_pages()
Applied to iommu/core, thanks.
_
Hi Lennert,
On Mon, Jul 19, 2021 at 12:54:43PM +0300, Lennert Buytenhek wrote:
> + if (dev_data) {
> + int report_flags;
> +
> + /*
> + * AMD I/O Virtualization Technology (IOMMU) Specification,
> + * revision 3.00, section 2.5.3 ("IO_PAGE_FAUL
On Mon, Jul 19, 2021 at 04:32:58PM +0800, Xiyu Yang wrote:
> drivers/iommu/amd/iommu_v2.c | 13 +++--
> 1 file changed, 7 insertions(+), 6 deletions(-)
Applied, thanks.
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On Thu, Jul 15, 2021 at 02:04:24PM +0100, Robin Murphy wrote:
> ---
>
> v2: Lowered the priority of the ops check per Baolu's suggestion, only
> even further to the point of non-existence :)
Err, missed this newer version. Replaced the previous patch with this
one.
___
On Wed, Jul 14, 2021 at 06:28:34PM +0100, Robin Murphy wrote:
> If people are going to insist on calling iommu_iova_to_phys()
> pointlessly and expecting it to work, we can at least do ourselves a
> favour by handling those cases in the core code, rather than repeatedly
> across an inconsistent han
On Mon, Jul 12, 2021 at 07:12:14PM +0800, John Garry wrote:
> John Garry (3):
> iommu: Deprecate Intel and AMD cmdline methods to enable strict mode
> iommu: Print strict or lazy mode at init time
> iommu: Remove mode argument from iommu_set_dma_strict()
>
> Zhen Lei (3):
> iommu: Enhance
On Wed, Jun 16, 2021 at 06:38:41AM -0700, Georgi Djakov wrote:
> Isaac J. Manjarres (12):
> iommu/io-pgtable: Introduce unmap_pages() as a page table op
> iommu: Add an unmap_pages() op for IOMMU drivers
> iommu/io-pgtable: Introduce map_pages() as a page table op
> iommu: Add a map_pages()
Hi Linus,
The following changes since commit e73f0f0ee7541171d89f2e2491130c7771ba58d3:
Linux 5.14-rc1 (2021-07-11 15:07:40 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v5.14-rc1
for you to fetch changes up to
On Thu, Jul 15, 2021 at 09:11:50AM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich
>
> if probe is failing, iommu_group may be not initialized,
Sentences start with capital letters.
IOMMU patch subjects too, after the 'iommu:' prefix.
> so freeing it will result in NULL pointer access
On Thu, Jul 15, 2021 at 04:02:22AM +0700, Suravee Suthikulpanit wrote:
> To help review changes related to AMD IOMMU.
>
> Signed-off-by: Suravee Suthikulpanit
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks Suravee.
___
io
On Wed, Jul 14, 2021 at 10:51:34PM +0200, Arnd Bergmann wrote:
> The question is how we can best allow one but not the other.
By only allowing to allocate domains of type IDENTITY and DMA, but fail
to allocate UNMANAGED domains.
Regards,
Joerg
On Mon, Jul 12, 2021 at 03:13:41AM +0300, Dmitry Osipenko wrote:
> - err = iommu_device_sysfs_add(&smmu->iommu, dev, NULL, dev_name(dev));
> + err = iommu_device_sysfs_add(&smmu->iommu, dev, NULL, "smmu");
Are you sure no one is relying on the old name so that this change
breaks ABI? Also
On Wed, Jul 14, 2021 at 11:29:08AM +0100, Robin Murphy wrote:
> As mentioned yesterday, already done! I'm hoping to be able to post the
> patches next week after some testing :)
Great, looking forward to your patches :-)
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On Mon, Jul 12, 2021 at 12:12:32PM +0200, Benjamin Gaignard wrote:
> Restore bits 39 to 32 at correct position.
> It reverses the operation done in rk_dma_addr_dte_v2().
>
> Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2")
>
> Reported-by: Dan Carpenter
> Signed-off-by: Benjamin
On Mon, Jul 12, 2021 at 03:17:12PM +0800, Lu Baolu wrote:
> drivers/iommu/intel/iommu.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
Applied, thanks.
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On Mon, Jul 12, 2021 at 03:13:15PM +0800, Lu Baolu wrote:
> ---
> drivers/iommu/intel/iommu.c | 31 ++-
> 1 file changed, 22 insertions(+), 9 deletions(-)
Applied, thanks.
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On Tue, Jul 13, 2021 at 07:57:40PM -0400, Konrad Rzeszutek Wilk wrote:
> The SWIOTLB does have support to do late initialization (xen-pcifront
> does that for example - so if you add devices that can't do 64-bit it
> will allocate something like 4MB).
That sounds like a way to evaluate. I suggest
Hi Robin,
On Fri, Jul 09, 2021 at 02:56:47PM +0100, Robin Murphy wrote:
> As I mentioned before, conceptually I think this very much belongs in sysfs
> as a user decision. We essentially have 4 levels of "strictness":
>
> 1: DMA domain with bounce pages
> 2: DMA domain
> 3: DMA domain with flush
On Mon, Jul 05, 2021 at 08:56:57AM +0200, Marek Szyprowski wrote:
> QCOM IOMMU driver calls bus_set_iommu() for every IOMMU device controller,
> what fails for the second and latter IOMMU devices. This is intended and
> must be not fatal to the driver registration process. Also the cleanup
> path s
Hi Benjamin,
On Mon, Jul 05, 2021 at 01:40:24PM +0200, Benjamin Gaignard wrote:
> Gentle ping on this patch :-)
Please fix the subject to match the IOMMU tree conventions. This would
be:
iommu/rockchip: Fix physical address decoding
Re-send the patch after the merge window is closed.
T
Adding Robin too.
On Wed, Jul 07, 2021 at 04:55:01PM +0900, David Stevens wrote:
> Add support for per-domain dynamic pools of iommu bounce buffers to the
> dma-iommu API. This allows iommu mappings to be reused while still
> maintaining strict iommu protection. Allocating buffers dynamically
> i
On Thu, Jul 08, 2021 at 03:42:32PM +0800, Kai-Heng Feng wrote:
> @@ -344,6 +344,9 @@ static int iommu_init_device(struct device *dev)
>
> iommu = amd_iommu_rlookup_table[dev_data->devid];
> dev_data->iommu_v2 = iommu->is_iommu_v2;
> +
> + if (dev_data->iomm
Adding Robin.
On Fri, Jul 02, 2021 at 02:37:41PM +0900, David Stevens wrote:
> From: David Stevens
>
> Make map_swiotlb and unmap_swiotlb only for mapping, and consistently
> use sync_single_for and sync_sg_for functions for swiotlb sync and arch
> sync. This ensures that the same code path is r
On Wed, Jul 07, 2021 at 01:00:13PM -0700, Doug Anderson wrote:
> a) Nothing is inherently broken with my current approach.
>
> b) My current approach doesn't make anybody terribly upset even if
> nobody is totally in love with it.
Well, no, sorry :)
I don't think it is a good idea to allow drive
iommu/dma: Pass address limit rather than size to iommu_setup_dma_ops()
iommu/virtio: Enable x86 support
Joerg Roedel (6):
iommu/amd: Add amd_iommu=force_enable option
iommu/dma: Fix compile warning in 32-bit builds
iommu/amd: Fix section mismatch warning for detect_i
Hi Douglas,
On Thu, Jun 24, 2021 at 10:17:56AM -0700, Douglas Anderson wrote:
> The goal of this patch series is to get better SD/MMC performance on
> Qualcomm eMMC controllers and in generally nudge us forward on the
> path of allowing some devices to be in strict mode and others to be in
> non-s
On Fri, Jun 18, 2021 at 05:20:55PM +0200, Jean-Philippe Brucker wrote:
> Jean-Philippe Brucker (5):
> ACPI: arm64: Move DMA setup operations out of IORT
> ACPI: Move IOMMU setup code out of IORT
> ACPI: Add driver for the VIOT table
> iommu/dma: Pass address limit rather than size to
>
Hi Kevin,
On Thu, Jun 17, 2021 at 07:31:03AM +, Tian, Kevin wrote:
> Now let's talk about the new IOMMU behavior:
>
> - A device is blocked from doing DMA to any resource outside of
> its group when it's probed by the IOMMU driver. This could be a
> special state w/o attaching to an
On Fri, Jun 11, 2021 at 02:50:24PM +0100, Colin King wrote:
> drivers/iommu/intel/iommu.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
Applied, thanks.
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On Thu, Jun 17, 2021 at 01:51:24PM -0700, Nathan Chancellor wrote:
> kernel-doc is run automatically with W=1, regardless of gcc versus clang.
I see, thanks. Will update the commit message.
Thanks,
Joerg
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On Thu, Jun 17, 2021 at 10:16:50AM -0700, Nick Desaulniers wrote:
> On Thu, Jun 17, 2021 at 7:54 AM Joerg Roedel wrote:
> >
> > From: Joerg Roedel
> >
> > Fix this warning when compiled with clang and W=1:
> >
> > drivers/iommu/intel/perf.c:16: war
On Mon, Jun 14, 2021 at 03:57:26PM +0100, Robin Murphy wrote:
> Consolidating the flush queue logic also meant that the "iommu.strict"
> option started taking effect on x86 as well. Make sure we document that.
>
> Fixes: a250c23f15c2 ("iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE")
> Signed-off-b
On Wed, Jun 16, 2021 at 11:58:13AM +0100, Will Deacon wrote:
> The following changes since commit c4681547bcce777daf576925a966ffa824edd09d:
>
> Linux 5.13-rc3 (2021-05-23 11:42:48 -1000)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.
From: Joerg Roedel
Fix this warning when compiled with clang and W=1:
drivers/iommu/intel/perf.c:16: warning: Function parameter or member
'latency_lock' not described in 'DEFINE_SPINLOCK'
drivers/iommu/intel/perf.c:16: warning: expecting prototype for
per
MU changes are only a minor part of this, so it should not go through
the IOMMU tree. When Matthias has reviewed the IOMMU changes, feel free
to add my
Acked-by: Joerg Roedel
to them.
Regards,
Joerg
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From: Joerg Roedel
A recent commit broke the build on 32-bit x86. The linker throws these
messages:
ld: drivers/iommu/intel/perf.o: in function `dmar_latency_snapshot':
perf.c:(.text+0x40c): undefined reference to `__udivdi3'
ld: perf.c:(.text+0x458): undefined
On Thu, Jun 10, 2021 at 10:00:52AM +0800, Lu Baolu wrote:
> include/linux/intel-iommu.h| 44 +-
> drivers/iommu/intel/perf.h | 73
> include/trace/events/intel_iommu.h | 37 ++
> drivers/iommu/intel/debugfs.c | 111 +
> drivers/iommu/intel/dmar.c | 54 ++-
On Wed, Jun 09, 2021 at 12:00:09PM -0300, Jason Gunthorpe wrote:
> Only *drivers* know what the actual device is going to do, devices do
> not. Since the group doesn't have drivers it is the wrong layer to be
> making choices about how to configure the IOMMU.
Groups don't carry how to configure IO
On Wed, Jun 09, 2021 at 09:39:19AM -0300, Jason Gunthorpe wrote:
> VFIO being group centric has made it very ugly/difficult to inject
> device driver specific knowledge into the scheme.
This whole API will be complicated and difficult anyway, so no reason to
unnecessarily simplify things here.
VF
On Sun, May 30, 2021 at 11:06:22AM -0400, Tianyu Lan wrote:
> +u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size)
> +{
> + union hv_ghcb *hv_ghcb;
> + void **ghcb_base;
> + unsigned long flags;
> +
> + if (!ms_hyperv.ghcb_base)
> + return -EFAU
On Sun, May 30, 2021 at 11:06:21AM -0400, Tianyu Lan wrote:
> +void hv_ghcb_msr_write(u64 msr, u64 value)
> +{
> + union hv_ghcb *hv_ghcb;
> + void **ghcb_base;
> + unsigned long flags;
> +
> + if (!ms_hyperv.ghcb_base)
> + return;
> +
> + local_irq_save(flags);
> +
On Sun, May 30, 2021 at 11:06:18AM -0400, Tianyu Lan wrote:
> From: Tianyu Lan
>
> Hyper-V exposes GHCB page via SEV ES GHCB MSR for SNP guest
> to communicate with hypervisor. Map GHCB page for all
> cpus to read/write MSR register and submit hvcall request
> via GHCB.
>
> Signed-off-by: Tianyu
On Mon, Jun 07, 2021 at 02:58:18AM +, Tian, Kevin wrote:
> - Device-centric (Jason) vs. group-centric (David) uAPI. David is not fully
> convinced yet. Based on discussion v2 will continue to have ioasid uAPI
> being device-centric (but it's fine for vfio to be group-centric). A new
>
Hi John,
On Tue, Jun 08, 2021 at 09:18:25PM +0800, John Garry wrote:
> Zhen Lei (3):
> iommu: Enhance IOMMU default DMA mode build options
> iommu/vt-d: Add support for IOMMU default DMA mode build options
> iommu/amd: Add support for IOMMU default DMA mode build options
So I like the idea,
On Fri, Jun 04, 2021 at 06:44:37PM +0200, Benjamin Gaignard wrote:
> This series adds the IOMMU driver for rk356x SoC.
> Since a new compatible is needed to distinguish this second version of
> IOMMU hardware block from the first one, it is an opportunity to convert
> the binding to DT schema.
>
On Thu, May 13, 2021 at 03:58:15PM +0800, Zhen Lei wrote:
> Function iommu_group_store_type() is the only caller of the static
> function iommu_change_dev_def_domain() and has performed
> "if (WARN_ON(!group))" detection before calling it. So the one here is
> redundant.
>
> Signed-off-by: Zhen Le
From: Joerg Roedel
A recent commit introduced this section mismatch warning:
WARNING: modpost: vmlinux.o(.text.unlikely+0x22a1f): Section mismatch
in reference from the function detect_ivrs() to the variable
.init.data:amd_iommu_force_enable
The reason is that detect_ivrs() is not
On Mon, Jun 07, 2021 at 02:49:05PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Compiling the recent dma-iommu changes under 32-bit x86 triggers this
> compile warning:
>
> drivers/iommu/dma-iommu.c:249:5: warning: format ‘%llx’ expects argument of
> type ‘long lo
On Fri, Jun 04, 2021 at 06:35:17PM +0100, Robin Murphy wrote:
> For the sake of justifying this as "fix" rather than "cleanup", you may as
> well use the flush queue commit cited in the patch log - I maintain there's
> nothing technically wrong with that commit itself, but it is the point at
> whic
From: Joerg Roedel
Compiling the recent dma-iommu changes under 32-bit x86 triggers this
compile warning:
drivers/iommu/dma-iommu.c:249:5: warning: format ‘%llx’ expects argument of
type ‘long long unsigned int’, but argument 3 has type ‘phys_addr_t’ {aka
‘unsigned int’} [-Wformat=]
The
On Thu, May 27, 2021 at 02:37:09PM -0500, Rob Herring wrote:
> drivers/iommu/of_iommu.c | 68
> include/linux/of_iommu.h | 17 ++
> 2 files changed, 3 insertions(+), 82 deletions(-)
Applied both, thanks.
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