qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz
device links, has to be powered-up without the master device
being in context.
Signed-off-by: Sricharan R
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin Murphy
---
Changes since v18:
None.
drivers/iommu
: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
dt-bindings: arm-smmu: Add bindings for qcom,smmu-v2
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,smmu.txt | 39
by turning
the clocks off in a system sleep.
Add corresponding clock enable path in resume callback as well.
Signed-off-by: Sricharan R
Signed-off-by: Archit Taneja
[Thor: Rework to get clocks from device tree]
Signed-off-by: Thor Thayer
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek
On Fri, Nov 30, 2018 at 11:45 PM Will Deacon wrote:
>
> On Thu, Nov 29, 2018 at 08:25:20PM +0530, Vivek Gautam wrote:
> > On Wed, Nov 28, 2018 at 10:07 PM Robin Murphy wrote:
> > >
> > > On 28/11/2018 16:24, Stephen Boyd wrote:
> > > >
On Wed, Nov 28, 2018 at 10:07 PM Robin Murphy wrote:
>
> On 28/11/2018 16:24, Stephen Boyd wrote:
> > Quoting Vivek Gautam (2018-11-27 02:11:41)
> >> @@ -1966,6 +1970,23 @@ static const struct of_device_id
> >> arm_smmu_of_match[] = {
> >> };
> >
Add bindings doc for Qcom's smmu-v2 implementation.
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Rob Herring
Reviewed-by: Robin Murphy
---
.../devicetree/bindings/iommu/arm,smmu.txt | 39 ++
1 file changed, 39
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz
-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin Murphy
---
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 5610cc736f9d..f02e0f58e696 100644
--- a/drivers
runtime pm as the
runtime_resume() calls device_reset() which does tlb_sync_global()
that ultimately requires locks to be initialized.
Signed-off-by: Sricharan R
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin
-by: Thor Thayer
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin Murphy
---
drivers/iommu/arm-smmu.c | 100 +--
1 file changed, 97 insertions(+), 3 deletions
, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
dt-bindings: arm-smmu: Add bindings for qcom,smmu-v2
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,smmu.txt | 39
drivers/iommu/arm-smmu.c
Hi Thor,
On 11/26/2018 8:11 PM, Thor Thayer wrote:
Hi Vivek,
On 11/26/18 4:55 AM, Vivek Gautam wrote:
On 11/24/2018 12:04 AM, Will Deacon wrote:
On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote:
On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa
wrote:
On Fri, Nov 23, 2018 at 6:13
On 11/26/2018 11:33 AM, Vivek Gautam wrote:
On 11/24/2018 12:06 AM, Will Deacon wrote:
On Thu, Nov 22, 2018 at 05:32:24PM +0530, Vivek Gautam wrote:
Hi Will,
On Wed, Nov 21, 2018 at 11:09 PM Will Deacon
wrote:
On Fri, Nov 16, 2018 at 04:54:27PM +0530, Vivek Gautam wrote:
From
On 11/24/2018 12:04 AM, Will Deacon wrote:
On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote:
On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote:
On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam
wrote:
On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
On Fri, Nov 16, 2018 at 04
On 11/24/2018 12:06 AM, Will Deacon wrote:
On Thu, Nov 22, 2018 at 05:32:24PM +0530, Vivek Gautam wrote:
Hi Will,
On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
On Fri, Nov 16, 2018 at 04:54:27PM +0530, Vivek Gautam wrote:
From: Sricharan R
The smmu device probe/remove and add
Hi Tomasz,
On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote:
>
> Hi Vivek, Will,
>
> On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam
> wrote:
> >
> > Hi Will,
> >
> > On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
> > >
> > > [+T
Hi Will,
On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
>
> [+Thor]
>
> On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote:
> > qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> > clock and power requirements.
> > On msm8996, multiple cor
Hi Will,
On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
>
> On Fri, Nov 16, 2018 at 04:54:27PM +0530, Vivek Gautam wrote:
> > From: Sricharan R
> >
> > The smmu device probe/remove and add/remove master device callbacks
> > gets called when the sm
Hi Will,
On 11/21/2018 9:22 PM, Will Deacon wrote:
Hi Vivek,
On Thu, Oct 11, 2018 at 03:19:28PM +0530, Vivek Gautam wrote:
This series enables apps-smmu, the "arm,mmu-500" instance
on sdm845.
Series tested on SDM845 MTP device with related smmu patch series [1],
and necessary con
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz
to low power state by turning
the clocks off in a system sleep.
Also add corresponding clock enable path in resume callback.
Signed-off-by: Sricharan R
Signed-off-by: Archit Taneja
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas
runtime pm as the
runtime_resume() calls device_reset() which does tlb_sync_global()
that ultimately requires locks to be initialized.
Signed-off-by: Sricharan R
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin
-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin Murphy
---
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index cae88c9f83ca..2098c3141f5f 100644
--- a/drivers
Add bindings doc for Qcom's smmu-v2 implementation.
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Rob Herring
Reviewed-by: Robin Murphy
---
.../devicetree/bindings/iommu/arm,smmu.txt | 39 ++
1 file changed, 39
during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
dt-bindings: arm-smmu: Add bindings for qcom,smmu-v2
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,smmu.txt | 39 +
drivers/iommu
Hi Tomasz,
On Tue, Oct 23, 2018 at 9:45 AM Tomasz Figa wrote:
>
> Hi Vivek,
>
> On Fri, Jun 15, 2018 at 7:53 PM Vivek Gautam
> wrote:
> >
> > Qualcomm SoCs have an additional level of cache called as
> > System cache or Last level cache[1]. This ca
Hi Robin,
On Tue, Sep 25, 2018 at 6:01 PM Robin Murphy wrote:
>
> On 10/09/18 07:25, Vivek Gautam wrote:
> > Qcom's implementation of arm,mmu-500 require to serialize all
> > TLB invalidations for context banks.
>
> What does "serailize all TLB invalidations
On 10/12/2018 3:46 AM, Rob Herring wrote:
On Thu, 11 Oct 2018 15:19:29 +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 works well with current
arm-smmu driver implementation. Adding a soc specific compatible
along with arm,mmu-500 makes the bindings future safe.
Signed-off
Add device node for arm,mmu-500 available on sdm845.
This MMU-500 with single TCU and multiple TBU architecture
is shared among all the peripherals except gpu.
Signed-off-by: Vivek Gautam
---
Changes since v3:
- none.
arch/arm64/boot/dts/qcom/sdm845.dtsi | 72
Qcom's implementation of arm,mmu-500 works well with current
arm-smmu driver implementation. Adding a soc specific compatible
along with arm,mmu-500 makes the bindings future safe.
Signed-off-by: Vivek Gautam
---
Changes since v3:
- Refined language more to state things directly
hub.com/vivekgautam1/linux/commits/v4.19-rc7/sdm845-smmu-dt
[3] https://patchwork.kernel.org/patch/10576937/
[4] https://patchwork.kernel.org/patch/10581911/
[5] https://patchwork.kernel.org/patch/10565295/
[6] https://patchwork.kernel.org/patch/10577297/
Vivek Gautam (2):
dt-bindings: arm-s
decision.
[1] https://patchwork.kernel.org/patch/10576937/
[1] https://patchwork.kernel.org/patch/10581911/
[3] https://patchwork.kernel.org/patch/10565295/
[4] https://patchwork.kernel.org/patch/10577297/
Vivek Gautam (2):
dt-bindings: arm-smmu: Add binding doc for Qcom smmu-500
dts: arm64/sdm845: Add
Hi Will,
On Fri, Sep 28, 2018 at 6:49 PM Will Deacon wrote:
>
> Hi Vivek,
>
> On Thu, Sep 20, 2018 at 05:11:53PM +0530, Vivek Gautam wrote:
> > On Wed, Jun 27, 2018 at 10:07 PM Will Deacon wrote:
> > > On Tue, Jun 19, 2018 at 02:04:44PM +0530, Vivek Gautam wrote:
&
Hi Thor,
On 10/4/2018 3:58 AM, thor.tha...@linux.intel.com wrote:
From: Thor Thayer
Add a clock to the SMMU structure. In the device tree case,
check for a clock node and enable the clock if found.
This patch is dependent upon the following patches that add
a device tree bulk clock
runtime pm as the
runtime_resume() calls device_reset() which does tlb_sync_global()
that ultimately requires locks to be initialized.
Signed-off-by: Sricharan R
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Robin
On Tue, Oct 2, 2018 at 9:44 AM Vivek Gautam wrote:
>
> Hi Will,
>
> On Mon, Oct 1, 2018 at 6:29 PM Will Deacon wrote:
> >
> > Hi Vivek,
> >
> > On Thu, Aug 30, 2018 at 08:15:38PM +0530, Vivek Gautam wrote:
> > > From: Sricharan R
> > >
&g
Hi Will,
On Mon, Oct 1, 2018 at 6:29 PM Will Deacon wrote:
>
> Hi Vivek,
>
> On Thu, Aug 30, 2018 at 08:15:38PM +0530, Vivek Gautam wrote:
> > From: Sricharan R
> >
> > The smmu device probe/remove and add/remove master device callbacks
> > gets called when
On Wed, Sep 26, 2018 at 8:57 PM Robin Murphy wrote:
>
> On 30/08/18 15:45, Vivek Gautam wrote:
> > From: Sricharan R
> >
> > The smmu needs to be functional only when the respective
> > master's using it are active. The device_link feature
> > helps to tr
Hi Robin,
On Wed, Sep 26, 2018 at 9:29 PM Robin Murphy wrote:
>
> On 30/08/18 15:45, Vivek Gautam wrote:
> > qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> > clock and power requirements.
> > On msm8996, multiple cores, viz. mdss, video, etc. use
On Tue, Sep 25, 2018 at 10:09 PM Will Deacon wrote:
>
> On Tue, Sep 25, 2018 at 02:09:34PM +0200, Joerg Roedel wrote:
> > On Mon, Sep 10, 2018 at 11:55:47AM +0530, Vivek Gautam wrote:
> > > Vivek Gautam (4):
> > > firmware: qcom_scm-64: Add atomic version of
Hi Robin,
On Wed, Sep 26, 2018 at 12:25 AM Robin Murphy wrote:
>
> Hi Vivek,
>
> On 2018-09-25 6:56 AM, Vivek Gautam wrote:
> > Hi Robin, Will,
> >
> > On Tue, Sep 18, 2018 at 8:41 AM Vivek Gautam
> > wrote:
> >>
> >> Hi Robin,
> >>
Hi Bjorn,
On Mon, Sep 10, 2018 at 4:08 PM Vivek Gautam
wrote:
>
> +linux-arm-msm
>
>
> On 09/10/2018 11:55 AM, Vivek Gautam wrote:
> > Qcom's implementation of arm,mmu-500 on sdm845 has a functional/performance
> > errata [1] because of which the TCU cache
Hi Robin, Will,
On Tue, Sep 18, 2018 at 8:41 AM Vivek Gautam
wrote:
>
> Hi Robin,
>
> On Fri, Sep 7, 2018 at 3:52 PM Vivek Gautam
> wrote:
> >
> > On Fri, Sep 7, 2018 at 3:22 PM Tomasz Figa wrote:
> > >
> > > On Fri, Sep 7, 2018 at 6:38 PM Vivek Ga
Hi Will,
On Wed, Jun 27, 2018 at 10:07 PM Will Deacon wrote:
>
> Hi Vivek,
>
> On Tue, Jun 19, 2018 at 02:04:44PM +0530, Vivek Gautam wrote:
> > On Fri, Jun 15, 2018 at 10:22 PM, Will Deacon wrote:
> > > On Fri, Jun 15, 2018 at 04:23:29PM +0530, Vivek Gautam wrote
On Thu, Sep 20, 2018 at 1:05 AM Jordan Crouse wrote:
>
> On Tue, Jul 24, 2018 at 03:13:37PM +0530, Vivek Gautam wrote:
> > Hi Will,
> >
> >
> > On Wed, Jun 27, 2018 at 10:07 PM, Will Deacon wrote:
> > > Hi Vivek,
> > >
> > > On
Hi Robin,
On Fri, Sep 7, 2018 at 3:52 PM Vivek Gautam wrote:
>
> On Fri, Sep 7, 2018 at 3:22 PM Tomasz Figa wrote:
> >
> > On Fri, Sep 7, 2018 at 6:38 PM Vivek Gautam
> > wrote:
> > >
> > > Hi Tomasz,
> > >
> > >
&g
On Mon, Sep 10, 2018 at 11:32 PM Rob Herring wrote:
>
> On Thu, 30 Aug 2018 20:15:40 +0530, Vivek Gautam wrote:
> > Add bindings doc for Qcom's smmu-v2 implementation.
> >
> > Signed-off-by: Vivek Gautam
> > Reviewed-by: Tomasz Figa
>
+linux-arm-msm
On 09/10/2018 11:55 AM, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 on sdm845 has a functional/performance
errata [1] because of which the TCU cache look ups are stalled during
invalidation cycle. This is mitigated by serializing all the invalidation
requests coming
/patchwork/patch/974114/
[3]
https://source.codeaurora.org/quic/la/kernel/msm-4.9/tree/drivers/iommu/arm-smmu.c?h=msm-4.9#n4864
[4] https://patchwork.kernel.org/patch/10565349/
Vivek Gautam (4):
firmware: qcom_scm-64: Add atomic version of qcom_scm_call
firmware/qcom_scm: Add atomic version
Add atomic versions of qcom_scm_io_readl/writel to enable
reading/writing secure registers from atomic context.
Signed-off-by: Vivek Gautam
---
drivers/firmware/qcom_scm-32.c | 12
drivers/firmware/qcom_scm-64.c | 32
drivers/firmware/qcom_scm.c
-smmu will allow to identify
which firmware configuration of the two mentioned above we use.
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu-regs.h | 2 +
drivers/iommu/arm-smmu.c | 133 +-
2 files changed, 133 insertions(+), 2 deletions
Qcom's smmu-500 needs to toggle wait-for-safe sequence to
handle TLB invalidation sync's.
Few firmwares allow doing that through SCM interface.
Add API to toggle wait for safe from firmware through a
SCM call.
Signed-off-by: Vivek Gautam
---
drivers/firmware/qcom_scm-32.c | 5 +
drivers
There are scnenarios where drivers are required to make a
scm call in atomic context, such as in one of the qcom's
arm-smmu-500 errata [1].
[1] ("https://source.codeaurora.org/quic/la/kernel/msm-4.9/
tree/drivers/iommu/arm-smmu.c?h=msm-4.9#n4842")
Signed-off-by: Vivek Gautam
--
On Fri, Sep 7, 2018 at 3:22 PM Tomasz Figa wrote:
>
> On Fri, Sep 7, 2018 at 6:38 PM Vivek Gautam
> wrote:
> >
> > Hi Tomasz,
> >
> >
> > On 9/7/2018 2:46 PM, Tomasz Figa wrote:
> > > Hi Vivek,
> > >
> > > On Thu, Aug 30, 20
Hi Tomasz,
On 9/7/2018 2:46 PM, Tomasz Figa wrote:
Hi Vivek,
On Thu, Aug 30, 2018 at 11:46 PM Vivek Gautam
wrote:
From: Sricharan R
The smmu device probe/remove and add/remove master device callbacks
gets called when the smmu is not linked to its master, that is without
the context
Hi Rob,
On Thu, Aug 30, 2018 at 8:16 PM Vivek Gautam
wrote:
>
> Add bindings doc for Qcom's smmu-v2 implementation.
>
> Signed-off-by: Vivek Gautam
> Reviewed-by: Tomasz Figa
> Tested-by: Srinivas Kandagatla
> ---
I removed your reviewed-by for this particular patch.
Ca
On 9/5/2018 3:34 PM, Rob Clark wrote:
On Wed, Sep 5, 2018 at 5:22 AM Vivek Gautam wrote:
On 8/14/2018 5:54 PM, Vivek Gautam wrote:
Hi Will,
On 8/14/2018 5:10 PM, Will Deacon wrote:
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
Qcom's implementation of arm
On 8/14/2018 5:54 PM, Vivek Gautam wrote:
Hi Will,
On 8/14/2018 5:10 PM, Will Deacon wrote:
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 on sdm845 has a
functional/performance
errata [1] because of which the TCU cache look
Hi Rob,
On 8/30/2018 6:13 AM, Rob Herring wrote:
On Wed, Aug 29, 2018 at 6:23 AM Vivek Gautam
wrote:
On Wed, Aug 29, 2018 at 2:05 PM Vivek Gautam
wrote:
Hi Rob,
On 8/29/2018 2:04 AM, Rob Herring wrote:
On Mon, Aug 27, 2018 at 04:25:50PM +0530, Vivek Gautam wrote:
Add bindings doc
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz
-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1bf542010be7..166c8c6da24f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers
Add bindings doc for Qcom's smmu-v2 implementation.
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
.../devicetree/bindings/iommu/arm,smmu.txt | 39 ++
1 file changed, 39 insertions(+)
diff --git a/Documentation/devicetree
runtime pm as the
runtime_resume() calls device_reset() which does tlb_sync_global()
that ultimately requires locks to be initialized.
Signed-off-by: Sricharan R
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
drivers/iommu
: Add pm_runtime/sleep ops
iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
dt-bindings: arm-smmu: Add bindings for qcom,smmu-v2
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../dev
to low power state by turning
the clocks off in a system sleep.
Also add corresponding clock enable path in resume callback.
Signed-off-by: Sricharan R
Signed-off-by: Archit Taneja
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas
On Thu, Aug 30, 2018 at 3:04 PM Tomasz Figa wrote:
>
> On Thu, Aug 30, 2018 at 6:22 PM Vivek Gautam
> wrote:
> >
> > On Mon, Aug 27, 2018 at 4:27 PM Vivek Gautam
> > wrote:
> > >
> > > From: Sricharan R
> > >
> > > The smmu device
On Mon, Aug 27, 2018 at 4:27 PM Vivek Gautam
wrote:
>
> From: Sricharan R
>
> The smmu device probe/remove and add/remove master device callbacks
> gets called when the smmu is not linked to its master, that is without
> the context of the master device. So calling runtime ap
On Wed, Aug 29, 2018 at 2:05 PM Vivek Gautam
wrote:
>
> Hi Rob,
>
>
> On 8/29/2018 2:04 AM, Rob Herring wrote:
> > On Mon, Aug 27, 2018 at 04:25:50PM +0530, Vivek Gautam wrote:
> >> Add bindings doc for Qcom's smmu-v2 implementation.
> >>
> >> Signe
Hi Rob,
On 8/29/2018 2:04 AM, Rob Herring wrote:
On Mon, Aug 27, 2018 at 04:25:50PM +0530, Vivek Gautam wrote:
Add bindings doc for Qcom's smmu-v2 implementation.
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
Changes since v14:
- This is a new
Hi Robin,
On 8/14/2018 10:29 PM, Robin Murphy wrote:
On 14/08/18 11:55, Vivek Gautam wrote:
Cleanup to re-use some of the stuff
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 32 +---
1 file changed, 25 insertions(+), 7 deletions(-)
I think
On 8/27/2018 2:26 PM, Vivek Gautam wrote:
Hi Rob, Robin,
On 8/15/2018 4:27 AM, Rob Herring wrote:
On Wed, Aug 15, 2018 at 01:09:43AM +0530, Vivek Gautam wrote:
Adding Jordan here.
On Tue, Aug 14, 2018 at 4:19 PM, Robin Murphy
wrote:
Hi Vivek,
On 14/08/18 11:27, Vivek Gautam wrote
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz
Add bindings doc for Qcom's smmu-v2 implementation.
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
Changes since v14:
- This is a new patch added in v15 after noticing the new
checkpatch warning for separate dt-bindings doc.
- This patch also
runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
Changes since v14:
- none.
drivers/iommu/arm-smmu.c | 101 +++
1 file changed, 93 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c
-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
---
Changes since v14:
- none.
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 23b4a60149b6..b5e7f72d418c 100644
--- a/drivers
to low power state by turning
the clocks off in a system sleep.
Also add corresponding clock enable path in resume callback.
Signed-off-by: Sricharan R
Signed-off-by: Archit Taneja
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas
add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
dt-bindings: arm-smmu: Add bindings for qcom,smmu-v2
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,smmu.txt | 47 +
Hi Rob, Robin,
On 8/15/2018 4:27 AM, Rob Herring wrote:
On Wed, Aug 15, 2018 at 01:09:43AM +0530, Vivek Gautam wrote:
Adding Jordan here.
On Tue, Aug 14, 2018 at 4:19 PM, Robin Murphy wrote:
Hi Vivek,
On 14/08/18 11:27, Vivek Gautam wrote:
Add device node for qcom,smmu-v2 available
Adding Jordan here.
On Tue, Aug 14, 2018 at 4:19 PM, Robin Murphy wrote:
> Hi Vivek,
>
> On 14/08/18 11:27, Vivek Gautam wrote:
>>
>> Add device node for qcom,smmu-v2 available on sdm845.
>> This smmu is available only to GPU device.
>>
>> Signed-off-by: Vi
On 8/14/2018 5:10 PM, Will Deacon wrote:
On Tue, Aug 14, 2018 at 04:25:27PM +0530, Vivek Gautam wrote:
Cleanup to re-use some of the stuff
Maybe we should factor a few of the other bits whilst we're here.
Sure, do you want me to refactor anything besides this change?
Or just write
Hi Will,
On 8/14/2018 5:10 PM, Will Deacon wrote:
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 on sdm845 has a functional/performance
errata [1] because of which the TCU cache look ups are stalled during
invalidation cycle
Cleanup to re-use some of the stuff
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 32 +---
1 file changed, 25 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 32e86df80428..75c146751c87 100644
-smmu will allow to identify
which firmware configuration of the two mentioned above we use.
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu-regs.h | 2 +
drivers/iommu/arm-smmu.c | 136 +-
2 files changed, 136 insertions(+), 2 deletions
/974114/
[3]
https://source.codeaurora.org/quic/la/kernel/msm-4.9/tree/drivers/iommu/arm-smmu.c?h=msm-4.9#n4864
Vivek Gautam (5):
firmware: qcom_scm-64: Add atomic version of qcom_scm_call
firmware/qcom_scm: Add atomic version of io read/write APIs
firmware/qcom_scm: Add scm call to handle smmu
Qcom's smmu-500 needs to toggle wait-for-safe sequence to
handle TLB invalidation sync's.
Few firmwares allow doing that through SCM interface.
Add API to toggle wait for safe from firmware through a
SCM call.
Signed-off-by: Vivek Gautam
---
drivers/firmware/qcom_scm-32.c | 5 +
drivers
Add atomic versions of qcom_scm_io_readl/writel to enable
reading/writing secure registers from atomic context.
Signed-off-by: Vivek Gautam
---
drivers/firmware/qcom_scm-32.c | 12
drivers/firmware/qcom_scm-64.c | 32
drivers/firmware/qcom_scm.c
Add device node for qcom,smmu-v2 available on sdm845.
This smmu is available only to GPU device.
Signed-off-by: Vivek Gautam
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64
Add device node for arm,mmu-500 available on sdm845.
This MMU-500 with single TCU and multiple TBU architecture
is shared among all the peripherals except gpu on sdm845.
Signed-off-by: Vivek Gautam
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 72
1 file
patch for this.
- Updated node name to 'iommu'.
- Addressed Doug's review comment about removing status property from
smmu's nodes, as smmu is either present on the soc or not. Enabling
it is not a board-level decision.
[1] https://lore.kernel.org/patchwork/patch/973839/
Vivek Gautam (3
Qcom's implementation of arm,mmu-500 works well with current
arm-smmu driver implementation. Adding a soc specific compatible
along with arm,mmu-500 makes the bindings future safe.
Signed-off-by: Vivek Gautam
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 5 +
1 file changed, 5
Hi Doug,
On 8/11/2018 4:00 AM, Doug Anderson wrote:
Hi,
On Fri, Aug 10, 2018 at 3:18 PM, Doug Anderson wrote:
Hi,
On Thu, Jul 19, 2018 at 10:53 AM, Vivek Gautam
wrote:
Add device node for arm,mmu-500 available on sdm845.
This MMU-500 with single TCU and multiple TBU architecture
On Wed, Jul 25, 2018 at 5:27 PM, Will Deacon wrote:
> On Tue, Jul 24, 2018 at 03:09:41PM +0530, Vivek Gautam wrote:
>> On 7/24/2018 2:06 PM, Will Deacon wrote:
>> >On Thu, Jul 19, 2018 at 11:23:56PM +0530, Vivek Gautam wrote:
>> >>diff --git a/drivers/iommu/arm-smm
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz Figa
---
Change since
-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
---
Change since v13:
- No change.
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1efa5681b905..e558abf1ecfc 100644
--- a/drivers/iommu/arm-smmu.c
+++ b
runtime calls]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
---
Change since v13:
- No change.
drivers/iommu/arm-smmu.c | 101 +++
1 file changed, 93 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
the device_link between masters and smmu
Vivek Gautam (1):
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,smmu.txt | 42 +
drivers/iommu/arm-smmu.c | 194 +++--
2 files changed, 225 insertions(
to low power state by turning
the clocks off in a system sleep.
Also add corresponding clock enable path in resume callback.
Signed-off-by: Sricharan R
Signed-off-by: Archit Taneja
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
---
Changes since v13
On 7/26/2018 9:00 PM, Robin Murphy wrote:
On 26/07/18 08:12, Vivek Gautam wrote:
On Wed, Jul 25, 2018 at 11:46 PM, Vivek Gautam
wrote:
On Tue, Jul 24, 2018 at 8:51 PM, Robin Murphy
wrote:
On 19/07/18 11:15, Vivek Gautam wrote:
From: Sricharan R
The smmu needs to be functional only
On Wed, Jul 25, 2018 at 11:46 PM, Vivek Gautam
wrote:
> On Tue, Jul 24, 2018 at 8:51 PM, Robin Murphy wrote:
>> On 19/07/18 11:15, Vivek Gautam wrote:
>>>
>>> From: Sricharan R
>>>
>>> The smmu needs to be functional only when the respective
>
101 - 200 of 343 matches
Mail list logo