Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
b/Documentation/devicetree/bindings/iommu/ar
MSI reserve len.
} ACPI_CSRT_RESOURCE_DESCRIPTOR;
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
arch/arm64/Kconfig | 10 ++
drivers/iommu/arm-smmu-v3.c | 75 +
2 files changed, 85 insertions(+)
diff --git a/arch/arm64/Kconfig
This uses the ACPI IORT model number to enable the erratum.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
This replaces the existing broken_prefetch_cmd quirk using
the new erratum framework.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
arch/arm64/Kconfig | 10 +-
drivers/iommu/arm-smmu-v3.c | 36 ++--
2 files chang
This moves the SW MSI reserve region allocation to probe fn.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 36 +++-
1 file changed, 27 insertions(+), 9 deletions(-)
diff --git a/drivers/iommu/arm-smmu-
This will provide a way to replace the existing skip_prefetch_cmd
erratum using the new framework.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 58 +
1 file changed, 58 insertions(+)
diff
This is to introduce an erratum framework to smmu driver similar
to the one in arm_arch_timer code.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/iommu/arm-smmu-
"acpica: iort: Update SMMU models for IORT rev. C".
https://lkml.org/lkml/2017/5/12/211
Thanks,
Shameer
shameer (7):
iommu/arm-smmu-v3: Add erratum framework structures
iommu/arm-smmu-v3: Add erratum framework functions
iommu/arm-smmu-v3: Replace the device tree binding for hisilicon
in the smmu-v3 driver which means these address regions will
not be translated and will be excluded from iova allocations.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 29 -
1 file changed, 24 insertions(+), 5 del
://patchwork.kernel.org/patch/9740733/
2. https://patchwork.kernel.org/patch/9730491/
Thanks,
Shameer
Changelog:
v1 --> v2
-patch 2/2: Invoke iort helper fn based on fwnode type(acpi).
RFCv2 -->PATCH
-Incorporated Lorenzo's review comments.
RFC v1 --> RFC v2
Based on Robin's review
The helper function retrieves ITS address regions through IORT
device <-> ITS mappings and reserves it so that these regions
will not be translated by IOMMU and will be excluded from IOVA
allocations. IOMMU drivers can use this to implement their
.get_resv_regions callback.
Signed-off-by: s
://patchwork.kernel.org/patch/9740733/
2. https://patchwork.kernel.org/patch/9730491/
Thanks,
Shameer
Changelog:
v2 --> v3
Addressed comments from Lorenzo and Robin:
-Removed dev_is_pci() check in smmuV3 driver.
-Don't treat device not having an ITS mapping as an error in
iort helper function.
in the smmu-v3 driver which means these address regions will
not be translated and will be excluded from iova allocations.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 30 ++
1 file changed, 26 insertions(+), 4 del
The helper function retrieves ITS address regions through IORT
device <-> ITS mappings and reserves it so that these regions
will not be translated by IOMMU and will be excluded from IOVA
allocations. IOMMU drivers can use this to implement their
.get_resv_regions callback.
Signed-off-by: s
The helper function retrieves ITS address regions through IORT
device <-> ITS mappings and reserves it so that these regions
will not be translated by IOMMU and will be excluded from IOVA
allocations. IOMMU drivers can use this to implement their
.get_resv_regions callback.
Signed-off-by: s
://patchwork.kernel.org/patch/9740733/
2. https://patchwork.kernel.org/patch/9730491/
Thanks,
Shameer
RFCv2 -->PATCH
Incorporated Lorenzo's review comments.
RFC v1 -->v2
Based on Robin's review comments,
-Removed the generic erratum framework.
-Using IORT/MADT tables to retrieve the IT
in the smmu-v3 driver which means these address regions will
not be translated and will be excluded from iova allocations.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 27 ++-
1 file changed, 22 insertions(+), 5 del
SMMU model.
This is based on the following patches:
1. https://patchwork.kernel.org/patch/9740733/
2. https://patchwork.kernel.org/patch/9730491/
Thanks,
Shameer
RFC v1 ---> v2
Based on Robin's review comments,
:Removed the generic erratum framework.
:Using IORT/MADT tab
in the smmu-v3 driver which means these address regions will
not be translated and will be excluded from iova allocations.
The HW ITS address region associated with the dev is retrieved
using a new helper function added in the IORT code.
Signed-off-by: shameer <shameerali.kolothum.th...@huawei.
This provides a helper function to find and retrieve the ITS
base address from the ID mappings array reference of a device
IORT node(if any).
This is used in the subsequent patch to retrieve the ITS base
address associated with a pci dev IORT node.
Signed-off-by: shameer <shameerali.kolothum
Modified iommu_dma_get_resv_regions() to include HW MSI (ARM GICv3 ITS MSI)
specific reservations if available.
Suggested-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 8 +++-
1 fil
() to reserve the hw msi
regions which means these address regions will not be translated and
will be excluded from iova allocations.
Thanks,
Shameer
Changelog:
v3 --> v4
Rebased on 4.13-rc1.
Addressed comments from Robin, Will and Lorenzo:
-As suggested by Robin, moved the ITS msi reservat
address regions based
on IORT SMMUv3 model with the help of a generic iommu helper
function.
Thanks,
Shameer
Changelog:
v5 --> v6
Addressed comments from Robin and Lorenzo:
-No change to patch#1 .
-Reverted v5 patch#2 as this might break the platforms where this quirk
is not applica
in the smmu-v3 driver which means these address regions will
not be translated and will be excluded from iova allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 27 ++-
1 file changed, 22 insertions
device <-> ITS mappings and reserves it so that these regions will not
be translated by IOMMU and will be excluded from IOVA allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[lorenzo.pieral...@arm.com: updated commit log/added comments]
Signed-off
IOMMU drivers can use this to implement their .get_resv_regions callback
for HW MSI specific reservations(e.g. ARM GICv3 ITS MSI region).
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 19 +++
include/linux/dma-iommu.
device <-> ITS mappings and reserves it so that these regions will not
be translated by IOMMU and will be excluded from IOVA allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[lorenzo.pieral...@arm.com: updated commit log/added comments]
Signed-off
Modified iommu_dma_get_resv_regions() to include HW MSI
(ARM GICv3 ITS MSI) specific reservations if available.
Suggested-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 8 +++-
1 fil
() to reserve the hw msi
regions which means these address regions will not be translated and
will be excluded from iova allocations.
Note: This requires patches [1] and [2] for vfio pass-through support
on these platforms.
Thanks,
Shameer
[1]: https://lkml.org/lkml/2017/7/27/388
[2]: https
driver which means these address regions will not be
translated and will be excluded from iova allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[John: add DT support]
Signed-off-by: John Garry <john.ga...@huawei.com>
---
drivers/iommu/arm-sm
helper function that retrieves msi address regions through device
tree msi mapping, so that these regions will not be translated by IOMMU
and will be excluded from IOVA allocations.
Signed-off-by: John Garry <john.ga...@huawei.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.t
v2
Based on Robin's review comments,
-Removed the generic erratum framework.
-Using IORT/MADT tables to retrieve the ITS base addr instead of vendor
specific CSRT table.
John Garry (2):
Doc: iommu/arm-smmu-v3: Add workaround for HiSilicon erratum 161010801
iommu/of: Add msi address regions
IOMMU drivers can use this to implement their .get_resv_regions callback
for HW MSI specific reservations(e.g. ARM GICv3 ITS MSI region).
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[John: added DT support]
Signed-off-by: John Garry <john.ga...@huawei.com>
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[lorenzo.pieral...@arm.com: updated commit log/ad
inding to flag that the SMMU breaks msi
translation at ITS.
Also, the arm64 silicon errata is updated with this same erratum.
Signed-off-by: John Garry <john.ga...@huawei.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
Documentation/arm64/
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[lorenzo.pieral...@arm.com: updated commit log/ad
in the smmu-v3 driver which means these address regions will
not be translated and will be excluded from iova allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 27 ++-
1 file changed, 22 insertions
n fwnode type(acpi).
RFCv2 -->PATCH
-Incorporated Lorenzo's review comments.
RFC v1 --> RFC v2
Based on Robin's review comments,
-Removed the generic erratum framework.
-Using IORT/MADT tables to retrieve the ITS base addr instead of vendor
specific CSRT table.
Shameer Kolothum (4):
A
IOMMU drivers can use this to implement their .get_resv_regions callback
for HW MSI specific reservations(e.g. ARM GICv3 ITS MSI region).
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 20
include/linux/dma-iommu.
string to implement this errata for
HiSilicon Hi161x SMMUv3 model on hip06/hip07 platforms.
Also, the arm64 silicon errata is updated with this same erratum.
Signed-off-by: John Garry <john.ga...@huawei.com>
[Shameer: Modified to use compatible string for errata]
Signed-off-by: Sham
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[lorenzo.pieral...@arm.com: updated commit log/ad
of vendor
specific CSRT table.
John Garry (2):
Doc: iommu/arm-smmu-v3: Add workaround for HiSilicon erratum 161010801
iommu/of: Add msi address regions reservation helper
Shameer Kolothum (3):
ACPI/IORT: Add msi address regions reservation helper
iommu/dma: Add a helper function to
IOMMU drivers can use this to implement their .get_resv_regions callback
for HW MSI specific reservations(e.g. ARM GICv3 ITS MSI region).
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
[John: added DT support]
Signed-off-by: John Garry <john.ga...@huawei.com>
driver which means these address regions will not be
translated and will be excluded from iova allocations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/arm-smmu-v3.c | 41 +++--
1 file changed, 35 insertions
helper function that retrieves msi address regions through device
tree msi mapping, so that these regions will not be translated by IOMMU
and will be excluded from IOVA allocations.
Signed-off-by: John Garry <john.ga...@huawei.com>
[Shameer: Modified msi-parent retrieval logic]
Signed-off-by: Sham
omments.
RFC v1 --> RFC v2
Based on Robin's review comments,
-Removed the generic erratum framework.
-Using IORT/MADT tables to retrieve the ITS base addr instead of vendor
specific CSRT table.
Shameer Kolothum (3):
ACPI/IORT: Add msi address regions reservation helper
iommu/dma: A
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations. The function checks for the smmu model number and
only applies the msi reservation if the platform requires it.
Signed-off-by: S
Modified iommu_dma_get_resv_regions() to include GICv3 ITS
region on ACPI based ARM platfiorms which may require HW MSI
reservations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 8 +++-
1 file changed, 7 insertions(+), 1 de
.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Signed-off-by: Wei Xu <xuw...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 55
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 24 ++
2 files changed, 7
bles to retrieve the ITS base addr instead
of vendor specific CSRT table.
Shameer Kolothum (3):
ACPI/IORT: Add msi address regions reservation helper
iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation
arm64:dts:hisilicon Disable hisilicon smmu node on hip06/hip07
arch
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations. The function checks for the smmu model number and
only applies the msi reservation if the platform requires it.
Signed-off-by: S
Modified iommu_dma_get_resv_regions() to include GICv3 ITS
region on ACPI based ARM platfiorms which may require HW MSI
reservations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Reviewed-by: Robin Murphy <robin.mur...@arm.com>
---
drivers/iommu/dma
.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Signed-off-by: Wei Xu <xuw...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 56
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 25 ++
2 files changed, 81 inserti
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations. The function checks for the smmu model number and
only applies the msi reservation if the platform requires it.
Signed-off-by: S
Modified iommu_dma_get_resv_regions() to include GICv3 ITS
region on ACPI based ARM platfiorms which may require HW MSI
reservations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Reviewed-by: Robin Murphy <robin.mur...@arm.com>
---
drivers/iommu/dma
rt helper fn based on fwnode type(acpi).
RFCv2 -->PATCH
-Incorporated Lorenzo's review comments.
RFC v1 --> RFC v2
Based on Robin's review comments,
-Removed the generic erratum framework.
-Using IORT/MADT tables to retrieve the ITS base addr instead
of vendor specific CSRT table.
Sha
.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Signed-off-by: Wei Xu <xuw...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 55
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 24 ++
2 files changed, 79 inserti
- the msi
parent - through IORT device <-> ITS mappings and reserves it so that
these regions will not be translated by IOMMU and will be excluded from
IOVA allocations. The function checks for the smmu model number and
only applies the msi reservation if the platform requires it.
Signed-off-by: S
On certain HiSilicon platforms (hip06/hip07) the GIC ITS and PCIe RC
deviates from the standard implementation and this breaks PCIe MSI
functionality when SMMU is enabled.
The HiSilicon erratum 161010801 describes this limitation of certain
HiSilicon platforms to support the SMMU mappings for MSI
Modified iommu_dma_get_resv_regions() to include GICv3 ITS
region on ACPI based ARM platfiorms which may require HW MSI
reservations.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Reviewed-by: Robin Murphy <robin.mur...@arm.com>
---
drivers/iommu/dma
As we now already have the reserved regions list, just pass that into
vfio_iommu_has_sw_msi() fn.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/d
This allows the user-space to retrieve the supported IOVA
range(s), excluding any reserved regions. The implementation
is based on capability chains, added to VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
This retrieves the reserved regions associated with dev group and
checks for conflicts with any existing dma mappings. Also update
the iova list excluding the reserved regions.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
ttach/detach.
Shameer Kolothum (2):
vfio/type1: Add IOVA range capability support
iommu/dma: Move PCI window region reservation back into dma specific
path.
Shameerali Kolothum Thodi (5):
vfio/type1: Introduce iova list and add iommu aperture validity check
vfio/type1: Check re
eport only iommu specific reserved regions
to the user space.
Cc: Robin Murphy <robin.mur...@arm.com>
Cc: Joerg Roedel <j...@8bytes.org>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 54 ++-
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/d
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/d
This allows the user-space to retrieve the supported IOVA
range(s), excluding any reserved regions. The implementation
is based on capability chains, added to VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
ents to make iova list management logic more clear.
- Use of iova list copy so that original is not altered in
case of failure.
RFCv1 --> RFCv2
Addressed comments from Alex:
-Introduced IOVA list management and added checks for conflicts with
existing dma map entries during attach/detach.
Sha
As we now already have the reserved regions list, just pass that into
vfio_iommu_has_sw_msi() fn.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/d
This retrieves the reserved regions associated with dev group and
checks for conflicts with any existing dma mappings. Also update
the iova list excluding the reserved regions.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
eport only iommu specific reserved regions
to the user space.
Cc: Joerg Roedel <j...@8bytes.org>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Reviewed-by: Robin Murphy <robin.mur...@arm.com>
---
drivers/iommu/dma-iommu.c | 54 ++-
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 181
mapped regions which are known to be relaxable.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 96 +
1 file changed, 96 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 970d1ec06aed
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 91 +
1 file changed, 91
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum
---
v6 --> v7
Addressed the case where a container with only an mdev device will
have an empty list(Suggested by Alex).
---
drivers/vfio/vfio_iommu_type1.c | 26 ++
This allows the user-space to retrieve the supported IOVA
range(s), excluding any reserved regions. The implementation
is based on capability chains, added to VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum
---
v6 --> v7
Addressed mdev case with empty iovas list(Suggested by A
As we now already have the reserved regions list, just pass that into
vfio_iommu_has_sw_msi() fn.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers
As we now already have the reserved regions list, just pass that into
vfio_iommu_has_sw_msi() fn.
Signed-off-by: Shameer Kolothum
Reviewed-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/vfio
mapped regions which are known to be relaxable.
Signed-off-by: Shameer Kolothum
---
v7-->v8
-Added check for iommu_get_group_resv_regions() error ret.
---
drivers/vfio/vfio_iommu_type1.c | 98 +
1 file changed, 98 insertions(+)
diff --git a/drivers/v
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum
---
v7-->v8
-Addressed suggestions by Eric to update comments.
---
driv
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum
---
v7 --> v8
-Fixed possible invalid holes in iova list if there are no more
reserved regi
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum
Reviewed-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio
This allows the user-space to retrieve the supported IOVA
range(s), excluding any non-relaxable reserved regions. The
implementation is based on capability chains, added to
VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum
Reviewed-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c
and this respin
make use of that.
Please note that I don't have a platform to verify the reported RMRR
issue and appreciate testing on those platforms.
Thanks,
Shameer
[1] https://lkml.org/lkml/2018/6/5/760
[2] https://lore.kernel.org/patchwork/cover/1083072/
v7-->v8
-Rebased to 5.3-rc1
-Addres
CMDQ_OP_TLBI_NH_VA requires VMID and this was missing since
commit 1c27df1c0a82 ("iommu/arm-smmu: Use correct address mask
for CMD_TLBI_S2_IPA"). Add it back.
Fixes: 1c27df1c0a82 ("iommu/arm-smmu: Use correct address mask for
CMD_TLBI_S2_IPA")
Signed-off-by: Shameer Kol
Add a helper function that retrieves RMR memory descriptors
associated with a given endpoint dev. These memory regions
should have a unity mapping in the SMMU. So reserve them as
IOMMU_RESV_DIRECT.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 56
in SMMU.
-Introduced a flag in the RC node to express support for PRI.
Signed-off-by: Shameer Kolothum
---
-This should be updated through acpica git. I have sent out a pull
request for the same here,
https://github.com/acpica/acpica/pull/638
Please help to review.
---
include/acpi
,
Shameer
[0]. https://developer.arm.com/documentation/den0049/latest/
[1]. https://github.com/acpica/acpica/pull/638
Shameer Kolothum (4):
ACPICA: IORT: Update for revision E
ACPI/IORT: Add support for RMR node parsing
ACPI/IORT: Add RMR memory regions reservation helper
iommu/dma: Reserve
Add support for parsing RMR node information from ACPI.
Find associated stream ids and smmu node info from the
RMR node and populate a linked list with RMR memory
descriptors.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 119 +-
1 file
Added support to get RMR regions associated with a dev
reserved so that there is a unity mapping for them in
SMMU.
Signed-off-by: Shameer Kolothum
---
drivers/iommu/dma-iommu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/dma-iommu.c b/drivers
evice()")
Signed-off-by: Shameer Kolothum
---
Crash log:
[ 31.353605] hns3 :7d:00.3: Adding to iommu group 10
[ 31.358822] Unable to handle kernel NULL pointer dereference at virtual
address 0018
[ 31.367567] Mem abort info:
[ 31.370350] ESR = 0x9604
[ 31.373391] EC =
Get RMR regions associated with a dev reserved so that there is
a unity mapping for them in SMMU.
Signed-off-by: Shameer Kolothum
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 38 +
1 file changed, 38 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3
MR
related SIDs.
Signed-off-by: Shameer Kolothum
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 1953b317d814..5f366d5a9
Add a helper function that retrieves RMR memory descriptors
associated with a given IOMMU. This will be used by IOMMU
drivers to setup necessary mappings.
Now that we have this, invoke this from the generic helper
interface.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 60
Add support for parsing RMR node information from ACPI.
Find associated stream ids and smmu node info from the
RMR node and populate a linked list with RMR memory
descriptors.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 122 +-
1 file
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