[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
The Groovy Gorilla has reached end of life, so this bug will not be fixed for that release ** Changed in: linux (Ubuntu Groovy) Status: Fix Committed => Won't Fix -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: Fix Released Status in linux source package in Focal: New Status in linux source package in Groovy: Won't Fix Status in linux source package in Hirsute: Fix Released Bug description: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == The following changes since commit 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) are available in the Git repository at: https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 09:37:13 +) Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (5): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. HACK: Revert "of/device: Really only set bus DMA mask when appropriate" SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Greentime Hu (2): irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy Pragnesh Patel (1): clk: sifive: Add clock enable and disable ops Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (6): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched Zong Li (5): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml | 60 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml| 4 +- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 6 +- Documentation/devicetree/bindings/pwm/pwm-sifive.txt | 33 --- Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 72 + Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt| 51 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 127 + Documentation/devicetree/bindings/riscv/sifive.yaml| 20 +- Documentation/devicetree/bindings/serial/sifive-serial.yaml| 4 +- Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 +- arch/riscv/Kconfig | 8 + arch/riscv/Kconfig.socs| 2 +- arch/riscv/boot/dts/sifive/Makefile| 3 +- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 + arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts | 28 ++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts| 66 + arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts| 253 + arch/riscv/configs/defconfig | 5 + debian.riscv/config/annotations| 17 +- debian.riscv/config/config.common.ubuntu
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Changed in: linux (Ubuntu Focal) Assignee: William Wilson (jawn-smith) => (unassigned) -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: Fix Released Status in linux source package in Focal: New Status in linux source package in Groovy: Fix Committed Status in linux source package in Hirsute: Fix Released Bug description: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == The following changes since commit 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) are available in the Git repository at: https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 09:37:13 +) Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (5): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. HACK: Revert "of/device: Really only set bus DMA mask when appropriate" SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Greentime Hu (2): irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy Pragnesh Patel (1): clk: sifive: Add clock enable and disable ops Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (6): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched Zong Li (5): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml | 60 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml| 4 +- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 6 +- Documentation/devicetree/bindings/pwm/pwm-sifive.txt | 33 --- Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 72 + Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt| 51 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 127 + Documentation/devicetree/bindings/riscv/sifive.yaml| 20 +- Documentation/devicetree/bindings/serial/sifive-serial.yaml| 4 +- Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 +- arch/riscv/Kconfig | 8 + arch/riscv/Kconfig.socs| 2 +- arch/riscv/boot/dts/sifive/Makefile| 3 +- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 + arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts | 28 ++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts| 66 + arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts| 253 + arch/riscv/configs/defconfig | 5 + debian.riscv/config/annotations| 17 +- debian.riscv/config/config.common.ubuntu | 47 +-- drivers/clk/sifive/Kconfig
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Changed in: linux (Ubuntu Focal) Assignee: (unassigned) => William Wilson (jawn-smith) -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: Fix Released Status in linux source package in Focal: New Status in linux source package in Groovy: Fix Committed Status in linux source package in Hirsute: Fix Released Bug description: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == The following changes since commit 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) are available in the Git repository at: https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 09:37:13 +) Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (5): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. HACK: Revert "of/device: Really only set bus DMA mask when appropriate" SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Greentime Hu (2): irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy Pragnesh Patel (1): clk: sifive: Add clock enable and disable ops Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (6): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched Zong Li (5): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml | 60 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml| 4 +- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 6 +- Documentation/devicetree/bindings/pwm/pwm-sifive.txt | 33 --- Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 72 + Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt| 51 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 127 + Documentation/devicetree/bindings/riscv/sifive.yaml| 20 +- Documentation/devicetree/bindings/serial/sifive-serial.yaml| 4 +- Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 +- arch/riscv/Kconfig | 8 + arch/riscv/Kconfig.socs| 2 +- arch/riscv/boot/dts/sifive/Makefile| 3 +- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 + arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts | 28 ++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts| 66 + arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts| 253 + arch/riscv/configs/defconfig | 5 + debian.riscv/config/annotations| 17 +- debian.riscv/config/config.common.ubuntu | 47 +-- drivers/clk/sifive/Kconfig
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
This bug was fixed in the package linux - 5.11.0-11.12 --- linux (5.11.0-11.12) hirsute; urgency=medium * hirsute/linux: 5.11.0-11.12 -proposed tracker (LP: #1917335) * Packaging resync (LP: #1786013) - update dkms package versions - [Packaging] update variants * Support no udeb profile (LP: #1916095) - [Packaging] replace custom filter script with dctrl-tools - [Packaging] correctly implement noudeb build profiles. * Miscellaneous Ubuntu changes - [Packaging] dkms-versions -- remove nvidia-graphics-drivers-440-server - [Debian] run ubuntu-regression-suite for linux-unstable - [Packaging] remove Provides: aufs-dkms - [Packaging] Change source package name to linux - [Config] update gcc version in config due to toolchain update * Miscellaneous upstream changes - Revert "UBUNTU: [Config] disable nvidia and nvidia_server builds" - Xen/x86: don't bail early from clear_foreign_p2m_mapping() - Xen/x86: also check kernel mapping in set_foreign_p2m_mapping() - Xen/gntdev: correct dev_bus_addr handling in gntdev_map_grant_pages() - Xen/gntdev: correct error checking in gntdev_map_grant_pages() - xen/arm: don't ignore return errors from set_phys_to_machine - xen-blkback: don't "handle" error by BUG() - xen-netback: don't "handle" error by BUG() - xen-scsiback: don't "handle" error by BUG() - xen-blkback: fix error handling in xen_blkbk_map() - tty: protect tty_write from odd low-level tty disciplines - Bluetooth: btusb: Always fallback to alt 1 for WBS - media: pwc: Use correct device for DMA - bpf: Fix truncation handling for mod32 dst reg wrt zero - HID: make arrays usage and value to be the same - USB: quirks: sort quirk entries - usb: quirks: add quirk to start video capture on ELMO L-12F document camera reliable - ntfs: check for valid standard information attribute - Bluetooth: btusb: Some Qualcomm Bluetooth adapters stop working - arm64: tegra: Add power-domain for Tegra210 HDA - hwmon: (dell-smm) Add XPS 15 L502X to fan control blacklist - KVM: x86: Zap the oldest MMU pages, not the newest - KVM: do not assume PTE is writable after follow_pfn - mm: provide a saner PTE walking API for modules - KVM: Use kvm_pfn_t for local PFN variable in hva_to_pfn_remapped() -- Andrea Righi Mon, 01 Mar 2021 18:17:45 +0100 ** Changed in: linux (Ubuntu Hirsute) Status: In Progress => Fix Released -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: Fix Released Status in linux source package in Focal: New Status in linux source package in Groovy: Fix Committed Status in linux source package in Hirsute: Fix Released Bug description: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == The following changes since commit 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) are available in the Git repository at: https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 09:37:13 +) Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (5): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. HACK: Revert "of/device: Really only set bus DMA mask when appropriate" SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Greentime Hu (2): irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy Pragnesh Patel (1): clk: sifive: Add clock enable and disable ops Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (6): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Changed in: linux (Ubuntu Groovy) Status: In Progress => Fix Committed -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: In Progress Status in linux source package in Focal: New Status in linux source package in Groovy: Fix Committed Status in linux source package in Hirsute: In Progress Bug description: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == The following changes since commit 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) are available in the Git repository at: https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 09:37:13 +) Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (5): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. HACK: Revert "of/device: Really only set bus DMA mask when appropriate" SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Greentime Hu (2): irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy Pragnesh Patel (1): clk: sifive: Add clock enable and disable ops Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (6): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched Zong Li (5): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml | 60 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml| 4 +- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 6 +- Documentation/devicetree/bindings/pwm/pwm-sifive.txt | 33 --- Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 72 + Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt| 51 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 127 + Documentation/devicetree/bindings/riscv/sifive.yaml| 20 +- Documentation/devicetree/bindings/serial/sifive-serial.yaml| 4 +- Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 +- arch/riscv/Kconfig | 8 + arch/riscv/Kconfig.socs| 2 +- arch/riscv/boot/dts/sifive/Makefile| 3 +- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 + arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts | 28 ++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts| 66 + arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts| 253 + arch/riscv/configs/defconfig | 5 + debian.riscv/config/annotations| 17 +- debian.riscv/config/config.common.ubuntu | 47 +-- drivers/clk/sifive/Kconfig | 8
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Changed in: linux (Ubuntu Groovy) Importance: Undecided => High ** Changed in: linux (Ubuntu Groovy) Status: New => In Progress -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: In Progress Status in linux source package in Focal: New Status in linux source package in Groovy: In Progress Status in linux source package in Hirsute: In Progress Bug description: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == The following changes since commit 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) are available in the Git repository at: https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 09:37:13 +) Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (5): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. HACK: Revert "of/device: Really only set bus DMA mask when appropriate" SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Greentime Hu (2): irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy Pragnesh Patel (1): clk: sifive: Add clock enable and disable ops Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (6): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched Zong Li (5): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml | 60 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml| 4 +- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 6 +- Documentation/devicetree/bindings/pwm/pwm-sifive.txt | 33 --- Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 72 + Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt| 51 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 127 + Documentation/devicetree/bindings/riscv/sifive.yaml| 20 +- Documentation/devicetree/bindings/serial/sifive-serial.yaml| 4 +- Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 +- arch/riscv/Kconfig | 8 + arch/riscv/Kconfig.socs| 2 +- arch/riscv/boot/dts/sifive/Makefile| 3 +- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 + arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts | 28 ++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts| 66 + arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts| 253 + arch/riscv/configs/defconfig | 5 + debian.riscv/config/annotations| 17 +- debian.riscv/config/config.common.ubuntu | 47 +--
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Description changed: == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == - https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy + The following changes since commit + 7295e646e91b648b7f45b4f36eba14bfe59dd3f6: - commits: - Christoph Hellwig (1): - riscv: move sifive_l2_cache.c to drivers/soc + UBUNTU: Ubuntu-riscv-5.8.0-13.15 (2020-12-15 10:33:23 +0100) + are available in the Git repository at: + + https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy + + for you to fetch changes up to 86de0730500269fee8b71fcb1be29193455c3be7: + + UBUNTU: [Config] Align configs with Unleashed defconfigs (2021-01-11 + 09:37:13 +) + + Colin Ian King (1): - UBUNTU: [Config] Align configs with Unleashed defconfigs + UBUNTU: [Config] Align configs with Unleashed defconfigs - David Abdurachmanov (4): - PCI: microsemi: Add host driver for Microsemi PCIe controller - Microsemi PCIe expansion board DT entry. - SiFive Unleashed CPUFreq - SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) + David Abdurachmanov (5): + PCI: microsemi: Add host driver for Microsemi PCIe controller + Microsemi PCIe expansion board DT entry. + HACK: Revert "of/device: Really only set bus DMA mask when appropriate" + SiFive Unleashed CPUFreq + SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) - Green Wan (1): - riscv: dts: add support for PDMA device of HiFive Unleashed Rev A00 + Greentime Hu (2): + irqchip/sifive-plic: Fix broken irq_set_affinity() callback + irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy - Greentime Hu (1): - irqchip/sifive-plic: Fix broken irq_set_affinity() callback - - Kefeng Wang (1): - riscv: only select serial sifive if TTY is enabled - - Krzysztof Kozlowski (1): - dt-bindings: pwm: Convert PWM bindings to json-schema - - Pragnesh Patel (2): - clk: sifive: Add clock enable and disable ops - spi: dt-bindings: Convert spi-sifive binding to json-schema + Pragnesh Patel (1): + clk: sifive: Add clock enable and disable ops Rob Herring (2): - dt-bindings: More whitespace clean-ups in schema files - dt-bindings: Explicitly allow additional properties in board/SoC schemas + dt-bindings: More whitespace clean-ups in schema files + dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): - dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema - dt-bindings: riscv: convert pwm bindings to json-schema + dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema + dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): - i2c: ocores: fix polling mode workaround on FU540-C000 SoC + i2c: ocores: fix polling mode workaround on FU540-C000 SoC - Yash Shah (10): - RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 - RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 - gpio/sifive: Add DT documentation for SiFive GPIO - dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC - riscv: dts: add initial support for the SiFive FU740-C000 SoC - dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board - riscv: dts: add initial board data for the SiFive HiFive Unmatched - riscv: dts: Add DT support for SiFive L2 cache controller - riscv: dts: Add DT support for SiFive FU540 GPIO driver - riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file + Yash Shah (6): + RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 + RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 + dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC + riscv: dts: add initial support for the SiFive FU740-C000 SoC + dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board + riscv: dts: add initial board data for the SiFive HiFive Unmatched Zong Li (5): - clk: sifive: Extract prci core to common base - clk: sifive: Use common name for prci configuration - clk: sifive: Add a driver for the SiFive FU740 PRCI IP block - clk: sifive: Fix the wrong bit field shift - dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI + clk: sifive: Extract prci core to common base + clk: sifive: Use common name for prci configuration + clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Description changed: - Add support for SiFive Unmatched + == SRU Justifcation Groovy == + + The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this + board support. + + == The fix(es) == + + https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy + + commits: + Christoph Hellwig (1): + riscv: move sifive_l2_cache.c to drivers/soc + + Colin Ian King (1): + UBUNTU: [Config] Align configs with Unleashed defconfigs + + David Abdurachmanov (4): + PCI: microsemi: Add host driver for Microsemi PCIe controller + Microsemi PCIe expansion board DT entry. + SiFive Unleashed CPUFreq + SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) + + Green Wan (1): + riscv: dts: add support for PDMA device of HiFive Unleashed Rev A00 + + Greentime Hu (1): + irqchip/sifive-plic: Fix broken irq_set_affinity() callback + + Kefeng Wang (1): + riscv: only select serial sifive if TTY is enabled + + Krzysztof Kozlowski (1): + dt-bindings: pwm: Convert PWM bindings to json-schema + + Pragnesh Patel (2): + clk: sifive: Add clock enable and disable ops + spi: dt-bindings: Convert spi-sifive binding to json-schema + + Rob Herring (2): + dt-bindings: More whitespace clean-ups in schema files + dt-bindings: Explicitly allow additional properties in board/SoC schemas + + Sagar Kadam (2): + dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema + dt-bindings: riscv: convert pwm bindings to json-schema + + Sagar Shrikant Kadam (1): + i2c: ocores: fix polling mode workaround on FU540-C000 SoC + + Yash Shah (10): + RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 + RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 + gpio/sifive: Add DT documentation for SiFive GPIO + dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC + riscv: dts: add initial support for the SiFive FU740-C000 SoC + dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board + riscv: dts: add initial board data for the SiFive HiFive Unmatched + riscv: dts: Add DT support for SiFive L2 cache controller + riscv: dts: Add DT support for SiFive FU540 GPIO driver + riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file + + Zong Li (5): + clk: sifive: Extract prci core to common base + clk: sifive: Use common name for prci configuration + clk: sifive: Add a driver for the SiFive FU740 PRCI IP block + clk: sifive: Fix the wrong bit field shift + dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI + + The RISC-V configs have also been re-aligned to match the RISC-V + Unleashed/Unmatched defconfig for improved clock and power stability and + to fix some weird clock/scheduling random RCU timeouts and hangs during + heavy load on slow backing store I/O at boot time. + + == Test Case == + + Build ubuntu 5.8 risc kernel with these patches. QEMU and RISC-V + Unleashed and Unmatched should boot and be rebootable with this fixes. + Tested also with stress-ng and a network uptime ping test for 48 hours. + + == Where problems could occur == + + Several places: + + 1. Clocks - IRQ and clock handling has been modified, so potential for random timing behaviour changes. + 2. CONFIG changes - now aligning the clock, scheduling and power config settings to the defconfigs for RISC-V unleashed. This does improve stability on the Ubuntu boots and reboots, but may have unforeseen side effects. + 3. CPU affinity fixes should improve some historical SMP problems but may uncover other SMP issues. + 4. Some of these patches are still not upstream, so there may be some question to their unreviewed quality. ** Description changed: - == SRU Justifcation Groovy == + == SRU Justifcation Groovy/RISCV == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy commits: Christoph Hellwig (1): - riscv: move sifive_l2_cache.c to drivers/soc + riscv: move sifive_l2_cache.c to drivers/soc Colin Ian King (1): - UBUNTU: [Config] Align configs with Unleashed defconfigs + UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (4): - PCI: microsemi: Add host driver for Microsemi PCIe controller - Microsemi PCIe expansion board DT entry. - SiFive Unleashed CPUFreq - SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) + PCI: microsemi: Add host
[Kernel-packages] [Bug 1910965] Re: riscv: backport support for SiFive Unmatched
** Changed in: linux (Ubuntu) Status: Incomplete => In Progress ** Changed in: linux (Ubuntu) Importance: Undecided => High ** Changed in: linux (Ubuntu) Assignee: (unassigned) => Colin Ian King (colin-king) ** Also affects: linux (Ubuntu Groovy) Importance: Undecided Status: New ** Also affects: linux (Ubuntu Focal) Importance: Undecided Status: New ** Also affects: linux (Ubuntu Hirsute) Importance: High Assignee: Colin Ian King (colin-king) Status: In Progress -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1910965 Title: riscv: backport support for SiFive Unmatched Status in linux package in Ubuntu: In Progress Status in linux source package in Focal: New Status in linux source package in Groovy: New Status in linux source package in Hirsute: In Progress Bug description: == SRU Justifcation Groovy == The SiFive HiFive Unmatched board should be supported as well as the current Unleashed. There are various upstream commits for this support and some misc fixes for the Unleashed and Unmatched that are required for this board support. == The fix(es) == https://git.launchpad.net/~colin-king/+git/ubuntu-riscv-groovy commits: Christoph Hellwig (1): riscv: move sifive_l2_cache.c to drivers/soc Colin Ian King (1): UBUNTU: [Config] Align configs with Unleashed defconfigs David Abdurachmanov (4): PCI: microsemi: Add host driver for Microsemi PCIe controller Microsemi PCIe expansion board DT entry. SiFive Unleashed CPUFreq SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) Green Wan (1): riscv: dts: add support for PDMA device of HiFive Unleashed Rev A00 Greentime Hu (1): irqchip/sifive-plic: Fix broken irq_set_affinity() callback Kefeng Wang (1): riscv: only select serial sifive if TTY is enabled Krzysztof Kozlowski (1): dt-bindings: pwm: Convert PWM bindings to json-schema Pragnesh Patel (2): clk: sifive: Add clock enable and disable ops spi: dt-bindings: Convert spi-sifive binding to json-schema Rob Herring (2): dt-bindings: More whitespace clean-ups in schema files dt-bindings: Explicitly allow additional properties in board/SoC schemas Sagar Kadam (2): dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema Sagar Shrikant Kadam (1): i2c: ocores: fix polling mode workaround on FU540-C000 SoC Yash Shah (10): RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 gpio/sifive: Add DT documentation for SiFive GPIO dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched riscv: dts: Add DT support for SiFive L2 cache controller riscv: dts: Add DT support for SiFive FU540 GPIO driver riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file Zong Li (5): clk: sifive: Extract prci core to common base clk: sifive: Use common name for prci configuration clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Fix the wrong bit field shift dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI The RISC-V configs have also been re-aligned to match the RISC-V Unleashed/Unmatched defconfig for improved clock and power stability and to fix some weird clock/scheduling random RCU timeouts and hangs during heavy load on slow backing store I/O at boot time. == Test Case == Build ubuntu 5.8 risc kernel with these patches. QEMU and RISC-V Unleashed and Unmatched should boot and be rebootable with this fixes. Tested also with stress-ng and a network uptime ping test for 48 hours. == Where problems could occur == Several places: 1. Clocks - IRQ and clock handling has been modified, so potential for random timing behaviour changes. 2. CONFIG changes - now aligning the clock, scheduling and power config settings to the defconfigs for RISC-V unleashed. This does improve stability on the Ubuntu boots and reboots, but may have unforeseen side effects. 3. CPU affinity fixes should improve some historical SMP problems but may uncover other SMP issues. 4. Some of these patches are still not upstream, so there may be some question to their unreviewed quality. To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1910965/+subscriptions -- Mailing list:
