Werner Almesberger a écrit :
When working with a component that contains multiple independent units,
KiCad warns about pin locations being occupied even if the conflicting
pin is in a different unit.
This may to be unnecessary. I've attached a patch that suppresses the
warning if the pins
wdoe999 a écrit :
I don't know if I'm doing something wrong, but...
I created 3 boards that have one or more vias on each. If I create a
drill file for each board, the drill file does contain all of the via
drill holes for that board. I then put the 3 boards onto one panel and
then
Boris Barbour a écrit :
Hi,
Is it possible to join a track to a net without starting drawing on
the net in question? In other words, if I start tracing in the middle
of nowhere, the track is assigned to Net:0/noname. It is then
impossible to join it to another net with DRC on (I get
Alain M. a écrit :
Hi Jean Pierre,
I also found a problem in the new version with Zone fill:
I needed a pad to be round on one side and right-angled on the other
side. To do that, I ploted an ARC on the solder-side. This makes an
extra copper area exactly as I need. The only problem is
oecherexpat a écrit :
Hi Jean-Pierre,
Please find the file WMD-20090227. brd in the files area inside the
Zone filling issue folder.
As mentioned, I tried the latest stable version as well as 20090118
(which actually shows 20090107 in the header), both under XP SP3. Can
also try on Ubuntu
cf...@rocketmail.com a écrit :
Nobody ?
--- In kicad-users@ yahoogroups. com
mailto:kicad-users%40yahoogroups.com, cf...@... cf...@... wrote:
Hi all,
who has made the video board demos in kicad ?
just to know, how does he made the routing ? manually,
autorouter(kicad) or
Boris Barbour a écrit :
Hi,
I am considering a design that would use blind and buried vias.
However, KiCad
rather scarily says it is experimental, and the changelog seems to
suggest it
cannot yet be used for production. Is it known not to work or
should work
but untested?
Should
Carlo Garberi a écrit :
Please note:
in Kicad-2009-12- 29:
EESCHEMA
Libedit
Edit Components Properties
there is no more the field FIELD
and you can not edit/modify the properties of a components into Libedit.
You have a new tool to edit/add/remove fields in Libedit
--
Jean-Pierre
calvingrier a écrit :
--- In kicad-users@ yahoogroups. com
mailto:kicad-users%40yahoogroups.com, Pedro Martin [EMAIL PROTECTED]
wrote:
Hi,
I think you are not doing anything wrong.
But there are only 2 choices:
1. Edit eeschema R an C and change pin numbers to 1 an 2.
2. Edit
gembler01 a écrit :
This problem is reappearing in both the next-to-latest (2008-07-15
Final Win XP) and the latest version (2008-08-25 Final Win XP). In
2008-07-15 I successfully defined and filled a zone. I then deleted
the zone filling and refilled the zone, without changing the zone
I uploaded the last stable (autoinstall for windows and a full .tgz
archive for linux) release to
iut-tice.ujf-grenoble.fr/cao/
Please, note the kicad tree was modified, and it is better to remove old
installs.
Also note the official kicad site is (update yours links)
deaninkc a écrit :
No offense taken. Believe me I develop accounting software for a
living and have dealt with enough people not reading the documentation
to know better. I've read and googled for hours and I seem to be
overlooking this one. I don't even see a mention of a .mdc file
Due to a problem in eeschema annotation, I released a new candidate version
(kicad-2007-11-29-RC2). See:
iut-tice.ujf-grenoble.fr/cao/
--
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de
dave a écrit :
jean-pierre charras wrote:
dave a écrit :
Dan Andersson wrote:
On Sunday 25 November 2007 07:15:05 dave wrote:
what am i doing wrong?
i drew up a schematic and made a netlist and started to layout the board.
i
found an error and
A Kicad release candidate (kicad-2007-11-19-RC) was uploaded. See:
iut-tice.ujf-grenoble.fr/cao/
--
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin
barkerben a écrit :
Hi -
First off apologies for posting to users and developers - that was a
mistake!
I am getting the error listed in the subject line when I try to
create a drill file for my board, however having said that the drill
files do appear to be created succesfully. Does
Cool - thanks. So the drill file that is produced is OK, and is not
affected by this error?
The drill file is Ok.
This problem is due to drc markers on your board which are not drawn in
drill map.
You can remove these markers if you want.
--
Jean-Pierre CHARRAS
Maître de conférences
The answer to the problem ( how to link footprints and component) is :
Use the .equ files with cvpcb and use the automatic association feature
of cvpcb.
A .equ file is the file which handle the component (exactly the value of
a component and its footprint.
(see in Cvpcb doc, the very short
barkerben a écrit :
One more question (I have answered the above myself via
experimentation). I got the following from Olimex, who I use to etch
boards:
Hi,
Your gerbers contain composite layers and negative plots (G36 G37
commands).
On such gerbers we can't do DRC check, panelization nor to
I have teste the board with pcbnew version 2007-07-09 (last stable
version) and some other versions.
I do not have any crash ans i cannot fix anything.
Please can you download the pcbnew.exe from:
ftp://iut-tice.ujf-grenoble.fr/cao/kicad/winexe
and test it. Perhaps there is a problem in your
Dan a écrit :
I was wondering if there is a way to view just one layer at a time on
the screen ?
I couldn't see where in the menu this might be. I recall seeing this
feature in other tools. I was able to turn off layers to view any one
separately.
This is the Hight contrast mode (left
Vignesh a écrit :
Hi all,
I'm also running into exactly the same problem. I am using unicode
version of eeschema (2007-05-25) . I even tried running the executable
from command line, it generates the following:
*PADS-PCB*
*PART*
*END*
Nothing else. I've done DRC checks and no errors,
kicad a écrit :
Hello
When I'm trying to draw arcs in the module editor they all look like
cake slices IE they all show the radiuslines, same with all the
components in the librarys witch contain arcs.
This is a wxGTK bug (see how-to-build-kicad.txt)
Last version of wxGTK does not have
richmogd a écrit :
Hi All,
I'm struggling to work out what I should be doing with the power and
ground connections. Basically, I've been using the 3.3V power and GND
power for the corresponding connection in my circuit. Each time I use
one of these power, kicad asks me to annotate them, so
The kicad autoinstall package has a problem:
Its creates a directory named KiCad, and kicad (which is case
sensitive) expects a directory named kicad.
Therefore kicad does not find the help files and some other files
(default config files and dictionnaries)
In order to avoid problems:
Rename
I have uploaded a new (stable version) : kicad-2007-01-15
--
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex
Recherche :
LIS - INPG
I have uploaded a new kicad release candidate (kicad-2007-01-03-RC2) at:
iut-tice.ujf-grenoble.fr/cao/
Some bugs are fixed.
Some new enhancements.
This is the last release candidate before the stable version.
--
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie
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