On 24/06/2015 07:42, Wu, Feng wrote:
Do you mean we don't use bitfields at all, or the following format is
acceptable, in which, we use bitfileds as less as possible?
union {
struct
{
u16 on : 1, /* bit 256 - Outstanding Notification */
sn
On Tue, Jun 23, 2015 at 04:06:27PM +0100, Andre Przywara wrote:
Currently we use ld to convert the static guest/init binary back
into an object file, which we can embed as a binary blob into our
lkvm binary. This works fine as long as compiler and linker use the
same ELF target format, which
On 22/06/15 09:44, Peter Maydell wrote:
On 17 June 2015 at 10:00, Suzuki K. Poulose suzuki.poul...@arm.com wrote:
From: Suzuki K. Poulose suzuki.poul...@arm.com
This patch adds a generic ARM v8 KVM target cpu type for use
by the new CPUs which eventualy ends up using the common sys_reg
Hi Christoffer,
On 24/06/15 09:51, Christoffer Dall wrote:
On Wed, Jun 24, 2015 at 09:29:56AM +0100, Marc Zyngier wrote:
On 22/06/15 09:44, Peter Maydell wrote:
On 17 June 2015 at 10:00, Suzuki K. Poulose suzuki.poul...@arm.com wrote:
From: Suzuki K. Poulose suzuki.poul...@arm.com
This
On Wed, Jun 24, 2015 at 09:29:56AM +0100, Marc Zyngier wrote:
On 22/06/15 09:44, Peter Maydell wrote:
On 17 June 2015 at 10:00, Suzuki K. Poulose suzuki.poul...@arm.com wrote:
From: Suzuki K. Poulose suzuki.poul...@arm.com
This patch adds a generic ARM v8 KVM target cpu type for use
by
The reference (R) and change (C) bits in a HPT entry can be set by
hardware at any time up until the HPTE is invalidated and the TLB
invalidation sequence has completed. This means that when removing
a HPTE, we need to read the HPTE after the invalidation sequence has
completed in order to obtain
This adds implementations for the H_CLEAR_REF (test and clear reference
bit) and H_CLEAR_MOD (test and clear changed bit) hypercalls.
When clearing the reference or change bit in the guest view of the HPTE,
we also have to clear it in the real HPTE so that we can detect future
references or
This builds on the ability to run more than one vcore on a physical
core by using the micro-threading (split-core) modes of the POWER8
chip. Previously, only vcores from the same VM could be run together,
and (on POWER8) only if they had just one thread per core. With the
ability to split the
The reference (R) and change (C) bits in a HPT entry can be set by
hardware at any time up until the HPTE is invalidated and the TLB
invalidation sequence has completed. This means that when removing
a HPTE, we need to read the HPTE after the invalidation sequence has
completed in order to obtain
When running a virtual core of a guest that is configured with fewer
threads per core than the physical cores have, the extra physical
threads are currently unused. This makes it possible to use them to
run one or more other virtual cores from the same guest when certain
conditions are met. This
This is my current queue of patches for HV KVM. This series is based
on the kvm next branch. They have all been posted 6 weeks ago or
more, though I have just added a 3-line fix to patch 2/5 to fix a bug
that we found in testing migration, and I expanded a comment (no code
change) in patch 3/5
This is my current queue of patches for HV KVM. This series is based
on the kvm next branch. They have all been posted 6 weeks ago or
more, though I have just added a 3-line fix to patch 2/5 to fix a bug
that we found in testing migration, and I expanded a comment (no code
change) in patch 3/5
This builds on the ability to run more than one vcore on a physical
core by using the micro-threading (split-core) modes of the POWER8
chip. Previously, only vcores from the same VM could be run together,
and (on POWER8) only if they had just one thread per core. With the
ability to split the
On Fri, Jun 19, 2015 at 01:23:47PM +0100, Alex Bennée wrote:
This introduces a level of indirection for the debug registers. Instead
of using the sys_regs[] directly we store registers in a structure in
the vcpu. As we are no longer tied to the layout of the sys_regs[] we
can make the copies
Hi Pavel,
On 06/24/2015 02:20 PM, Pavel Fedin wrote:
Hello!
What I can simply do is preventing any non identity mapping for irqchip
routing entries, ie. gsi != irqchip.pin. This fixes the problem of
KVM_IRQ_LINE. This check can happen in arm kvm_set_routing_entry() and
that's it.
You
This builds on the ability to run more than one vcore on a physical
core by using the micro-threading (split-core) modes of the POWER8
chip. Previously, only vcores from the same VM could be run together,
and (on POWER8) only if they had just one thread per core. With the
ability to split the
Hello!
What I can simply do is preventing any non identity mapping for irqchip
routing entries, ie. gsi != irqchip.pin. This fixes the problem of
KVM_IRQ_LINE. This check can happen in arm kvm_set_routing_entry() and
that's it.
You cannot fix problem of KVM_IRQ_LINE because anyway with
This adds implementations for the H_CLEAR_REF (test and clear reference
bit) and H_CLEAR_MOD (test and clear changed bit) hypercalls.
When clearing the reference or change bit in the guest view of the HPTE,
we also have to clear it in the real HPTE so that we can detect future
references or
This builds on the ability to run more than one vcore on a physical
core by using the micro-threading (split-core) modes of the POWER8
chip. Previously, only vcores from the same VM could be run together,
and (on POWER8) only if they had just one thread per core. With the
ability to split the
This fixes a bug in the tracking of pages that get modified by the
guest. If the guest creates a large-page HPTE, writes to memory
somewhere within the large page, and then removes the HPTE, we only
record the modified state for the first normal page within the large
page, when in fact the guest
On Tue, Jun 16, 2015 at 05:36:01PM -0700, Andy Lutomirski wrote:
Now that there is no paravirt TSC, the native is inappropriate.
The function does RDTSC, so give it the obvious name: rdtsc()
Suggested-by: Borislav Petkov b...@suse.de
Signed-off-by: Andy Lutomirski l...@kernel.org
---
On Wed, 24 Jun 2015 15:49:27 +0200
Michael S. Tsirkin m...@redhat.com wrote:
Userspace currently simply tries to give vhost as many regions
as it happens to have, but you only have the mem table
when you have initialized a large part of VM, so graceful
failure is very hard to support.
The
Userspace is allowed to set the guest's view of CNTVCT, which turns
into setting CNTVOFF for the whole VM. One thing userspace is not supposed
to do is to update that register while the guest is running. Time will
either move forward (best case) or backward (really bad idea). Either way,
this
Hi Will,
do you want me to respin the whole series to address the remaining minor
comments in the last four patches or do you want to take patch 01-06
already (which I think Marc has already agreed upon)?
Then I would just send an updated version of the remaining patches.
Cheers,
Andre.
On Wed, Jun 24, 2015 at 04:07:27PM +0200, Igor Mammedov wrote:
On Wed, 24 Jun 2015 15:49:27 +0200
Michael S. Tsirkin m...@redhat.com wrote:
Userspace currently simply tries to give vhost as many regions
as it happens to have, but you only have the mem table
when you have initialized a
On Wed, 24 Jun 2015 16:17:46 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Jun 24, 2015 at 04:07:27PM +0200, Igor Mammedov wrote:
On Wed, 24 Jun 2015 15:49:27 +0200
Michael S. Tsirkin m...@redhat.com wrote:
Userspace currently simply tries to give vhost as many regions
as
Userspace currently simply tries to give vhost as many regions
as it happens to have, but you only have the mem table
when you have initialized a large part of VM, so graceful
failure is very hard to support.
The result is that userspace tends to fail catastrophically.
Instead, add a new ioctl
-Original Message-
From: Alex Williamson [mailto:alex.william...@redhat.com]
Sent: Thursday, June 25, 2015 3:49 AM
To: Eric Auger
Cc: Joerg Roedel; Avi Kivity; Wu, Feng; kvm@vger.kernel.org;
linux-ker...@vger.kernel.org; pbonz...@redhat.com; mtosa...@redhat.com
Subject: Re: [v4
-Original Message-
From: Joerg Roedel [mailto:j...@8bytes.org]
Sent: Wednesday, June 24, 2015 11:46 PM
To: Alex Williamson
Cc: Wu, Feng; Eric Auger; Avi Kivity; kvm@vger.kernel.org;
linux-ker...@vger.kernel.org; pbonz...@redhat.com; mtosa...@redhat.com
Subject: Re: [v4 08/16] KVM:
On Thu, Jun 25, 2015 at 1:07 AM, John Nielsen li...@jnielsen.net wrote:
Interesting. Using the same PC-BSD image I am able to reproduce on a server
running slightly older software but I can not reproduce running bleeding
edge. I verified enable_apicv=Y on both. In both cases I ran
qemu-kvm
Currently we save/restore fp/simd on each exit. Fist patch optimizes arm64
save/restore, we only do so on Guest access. hackbench and
several lmbench tests show anywhere from 30% to above 50% optimzation
achieved.
In second patch 32-bit handler is updated to keep exit handling consistent
with
After enhancing arm64 FP/SIMD exit handling, ARMv7 VFP exit branch is moved
to guest trap handling. This allows us to keep exit handling flow between both
architectures consistent.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/kvm/interrupts.S | 14 --
1 file
This patch only saves and restores FP/SIMD registers on Guest access. To do
this cptr_el2 FP/SIMD trap is set on Guest entry and later checked on exit.
lmbench, hackbench show significant improvements, for 30-50% exits FP/SIMD
context is not saved/restored
Signed-off-by: Mario Smarduch
On Wed, Jun 24, 2015 at 04:52:29PM +0200, Igor Mammedov wrote:
On Wed, 24 Jun 2015 16:17:46 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Jun 24, 2015 at 04:07:27PM +0200, Igor Mammedov wrote:
On Wed, 24 Jun 2015 15:49:27 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On 23/06/2015 00:08, John Nielsen wrote:
I’m resurrecting an old thread since I haven’t heard anything in a
while. Has anyone looked in to the KVM+apicv bug documented above as
well as here:
https://bugs.launchpad.net/qemu/+bug/1329956 ?
If appropriate, where should I go to file a KVM bug
On Mon, Jun 15, 2015 at 06:17:03PM +0200, Eric Auger wrote:
I guess this discussion also is relevant wrt [RFC v6 00/16] KVM-VFIO
IRQ forward control series? Or is that central registry maintained by
a posted interrupts manager something more specific to x86?
From what I understood so far, the
On Thu, Jun 18, 2015 at 02:04:08PM -0600, Alex Williamson wrote:
There are plenty of details to be filled in,
I also need to fill plenty of details in my head first, so here are some
suggestions based on my current understanding. Please don't hesitate to
correct me if where I got something
On 24/06/2015 17:57, Bandan Das wrote:
Paolo Bonzini pbonz...@redhat.com writes:
...
I did this:
1) download
http://download.pcbsd.org/iso/10.1-RELEASE/amd64/PCBSD10.1.2-x64-trueos-server.raw.xz
and unpack it
2) run it with qemu-kvm -drive
if=virtio,PCBSD10.1.2-x64-trueos-server.raw
Paolo Bonzini pbonz...@redhat.com writes:
...
I did this:
1) download
http://download.pcbsd.org/iso/10.1-RELEASE/amd64/PCBSD10.1.2-x64-trueos-server.raw.xz
and unpack it
2) run it with qemu-kvm -drive
if=virtio,PCBSD10.1.2-x64-trueos-server.raw -smp 2
3) login as root/pcbsd, type reboot
This patch implements the VFP context switch code called from vcpu_put in
Host KVM. In addition it implements the logic to skip setting a VFP trap if one
is not needed. Also resets the flag if Host KVM switched registers to trap new
guest vfp accesses.
Signed-off-by: Mario Smarduch
Define the required kvm_vcpu_arch fields, and offsets to manage VFP state. And
declary Hyp interface function to switch VFP registers.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_asm.h |1 +
arch/arm/include/asm/kvm_host.h |3 +++
Currently we do a lazy VFP switch in Hyp mode, but once we exit and re-enter hyp
mode we trap again on VFP access. This mode has shown around 30-50% improvement
running hackbench and lmbench.
This patch series extends lazy VFP switch beyond Hyp mode to KVM host mode.
1 - On guest access we
This patch implements host KVM interface to Hyp mode VFP function to
switch out guest and switch in host.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/kvm/arm.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
Hi Joerg,
On 06/24/2015 05:50 PM, Joerg Roedel wrote:
On Mon, Jun 15, 2015 at 06:17:03PM +0200, Eric Auger wrote:
I guess this discussion also is relevant wrt [RFC v6 00/16] KVM-VFIO
IRQ forward control series? Or is that central registry maintained by
a posted interrupts manager something
On Tue, Jun 23, 2015 at 9:49 AM, Paolo Bonzini pbonz...@redhat.com wrote:
There are some x86 conflicts, one with the rc8 pull request and
the rest with Ingo's FPU rework.
Hmm. I'm dropping the fx_init(..init_state) changes from you pull
request, since fx_init is static and only has one caller,
On 24/06/2015 18:33, Linus Torvalds wrote:
On Tue, Jun 23, 2015 at 9:49 AM, Paolo Bonzini pbonz...@redhat.com wrote:
There are some x86 conflicts, one with the rc8 pull request and
the rest with Ingo's FPU rework.
Hmm. I'm dropping the fx_init(..init_state) changes from you pull
On Jun 24, 2015, at 9:50 AM, Paolo Bonzini pbonz...@redhat.com wrote:
On 23/06/2015 00:08, John Nielsen wrote:
I’m resurrecting an old thread since I haven’t heard anything in a
while. Has anyone looked in to the KVM+apicv bug documented above as
well as here:
On Wed, Jun 24, 2015 at 02:30:05PM +0100, Andre Przywara wrote:
do you want me to respin the whole series to address the remaining minor
comments in the last four patches or do you want to take patch 01-06
already (which I think Marc has already agreed upon)?
Then I would just send an updated
On 24/06/2015 19:07, John Nielsen wrote:
Unfortunately I no longer have the test environment I used a few days
ago to reproduce this issue so I can’t verify the software versions
that were in use. It’s possible I was mistaken about the kernel
version (I thought it was 4.0.4). Perhaps it
On Wed, 2015-06-24 at 18:25 +0200, Eric Auger wrote:
Hi Joerg,
On 06/24/2015 05:50 PM, Joerg Roedel wrote:
On Mon, Jun 15, 2015 at 06:17:03PM +0200, Eric Auger wrote:
I guess this discussion also is relevant wrt [RFC v6 00/16] KVM-VFIO
IRQ forward control series? Or is that central
On Fri, Jun 19, 2015 at 01:23:38PM +0100, Alex Bennée wrote:
Here is V6 of the KVM Guest Debug support for arm64.
The changes are even more minimal than the last round which is
hopefully a good indication the series is ready for merging:
Unfortunately this series breaks the build on 32-bit
On Fri, Jun 19, 2015 at 01:23:46PM +0100, Alex Bennée wrote:
This is a pre-cursor to sharing the code with the guest debug support.
This replaces the big macro that fishes data out of a fixed location
with a more general helper macro to restore a set of debug registers. It
uses macro
On Fri, Jun 19, 2015 at 01:23:48PM +0100, Alex Bennée wrote:
This adds support for userspace to control the HW debug registers for
guest debug. In the debug ioctl we copy the IMPDEF defined number of
s/defined//
registers into a new register set called host_debug_state. There is now
a new
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