Jim Keniston wrote:
On Tue, 2009-04-21 at 20:17 -0400, Masami Hiramatsu wrote:
...
Hi Peter and Jim,
Now what I'm doing is making opcode tables like this.
Table: 1-byte opcode
Alias: none
00: ADD Eb,Gb
01: ADD Ev,Gv
02: ADD Gb,Eb
03: ADD Gv,Ev
04: ADD AL,Ib
05: ADD rAX,Iz
06: PUSH
On Thu, 2009-04-23 at 13:29 -0400, Masami Hiramatsu wrote:
...
Hmm, maybe, parser can handle (extra_info) as a solid keyword.
so let's define actual format.
opcode maps
Table: table-name
Referrer: escamed-name
opcode: mnemonic|Grp [operand1[,operand2...]] [(extra1)[,(extra2)...] [|
Jim Keniston wrote:
On Thu, 2009-04-23 at 13:29 -0400, Masami Hiramatsu wrote:
...
Hmm, maybe, parser can handle (extra_info) as a solid keyword.
so let's define actual format.
opcode maps
Table: table-name
Referrer: escamed-name
opcode: mnemonic|Grp [operand1[,operand2...]]
On Tue, 2009-04-21 at 20:17 -0400, Masami Hiramatsu wrote:
...
Hi Peter and Jim,
Now what I'm doing is making opcode tables like this.
Table: 1-byte opcode
Alias: none
00: ADD Eb,Gb
01: ADD Ev,Gv
02: ADD Gb,Eb
03: ADD Gv,Ev
04: ADD AL,Ib
05: ADD rAX,Iz
06: PUSH ES (i64)
07: POP ES
H. Peter Anvin wrote:
Jim Keniston wrote:
It looks like AT2(Ev,Gv) would yield the same bits as AT2(Gv,Ev). It'd
be nice not to lose the operand-order information. And we'd have to
make clear whether which notation we're using -- src,dest as in the gnu
assembler, or dest,src as in the AMD
H. Peter Anvin wrote:
Masami Hiramatsu wrote:
Hmm, I have an idea about instruction table. Usually, instruction tables
are encoded with code defined by each decoder/emulator. This method
will show their internal code directly, and is hard to maintain when
the opcode map is updated. Instead
Masami Hiramatsu wrote:
Aah, I see. So we'd better make a parser which generates internal
data structure from genuine opcode map in compilation time.
And I changed my mind about internal data structure too.
In this version, I'll use a smallest bits which are needed
for the decoder.
H. Peter Anvin wrote:
Jim Keniston wrote:
For user-space probing, we've been concentrating on native-built
executables. Am I correct in thinking that we'll see 16-bit or V86 mode
only on legacy apps built elsewhere? In any case, it only makes sense
to build on the kvm folks' work in this
Masami Hiramatsu wrote:
Hmm, I have an idea about instruction table. Usually, instruction tables
are encoded with code defined by each decoder/emulator. This method
will show their internal code directly, and is hard to maintain when
the opcode map is updated. Instead of that, I'd like to
On Thu, 2009-04-16 at 19:31 -0400, Masami Hiramatsu wrote:
...
Hmm, I have an idea about instruction table. Usually, instruction tables
are encoded with code defined by each decoder/emulator. This method
will show their internal code directly, and is hard to maintain when
the opcode map is
Jim Keniston wrote:
It looks like AT2(Ev,Gv) would yield the same bits as AT2(Gv,Ev). It'd
be nice not to lose the operand-order information. And we'd have to
make clear whether which notation we're using -- src,dest as in the gnu
assembler, or dest,src as in the AMD (and Intel?) manuals.
On Fri, 2009-04-03 at 20:37 -0400, Masami Hiramatsu wrote:
Hi Peter,
H. Peter Anvin wrote:
Masami Hiramatsu wrote:
Add x86 instruction decoder to arch-specific libraries. This decoder
can decode all x86 instructions into prefix, opcode, modrm, sib,
displacement and immediates. This can
Jim Keniston wrote:
For user-space probing, we've been concentrating on native-built
executables. Am I correct in thinking that we'll see 16-bit or V86 mode
only on legacy apps built elsewhere? In any case, it only makes sense
to build on the kvm folks' work in this regard.
That's a
Masami Hiramatsu wrote:
Add x86 instruction decoder to arch-specific libraries. This decoder
can decode all x86 instructions into prefix, opcode, modrm, sib,
displacement and immediates. This can also show the length of
instructions.
changes from v4:
- make bitmap tables static.
Hi Masami,
Hi Peter,
H. Peter Anvin wrote:
Masami Hiramatsu wrote:
Add x86 instruction decoder to arch-specific libraries. This decoder
can decode all x86 instructions into prefix, opcode, modrm, sib,
displacement and immediates. This can also show the length of
instructions.
changes from v4:
-
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