Re: [PATCH 2/2] KVM: Create debugfs dir and stat files for each VM

On 11/27/2015 09:42 PM, Tyler Baker wrote: On 27 November 2015 at 10:53, Tyler Baker wrote: On 27 November 2015 at 09:08, Tyler Baker wrote: On 27 November 2015 at 00:54, Christian Borntraeger wrote: On 11/26/2015

Re: [PATCH] vhost: replace % with & on data path

Hi Michael, [auto build test ERROR on: v4.4-rc3] [also build test ERROR on: next-20151127] url: https://github.com/0day-ci/linux/commits/Michael-S-Tsirkin/vhost-replace-with-on-data-path/20151130-163704 config: s390-performance_defconfig (attached as .config) reproduce: wget https

Re: [PATCH] vhost: replace % with & on data path

Hi Michael, [auto build test ERROR on: v4.4-rc3] [also build test ERROR on: next-20151127] url: https://github.com/0day-ci/linux/commits/Michael-S-Tsirkin/vhost-replace-with-on-data-path/20151130-163704 config: i386-randconfig-s1-201548 (attached as .config) reproduce: # save

Re: [PATCH] vhost: replace % with & on data path

On Mon, Nov 30, 2015 at 10:34:07AM +0200, Michael S. Tsirkin wrote: > We know vring num is a power of 2, so use & > to mask the high bits. > > Signed-off-by: Michael S. Tsirkin > --- > drivers/vhost/vhost.c | 8 +--- > 1 file changed, 5 insertions(+), 3 deletions(-) > >

Re: [PATCH] vhost: replace % with & on data path

On Mon, Nov 30, 2015 at 12:42:49AM -0800, Joe Perches wrote: > On Mon, 2015-11-30 at 10:34 +0200, Michael S. Tsirkin wrote: > > We know vring num is a power of 2, so use & > > to mask the high bits. > [] > > diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c > [] > > @@ -1366,10 +1366,12

Re: [PATCH v2] vhost: replace % with & on data path

On 11/30/2015 10:15 AM, Michael S. Tsirkin wrote: > We know vring num is a power of 2, so use & > to mask the high bits. Makes a lot of sense and virtio_ring.c seems to use the same logic. Acked-by: Christian Borntraeger > > Signed-off-by: Michael S. Tsirkin

Re: [PATCH v2 04/21] arm64: KVM: Implement vgic-v3 save/restore

Marc Zyngier writes: > Implement the vgic-v3 save restore as a direct translation of > the assembly code version. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/hyp.h| 3 + >

Re: [PATCH v8 3/5] nvdimm acpi: build ACPI NFIT table

On Mon, Nov 16, 2015 at 06:51:01PM +0800, Xiao Guangrong wrote: > NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT) > > Currently, we only support PMEM mode. Each device has 3 structures: > - SPA structure, defines the PMEM region info > > - MEM DEV structure, it has the

Re: [PATCH v8 4/5] nvdimm acpi: build ACPI nvdimm devices

On Mon, Nov 16, 2015 at 06:51:02PM +0800, Xiao Guangrong wrote: > NVDIMM devices is defined in ACPI 6.0 9.20 NVDIMM Devices > > There is a root device under \_SB and specified NVDIMM devices are under the > root device. Each NVDIMM device has _ADR which returns its handle used to > associate

[PATCH v2 2/9] drivers/hv: Move HV_SYNIC_STIMER_COUNT into Hyper-V UAPI x86 header

This constant is required for Hyper-V SynIC timers MSR's support by userspace(QEMU). Signed-off-by: Andrey Smetanin Acked-by: K. Y. Srinivasan Reviewed-by: Roman Kagan CC: Gleb Natapov CC: Paolo Bonzini

[PATCH v2 1/9] drivers/hv: replace enum hv_message_type by u32

enum hv_message_type inside struct hv_message, hv_post_message is not size portable. Replace enum by u32. Signed-off-by: Andrey Smetanin CC: Gleb Natapov CC: Paolo Bonzini CC: "K. Y. Srinivasan" CC: Haiyang

[PATCH v2 0/9] KVM: Hyper-V SynIC timers

Per Hyper-V specification (and as required by Hyper-V-aware guests), SynIC provides 4 per-vCPU timers. Each timer is programmed via a pair of MSRs, and signals expiration by delivering a special format message to the configured SynIC message slot and triggering the corresponding synthetic

[PATCH v2 7/9] kvm/x86: Hyper-V internal helper to read MSR HV_X64_MSR_TIME_REF_COUNT

This helper will be used also in Hyper-V SynIC timers implementation. Signed-off-by: Andrey Smetanin Reviewed-by: Roman Kagan CC: Gleb Natapov CC: Paolo Bonzini CC: "K. Y. Srinivasan" CC:

[PATCH v2 6/9] kvm/x86: Added Hyper-V vcpu_to_hv_vcpu()/hv_vcpu_to_vcpu() helpers

Signed-off-by: Andrey Smetanin Reviewed-by: Roman Kagan CC: Gleb Natapov CC: Paolo Bonzini CC: "K. Y. Srinivasan" CC: Haiyang Zhang CC: Vitaly Kuznetsov

Re: [PATCH 2/2] KVM: Create debugfs dir and stat files for each VM

On 30 November 2015 at 00:38, Christian Borntraeger wrote: > On 11/27/2015 09:42 PM, Tyler Baker wrote: >> On 27 November 2015 at 10:53, Tyler Baker wrote: >>> On 27 November 2015 at 09:08, Tyler Baker wrote: On 27

[PATCH v2 5/9] kvm/x86: Rearrange func's declarations inside Hyper-V header

This rearrangement places functions declarations together according to their functionality, so future additions will be simplier. Signed-off-by: Andrey Smetanin Reviewed-by: Roman Kagan CC: Gleb Natapov CC: Paolo Bonzini

[PATCH v2 4/9] drivers/hv: Move struct hv_timer_message_payload into UAPI Hyper-V x86 header

This struct is required for Hyper-V SynIC timers implementation inside KVM and for upcoming Hyper-V VMBus support by userspace(QEMU). So place it into Hyper-V UAPI header. Signed-off-by: Andrey Smetanin CC: Gleb Natapov CC: Paolo Bonzini

[PATCH v2 8/9] kvm/x86: Hyper-V SynIC message slot pending clearing at SINT ack

The SynIC message protocol mandates that the message slot is claimed by atomically setting message type to something other than HVMSG_NONE. If another message is to be delivered while the slot is still busy, message pending flag is asserted to indicate to the guest that the hypervisor wants to be

[PATCH v2 9/9] kvm/x86: Hyper-V SynIC timers

Per Hyper-V specification (and as required by Hyper-V-aware guests), SynIC provides 4 per-vCPU timers. Each timer is programmed via a pair of MSRs, and signals expiration by delivering a special format message to the configured SynIC message slot and triggering the corresponding synthetic

[PATCH v2 3/9] drivers/hv: Move struct hv_message into UAPI Hyper-V x86 header

This struct is required for Hyper-V SynIC timers implementation inside KVM and for upcoming Hyper-V VMBus support by userspace(QEMU). So place it into Hyper-V UAPI header. Signed-off-by: Andrey Smetanin Acked-by: K. Y. Srinivasan Reviewed-by: Roman

[PATCH v2 0/3] target-i386: Use C struct for xsave area layout, offsets & sizes

target-i386/cpu.c:ext_save_area uses magic numbers for the xsave area offets and sizes, and target-i386/kvm.c:kvm_{put,get}_xsave() uses offset macros and bit manipulation to access the xsave area. This series changes both to use C structs for those operations. I still need to figure out a way to

Re: [PATCH 2/2] KVM: Create debugfs dir and stat files for each VM

Janosch Frank writes: > On 11/27/2015 09:42 PM, Tyler Baker wrote: >> On 27 November 2015 at 10:53, Tyler Baker wrote: >>> On 27 November 2015 at 09:08, Tyler Baker wrote: On 27 November 2015 at 00:54, Christian

Re: [PATCH v2] vhost: replace % with & on data path

From: "Michael S. Tsirkin" Date: Mon, 30 Nov 2015 11:15:23 +0200 > We know vring num is a power of 2, so use & > to mask the high bits. > > Signed-off-by: Michael S. Tsirkin Acked-by: David S. Miller -- To unsubscribe from this list:

RE: best way to create a snapshot of a running vm ?

Stefan wrote: > > Hi Bernd, > qemu-img cannot be used on the disk image when the VM is running. > Please use virsh, it communicates with the running QEMU process and > ensures that the snapshot is crash-consistent. > Hi Stefan, thanks for your answer. i read that virsh uses internally

Re: [RFC PATCH V2 0/3] IXGBE/VFIO: Add live migration support for SRIOV NIC

On Sun, Nov 29, 2015 at 10:53 PM, Lan, Tianyu wrote: > On 11/26/2015 11:56 AM, Alexander Duyck wrote: >> >> > I am not saying you cannot modify the drivers, however what you are >> doing is far too invasive. Do you seriously plan on modifying all of >> the PCI device

Re: [PATCH] vhost: replace % with & on data path

From: "Michael S. Tsirkin" Date: Mon, 30 Nov 2015 10:34:07 +0200 > We know vring num is a power of 2, so use & > to mask the high bits. > > Signed-off-by: Michael S. Tsirkin > --- > drivers/vhost/vhost.c | 8 +--- > 1 file changed, 5 insertions(+), 3

Re: [PATCH v4 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register

On Fri, 30 Oct 2015 14:21:47 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMSELR_EL0 is UNKNOWN, use reset_unknown for > its reset handler. As it doesn't need to deal with the acsessing action > specially, it

[PATCH 11/11] KVM: MMU: apply page track notifier

Register the notifier to receive write track event so that we can update our shadow page table It makes kvm_mmu_pte_write() be the callback of the notifier, no function is changed Signed-off-by: Xiao Guangrong --- arch/x86/include/asm/kvm_host.h | 5 +++--

[PATCH v2 3/3] target-i386: kvm: Use X86XSaveArea struct for xsave save/load

Instead of using offset macros and bit operations in a uint32_t array, use the X86XSaveArea struct to perform the loading/saving operations in kvm_put_xsave() and kvm_get_xsave(). Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Use uint8_t pointers when loading/saving

[PATCH 07/11] KVM: page track: add notifier support

Notifier list is introduced so that any node wants to receive the track event can register to the list Two APIs are introduced here: - kvm_page_track_register_notifier(): register the notifier to receive track event - kvm_page_track_unregister_notifier(): stop receiving track event by

[PATCH 06/11] KVM: MMU: let page fault handler be aware tracked page

The page fault caused by write access on the write tracked page can not be fixed, it always need to be emulated. page_fault_handle_page_track() is the fast path we introduce here to skip holding mmu-lock and shadow page table walking However, if the page table is not present, it is worth making

[PATCH 08/11] KVM: MMU: use page track for non-leaf shadow pages

non-leaf shadow pages are always write protected, it can be the user of page track Signed-off-by: Xiao Guangrong --- arch/x86/include/asm/kvm_page_track.h | 8 + arch/x86/kvm/mmu.c| 26 +--- arch/x86/kvm/page_track.c

[PATCH v2 1/3] target-i386: Define structs for layout of xsave area

Add structs that define the layout of the xsave areas used by Intel processors. Add some QEMU_BUILD_BUG_ON lines to ensure the structs match the XSAVE_* macros in target-i386/kvm.c and the offsets and sizes at target-i386/cpu.c:ext_save_areas. Signed-off-by: Eduardo Habkost

[PATCH v2 2/3] target-i386: Use xsave structs for ext_save_area

This doesn't introduce any change in the code, as the offsets and struct sizes match what was present in the table. This can be validated by the QEMU_BUILD_BUG_ON lines on target-i386/cpu.h, which ensures the struct sizes and offsets match the existing values in ext_save_area. Signed-off-by:

Re: [PATCH v4 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register

On Fri, 30 Oct 2015 14:21:46 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > Add reset handler which gets host value of PMCR_EL0 and make writable > bits architecturally UNKNOWN except PMCR.E to zero. Add a common access > handler for PMU

Re: [PATCH v4 08/21] KVM: ARM64: Add reset and access handlers for PMXEVTYPER register

On Fri, 30 Oct 2015 14:21:50 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMXEVTYPER is UNKNOWN, use reset_unknown or > reset_unknown_cp15 for its reset handler. Add access handler which > emulates writing and

Re: [PATCH v4 18/21] KVM: ARM64: Add PMU overflow interrupt routing

On Fri, 30 Oct 2015 14:22:00 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > When calling perf_event_create_kernel_counter to create perf_event, > assign a overflow handler. Then when perf event overflows, set > irq_pending and call

Re: [PATCH v4 21/21] KVM: ARM64: Add a new kvm ARM PMU device

On Fri, 30 Oct 2015 14:22:03 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement > the kvm_device_ops for it. > > Signed-off-by: Shannon Zhao >

[PATCH 10/11] KVM: MMU: clear write-flooding on the fast path of tracked page

If the page fault is caused by write access on write tracked page, the real shadow page walking is skipped, we lost the chance to clear write flooding for the page structure current vcpu is using Fix it by locklessly waking shadow page table to clear write flooding on the shadow page structure

[PATCH 09/11] KVM: MMU: simplify mmu_need_write_protect

Now, all non-leaf shadow page are page tracked, if gfn is not tracked there is no non-leaf shadow page of gfn is existed, we can directly make the shadow page of gfn to unsync Signed-off-by: Xiao Guangrong --- arch/x86/kvm/mmu.c | 26 -- 1

Re: [PATCH v4 00/21] KVM: ARM64: Add guest PMU support

On Fri, 30 Oct 2015 14:21:42 +0800 Shannon Zhao wrote: Hi Shannon, > From: Shannon Zhao > > This patchset adds guest PMU support for KVM on ARM64. It takes > trap-and-emulate approach. When guest wants to monitor one event, it > will be

[PATCH 05/11] KVM: page track: introduce kvm_page_track_{add,remove}_page

These two functions are the user APIs: - kvm_page_track_add_page(): add the page to the tracking pool after that later specified access on that page will be tracked - kvm_page_track_remove_page(): remove the page from the tracking pool, the specified access on the page is not tracked after

[PATCH 00/11] KVM: x86: track guest page access

This patchset introduces the feature which allows us to track page access in guest. Currently, only write access tracking is implemented in this version. Four APIs are introduces: - kvm_page_track_add_page(kvm, gfn, mode), single guest page @gfn is added into the track pool of the guest

[PATCH 01/11] KVM: MMU: rename has_wrprotected_page to mmu_gfn_lpage_is_disallowed

kvm_lpage_info->write_count is used to detect if the large page mapping for the gfn on the specified level is allowed, rename it to disallow_lpage to reflect its purpose, also we rename has_wrprotected_page() to mmu_gfn_lpage_is_disallowed() to make the code more clearer Later we will extend this

[PATCH 04/11] KVM: page track: add the framework of guest page tracking

The array, gfn_track[mode][gfn], is introduced in memory slot for every guest page, this is the tracking count for the gust page on different modes. If the page is tracked then the count is increased, the page is not tracked after the count reaches zero Two callbacks,

[PATCH 03/11] KVM: MMU: introduce kvm_mmu_slot_gfn_write_protect

Split rmap_write_protect() and introduce the function to abstract the write protection based on the slot This function will be used in the later patch Signed-off-by: Xiao Guangrong --- arch/x86/kvm/mmu.c | 16 +++- arch/x86/kvm/mmu.h | 2 ++ 2 files

[PATCH 02/11] KVM: MMU: introduce kvm_mmu_gfn_{allow,disallow}_lpage

Abstract the common operations from account_shadowed() and unaccount_shadowed(), then introduce kvm_mmu_gfn_disallow_lpage() and kvm_mmu_gfn_allow_lpage() These two functions will be used by page tracking in the later patch Signed-off-by: Xiao Guangrong ---

Re: [PATCH v2 04/21] arm64: KVM: Implement vgic-v3 save/restore

On Fri, Nov 27, 2015 at 06:49:58PM +, Marc Zyngier wrote: > Implement the vgic-v3 save restore as a direct translation of > the assembly code version. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/hyp.h|

Re: [PATCH v2 01/21] arm64: Add macros to read/write system registers

On Fri, Nov 27, 2015 at 06:49:55PM +, Marc Zyngier wrote: > From: Mark Rutland > > Rather than crafting custom macros for reading/writing each system > register provide generics accessors, read_sysreg and write_sysreg, for > this purpose. > > Unlike read_cpuid, calls

Re: [PATCH v2 02/21] arm64: KVM: Add a HYP-specific header file

On Fri, Nov 27, 2015 at 06:49:56PM +, Marc Zyngier wrote: > In order to expose the various EL2 services that are private to > the hypervisor, add a new hyp.h file. > > So far, it only contains mundane things such as section annotation > and VA manipulation. > > Signed-off-by: Marc Zyngier

Re: [PATCH v2 03/21] arm64: KVM: Implement vgic-v2 save/restore

On Fri, Nov 27, 2015 at 06:49:57PM +, Marc Zyngier wrote: > Implement the vgic-v2 save restore (mostly) as a direct translation > of the assembly code version. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/Makefile | 1 + > arch/arm64/kvm/hyp/Makefile

Re: [PATCH v2 05/21] arm64: KVM: Implement timer save/restore

On Fri, Nov 27, 2015 at 06:49:59PM +, Marc Zyngier wrote: > Implement the timer save restore as a direct translation of > the assembly code version. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/hyp.h

Re: [PATCH v2 00/21] arm64: KVM: world switch in C

On Fri, Nov 27, 2015 at 06:49:54PM +, Marc Zyngier wrote: > Once upon a time, the KVM/arm64 world switch was a nice, clean, lean > and mean piece of hand-crafted assembly code. Over time, features have > crept in, the code has become harder to maintain, and the smallest > change is a pain to

Re: [PATCH v2 00/21] arm64: KVM: world switch in C

On 11/30/2015 12:33 PM, Christoffer Dall wrote: > On Fri, Nov 27, 2015 at 06:49:54PM +, Marc Zyngier wrote: >> Once upon a time, the KVM/arm64 world switch was a nice, clean, lean >> and mean piece of hand-crafted assembly code. Over time, features have >> crept in, the code has become

Re: [PATCH v4 08/21] KVM: ARM64: Add reset and access handlers for PMXEVTYPER register

On 2015/12/1 2:12, Marc Zyngier wrote: > On Fri, 30 Oct 2015 14:21:50 +0800 > Shannon Zhao wrote: > >> > From: Shannon Zhao >> > >> > Since the reset value of PMXEVTYPER is UNKNOWN, use reset_unknown or >> > reset_unknown_cp15 for its reset

Re: [PATCH v4 00/21] KVM: ARM64: Add guest PMU support

Hi Marc, On 2015/12/1 2:34, Marc Zyngier wrote: > On Fri, 30 Oct 2015 14:21:42 +0800 > Shannon Zhao wrote: > > Hi Shannon, > >> > From: Shannon Zhao >> > >> > This patchset adds guest PMU support for KVM on ARM64. It takes >> >

Re: [PATCH v4 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register

Hi Marc, On 2015/12/1 1:56, Marc Zyngier wrote: > Same remark here as the one I made earlier. I'm pretty sure we don't > call any CP15 reset because they are all shared with their 64bit > counterparts. The same thing goes for the whole series. Ok, I see. But within the 64bit reset function, it

Re: [PATCH net-next 3/3] vhost_net: basic polling support

On 11/30/2015 06:44 PM, Michael S. Tsirkin wrote: > On Wed, Nov 25, 2015 at 03:11:29PM +0800, Jason Wang wrote: >> > This patch tries to poll for new added tx buffer or socket receive >> > queue for a while at the end of tx/rx processing. The maximum time >> > spent on polling were specified

Re: [RFC PATCH V2 00/10] Qemu: Add live migration support for SRIOV NIC

On 11/30/2015 4:01 PM, Michael S. Tsirkin wrote: It is still not very clear what it is you are trying to achieve, and whether your patchset achieves it. You merely say "adding live migration" but it seems pretty clear this isn't about being able to migrate a guest transparently, since you are

Re: [PATCH net-next 2/3] vhost: introduce vhost_vq_more_avail()

On 11/30/2015 04:22 PM, Michael S. Tsirkin wrote: > On Wed, Nov 25, 2015 at 03:11:28PM +0800, Jason Wang wrote: >> Signed-off-by: Jason Wang >> --- >> drivers/vhost/vhost.c | 26 +- >> drivers/vhost/vhost.h | 1 + >> 2 files changed, 18

[PATCH V2 0/3] basic busy polling support for vhost_net

Hi all: This series tries to add basic busy polling for vhost net. The idea is simple: at the end of tx/rx processing, busy polling for new tx added descriptor and rx receive socket for a while. The maximum number of time (in us) could be spent on busy polling was specified ioctl. Test A were

[PATCH V2 3/3] vhost_net: basic polling support

This patch tries to poll for new added tx buffer or socket receive queue for a while at the end of tx/rx processing. The maximum time spent on polling were specified through a new kind of vring ioctl. Signed-off-by: Jason Wang --- drivers/vhost/net.c| 72

BUG ALERT: ARM32 KVM does not work in 4.4-rc3

Hello! My project involves ARM64, but from time to time i also test ARM32 KVM. I have discovered that it stopped working in 4.4-rc3. The same virtual machine works perfectly under current kvmarm/next, but gets stuck at random point under 4.4-rc3 from linux-stable. I'm not sure that i have

[PATCH V2 1/3] vhost: introduce vhost_has_work()

This path introduces a helper which can give a hint for whether or not there's a work queued in the work list. Signed-off-by: Jason Wang --- drivers/vhost/vhost.c | 7 +++ drivers/vhost/vhost.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/vhost/vhost.c

[PATCH V2 2/3] vhost: introduce vhost_vq_more_avail()

Signed-off-by: Jason Wang --- drivers/vhost/vhost.c | 13 + drivers/vhost/vhost.h | 1 + 2 files changed, 14 insertions(+) diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c index 163b365..4f45a03 100644 --- a/drivers/vhost/vhost.c +++

Re: [PATCH net-next 2/3] vhost: introduce vhost_vq_more_avail()

On Wed, Nov 25, 2015 at 03:11:28PM +0800, Jason Wang wrote: > Signed-off-by: Jason Wang > --- > drivers/vhost/vhost.c | 26 +- > drivers/vhost/vhost.h | 1 + > 2 files changed, 18 insertions(+), 9 deletions(-) > > diff --git a/drivers/vhost/vhost.c

Re: [PATCH net-next 0/3] basic busy polling support for vhost_net

On Sun, Nov 29, 2015 at 10:31:10PM -0500, David Miller wrote: > From: Jason Wang > Date: Wed, 25 Nov 2015 15:11:26 +0800 > > > This series tries to add basic busy polling for vhost net. The idea is > > simple: at the end of tx/rx processing, busy polling for new tx added > >

Re: [RFC PATCH V2 00/10] Qemu: Add live migration support for SRIOV NIC

On Tue, Nov 24, 2015 at 09:35:17PM +0800, Lan Tianyu wrote: > This patchset is to propose a solution of adding live migration > support for SRIOV NIC. > > During migration, Qemu needs to let VF driver in the VM to know > migration start and end. Qemu adds faked PCI migration capability > to help

Re: [PATCH v8 4/5] nvdimm acpi: build ACPI nvdimm devices

On Mon, Nov 16, 2015 at 06:51:02PM +0800, Xiao Guangrong wrote: > NVDIMM devices is defined in ACPI 6.0 9.20 NVDIMM Devices Forgot to mention: Pls put spec info in code comments near relevant functions, not just the log. > > There is a root device under \_SB and specified NVDIMM devices are

Re: [for-2.6 PATCH 1/3] target-i386: Define structs for layout of xsave area

On 28/11/2015 20:56, Eduardo Habkost wrote: > +/* Ext. save area 2: AVX State */ > +typedef struct XSaveAVX { > +uint64_t ymmh[16][2]; > +} XSaveAVX; > + Because this is always little endian, I would write it as uint8_t[16][16]. > +/* Ext. save area 6: ZMM_Hi256 */ > +typedef struct

Re: [for-2.6 PATCH 0/3] target-i386: Use C struct for xsave area layout, offsets & sizes

On 28/11/2015 20:56, Eduardo Habkost wrote: > I still need to figure out a way to write unit tests for the new > code. Maybe I will just copy and paste the new and old functions, > and test them locally (checking if they give the same results > when translating blobs of random bytes). Aren't

Re: [PATCH v4 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register

On Fri, 30 Oct 2015 14:21:48 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > Add reset handler which gets host value of PMCEID0 or PMCEID1. Since > write action to PMCEID0 or PMCEID1 is ignored, add a new case for this. > > Signed-off-by:

Re: [PATCH net-next 3/3] vhost_net: basic polling support

On Wed, Nov 25, 2015 at 03:11:29PM +0800, Jason Wang wrote: > This patch tries to poll for new added tx buffer or socket receive > queue for a while at the end of tx/rx processing. The maximum time > spent on polling were specified through a new kind of vring ioctl. > > Signed-off-by: Jason Wang

RE: [PATCH v5 2/2] KVM: Make KVM_CAP_IRQFD dependent on KVM_CAP_IRQCHIP

Hello! > > case KVM_CAP_INTERNAL_ERROR_DATA: > > #ifdef CONFIG_HAVE_KVM_MSI > > case KVM_CAP_SIGNAL_MSI: > > + /* Fallthrough */ > > #endif > > + case KVM_CAP_CHECK_EXTENSION_VM: > > + return 1; > > #ifdef CONFIG_HAVE_KVM_IRQFD > > case KVM_CAP_IRQFD: > >

Re: [PATCH v4 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register

Hi Marc, On 2015/11/30 19:42, Marc Zyngier wrote: >> +static void reset_pmceid(struct kvm_vcpu *vcpu, const struct sys_reg_desc >> *r) >> > +{ >> > + u64 pmceid; >> > + >> > + if (r->reg == PMCEID0_EL0 || r->reg == c9_PMCEID0) > That feels wrong. We should only reset the 64bit view of the

Re: [PATCH v5 2/2] KVM: Make KVM_CAP_IRQFD dependent on KVM_CAP_IRQCHIP

On Mon, 30 Nov 2015 14:56:38 +0300 Pavel Fedin wrote: > Hello! > > > > case KVM_CAP_INTERNAL_ERROR_DATA: > > > #ifdef CONFIG_HAVE_KVM_MSI > > > case KVM_CAP_SIGNAL_MSI: > > > + /* Fallthrough */ > > > #endif > > > + case KVM_CAP_CHECK_EXTENSION_VM: > > > +

Re: [PATCH v1 7/7] kvm/x86: Hyper-V SynIC timers

On Fri, Nov 27, 2015 at 11:49:40AM +0100, Paolo Bonzini wrote: [ sorry missed your message on Friday, replying now ] > On 27/11/2015 09:12, Roman Kagan wrote: > >> > +n = div64_u64(time_now - stimer->exp_time, stimer->count) + 1; > >> > +stimer->exp_time += n * stimer->count; > >

Re: [PATCH v8 0/5] implement vNVDIMM

On Mon, Nov 16, 2015 at 06:50:58PM +0800, Xiao Guangrong wrote: > This patchset can be found at: > https://github.com/xiaogr/qemu.git nvdimm-v8 > > It is based on pci branch on Michael's tree and the top commit is: > commit e3a4e177d9 (migration/ram: fix build on 32 bit hosts). > >

Re: [PATCH v2 04/21] arm64: KVM: Implement vgic-v3 save/restore

On Mon, 30 Nov 2015 09:59:32 + Alex Bennée wrote: > > Marc Zyngier writes: > > > Implement the vgic-v3 save restore as a direct translation of > > the assembly code version. > > > > Signed-off-by: Marc Zyngier > > --- >

Re: [PATCH v5 2/2] KVM: Make KVM_CAP_IRQFD dependent on KVM_CAP_IRQCHIP

On Mon, 30 Nov 2015 12:40:45 +0300 Pavel Fedin wrote: > Now at least ARM is able to determine whether the machine has > virtualization support for irqchip or not at runtime. Obviously, > irqfd requires irqchip. > > Signed-off-by: Pavel Fedin > --- >

Re: [PATCH v2 08/21] arm64: KVM: Implement debug save/restore

Marc Zyngier writes: > Implement the debug save restore as a direct translation of > the assembly code version. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/debug-sr.c | 130 >

[PATCH] vhost: replace % with & on data path

We know vring num is a power of 2, so use & to mask the high bits. Signed-off-by: Michael S. Tsirkin --- drivers/vhost/vhost.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c index 080422f..85f0f0a 100644

Re: [PATCH 2/2] KVM: Create debugfs dir and stat files for each VM

On 11/27/2015 09:42 PM, Tyler Baker wrote: > On 27 November 2015 at 10:53, Tyler Baker wrote: >> On 27 November 2015 at 09:08, Tyler Baker wrote: >>> On 27 November 2015 at 00:54, Christian Borntraeger >>> wrote: On

Re: [PATCH] vhost: replace % with & on data path

On Mon, 2015-11-30 at 10:34 +0200, Michael S. Tsirkin wrote: > We know vring num is a power of 2, so use & > to mask the high bits. [] > diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c [] > @@ -1366,10 +1366,12 @@ int vhost_get_vq_desc(struct vhost_virtqueue *vq, > /* Only get

Re: [PATCH v8 0/5] implement vNVDIMM

On Mon, Nov 16, 2015 at 06:50:58PM +0800, Xiao Guangrong wrote: > This patchset can be found at: > https://github.com/xiaogr/qemu.git nvdimm-v8 > > It is based on pci branch on Michael's tree and the top commit is: > commit e3a4e177d9 (migration/ram: fix build on 32 bit hosts). > >

[PATCH v2] vhost: replace % with & on data path

We know vring num is a power of 2, so use & to mask the high bits. Signed-off-by: Michael S. Tsirkin --- Changes from v1: drop an unrelated chunk drivers/vhost/vhost.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/vhost/vhost.c

[PATCH RFC v2] virtio: skip avail/used index reads

This adds a new vring feature bit: when enabled, host and guest poll the available/used ring directly instead of looking at the index field first. To guarantee it is possible to detect updates, the high bits (above vring.num - 1) in the ring head ID value are modified to match the index bits -

Re: [PATCH] vhost: replace % with & on data path

Hi Michael, [auto build test ERROR on: v4.4-rc3] [also build test ERROR on: next-20151127] url: https://github.com/0day-ci/linux/commits/Michael-S-Tsirkin/vhost-replace-with-on-data-path/20151130-163704 config: x86_64-randconfig-s0-11301655 (attached as .config) reproduce: # save

Re: [for-2.6 PATCH 0/3] target-i386: Use C struct for xsave area layout, offsets & sizes

On Mon, Nov 30, 2015 at 12:21:23PM +0100, Paolo Bonzini wrote: > > > On 28/11/2015 20:56, Eduardo Habkost wrote: > > I still need to figure out a way to write unit tests for the new > > code. Maybe I will just copy and paste the new and old functions, > > and test them locally (checking if they

[PATCH RFC] virtio: skip avail/used index reads

This adds a new vring feature bit: when enabled, host and guest poll the available/used ring directly instead of looking at the index field first. To guarantee it is possible to detect updates, the high bits (above vring.num - 1) in the ring head ID value are modified to match the index bits -

Re: best way to create a snapshot of a running vm ?

On Mon, Nov 30, 2015 at 12:36:56AM +0100, Lentes, Bernd wrote: > what is the best way to create a snapshot of a running vm ? qemu-img or virsh > ? > I#d like to create a snapshot which is copied afterwards by other means, e.g. > by a network based backup software. Hi Bernd, qemu-img cannot be

[PATCH v5 0/2] KVM: arm/arm64: Allow to use KVM without in-kernel irqchip

This patch set brings back functionality which was broken in v4.0. Unfortunately, currently it is impossible to take advantage of virtual architected timer in this case, therefore guest, running in such restricted mode, has to use some memory-mapped timer. But it is still better than nothing.

[PATCH v5 1/2] arm/arm64: KVM: Detect vGIC presence at runtime

Before commit 662d9715840aef44dcb573b0f9fab9e8319c868a ("arm/arm64: KVM: Kill CONFIG_KVM_ARM_{VGIC,TIMER}") is was possible to compile the kernel without vGIC and vTimer support. Commit message says about possibility to detect vGIC support in runtime, but this has never been implemented. This

[PATCH v5 2/2] KVM: Make KVM_CAP_IRQFD dependent on KVM_CAP_IRQCHIP

Now at least ARM is able to determine whether the machine has virtualization support for irqchip or not at runtime. Obviously, irqfd requires irqchip. Signed-off-by: Pavel Fedin --- virt/kvm/kvm_main.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git

Re: [PATCH v2 08/21] arm64: KVM: Implement debug save/restore

On Mon, 30 Nov 2015 12:00:24 + Alex Bennée wrote: > > Marc Zyngier writes: > > > Implement the debug save restore as a direct translation of > > the assembly code version. > > > > Signed-off-by: Marc Zyngier > > --- > >

Re: [PATCH v8 4/5] nvdimm acpi: build ACPI nvdimm devices

On 11/30/2015 06:32 PM, Michael S. Tsirkin wrote: On Mon, Nov 16, 2015 at 06:51:02PM +0800, Xiao Guangrong wrote: NVDIMM devices is defined in ACPI 6.0 9.20 NVDIMM Devices Forgot to mention: Pls put spec info in code comments near relevant functions, not just the log. Sure, good to me.

Re: [PATCH v8 0/5] implement vNVDIMM

On 11/30/2015 06:38 PM, Michael S. Tsirkin wrote: On Mon, Nov 16, 2015 at 06:50:58PM +0800, Xiao Guangrong wrote: This patchset can be found at: https://github.com/xiaogr/qemu.git nvdimm-v8 It is based on pci branch on Michael's tree and the top commit is: commit e3a4e177d9

Re: [PATCH v8 0/5] implement vNVDIMM

On 11/30/2015 04:51 PM, Stefan Hajnoczi wrote: Reviewed-by: Stefan Hajnoczi Thanks for your review Stefan. Will pick up your Reviewed-by in the next version. :) -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to

RE: [PATCH v5 2/2] KVM: Make KVM_CAP_IRQFD dependent on KVM_CAP_IRQCHIP

Hello! > > Thank you for the note, i didn't know about irqchip-specific capability > > codes. There's the > > same issue with PowerPC, now i > > understand why there's no KVM_CAP_IRQCHIP for them. Because they have > > KVM_CAP_IRQ_MPIC and > > KVM_CAP_IRQ_XICS, similar to S390. > > But isn't

Re: [PATCH v8 4/5] nvdimm acpi: build ACPI nvdimm devices

On 11/30/2015 06:30 PM, Michael S. Tsirkin wrote: On Mon, Nov 16, 2015 at 06:51:02PM +0800, Xiao Guangrong wrote: NVDIMM devices is defined in ACPI 6.0 9.20 NVDIMM Devices There is a root device under \_SB and specified NVDIMM devices are under the root device. Each NVDIMM device has _ADR

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