On Tue, 2011-12-20 at 19:34 -0600, Scott Wood wrote:
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to
server/classic
exception vectors but not really.
FIXME: Replace the existing trap numbering rather than add to
Hi All,
This is KVM upstream test result against kvm.git
6a2c5be53bb97247ef8c7a0b3c75173bfc05ef94 based on kernel 3.3.0, and
qemu-kvm.git 9d636ae7488edfa9c7f03ceee62c838d505aac3e.
We found no new bug and no bug got fixed in the past two weeks.
New issue(0):
Fixed issue(0):
Old issue (1):
Le Thu, Feb 16, 2012 at 11:01:26AM +0200, Gleb Natapov ecrivait :
Can you do the trace again with -no-hpet on the command line?
Is there a way to only trace events on specific VM ?
David.
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To unsubscribe from this list: send the line unsubscribe kvm in
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-Original Message-
From: Wood Scott-B07421
Sent: Friday, February 17, 2012 1:13 AM
To: Liu Yu-B13201
Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org;
linuxppc-...@ozlabs.org; Wood Scott-B07421
Subject: Re: [PATCH v4 1/3] KVM: PPC: epapr: Factor out the epapr init
On Fri, Feb 17, 2012 at 09:59:39AM +0100, David Cure wrote:
Le Thu, Feb 16, 2012 at 11:01:26AM +0200, Gleb Natapov ecrivait :
Can you do the trace again with -no-hpet on the command line?
Is there a way to only trace events on specific VM ?
-P pid
--
Gleb.
Convert the PC speaker device to a qdev ISA model. Move the public
interface to a dedicated header file at this chance.
CC: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Trivial rebase over git head. Would be great if this series could be
merged now
On Fri, Feb 17, 2012 at 4:57 AM, Pete Ashdown pashd...@xmission.com wrote:
I've been waiting for some response from the Ubuntu team regarding a bug on
launchpad, but it appears that it isn't being taken seriously:
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/745785
This looks
On 02/13/12 10:15, Michael S. Tsirkin wrote:
TODO:
- migration support
- fix dependency on pci_internals.h
fix checkpatch warnings
cheers,
Gerd
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More majordomo info at
Hi,
+/* If we don't specify the name, the bus will be addressed as id.0,
where
+ * id is the parent id. But it seems more natural to address the bus
using
+ * the parent device name. */
+if (dev-qdev.id *dev-qdev.id) {
+br-bus_name = dev-qdev.id;
+}
That
On 02/13/12 10:16, Michael S. Tsirkin wrote:
This adds support for a standard pci to pci bridge,
enabling support for more than 32 PCI devices in the system.
Device hotplug is supported by means of SHPC controller.
For guests with an SHPC driver, this allows robust hotplug
and even hotplug of
Le Fri, Feb 17, 2012 at 12:07:14PM +0200, Gleb Natapov ecrivait :
Can you do the trace again with -no-hpet on the command line?
Is there a way to only trace events on specific VM ?
-P pid
ok. I take a trace of the VM with 1 user : start trace just
before to launch slowly
On Wed, 2012-02-15 at 17:26 -0800, John Fastabend wrote:
On 2/15/2012 6:10 AM, Jamal Hadi Salim wrote:
On Tue, 2012-02-14 at 10:57 -0800, John Fastabend wrote:
Roopa was likely on the right track here,
http://patchwork.ozlabs.org/patch/123064/
Doesnt seem related to the bridging
On Thu, 2012-02-16 at 03:58 +, Ben Hutchings wrote:
Well, in addition, there are SR-IOV network adapters that don't have any
bridge. For these, the software bridge is necessary to handle
multicast, broadcast and forwarding between local ports, not only to do
learning.
For the scenario
Hello everybody,
I got crashes on my KVM hosts. They are in a 6 nodes cluster of Proxmox VE, the
VM disks are LV through AoE and i use Coraid SAN storage (all the device inside
guests are Virtio - /dev/vdX, network).
For one of them (Node3), the differences between the other servers (Node2
On 02/16/2012 03:03 PM, Avi Kivity wrote:
On 02/15/2012 07:18 PM, Igor Mammedov wrote:
On 02/15/2012 01:23 PM, Igor Mammedov wrote:
static u64 pvclock_get_nsec_offset(struct pvclock_shadow_time
*shadow)
{
-u64 delta = native_read_tsc() - shadow-tsc_timestamp;
+u64 delta;
+u64
Le Tue, Feb 14, 2012 at 08:48:56AM -0500, Vadim Rozenfeld ecrivait :
+1
Try Microsoft Windows Performance Toolkit from Windows SDK
http://www.microsoft.com/download/en/details.aspx?displaylang=enid=3138
It's really good.
I run xperf -on DiagEasy, and as I'm not an windows-er the
Thank you for your response Stefan.
On 02/17/2012 04:30 AM, Stefan Hajnoczi wrote:
On Fri, Feb 17, 2012 at 4:57 AM, Pete Ashdown pashd...@xmission.com wrote:
I've been waiting for some response from the Ubuntu team regarding a bug on
launchpad, but it appears that it isn't being taken
Hello!
I do have a question regarding the following VM (running on a linux
3.1.10 host with kvm 1.0). In the VM runs openSUSE 12.1 / 64bit.
The defined vnc interface is not used!
How much memory should this VM maximally use on the host (- memory
usage of the kvm-qemu process), as long as the
On 2/17/2012 6:28 AM, jamal wrote:
On Wed, 2012-02-15 at 17:26 -0800, John Fastabend wrote:
On 2/15/2012 6:10 AM, Jamal Hadi Salim wrote:
On Tue, 2012-02-14 at 10:57 -0800, John Fastabend wrote:
Roopa was likely on the right track here,
http://patchwork.ozlabs.org/patch/123064/
Doesnt
From: Scott Wood scottw...@freescale.com
Split e500 (v1/v2) and e500mc/e5500 to allow optimization of feature
checks that differ between the two.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/cputable.h | 12
(resending with fixed email list - somehow I screwed that one up the
first time)
This is Scott's e500mc RFC patch set rebased, berobbed of its pt_regs
parts and fixed for bisectability. On top of them, I addressed all the
comments that I had on the code and that came up in his code as FIXMEs.
I
From: Scott Wood scottw...@freescale.com
This gives us a place to put load/put actions that correspond to
code that is booke-specific but not specific to a particular core.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/44x.c
From: Scott Wood scottw...@freescale.com
We'll use it on e500mc as well.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/kvm_book3s.h |3 ++
arch/powerpc/include/asm/kvm_booke.h |3 ++
For BookE HV the guest visible MSR is shared-msr and is identical to
the MSR that is in use while the guest is running, because we can't trap
reads from/to MSR.
So shadow_msr is unused there. Indicate that with a comment.
Signed-off-by: Alexander Graf ag...@suse.de
---
We need to make sure that no MAS updates happen automatically while we
have the guest MAS registers loaded. So move the disabling code a bit
higher up so that it covers the full time we have guest values in MAS
registers.
The race this patch fixes should never occur, but it makes the code a
bit
When using exit timing stats, we clobber r9 in the NEED_EMU case,
so better move that part down a few lines and fix it that way.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git
The semantics of BOOKE_IRQPRIO_MAX changed to denote the highest available
irqprio + 1, so let's reflect that in the code too.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
The SET_VCPU macro is a leftover from times when the vcpu struct wasn't
stored in the thread on vcpu_load/put. It's not needed anymore. Remove it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 0 insertions(+), 8
Instead if doing
#ifndef CONFIG_64BIT
...
#else
...
#endif
we should rather do
#ifdef CONFIG_64BIT
...
#else
...
#endif
which is a lot easier to read. Change the bookehv implementation to
stick with this rule.
Signed-off-by: Alexander Graf ag...@suse.de
---
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c | 15
When we fail to emulate an instruction for the guest, we better go in and
tell it that we failed to emulate it, by throwing an illegal instruction
exception.
Please beware that we basically never get around to telling the guest that
we failed thanks to the debugging code right above it. If user
The e500mc patches left some debug code in that we don't need. Remove it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index
We can't build e500v2 and e500mc (kvm) support inside the same kernel.
So indicate that by making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
From: Scott Wood scottw...@freescale.com
e500mc has a normal PPC FPU, rather than SPE which is found
on e500v1/v2.
Based on code from Liu Yu yu@freescale.com.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/system.h
When one vcpu wants to kick another, it can issue a special IPI instruction
called msgsnd. This patch emulates this instruction, its clearing counterpart
and the infrastructure required to actually trigger that interrupt inside
a guest vcpu.
With this patch, SMP guests on e500mc work.
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add
The CONFIG_KVM_E500 option really indicates that we're running on a V2 machine,
not on a machine of the generic E500 class. So indicate that properly and
change the config name accordingly.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig|8
When setting MSR for an e500mc guest, we implicitly always set MSR_GS
to make sure the guest is in guest state. Since we have this implicit
rule there, we don't need to explicitly pass MSR_GS to set_msr().
Remove all explicit setters of MSR_GS.
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without trapping
into the hypervisor, including transitions to
From: Scott Wood scottw...@freescale.com
Add processor support for e500mc, using hardware virtualization support
(GS-mode).
Current issues include:
- No support for external proxy (coreint) interrupt mode in the guest.
Includes work by Ashish Kalra ashish.ka...@freescale.com,
Varun Sethi
From: Scott Wood scottw...@freescale.com
DO_KVM will need to identify the particular exception type.
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.
Signed-off-by: Scott
From: Scott Wood scottw...@freescale.com
The PID handling is e500v1/v2-specific, and is moved to e500.c.
The MMU sregs code and kvmppc_core_vcpu_translate will be shared with
e500mc, and is moved from e500.c to e500_tlb.c.
Partially based on patches from Liu Yu yu@freescale.com.
If we hit any exception whatsoever in the restore path and r1/r2 aren't the
host registers, we don't get a working oops. So it's always a good idea to
restore them as early as possible.
This time, it actually has practical reasons to do so too, since we need to
have the host page fault handler
From: Scott Wood scottw...@freescale.com
Rather than invalidate everything when a TLB1 entry needs to be
taken down, keep track of which host TLB1 entries are used for
a given guest TLB1 entry, and invalidate just those entries.
Based on code from Ashish Kalra ashish.ka...@freescale.com
and Liu
From: Scott Wood scottw...@freescale.com
Currently 32-bit only cares about this for choice of exception
vector, which is done in core-specific code. However, KVM will
want to distinguish as well.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
Keeping two separate headers for e500-specific things was a
pain, and wasn't even organized along any logical boundary.
There was TLB stuff in asm/kvm_e500.h despite the existence of
arch/powerpc/kvm/e500_tlb.h, and nothing in asm/kvm_e500.h needed
to be
From: Scott Wood scottw...@freescale.com
tlbilx is the new, preferred invalidation instruction. It is not
found on e500 prior to e500mc, but there should be no harm in
supporting it on all e500.
Based on code from Ashish Kalra ashish.ka...@freescale.com.
Signed-off-by: Scott Wood
From: Scott Wood scottw...@freescale.com
Move vcpu to the beginning of vcpu_e500 to give it appropriate
prominence, especially if more fields end up getting added to the
end of vcpu_e500 (and vcpu ends up in the middle).
Remove gratuitous extern and add parameter names to prototypes.
From: Scott Wood scottw...@freescale.com
e500mc will want to do lpid allocation/deallocation here.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/44x.c |9 +
arch/powerpc/kvm/booke.c |9 -
From: Scott Wood scottw...@freescale.com
This is in preparation for merging in the contents of
arch/powerpc/include/asm/kvm_e500.h.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/e500.c |2 +-
This will allow the APIC core to file a TPR access report. Depending on
the accelerator and kernel irqchip mode, it will either be delivered
right away or queued for later reporting.
In TCG mode, we can restart the triggering instruction and can therefore
forward the event directly. KVM does not
Always add a byte before the final 512-bytes alignment to reserve the
space for the ROM checksum.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
pc-bios/optionrom/optionrom.h |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/pc-bios/optionrom/optionrom.h
When the TCG thread is started but not yet the machine, we wait in
qemu_tcg_cpu_thread_fn on tcg_halt_cond. To allow run_on_cpu already at
this time, we need to process pending request in that loop.
CC: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
cpus.c
CPUState::next_cpu is already CPUState *.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
cpus.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/cpus.c b/cpus.c
index d0c8340..4e65894 100644
--- a/cpus.c
+++ b/cpus.c
@@ -853,7 +853,7 @@ static int
In order to perform critical manipulations on the VM state in the
context of a VCPU, specifically code patching, stopping and resuming of
all VCPUs may be necessary. resume_all_vcpus is already compatible, now
enable pause_all_vcpus for this use case by stopping the calling context
before starting
This imports and builds the original VAPIC option ROM of qemu-kvm.
Its interaction with QEMU is described in the commit that introduces the
corresponding device model.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
.gitignore |1 +
Makefile |2
This enables acceleration for MMIO-based TPR registers accesses of
32-bit Windows guest systems. It is mostly useful with KVM enabled,
either on older Intel CPUs (without flexpriority feature, can also be
manually disabled for testing) or any current AMD processor.
The approach introduced here is
As we have thread-local cpu_single_env now and KVM uses exactly one
thread per VCPU, we can drop the cpu_single_env updates from the loop
and initialize this variable only once during setup.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
cpus.c|1 +
kvm-all.c |5 -
2 files
And here is v4:
- Changed TPR IP reporting in KVM user space irqchip mode to always
report the instruction after the triggering one
- Fixed bug that froze TCG with VAPIC enabled during setup
(by making run_on_vcpus fully TCG compatible)
- Rebased over uq/master
- Removed forgotten debug
The CH registers is only written, never read. So we can remove these
operations and, in case of up_set_tpr, also the ECX push/pop.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
pc-bios/optionrom/kvmvapic.S |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git
Use OPTION_ROM_START/END from the common header file, add comment to
init code.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
pc-bios/optionrom/kvmvapic.S | 18 --
1 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/pc-bios/optionrom/kvmvapic.S
On 02/01/2012 01:31 PM, Jan Kiszka wrote:
Changes in V4:
- rebased over qom-upstream.13
- comment on rtc_irq_level clearing on reset
- fix call to isa_register_ioport by passing the pcspk device
Not changed:
- PIT pointer property of pcspk
(Paolo will port it together with other
On 02/16/2012 06:23 PM, Alexander Graf wrote:
On 16.02.2012, at 21:41, Scott Wood wrote:
And yes, we do have fancier hardware coming fairly soon for which this
breaks (TLB0 entries can be loaded without host involvement, as long as
there's a translation from guest physical to physical in a
On 02/17/2012 04:03 AM, Liu Yu-B13201 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Friday, February 17, 2012 1:13 AM
To: Liu Yu-B13201
Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org;
linuxppc-...@ozlabs.org; Wood Scott-B07421
Subject: Re: [PATCH v4
On 02/17/2012 11:13 AM, Alexander Graf wrote:
From: Scott Wood scottw...@freescale.com
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without
On 02/17/2012 11:13 AM, Alexander Graf wrote:
When one vcpu wants to kick another, it can issue a special IPI instruction
called msgsnd. This patch emulates this instruction, its clearing counterpart
and the infrastructure required to actually trigger that interrupt inside
a guest vcpu.
On 02/17/2012 03:55 PM, Scott Wood wrote:
Should this be a kvm_make_request instead (with a separate
pending_doorbell bool in vcpu that msgclr can act on), considering
earlier discussion of phasing out atomics on pending_exceptions, in
favor of requests?
Ignore the bit about msgclr -- it acts
On 02/17/2012 11:13 AM, Alexander Graf wrote:
We can't build e500v2 and e500mc (kvm) support inside the same kernel.
So indicate that by making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed,
On Fri, Feb 17, 2012 at 10:56 AM, Alexander Graf ag...@suse.de wrote:
config KVM_E500MC
bool KVM support for PowerPC E500MC/E5500 processors
- depends on EXPERIMENTAL PPC_E500MC
+ depends on EXPERIMENTAL PPC_E500MC !KVM_E500V2
There was a patch floating around that
Hi,
I'm trying to trace some guest physical pages by running:
cmd-trace record -e kvmmmu:kvm_mmu_get_page
However, when reporting I'm running into error messages like the
following:
...
failed to read event print fmt for kvm_emulate_insn
Error: expected type 4 but read 7
Error: expected
On 02/17/2012 11:13 AM, Alexander Graf wrote:
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Signed-off-by: Alexander Graf ag...@suse.de
On 02/17/2012 11:13 AM, Alexander Graf wrote:
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback
On 17.02.2012, at 23:32, Tabi Timur-B04825 wrote:
On Fri, Feb 17, 2012 at 10:56 AM, Alexander Graf ag...@suse.de wrote:
config KVM_E500MC
bool KVM support for PowerPC E500MC/E5500 processors
- depends on EXPERIMENTAL PPC_E500MC
+ depends on EXPERIMENTAL PPC_E500MC
I just updated my kvm host, kernel upgraded from 2.6.38 up to 3.2, and
qemu+qemu-kvm updated (not sure from what to what). But after the upgrade, one
of my guests will not start up. It gets stuck with 60-80% cpu use, almost no
memory is allocated by qemu/kvm, and no output of any kind is seen
On Tue, 2011-12-20 at 19:34 -0600, Scott Wood wrote:
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to
server/classic
exception vectors but not really.
FIXME: Replace the existing trap numbering rather than add to
-Original Message-
From: Wood Scott-B07421
Sent: Friday, February 17, 2012 1:13 AM
To: Liu Yu-B13201
Cc: ag...@suse.de; kvm-ppc@vger.kernel.org; k...@vger.kernel.org;
linuxppc-...@ozlabs.org; Wood Scott-B07421
Subject: Re: [PATCH v4 1/3] KVM: PPC: epapr: Factor out the epapr init
For BookE HV the guest visible MSR is shared-msr and is identical to
the MSR that is in use while the guest is running, because we can't trap
reads from/to MSR.
So shadow_msr is unused there. Indicate that with a comment.
Signed-off-by: Alexander Graf ag...@suse.de
---
When using exit timing stats, we clobber r9 in the NEED_EMU case,
so better move that part down a few lines and fix it that way.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git
We need to make sure that no MAS updates happen automatically while we
have the guest MAS registers loaded. So move the disabling code a bit
higher up so that it covers the full time we have guest values in MAS
registers.
The race this patch fixes should never occur, but it makes the code a
bit
The semantics of BOOKE_IRQPRIO_MAX changed to denote the highest available
irqprio + 1, so let's reflect that in the code too.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
The SET_VCPU macro is a leftover from times when the vcpu struct wasn't
stored in the thread on vcpu_load/put. It's not needed anymore. Remove it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 0 insertions(+), 8
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c | 15
Instead if doing
#ifndef CONFIG_64BIT
...
#else
...
#endif
we should rather do
#ifdef CONFIG_64BIT
...
#else
...
#endif
which is a lot easier to read. Change the bookehv implementation to
stick with this rule.
Signed-off-by: Alexander Graf ag...@suse.de
---
When we fail to emulate an instruction for the guest, we better go in and
tell it that we failed to emulate it, by throwing an illegal instruction
exception.
Please beware that we basically never get around to telling the guest that
we failed thanks to the debugging code right above it. If user
The e500mc patches left some debug code in that we don't need. Remove it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index
We can't build e500v2 and e500mc (kvm) support inside the same kernel.
So indicate that by making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
The CONFIG_KVM_E500 option really indicates that we're running on a V2 machine,
not on a machine of the generic E500 class. So indicate that properly and
change the config name accordingly.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig|8
If we hit any exception whatsoever in the restore path and r1/r2 aren't the
host registers, we don't get a working oops. So it's always a good idea to
restore them as early as possible.
This time, it actually has practical reasons to do so too, since we need to
have the host page fault handler
From: Scott Wood scottw...@freescale.com
The PID handling is e500v1/v2-specific, and is moved to e500.c.
The MMU sregs code and kvmppc_core_vcpu_translate will be shared with
e500mc, and is moved from e500.c to e500_tlb.c.
Partially based on patches from Liu Yu yu@freescale.com.
From: Scott Wood scottw...@freescale.com
Currently 32-bit only cares about this for choice of exception
vector, which is done in core-specific code. However, KVM will
want to distinguish as well.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
Rather than invalidate everything when a TLB1 entry needs to be
taken down, keep track of which host TLB1 entries are used for
a given guest TLB1 entry, and invalidate just those entries.
Based on code from Ashish Kalra ashish.ka...@freescale.com
and Liu
From: Scott Wood scottw...@freescale.com
Keeping two separate headers for e500-specific things was a
pain, and wasn't even organized along any logical boundary.
There was TLB stuff in asm/kvm_e500.h despite the existence of
arch/powerpc/kvm/e500_tlb.h, and nothing in asm/kvm_e500.h needed
to be
From: Scott Wood scottw...@freescale.com
tlbilx is the new, preferred invalidation instruction. It is not
found on e500 prior to e500mc, but there should be no harm in
supporting it on all e500.
Based on code from Ashish Kalra ashish.ka...@freescale.com.
Signed-off-by: Scott Wood
From: Scott Wood scottw...@freescale.com
Move vcpu to the beginning of vcpu_e500 to give it appropriate
prominence, especially if more fields end up getting added to the
end of vcpu_e500 (and vcpu ends up in the middle).
Remove gratuitous extern and add parameter names to prototypes.
From: Scott Wood scottw...@freescale.com
This is in preparation for merging in the contents of
arch/powerpc/include/asm/kvm_e500.h.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/e500.c |2 +-
From: Scott Wood scottw...@freescale.com
e500mc will want to do lpid allocation/deallocation here.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/44x.c |9 +
arch/powerpc/kvm/booke.c |9 -
From: Scott Wood scottw...@freescale.com
Split e500 (v1/v2) and e500mc/e5500 to allow optimization of feature
checks that differ between the two.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/cputable.h | 12
On 02/17/2012 11:13 AM, Alexander Graf wrote:
From: Scott Wood scottw...@freescale.com
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without
On 02/17/2012 03:55 PM, Scott Wood wrote:
Should this be a kvm_make_request instead (with a separate
pending_doorbell bool in vcpu that msgclr can act on), considering
earlier discussion of phasing out atomics on pending_exceptions, in
favor of requests?
Ignore the bit about msgclr -- it acts
On 02/17/2012 11:13 AM, Alexander Graf wrote:
We can't build e500v2 and e500mc (kvm) support inside the same kernel.
So indicate that by making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed,
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