Re: [PATCH v3 05/22] arm64: KVM: Implement vgic-v3 save/restore

On Mon, 7 Dec 2015 18:14:36 -0800 Mario Smarduch wrote: > > > On 12/7/2015 10:20 AM, Marc Zyngier wrote: > > On 07/12/15 18:05, Mario Smarduch wrote: > >> > >> > >> On 12/7/2015 9:37 AM, Marc Zyngier wrote: > [...] > >>> > >> > >> I was thinking something like

Re: [PATCH kernel 5/9] KVM: PPC: Account TCE-containing pages in locked_vm

On Tue, Sep 15, 2015 at 08:49:35PM +1000, Alexey Kardashevskiy wrote: > At the moment pages used for TCE tables (in addition to pages addressed > by TCEs) are not counted in locked_vm counter so a malicious userspace > tool can call ioctl(KVM_CREATE_SPAPR_TCE) as many times as RLIMIT_NOFILE and >

Re: [PATCH kernel 7/9] KVM: PPC: Move reusable bits of H_PUT_TCE handler to helpers

On Tue, Sep 15, 2015 at 08:49:37PM +1000, Alexey Kardashevskiy wrote: > Upcoming multi-tce support (H_PUT_TCE_INDIRECT/H_STUFF_TCE hypercalls) > will validate TCE (not to have unexpected bits) and IO address > (to be within the DMA window boundaries). > > This introduces helpers to validate TCE

Re: [PATCH kernel 7/9] KVM: PPC: Move reusable bits of H_PUT_TCE handler to helpers

On Tue, Sep 15, 2015 at 08:49:37PM +1000, Alexey Kardashevskiy wrote: > Upcoming multi-tce support (H_PUT_TCE_INDIRECT/H_STUFF_TCE hypercalls) > will validate TCE (not to have unexpected bits) and IO address > (to be within the DMA window boundaries). > > This introduces helpers to validate TCE

Re: [PATCH kernel 6/9] KVM: PPC: Replace SPAPR_TCE_SHIFT with IOMMU_PAGE_SHIFT_4K

On Tue, Sep 15, 2015 at 08:49:36PM +1000, Alexey Kardashevskiy wrote: > SPAPR_TCE_SHIFT is used in few places only and since IOMMU_PAGE_SHIFT_4K > can be easily used instead, remove SPAPR_TCE_SHIFT. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson

Re: [PATCH kernel 5/9] KVM: PPC: Account TCE-containing pages in locked_vm

On Tue, Sep 15, 2015 at 08:49:35PM +1000, Alexey Kardashevskiy wrote: > At the moment pages used for TCE tables (in addition to pages addressed > by TCEs) are not counted in locked_vm counter so a malicious userspace > tool can call ioctl(KVM_CREATE_SPAPR_TCE) as many times as RLIMIT_NOFILE and >

Re: [PATCH kernel 6/9] KVM: PPC: Replace SPAPR_TCE_SHIFT with IOMMU_PAGE_SHIFT_4K

On Tue, Sep 15, 2015 at 08:49:36PM +1000, Alexey Kardashevskiy wrote: > SPAPR_TCE_SHIFT is used in few places only and since IOMMU_PAGE_SHIFT_4K > can be easily used instead, remove SPAPR_TCE_SHIFT. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson

Re: [PATCH kernel 8/9] KVM: Fix KVM_SMI chapter number

On Tue, Sep 15, 2015 at 08:49:38PM +1000, Alexey Kardashevskiy wrote: > The KVM_SMI capability is following the KVM_S390_SET_IRQ_STATE capability > which is "4.95", this changes the number of the KVM_SMI chapter to 4.96. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by:

Re: [PATCH v5 03/21] KVM: ARM64: Add offset defines for PMU registers

Hi Marc, On 2015/12/7 22:55, Marc Zyngier wrote: > On 07/12/15 14:31, Shannon Zhao wrote: >> > >> > >> > On 2015/12/7 22:06, Marc Zyngier wrote: >>> >> On 03/12/15 06:11, Shannon Zhao wrote: >>> From: Shannon Zhao >>> >>> We are about to trap and emulate

Re: [PATCH kernel 9/9] KVM: PPC: Add support for multiple-TCE hcalls

On Tue, Sep 15, 2015 at 08:49:39PM +1000, Alexey Kardashevskiy wrote: > This adds real and virtual mode handlers for the H_PUT_TCE_INDIRECT and > H_STUFF_TCE hypercalls for user space emulated devices such as IBMVIO > devices or emulated PCI. These calls allow adding multiple entries > (up to

Re: [PATCH kernel 9/9] KVM: PPC: Add support for multiple-TCE hcalls

On Tue, Sep 15, 2015 at 08:49:39PM +1000, Alexey Kardashevskiy wrote: > This adds real and virtual mode handlers for the H_PUT_TCE_INDIRECT and > H_STUFF_TCE hypercalls for user space emulated devices such as IBMVIO > devices or emulated PCI. These calls allow adding multiple entries > (up to

Re: [PATCH v5 03/21] KVM: ARM64: Add offset defines for PMU registers

On 08/12/15 08:09, Shannon Zhao wrote: > Hi Marc, > > On 2015/12/7 22:55, Marc Zyngier wrote: >> On 07/12/15 14:31, Shannon Zhao wrote: On 2015/12/7 22:06, Marc Zyngier wrote: >> On 03/12/15 06:11, Shannon Zhao wrote: From: Shannon Zhao

Re: [PATCH v3 06/22] arm64: KVM: Implement timer save/restore

On 08/12/15 02:18, Mario Smarduch wrote: > > > On 12/7/2015 2:53 AM, Marc Zyngier wrote: >> Implement the timer save restore as a direct translation of >> the assembly code version. >> >> Signed-off-by: Marc Zyngier >> --- >> arch/arm64/kvm/hyp/Makefile | 1 + >>

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[PATCH v6 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

From: Shannon Zhao When we use tools like perf on host, perf passes the event type and the id of this event type category to kernel, then kernel will map them to hardware event number and write this number to PMU PMEVTYPER_EL0 register. When getting the event number in

[PATCH v6 11/21] KVM: ARM64: Add access handler for PMXEVCNTR register

From: Shannon Zhao Accessing PMXEVCNTR register is mapped to the PMEVCNTRn or PMCCNTR which is selected by PMSELR. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 44 ++-- 1 file changed, 42

[PATCH v6 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register

From: Shannon Zhao Since the reset value of PMSELR_EL0 is UNKNOWN, use reset_unknown for its reset handler. As it doesn't need to deal with the accessing action specially, it uses default case to emulate writing and reading PMSELR register. Signed-off-by: Shannon Zhao

[PATCH v6 09/21] KVM: ARM64: Add access handler for PMXEVTYPER register

From: Shannon Zhao Accessing PMXEVTYPER register is mapped to the PMEVTYPERn or PMCCFILTR which is selected by PMSELR. If the value of PMSELR is valid, call kvm_pmu_set_counter_event_type to create a perf_event. Signed-off-by: Shannon Zhao ---

[PATCH v6 20/21] KVM: ARM64: Free perf event of PMU when destroying vcpu

From: Shannon Zhao When KVM frees VCPU, it needs to free the perf_event of PMU. Signed-off-by: Shannon Zhao --- arch/arm/kvm/arm.c| 1 + include/kvm/arm_pmu.h | 2 ++ virt/kvm/arm/pmu.c| 21 + 3 files changed, 24

[PATCH v6 21/21] KVM: ARM64: Add a new kvm ARM PMU device

From: Shannon Zhao Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement the kvm_device_ops for it. Signed-off-by: Shannon Zhao --- Documentation/virtual/kvm/devices/arm-pmu.txt | 16 + arch/arm64/include/uapi/asm/kvm.h

[PATCH v6 18/21] KVM: ARM64: Add PMU overflow interrupt routing

From: Shannon Zhao When calling perf_event_create_kernel_counter to create perf_event, assign a overflow handler. Then when perf event overflows, call kvm_vcpu_kick() to sync the interrupt. Signed-off-by: Shannon Zhao --- arch/arm/kvm/arm.c

[PATCH v6 16/21] KVM: ARM64: Add reset and access handlers for PMSWINC register

From: Shannon Zhao Add access handler which emulates writing and reading PMSWINC register and add support for creating software increment event. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 16 +++-

[PATCH v6 00/21] KVM: ARM64: Add guest PMU support

From: Shannon Zhao This patchset adds guest PMU support for KVM on ARM64. It takes trap-and-emulate approach. When guest wants to monitor one event, it will be trapped by KVM and KVM will call perf_event API to create a perf event and call relevant perf_event APIs to get

[PATCH v6 15/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register

From: Shannon Zhao The reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c

[PATCH v6 01/21] ARM64: Move PMU register related defines to asm/pmu.h

From: Shannon Zhao To use the ARMv8 PMU related register defines from the KVM code, we move the relevant definitions to asm/pmu.h header file. Signed-off-by: Anup Patel Signed-off-by: Shannon Zhao ---

[PATCH v6 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register

From: Shannon Zhao Add reset handler which gets host value of PMCR_EL0 and make writable bits architecturally UNKNOWN except PMCR.E to zero. Add a common access handler for PMU registers which emulates writing and reading register and add emulation for PMCR.

[PATCH v6 03/21] KVM: ARM64: Add offset defines for PMU registers

From: Shannon Zhao We are about to trap and emulate accesses to each PMU register individually. This adds the context offsets for the AArch64 PMU registers and their AArch32 counterparts. Signed-off-by: Shannon Zhao ---

Re: [PATCH v9 3/6] target-arm: kvm - support for single step

Peter Maydell writes: > On 12 November 2015 at 16:20, Alex Bennée wrote: >> This adds support for single-step. There isn't much to do on the QEMU >> side as after we set-up the request for single step via the debug ioctl >> it is all handled

[PATCH 3/6] Revert "VSOCK: Introduce vhost-vsock.ko"

This reverts commit 98bb892821c1ad3781b8c7daec2fc8a8de3390c9. Keep virtio-vsock out-of-tree until the device specification is finalized. Signed-off-by: Stefan Hajnoczi --- drivers/vhost/vsock.c | 631 -- drivers/vhost/vsock.h

[PATCH 2/6] Revert "VSOCK: Add Makefile and Kconfig"

This reverts commit 8a2a2029893b4c35d1aba2932111a1a164b9c948. Keep virtio-vsock out-of-tree until the device specification is finalized. Signed-off-by: Stefan Hajnoczi --- drivers/vhost/Kconfig | 4 drivers/vhost/Kconfig.vsock | 7 ---

[PATCH 5/6] Revert "VSOCK: Introduce virtio-vsock-common.ko"

This reverts commit 80a19e338d458abb5a700df3fd00795c51361f06. Keep virtio-vsock out-of-tree until the device specification is finalized. Signed-off-by: Stefan Hajnoczi --- include/linux/virtio_vsock.h| 209 - include/uapi/linux/virtio_ids.h |1

[PATCH 6/6] Revert "VSOCK: Introduce vsock_find_unbound_socket and vsock_bind_dgram_generic"

This reverts commit 357ab2234d57f6c74386f64ded42dff8e3c0500b. Keep virtio-vsock out-of-tree until the device specification is finalized. Signed-off-by: Stefan Hajnoczi --- include/net/af_vsock.h | 2 -- net/vmw_vsock/af_vsock.c | 70

[PATCH 4/6] Revert "VSOCK: Introduce virtio-vsock.ko"

This reverts commit 32e61b06b6946ba137723c5b1de2a1fdb2e0e0a5. Keep virtio-vsock out-of-tree until the device specification is finalized. Signed-off-by: Stefan Hajnoczi --- net/vmw_vsock/virtio_transport.c | 466 --- 1 file changed, 466

[PATCH 1/6] Revert "VSOCK: fix returnvar.cocci warnings"

This reverts commit 0d76d6e8b2507983a2cae4c09880798079007421. Keep virtio-vsock out-of-tree until the virtio-vsock device specification is finalized. Signed-off-by: Stefan Hajnoczi --- drivers/vhost/vsock.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[PATCH 0/6] VSOCK: revert virtio-vsock until device spec is finalized

The virtio-vsock device specification is not finalized yet. Michael Tsirkin voiced concerned about merging this code when the hardware interface (and possibly the userspace interface) could still change. Please revert for now. I am working to finalize the virtio-vsock device specification and

[PATCH v6 10/21] KVM: ARM64: Add access handler for PMEVCNTRn and PMCCNTR register

From: Shannon Zhao Since the reset value of PMEVCNTRn or PMCCNTR is UNKNOWN, use reset_unknown for its reset handler. Add access handler which emulates writing and reading PMEVCNTRn or PMCCNTR register. When reading PMEVCNTRn or PMCCNTR, call perf_event_read_value to get

[PATCH v6 19/21] KVM: ARM64: Reset PMU state when resetting vcpu

From: Shannon Zhao When resetting vcpu, it needs to reset the PMU state to initial status. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/reset.c | 3 +++ include/kvm/arm_pmu.h | 2 ++ virt/kvm/arm/pmu.c | 17 + 3 files

[PATCH v6 12/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register

From: Shannon Zhao Since the reset value of PMCNTENSET and PMCNTENCLR is UNKNOWN, use reset_unknown for its reset handler. Add a new case to emulate writing PMCNTENSET or PMCNTENCLR register. When writing to PMCNTENSET, call perf_event_enable to enable the perf event.

[PATCH v6 13/21] KVM: ARM64: Add reset and access handlers for PMINTENSET and PMINTENCLR register

From: Shannon Zhao Since the reset value of PMINTENSET and PMINTENCLR is UNKNOWN, use reset_unknown for its reset handler. Add a new case to emulate writing PMINTENSET or PMINTENCLR register. Signed-off-by: Shannon Zhao ---

[PATCH v6 17/21] KVM: ARM64: Add helper to handle PMCR register bits

From: Shannon Zhao According to ARMv8 spec, when writing 1 to PMCR.E, all counters are enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are disabled. When writing 1 to PMCR.P, reset all event counters, not including PMCCNTR, to zero. When writing 1 to

Re: [PATCH v9 6/6] tests/guest-debug: introduce basic gdbstub tests

Peter Maydell writes: > On 12 November 2015 at 16:20, Alex Bennée wrote: >> From: Alex Bennée >> >> The aim of these tests is to combine with an appropriate kernel >> image (with symbol-file vmlinux) and check it behaves as it

[PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu

From: Shannon Zhao Here we plan to support virtual PMU for guest by full software emulation, so define some basic structs and functions preparing for futher steps. Define struct kvm_pmc for performance monitor counter and struct kvm_pmu for performance monitor unit for

[PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register

From: Shannon Zhao Since the reset value of PMOVSSET and PMOVSCLR is UNKNOWN, use reset_unknown for its reset handler. Add a new case to emulate writing PMOVSSET or PMOVSCLR register. When writing non-zero value to PMOVSSET, pend PMU interrupt. When the value writing to

[PATCH v6 08/21] KVM: ARM64: Add access handler for PMEVTYPERn and PMCCFILTR register

From: Shannon Zhao Add access handler which emulates writing and reading PMEVTYPERn or PMCCFILTR register. When writing to PMEVTYPERn or PMCCFILTR, call kvm_pmu_set_counter_event_type to create a perf_event for the selected event type. Signed-off-by: Shannon Zhao

[PATCH v6 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register

From: Shannon Zhao Add reset handler which gets host value of PMCEID0 or PMCEID1. Since write action to PMCEID0 or PMCEID1 is ignored, add a new case for this. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/sys_regs.c | 29

Re: [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu

On 08/12/15 13:53, Will Deacon wrote: > On Tue, Dec 08, 2015 at 01:37:14PM +, Marc Zyngier wrote: >> On 08/12/15 12:47, Shannon Zhao wrote: >>> From: Shannon Zhao >>> >>> Here we plan to support virtual PMU for guest by full software >>> emulation, so define some

Re: [PATCH v6 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Add reset handler which gets host value of PMCEID0 or PMCEID1. Since > write action to PMCEID0 or PMCEID1 is ignored, add a new case for this. > > Signed-off-by: Shannon Zhao > ---

Re: [PATCH v4 0/4] KVM: arm64: BUG FIX: Correctly handle zero register transfers

On Tue, Dec 08, 2015 at 09:57:21AM +0300, Pavel Fedin wrote: > Hello! > > > I messed up the "load into xzr" test royally in the last attached patch. > > It was quite wrong. > > Yes, because "mov %0, xzr" is not trapped. > > > I have now tested > > > > asm volatile( > > "str %3,

Re: [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Here we plan to support virtual PMU for guest by full software > emulation, so define some basic structs and functions preparing for > futher steps. Define struct kvm_pmc for performance monitor counter and

Re: [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu

On Tue, Dec 08, 2015 at 01:37:14PM +, Marc Zyngier wrote: > On 08/12/15 12:47, Shannon Zhao wrote: > > From: Shannon Zhao > > > > Here we plan to support virtual PMU for guest by full software > > emulation, so define some basic structs and functions preparing for >

Re: [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu

On 2015/12/8 22:10, Marc Zyngier wrote: On 08/12/15 13:53, Will Deacon wrote: On Tue, Dec 08, 2015 at 01:37:14PM +, Marc Zyngier wrote: On 08/12/15 12:47, Shannon Zhao wrote: From: Shannon Zhao Here we plan to support virtual PMU for guest by full software

Re: [PATCH v6 10/21] KVM: ARM64: Add access handler for PMEVCNTRn and PMCCNTR register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMEVCNTRn or PMCCNTR is UNKNOWN, use > reset_unknown for its reset handler. Add access handler which emulates > writing and reading PMEVCNTRn or PMCCNTR register. When reading >

Re: [PATCH v6 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > When we use tools like perf on host, perf passes the event type and the > id of this event type category to kernel, then kernel will map them to > hardware event number and write this number to PMU

Re: [PATCH v6 08/21] KVM: ARM64: Add access handler for PMEVTYPERn and PMCCFILTR register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Add access handler which emulates writing and reading PMEVTYPERn or > PMCCFILTR register. When writing to PMEVTYPERn or PMCCFILTR, call > kvm_pmu_set_counter_event_type to create a perf_event for the

[PATCH] vhost: vsock: select CONFIG_VHOST

When building the new vsock code without vhost, we get a build error: drivers/built-in.o: In function `vhost_vsock_flush': :(.text+0x24d29c): undefined reference to `vhost_poll_flush' This adds an explicit 'select' like we have for the other vhost drivers. Signed-off-by: Arnd Bergmann

[PATCH v2 0/3] KVM-UNIT-TESTS: Hyper-V SynIC timers test

The test checks Hyper-V SynIC timers functionality. The test runs on every vCPU and performs start/stop of periodic/one-shot timers (with period=1ms) and checks validity of received expiration messages in appropriate ISR's. Changes v2: * Share generic Hyper-V tests code * Hyper-V SynIC timers

Re: [PATCH v6 12/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMCNTENSET and PMCNTENCLR is UNKNOWN, use > reset_unknown for its reset handler. Add a new case to emulate writing > PMCNTENSET or PMCNTENCLR register. > > When writing to

Re: [PATCH 0/6] VSOCK: revert virtio-vsock until device spec is finalized

From: Stefan Hajnoczi Date: Tue, 8 Dec 2015 19:57:30 +0800 > Please revert for now. Please don't revert it piece by piece like this. Instead, send me one big revert commit that undoes the whole thing. There is even a merge commit that you can use to create that revert

Re: [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMOVSSET and PMOVSCLR is UNKNOWN, use > reset_unknown for its reset handler. Add a new case to emulate writing > PMOVSSET or PMOVSCLR register. > > When writing non-zero value to

Re: [PATCH v6 15/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > The reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown. > > Signed-off-by: Shannon Zhao > --- > arch/arm64/kvm/sys_regs.c | 5 +++-- > 1 file changed, 3 insertions(+), 2

Re: [PATCH] vhost: vsock: select CONFIG_VHOST

On Tue, Dec 08, 2015 at 04:46:08PM +0100, Arnd Bergmann wrote: > When building the new vsock code without vhost, we get a build error: > > drivers/built-in.o: In function `vhost_vsock_flush': > :(.text+0x24d29c): undefined reference to `vhost_poll_flush' > > This adds an explicit 'select' like

[PATCH v2 3/3] x86: Hyper-V SynIC timers test

The test checks Hyper-V SynIC timers functionality. The test runs on every vCPU and performs start/stop of periodic/one-shot timers (with period=1ms) and checks validity of received expiration messages in appropriate ISR's. Changes v2: * reorg code to use generic hyperv.h * split timer test into

[PATCH v2 2/3] x86/hyperv: Move Hyper-V generic code into hyperv.h/hyperv.c

This code will be used as shared between hyperv_synic and hyperv_stimer tests. Signed-off-by: Andrey Smetanin CC: Paolo Bonzini CC: Marcelo Tosatti CC: Roman Kagan CC: Denis V. Lunev CC:

[PATCH v2 1/3] lib/x86: Make free_page() available to call

This will be used to release allocated pages by Hyper-V SynIC timers test. Signed-off-by: Andrey Smetanin Reviewed-by: Roman Kagan CC: Paolo Bonzini CC: Marcelo Tosatti CC: Roman Kagan

Re: [PATCH v6 11/21] KVM: ARM64: Add access handler for PMXEVCNTR register

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Accessing PMXEVCNTR register is mapped to the PMEVCNTRn or PMCCNTR which > is selected by PMSELR. > > Signed-off-by: Shannon Zhao > --- > arch/arm64/kvm/sys_regs.c | 44

Re: [PATCH] vhost: vsock: select CONFIG_VHOST

From: "Michael S. Tsirkin" Date: Tue, 8 Dec 2015 18:09:44 +0200 > On Tue, Dec 08, 2015 at 04:46:08PM +0100, Arnd Bergmann wrote: >> When building the new vsock code without vhost, we get a build error: >> >> drivers/built-in.o: In function `vhost_vsock_flush': >>

[PATCH v10 0/6] QEMU support for KVM Guest Debug on arm64

Hi, Here is the latest patch set to support debugging of KVM guests on arm64. The main changes are fixing arm32 compiles (mostly with stubs for the upcomming arm32 debug) and the usual bunch of minor tweaks and clarifications following review. I've kept the GDB Python based test in

[PATCH v10 5/6] target-arm: kvm - re-inject guest debug exceptions

If we can't find details for the debug exception in our debug state then we can assume the exception is due to debugging inside the guest. To inject the exception into the guest state we re-use the TCG exception code (do_interrupt). However while guest debugging is in effect we currently can't

[PATCH v10 1/6] target-arm: kvm64 - introduce kvm_arm_init_debug()

As we haven't always had guest debug support we need to probe for it. Additionally we don't do this in the start-up capability code so we don't fall over on old kernels. Signed-off-by: Alex Bennée --- target-arm/kvm64.c | 18 ++ 1 file changed, 18

[PATCH v10 6/6] tests/guest-debug: introduce basic gdbstub tests

The aim of these tests is to combine with an appropriate kernel image (with symbol-file vmlinux) and check it behaves as it should. Given a kernel it checks: - single step - software breakpoint - hardware breakpoint - access, read and write watchpoints On success it returns 0 to the

[PATCH v10 3/6] target-arm: kvm - support for single step

This adds support for single-step. There isn't much to do on the QEMU side as after we set-up the request for single step via the debug ioctl it is all handled within the kernel. The actual setting of the KVM_GUESTDBG_SINGLESTEP flag is already in the common code. If the kernel doesn't support

[PATCH v10 2/6] target-arm: kvm - implement software breakpoints

These don't involve messing around with debug registers, just setting the breakpoint instruction in memory. GDB will not use this mechanism if it can't access the memory to write the breakpoint. All the kernel has to do is ensure the hypervisor traps the breakpoint exceptions and returns to

[PATCH v10 4/6] target-arm: kvm - add support for HW assisted debug

This adds basic support for HW assisted debug. The ioctl interface to KVM allows us to pass an implementation defined number of break and watch point registers. When KVM_GUESTDBG_USE_HW is specified these debug registers will be installed in place on the world switch into the guest. The hardware

Re: [PATCH v6 18/21] KVM: ARM64: Add PMU overflow interrupt routing

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > When calling perf_event_create_kernel_counter to create perf_event, > assign a overflow handler. Then when perf event overflows, call > kvm_vcpu_kick() to sync the interrupt. Please update the commit

Re: [PATCH v6 21/21] KVM: ARM64: Add a new kvm ARM PMU device

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement > the kvm_device_ops for it. > > Signed-off-by: Shannon Zhao > --- >

Re: [PATCH v6 17/21] KVM: ARM64: Add helper to handle PMCR register bits

On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > According to ARMv8 spec, when writing 1 to PMCR.E, all counters are > enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are > disabled. When writing 1 to PMCR.P, reset all event counters, not >

Re: [PATCH v6 00/21] KVM: ARM64: Add guest PMU support

Shannon, On 08/12/15 12:47, Shannon Zhao wrote: > From: Shannon Zhao > > This patchset adds guest PMU support for KVM on ARM64. It takes > trap-and-emulate approach. When guest wants to monitor one event, it > will be trapped by KVM and KVM will call perf_event API to

Re: [PATCH v6 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

On 2015/12/8 23:43, Marc Zyngier wrote: > On 08/12/15 12:47, Shannon Zhao wrote: >> From: Shannon Zhao >> +/** >> + * kvm_pmu_get_counter_value - get PMU counter value >> + * @vcpu: The vcpu pointer >> + * @select_idx: The counter index >> + */ >> +u64

Re: [PATCH v2 0/5] Add virtio transport for AF_VSOCK

On Fri, Dec 04, 2015 at 09:45:04AM +0200, Michael S. Tsirkin wrote: > On Wed, Dec 02, 2015 at 02:43:58PM +0800, Stefan Hajnoczi wrote: > > 1. The 3-way handshake isn't necessary over a reliable transport > > (virtqueue). > >Spoofing packets is also impossible so the security aspects of the

Re: [PATCH 0/6] VSOCK: revert virtio-vsock until device spec is finalized

On Tue, Dec 08, 2015 at 11:26:55AM -0500, David Miller wrote: > From: Stefan Hajnoczi > Date: Tue, 8 Dec 2015 19:57:30 +0800 > > > Please revert for now. > > Please don't revert it piece by piece like this. > > Instead, send me one big revert commit that undoes the whole

Re: [PATCH v2] Revert "Merge branch 'vsock-virtio'"

From: Stefan Hajnoczi Date: Wed, 9 Dec 2015 10:51:12 +0800 > This reverts commit 0d76d6e8b2507983a2cae4c09880798079007421 and merge > commit c402293bd76fbc93e52ef8c0947ab81eea3ae019, reversing changes made > to c89359a42e2a49656451569c382eed63e781153c. > > The virtio-vsock

Re: [PATCH 1/1] KVM: PPC: Increase memslots to 320

On Wed, Nov 04, 2015 at 10:03:48AM +0100, Thomas Huth wrote: > Only using 32 memslots for KVM on powerpc is way too low, you can > nowadays hit this limit quite fast by adding a couple of PCI devices > and/or pluggable memory DIMMs to the guest. > x86 already increased the limit to 512 in total,

Re: [PATCH 1/1] KVM: PPC: Increase memslots to 320

On Wed, Nov 04, 2015 at 10:03:48AM +0100, Thomas Huth wrote: > Only using 32 memslots for KVM on powerpc is way too low, you can > nowadays hit this limit quite fast by adding a couple of PCI devices > and/or pluggable memory DIMMs to the guest. > x86 already increased the limit to 512 in total,

[PATCH v2] Revert "Merge branch 'vsock-virtio'"

This reverts commit 0d76d6e8b2507983a2cae4c09880798079007421 and merge commit c402293bd76fbc93e52ef8c0947ab81eea3ae019, reversing changes made to c89359a42e2a49656451569c382eed63e781153c. The virtio-vsock device specification is not finalized yet. Michael Tsirkin voiced concerned about merging