[PULL 21/21] KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()

From: Pavel Fedin <p.fe...@samsung.com> Now we see that vgic_set_lr() and vgic_sync_lr_elrsr() are always used together. Merge them into one function, saving from second vgic_ops dereferencing every time. Signed-off-by: Pavel Fedin <p.fe...@samsung.com> Signed-off-by: Chri

[PULL 07/21] arm/arm64: KVM: Rework the arch timer to use level-triggered semantics

ync and re-inject a new interrupt if it is still pending at that time. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/arm.c | 11 +++-- include/kvm/arm_arch_timer.h | 2 +- include/kvm/arm_vgic.h | 3 -- virt/kvm/arm/arch_timer.c

[PULL 11/21] KVM: arm/arm64: check power_off in kvm_arch_vcpu_runnable

From: Eric Auger <eric.au...@linaro.org> kvm_arch_vcpu_runnable now also checks whether the power_off flag is set. Signed-off-by: Eric Auger <eric.au...@linaro.org> Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Christoffer Dall <christoffer.d...@

[PULL 10/21] KVM: arm/arm64: rename pause into power_off

t;eric.au...@linaro.org> Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/include/asm/kvm_host.h | 4 ++-- arch/arm/kvm/arm.c| 20 ++-- arch/arm/kvm/psci.c

[PULL 05/21] arm/arm64: KVM: Use appropriate define in VGIC reset code

to the number 16. Acked-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index f8ca2e9..a44ecf9 10064

[PULL 13/21] KVM: arm/arm64: implement kvm_arm_[halt,resume]_guest

er_off. A new flag is introduced in arch vcpu state, pause, only meant to be used by those functions. Signed-off-by: Eric Auger <eric.au...@linaro.org> Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> -

[PULL 16/21] arm/arm64: KVM: Add tracepoints for vgic and timer

in these files as we go along. Cc: Wei Huang <w...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arch_timer.c | 4 +++ virt/kvm/arm/trace.h | 63 +++ virt/kvm/arm/vgic.c | 5 3 files

[PULL 09/21] arm/arm64: KVM : Enable vhost device selection under KVM config menu

6, ppc). Signed-off-by: Wei Huang <w...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/Kconfig | 2 ++ arch/arm64/kvm/Kconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig index 35697

[PULL 15/21] arm/arm64: KVM: Improve kvm_exit tracepoint

. Cc: Wei Huang <w...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/include/asm/kvm_arm.h | 20 arch/arm/kvm/arm.c | 2 +- arch/arm/kvm/trace.h | 10 +++--- arch/arm64/include/asm/kv

Re: [PATCH] KVM/arm: kernel low level debug support for ARM32 virtual platforms

On Tue, Nov 03, 2015 at 01:39:44PM -0600, Rob Herring wrote: > On Tue, Nov 3, 2015 at 1:17 PM, Mario Smarduch wrote: > > > > > > On 11/3/2015 9:55 AM, Will Deacon wrote: > >> On Tue, Nov 03, 2015 at 09:44:52AM -0800, Mario Smarduch wrote: > >>> On 11/3/2015 8:33 AM,

Re: [PATCH v4 0/3] KVM: arm/arm64: Clean up some obsolete code

On Tue, Oct 27, 2015 at 11:37:28AM +0300, Pavel Fedin wrote: > Current KVM code has lots of old redundancies, which can be cleaned up. > This patchset is actually a better alternative to > http://www.spinics.net/lists/arm-kernel/msg430726.html, which allows to > keep piggy-backed LRs. The idea is

Re: [PATCH v3 00/20] KVM: ARM64: Add guest PMU support

On Thu, Sep 24, 2015 at 03:31:05PM -0700, Shannon Zhao wrote: > This patchset adds guest PMU support for KVM on ARM64. It takes > trap-and-emulate approach. When guest wants to monitor one event, it > will be trapped by KVM and KVM will call perf_event API to create a perf > event and call

Re: [PATCH v3 2/3] KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()

On Mon, Oct 26, 2015 at 06:49:51PM +0300, Pavel Fedin wrote: > Hello! > > > > /* > > >* Reestablish the pending state on the distributor and the > > > - * CPU interface. It may have already been pending, but that > > > - * is fine, then we are only

Re: [PATCH v2 2/2] enable armv8 fp/simd lazy switch

On Mon, Oct 05, 2015 at 07:33:14PM -0700, Mario Smarduch wrote: > This patch enables arm64 lazy fp/simd switch. Removes the ARM constraint, > and follows the same approach as armv7 version - found here. > > https://lists.cs.columbia.edu/pipermail/kvmarm/2015-September/016567.html > > To

Re: [PATCH v2 1/2] add hooks for armv8 fp/simd lazy switch

On Mon, Oct 05, 2015 at 07:33:13PM -0700, Mario Smarduch wrote: > This patch adds hooks to support fp/simd lazy switch. A vcpu flag to track > fp/simd state, and flag offset in vcpu structure. > > Signed-off-by: Mario Smarduch > --- > arch/arm64/include/asm/kvm_host.h |

Re: [RFC PATCH 6/6] arm-smmu: Allow to set iommu mapping for MSI

On Tue, Oct 06, 2015 at 10:26:34AM +, Bhushan Bharat wrote: [...] > > > > I'm certainly not interested in applying an maintaining an interim solution > > that > > isn't the right one. It seems like VFIO is too involved in this process in > > your > > example. On x86 we have per vector

Re: [PATCH v3 2/3] KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()

On Mon, Oct 26, 2015 at 12:00:29PM +0300, Pavel Fedin wrote: > Now we see that vgic_set_lr() and vgic_sync_lr_elrsr() are always used > together. Merge them into one function, saving from second vgic_ops > dereferencing every time. > > Additionally, remove unnecessary vgic_set_lr() and

Re: [PATCH 2/2] KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()

On Fri, Oct 02, 2015 at 05:44:29PM +0300, Pavel Fedin wrote: > Now we see that vgic_set_lr() and vgic_sync_lr_elrsr() are always used > together. Merge them into one function, saving from second vgic_ops > dereferencing every time. > > Additionally, remove unnecessary vgic_set_lr() in

Re: [PATCH v2 2/2] KVM/arm: enable enhanced armv7 fp/simd lazy switch

On Tue, Oct 20, 2015 at 06:10:59PM -0700, Mario Smarduch wrote: > > > On 10/20/2015 12:24 AM, Christoffer Dall wrote: > > On Mon, Oct 19, 2015 at 04:25:04PM -0700, Mario Smarduch wrote: > >> > >> > >> On 10/19/2015 3:14 AM, Christoffer Dall wrote: >

Re: [PATCH 1/2] KVM: arm/arm64: Optimize away redundant LR tracking

On Fri, Oct 02, 2015 at 05:44:28PM +0300, Pavel Fedin wrote: > Currently we use vgic_irq_lr_map in order to track which LRs hold which > IRQs, and lr_used bitmap in order to track which LRs are used or free. > > vgic_irq_lr_map is actually used only for piggy-back optimization, and > can be

Re: [GIT PULL 3/6] KVM: arm: use GIC support unconditionally

On Wed, Oct 21, 2015 at 03:45:20PM +0200, Arnd Bergmann wrote: > On Tuesday 20 October 2015 15:51:05 Paolo Bonzini wrote: > > Should this be "select" or "depends on"? Not a blocker, can always be fixed > > in 4.4. > > We have lots of 'select ARM_GIC' in the tree for platforms that use one, using

Re: [GIT PULL 3/6] KVM: arm: use GIC support unconditionally

didn't pay too much attention to that particular detail. Arnd, any comments? Thanks, -Christoffer > > > -Original Message- > From: Christoffer Dall [christoffer.d...@linaro.org] > Received: martedì, 20 ott 2015, 18:18 > To: Paolo Bonzini [pbonz...@redhat.com]; kvm...@lists.cs.colu

Re: [PATCH 3/3] arm/arm64: KVM: Fix disabled distributor operation

On Tue, Oct 20, 2015 at 11:08:44AM +0200, Eric Auger wrote: > Hi Christoffer, > On 10/17/2015 10:30 PM, Christoffer Dall wrote: > > We currently do a single update of the vgic state when the distrbutor > distributor > > enable/disable control register is accessed and

Re: PING: [PATCH v5 0/7] KVM: arm64: Implement API for vGICv3 live migration

Message- > > From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On > > Behalf Of Pavel Fedin > > Sent: Monday, October 12, 2015 11:30 AM > > To: kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org > > Cc: Christoffer Dall; Marc Zyngier; Andre Przywara &g

Re: [RFT - PATCH v2 0/2] KVM/arm64: add fp/simd lazy switch support

On Mon, Oct 19, 2015 at 03:06:59PM -0700, Mario Smarduch wrote: > > > On 10/18/2015 2:07 PM, Christoffer Dall wrote: > > On Mon, Oct 12, 2015 at 09:29:23AM -0700, Mario Smarduch wrote: > >> Hi Christoffer, Marc - > >> I just threw this test your way with

Re: [PATCH v2 2/2] KVM/arm: enable enhanced armv7 fp/simd lazy switch

On Mon, Oct 19, 2015 at 04:25:04PM -0700, Mario Smarduch wrote: > > > On 10/19/2015 3:14 AM, Christoffer Dall wrote: > > On Sat, Sep 26, 2015 at 04:43:29PM -0700, Mario Smarduch wrote: > >> This patch enhances current lazy vfp/simd hardware switch. In addition to

[GIT PULL 3/6] KVM: arm: use GIC support unconditionally

: KVM: Kill CONFIG_KVM_ARM_{VGIC,TIMER}") Signed-off-by: Arnd Bergmann <a...@arndb.de> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/kvm/Kc

[GIT PULL 2/6] KVM: arm/arm64: Fix memory leak if timer initialization fails

From: Pavel Fedin <p.fe...@samsung.com> Jump to correct label and free kvm_host_cpu_state Reviewed-by: Wei Huang <w...@redhat.com> Signed-off-by: Pavel Fedin <p.fe...@samsung.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/arm.c |

[GIT PULL 6/6] arm/arm64: KVM: Fix disabled distributor operation

. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 58b1256..66c6616 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/

[GIT PULL 0/6] A handful of fixes for KVM/ARM for v4.3-rc7

handling instead of the masking trick. Arnd Bergmann (1): KVM: arm: use GIC support unconditionally Christoffer Dall (3): arm/arm64: KVM: Fix arch timer behavior for disabled interrupts arm/arm64: KVM: Clear map->act

[GIT PULL 5/6] arm/arm64: KVM: Clear map->active on pend/active clear

hit before the guest's GIC initialization sequence is run. Reviewed-by: Eric Auger <eric.au...@linaro.org> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic.c | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff -

[GIT PULL 1/6] KVM: arm/arm64: Do not inject spurious interrupts

to fix the two issues above and also raise a warning in vgic_quue_irq_to_lr if we encounter an interrupt pending on a CPU which is neither marked active nor pending. [ Commit text reworked completely - Christoffer ] Signed-off-by: Pavel Fedin <p.fe...@samsung.com> Signed-off-by: Chri

[GIT PULL 4/6] arm/arm64: KVM: Fix arch timer behavior for disabled interrupts

;lorenzo.pieral...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arch_timer.c | 19 +++ virt/kvm/arm/vgic.c | 43 +++ 2 files changed, 30 insertions(+), 32 deletions(-) diff --git a/virt/kvm/arm

Re: [PATCH v2 2/2] KVM/arm: enable enhanced armv7 fp/simd lazy switch

On Sat, Sep 26, 2015 at 04:43:29PM -0700, Mario Smarduch wrote: > This patch enhances current lazy vfp/simd hardware switch. In addition to > current lazy switch, it tracks vfp/simd hardware state with a vcpu > lazy flag. > > vcpu lazy flag is set on guest access and trap to vfp/simd hardware

Re: [PATCH v2 1/2] KVM/arm: add hooks for armv7 fp/simd lazy switch support

On Sat, Sep 26, 2015 at 04:43:28PM -0700, Mario Smarduch wrote: > This patch adds vcpu fields to track lazy state, save host FPEXC, and > offsets to fields. > > Signed-off-by: Mario Smarduch > --- > arch/arm/include/asm/kvm_host.h | 6 ++ >

Re: [PATCH 1/3] arm/arm64: KVM: Fix arch timer behavior for disabled interrupts

On Mon, Oct 19, 2015 at 03:27:42PM +0200, Eric Auger wrote: > On 10/19/2015 03:14 PM, Christoffer Dall wrote: > > On Mon, Oct 19, 2015 at 03:07:16PM +0200, Eric Auger wrote: > >> Hi Christoffer, > >> On 10/17/2015 10:30 PM, Christoffer Dall wrote: > >>> We h

Re: [PATCH 1/3] arm/arm64: KVM: Fix arch timer behavior for disabled interrupts

On Mon, Oct 19, 2015 at 03:07:16PM +0200, Eric Auger wrote: > Hi Christoffer, > On 10/17/2015 10:30 PM, Christoffer Dall wrote: > > We have an interesting issue when the guest disables the timer interrupt > > on the VGIC, which happens when turning VCPUs off using PSC

Re: [PATCH 2/3] arm/arm64: KVM: Clear map->active on pend/active clear

On Mon, Oct 19, 2015 at 05:32:42PM +0200, Eric Auger wrote: > Hi, > On 10/17/2015 10:30 PM, Christoffer Dall wrote: > > When a guest reboots or offlines/onlines CPUs, it is not uncommon for it > > to clear the pending and active states of an interrupt through the > > e

Re: [PATCH] KVM/arm: kernel low level debug suport for ARM32 virtual platforms

platforms, something > like a platform register. > > Signed-off-by: Mario Smarduch <m.smard...@samsung.com> > --- I can't think of any better way to do this and I would be happy to see this functionality in Linux, so: Acked-by: Christoffer Dall <christoffer.d...@linaro.org> >

Re: [RFT - PATCH v2 0/2] KVM/arm64: add fp/simd lazy switch support

On Mon, Oct 12, 2015 at 09:29:23AM -0700, Mario Smarduch wrote: > Hi Christoffer, Marc - > I just threw this test your way without any explanation. I'm confused. Did you send me something somewhere already? > > The test loops, does fp arithmetic and checks the truncated result. > It could be

[PATCH 3/3] arm/arm64: KVM: Fix disabled distributor operation

. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 58b1256..66c6616 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/

[PATCH 0/3] arm/arm64: KVM: arch timer boot fixes

of fixes. Christoffer Dall (3): arm/arm64: KVM: Fix arch timer behavior for disabled interrupts arm/arm64: KVM: Clear map->active on pend/active clear arm/arm64: KVM: Fix disabled distributor operation virt/kvm/arm/arch_timer.c | 19 +++ virt/kvm/arm/vgic.c |

[PATCH 2/3] arm/arm64: KVM: Clear map->active on pend/active clear

ugh the sync path. We also need to catch the case where the guest deactivates the interrupt through the emulated distributor, again allowing guests to boot even if the original virtual timer signal hit before the guest's GIC initialization sequence is run. Signed-off-by: Christoffer Dall <christo

[PATCH 1/3] arm/arm64: KVM: Fix arch timer behavior for disabled interrupts

errupt as active on the physical distributor. Cc: Marc Zyngier <marc.zyng...@arm.com> Reported-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arch_timer.c | 19 +++ virt/k

Re: [PATCH 1/3] arm/arm64: KVM: Fix arch timer behavior for disabled interrupts

On Sat, Oct 17, 2015 at 10:30:20PM +0200, Christoffer Dall wrote: > We have an interesting issue when the guest disables the timer interrupt > on the VGIC, which happens when turning VCPUs off using PSCI, for > example. > > The problem is that because the guest disables the vi

Re: [PATCH] VFIO: platform: AMD xgbe reset module

On Thu, Oct 15, 2015 at 01:21:55PM +0200, Arnd Bergmann wrote: > On Thursday 15 October 2015 10:08:02 Eric Auger wrote: > > Hi Arnd, > > On 10/14/2015 05:38 PM, Arnd Bergmann wrote: > > > On Wednesday 14 October 2015 15:33:12 Eric Auger wrote: > > >> ---

Re: [PATCH v3 0/4] KVM: arm/arm64: guest synchronous halt/resume

On Fri, Sep 25, 2015 at 11:41:13PM +0200, Eric Auger wrote: > This series introduces the capability to synchronously exit the guest > and prevent it from being re-entered. This modality will be used by > IRQ forwarding series when changing the state of the IRQ. > > Former pause flag used when

Re: [PATCH] VFIO: platform: AMD xgbe reset module

On Thu, Oct 15, 2015 at 04:55:13PM +0200, Arnd Bergmann wrote: > On Thursday 15 October 2015 16:46:09 Eric Auger wrote: > > > > > > This is where we'd need a little more changes for this approach. Instead > > > of unbinding the device from its driver, the idea would be that the > > > driver

Re: [PATCH] VFIO: platform: AMD xgbe reset module

On Thu, Oct 15, 2015 at 5:49 PM, Arnd Bergmann <a...@arndb.de> wrote: > On Thursday 15 October 2015 17:03:21 Christoffer Dall wrote: >> On Thu, Oct 15, 2015 at 04:55:13PM +0200, Arnd Bergmann wrote: >> > On Thursday 15 October 2015 16:46:09 Eric Auger wrote: >> >

Re: [PATCH] VFIO: platform: AMD xgbe reset module

On Thu, Oct 15, 2015 at 10:53:17AM -0600, Alex Williamson wrote: > On Thu, 2015-10-15 at 16:46 +0200, Eric Auger wrote: > > Hi Arnd, > > On 10/15/2015 03:59 PM, Arnd Bergmann wrote: > > > On Thursday 15 October 2015 14:12:28 Christoffer Dall wrote: > > >

Re: [PATCH 13/15] arm64: kvm: Rewrite fake pgd handling

On Mon, Oct 12, 2015 at 10:55:24AM +0100, Suzuki K. Poulose wrote: > On 10/10/15 15:52, Christoffer Dall wrote: > >Hi Suzuki, > > Hi Christoffer, > > Thanks for being patient enough to review the code :-) without much of > the comments. I now realise there needs much

Re: [PATCH 1/2] KVM: arm/arm64: Optimize away redundant LR tracking

On Mon, Oct 12, 2015 at 05:56:14PM +0100, Andre Przywara wrote: > Hi, > > On 02/10/15 15:44, Pavel Fedin wrote: > > Currently we use vgic_irq_lr_map in order to track which LRs hold which > > IRQs, and lr_used bitmap in order to track which LRs are used or free. > > > > vgic_irq_lr_map is

Re: [PATCH v4 3/7] KVM: arm/arm64: Fix the documentation

On Mon, Oct 12, 2015 at 10:16:13AM +0300, Pavel Fedin wrote: > Hello! > > > > > > ok, fair enough. This kind of rationale is helpful to put in the commit > > text though. > > By the way, may be apply this as a standalone patch? Should i post a > standalone version with the > updated commit

Re: [PATCH] arm/arm64: KVM : Enable vhost device selection under KVM config menu

On Fri, Oct 09, 2015 at 10:08:43AM -0500, Wei Huang wrote: > vhost drivers provide guest VMs with better I/O performance and lower > CPU utilization. This patch allows users to select vhost devices under > KVM configuration menu on ARM. This makes vhost support on arm/arm64 > on a par with other

Re: [PATCH v2] KVM: arm/arm64: BUG FIX: Do not inject spurious interrupts

On Fri, Oct 09, 2015 at 05:41:11PM +0300, Pavel Fedin wrote: > Hello! > > > I reworked the commit message and applied this patch. > > During testing i discovered a problem with this patch and vITS series by > Andre. > The problem is that compute_pending_for_cpu() does not know anything about

Re: [PATCH v3 00/16] KVM: arm64: GICv3 ITS emulation

Hi Andre, On Wed, Oct 07, 2015 at 03:55:10PM +0100, Andre Przywara wrote: > Hi, > > another respin and rebase of the ITS emulation series. > Major changes compared to v2 (beside some minor things like added > comments and function renames) are the rebasing and adaption to 4.3-rc > and

Re: [PATCH 13/15] arm64: kvm: Rewrite fake pgd handling

Hi Suzuki, On Tue, Sep 15, 2015 at 04:41:22PM +0100, Suzuki K. Poulose wrote: > From: "Suzuki K. Poulose" > > The existing fake pgd handling code assumes that the stage-2 entry > level can only be one level down that of the host, which may not be > true always(e.g, with

Re: [PATCH 11/15] arm64: Cleanup VTCR_EL2 computation

are controlled by the page size. > > Cc: Christoffer Dall <christoffer.d...@linaro.org> > Cc: Marc Zyngier <marc.zyng...@arm.com> > Cc: kvm...@lists.cs.columbia.edu > Signed-off-by: Suzuki K. Poulose <suzuki.poul...@arm.com> > --- > arch/arm64/include/as

Re: [PATCH 12/15] arm: kvm: Move fake PGD handling to arch specific files

_PGD; i++) { > > + if (KVM_PREALLOC_LEVEL == 1) > > + pgd_populate(NULL, pgd + i, > > +(pud_t *)hwpgd + i * PTRS_PER_PUD); > > + else if (KVM_PREALLOC_LEVEL == 2) > > + pud_po

Re: [PATCH 09/15] arm64: Add page size to the kernel image header

IZE ((PAGE_SHIFT - 10) / 2) > + > +#define __HEAD_FLAGS (__HEAD_FLAG_BE << 0) | \ > + (__HEAD_FLAG_PAGE_SIZE << 1) > > /* > * These will output as part of the Image header, which should be > little-endian > -- > 1.7.9.5 > Reviewed-by

Re: [PATCH] KVM: arm/arm64: Add VGICv3 save/restore API documentation

On Thu, Oct 08, 2015 at 12:10:35PM +0300, Pavel Fedin wrote: > Hello! > [...] > > > The architecture defines how to address a specific CPU, and that's using > > the MPIDR, not inventing our own scheme, so that's what we should do. > > But doesn't the same apply to GICv2 then? It just happened

Re: [PATCH] KVM: arm/arm64: Fix memory leak if timer initialization fails

On Tue, Oct 06, 2015 at 11:14:35AM +0300, Pavel Fedin wrote: > Jump to correct label and free kvm_host_cpu_state > > Signed-off-by: Pavel Fedin > --- > arch/arm/kvm/arm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/kvm/arm.c

Re: [PATCH] KVM: arm/arm64: Add VGICv3 save/restore API documentation

On Thu, Oct 08, 2015 at 10:17:09AM +0300, Pavel Fedin wrote: > Hello! > > > +The mpidr encoding is based on the affinity information in the > > +architecture defined MPIDR, and the field is encoded as follows: > > + | 63 56 | 55 48 | 47 40 | 39 32 | > > + |

Re: [PATCH v4 3/7] KVM: arm/arm64: Fix the documentation

On Thu, Oct 08, 2015 at 09:52:02AM +0300, Pavel Fedin wrote: > Hello! > > > > --- a/Documentation/virtual/kvm/devices/arm-vgic.txt > > > +++ b/Documentation/virtual/kvm/devices/arm-vgic.txt > > > @@ -44,28 +44,29 @@ Groups: > > >Attributes: > > > The attr field of kvm_device_attr

Re: [PATCH 0/2] KVM: arm/arm64: Clean up some obsolete code

On Thu, Oct 08, 2015 at 12:15:06PM +0100, Andre Przywara wrote: > Hi, > > On 08/10/15 11:56, Marc Zyngier wrote: > > On 08/10/15 11:14, Christoffer Dall wrote: > >> Hi Pavel, > >> > >> On Fri, Oct 02, 2015 at 05:44:27PM +0300, Pavel Fedin wrote: > >

Re: [PATCH 0/2] KVM: arm/arm64: Clean up some obsolete code

Hi Pavel, On Fri, Oct 02, 2015 at 05:44:27PM +0300, Pavel Fedin wrote: > Current KVM code has lots of old redundancies, which can be cleaned up. > This patchset is actually a better alternative to > http://www.spinics.net/lists/arm-kernel/msg430726.html, which allows to > keep piggy-backed LRs.

Re: [PATCH] KVM: arm/arm64: Add VGICv3 save/restore API documentation

On Thu, Oct 08, 2015 at 03:28:40PM +0300, Pavel Fedin wrote: > Hello! > > > Well, compatibility with GICv2 is the biggest mistake we made when > > designing the GICv3 architecture. And that's why our emulation doesn't > > give a damn about v2 compatibility. > > Ok, i see your arguments, and

Re: [PATCH 10/15] arm64: kvm: Fix {V}TCR_EL2_TG0 mask

ell so far since > we never cared about 16K. Fix it for 16K support. > > Cc: Catalin Marinas <catalin.mari...@arm.com> > Cc: Will Deacon <will.dea...@arm.com> > Cc: Marc Zyngier <marc.zyng...@arm.com> > Cc: Christoffer Dall <christoffer.d...@linaro.org&

Re: [PATCH 03/15] arm64: Introduce helpers for page table levels

On Wed, Oct 07, 2015 at 10:26:14AM +0100, Marc Zyngier wrote: > On 07/10/15 09:26, Christoffer Dall wrote: > > Hi Suzuki, > > > > On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: > >> From: "Suzuki K. Poulose" <suzuki.poul...@arm.c

Re: [PATCH v4 3/7] KVM: arm/arm64: Fix the documentation

On Mon, Sep 28, 2015 at 06:27:30PM +0300, Pavel Fedin wrote: > During refactoring we noticed some mistakes in the documentation. > Correct them. > > Signed-off-by: Pavel Fedin > --- > Documentation/virtual/kvm/devices/arm-vgic.txt | 18 ++ > 1 file changed,

Re: [PATCH v4 4/7] KVM: arm64: Implement vGICv3 distributor and redistributor access from userspace

Hi Pavel, On Mon, Sep 28, 2015 at 06:27:31PM +0300, Pavel Fedin wrote: > The access is done similar to vGICv2, using KVM_DEV_ARM_VGIC_GRP_DIST_REGS > and KVM_DEV_ARM_VGIC_GRP_REDIST_REGS with KVM_SET_DEVICE_ATTR and > KVM_GET_DEVICE_ATTR ioctls. Since GICv3 can handle large number of CPUs, >

Re: [PATCH 03/15] arm64: Introduce helpers for page table levels

Hi Suzuki, On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: > From: "Suzuki K. Poulose" > > Introduce helpers for finding the number of page table > levels required for a given VA width, shift for a particular > page table level. > > Convert the

[PATCH] KVM: arm/arm64: Add VGICv3 save/restore API documentation

.@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- Documentation/virtual/kvm/devices/arm-vgic-v3.txt | 114 ++ Documentation/virtual/kvm/devices/arm-vgic.txt| 20 +--- 2 files changed, 118 insertions(+), 16 deletions(-) create mode 10

Re: [PATCH v2 11/15] KVM: arm64: handle pending bit for LPIs in ITS emulation

On Wed, Oct 07, 2015 at 11:39:30AM +0300, Pavel Fedin wrote: > Hello! > > > +/* Called with the distributor lock held by the caller. */ > > +void vits_unqueue_lpi(struct kvm_vcpu *vcpu, int lpi) > > +{ > > + struct vgic_its *its = >kvm->arch.vgic.its; > > + struct its_itte *itte; > > + > > +

Re: [RFT - PATCH v2 0/2] KVM/arm64: add fp/simd lazy switch support

On Mon, Oct 05, 2015 at 09:14:57AM -0700, Mario Smarduch wrote: > Hi Christoffer, >I just managed to boot qemu arm32 up on arm64 (last Fri - thanks for the > tip > - there were few other issue to clean up), so let me retest it again. Also I > noticed some refactoring would help both 32 and 64

Re: [RFT - PATCH v2 0/2] KVM/arm64: add fp/simd lazy switch support

On Tue, Sep 22, 2015 at 04:34:01PM -0700, Mario Smarduch wrote: > This is a 2nd itteration for arm64, v1 patches were posted by mistake from an > older branch which included several bugs. Hopefully didn't waste too much of > anyones time. > > This patch series is a followup to the armv7 fp/simd

Re: [PATCH 09/15] arm64: Add page size to the kernel image header

On Fri, Oct 02, 2015 at 05:50:38PM +0100, Marc Zyngier wrote: > On 02/10/15 17:31, Catalin Marinas wrote: > > On Fri, Oct 02, 2015 at 04:49:01PM +0100, Catalin Marinas wrote: > >> On Tue, Sep 15, 2015 at 04:41:18PM +0100, Suzuki K. Poulose wrote: > >>> From: Ard Biesheuvel

Re: [RFC] Handling CP15 timer without in-kernel irqchip

On Fri, Oct 02, 2015 at 05:54:53PM +0300, Pavel Fedin wrote: > Hello! > > > So let me put it another way. The only way I look into this is when we > > have this particular platform fully supported in mainline. > > I am sorry for possible misunderstanding. Please give me one more minute to >

Re: [PATCH v3 3/8] arm/arm64: KVM: vgic: Factor out level irq processing on guest exit

On Fri, Oct 02, 2015 at 03:52:42PM +0100, Andre Przywara wrote: > Hi Christoffer, > > On 29/09/15 15:49, Christoffer Dall wrote: > > Currently vgic_process_maintenance() processes dealing with a completed > > level-triggered interrupt directly, but we are soon going to

Re: [PATCH v3 8/8] arm/arm64: KVM: Support edge-triggered forwarded interrupts

On Fri, Oct 02, 2015 at 06:18:03PM +0100, Andre Przywara wrote: > On 29/09/15 15:49, Christoffer Dall wrote: > > We mark edge-triggered interrupts with the HW bit set as queued to > > prevent the VGIC code from injecting LRs with both the Active and > > Pending bits set at the

Re: [PATCH v3 4/8] arm/arm64: KVM: Implement GICD_ICFGR as RO for PPIs

On Fri, Oct 02, 2015 at 03:51:50PM +0100, Andre Przywara wrote: > Hi Christoffer, > > On 29/09/15 15:49, Christoffer Dall wrote: > > The GICD_ICFGR allows the bits for the SGIs and PPIs to be read only. > > We currently simulate this behavior by writing a hardcoded valu

Re: [PATCH v4 07/11] KVM: arm/arm64: vgic: Allow HW interrupts to be queued to a guest

On Wed, Sep 30, 2015 at 03:06:32PM +0100, Andre Przywara wrote: > Hi Christoffer, > > On 29/09/15 14:44, Christoffer Dall wrote: > > On Wed, Sep 23, 2015 at 06:55:04PM +0100, Andre Przywara wrote: > >> Salut Marc, > >> > >> I know that this patch is alre

Re: [PATCH v2] KVM: arm/arm64: BUG FIX: Do not inject spurious interrupts

On Fri, Sep 25, 2015 at 05:00:29PM +0300, Pavel Fedin wrote: > Commit 71760950bf3dc796e5e53ea3300dec724a09f593 > ("arm/arm64: KVM: add a common vgic_queue_irq_to_lr fn") introduced > vgic_queue_irq_to_lr() function with additional vgic_dist_irq_is_pending() > check before setting LR_STATE_PENDING

Re: [PATCH v4 10/15] KVM: arm: implement world switch for debug registers

On Tue, Sep 29, 2015 at 01:32:35PM +0800, Zhichao Huang wrote: > > > On 2015/9/2 22:53, Christoffer Dall wrote: > >> +/* Reads cp14 registers from hardware. > >> + * Writes cp14 registers in-order to the CP14 struct pointed to by r10 > >> + * >

Re: [PATCH v4 15/15] KVM: arm: enable trapping of all debug registers

On Tue, Sep 29, 2015 at 01:41:45PM +0800, Zhichao Huang wrote: > > > On 2015/9/3 0:08, Christoffer Dall wrote: > > On Mon, Aug 10, 2015 at 09:26:07PM +0800, Zhichao Huang wrote: > >> Enable trapping of the debug registers unconditionally, allowing guests to > >

Re: [PATCH v4 07/11] KVM: arm/arm64: vgic: Allow HW interrupts to be queued to a guest

On Wed, Sep 23, 2015 at 06:55:04PM +0100, Andre Przywara wrote: > Salut Marc, > > I know that this patch is already merged, but > > On 07/08/15 16:45, Marc Zyngier wrote: > > diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c > > index 51c9900..9d009d2 100644 > ... > > @@ -1364,6

Re: [PATCH v2 7/8] arm/arm64: KVM: Rework the arch timer to use level-triggered semantics

On Wed, Sep 23, 2015 at 06:44:21PM +0100, Andre Przywara wrote: > Hi Christoffer, > > > diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c > > index 9ed8d53..f4ea950 100644 > > --- a/virt/kvm/arm/vgic.c > > +++ b/virt/kvm/arm/vgic.c > > @@ -1422,34 +1422,43 @@ static bool

[PATCH v3 0/8] Rework architected timer and forwarded IRQs handling

. Christoffer Dall (8): KVM: Add kvm_arch_vcpu_{un}blocking callbacks arm/arm64: KVM: arch_timer: Only schedule soft timer on vcpu_block arm/arm64: KVM: vgic: Factor out level irq processing on guest exit arm/arm64: KVM: Implement GICD_ICFGR as RO for PPIs arm/arm64: KVM: Use appropriate

[PATCH v3 7/8] arm/arm64: KVM: Rework the arch timer to use level-triggered semantics

ync and re-inject a new interrupt if it is still pending at that time. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/arm.c | 11 +-- include/kvm/arm_arch_timer.h | 2 +- include/kvm/arm_vgic.h | 3 -- virt/kvm/arm/arch_timer.

[PATCH v3 2/8] arm/arm64: KVM: arch_timer: Only schedule soft timer on vcpu_block

, but this case was not supported before this patch and we leave it for future work for now. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/include/asm/kvm_host.h | 3 -- arch/arm/kvm/arm.c| 10 + arch/arm64/include/asm/kvm_host.h | 3 -- inclu

[PATCH v3 5/8] arm/arm64: KVM: Use appropriate define in VGIC reset code

to the number 16. Acked-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index e606f78..9ed8d53 100644 --- a/

[PATCH v3 6/8] arm/arm64: KVM: Add forwarded physical interrupts documentation

by Marc Zyngier and edited by me. Omissions and errors are all mine. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- Documentation/virtual/kvm/arm/vgic-mapped-irqs.txt | 186 + 1 file changed, 186 insertions(+) create mode 100644 Documentation/virtual/k

[PATCH v3 8/8] arm/arm64: KVM: Support edge-triggered forwarded interrupts

on the sync path are extremely close to those for level-triggered interrupts, rename process_level_irq to process_queued_irq, allowing it to cater for both cases. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic.c | 40 ++--

[PATCH v3 3/8] arm/arm64: KVM: vgic: Factor out level irq processing on guest exit

: Also harmless because it's just a bit which is cleared and altering the line state does not affect this bit. Reviewed-by: Eric Auger <eric.au...@linaro.org> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/k

[PATCH v3 1/8] KVM: Add kvm_arch_vcpu_{un}blocking callbacks

we do elsewhere for KVM generic-arch interactions. Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/include/asm/kvm_host.h | 3 +++ arch/arm64/include/asm/kvm_host.h | 3 +++ arch/mips/include/asm/kvm_h

[PATCH v3 4/8] arm/arm64: KVM: Implement GICD_ICFGR as RO for PPIs

as the reset value to the register. This is a bit counter-intuitive, as the register is RO for these bits, and we can just implement it that way, allowing us to control the value of the bits purely in the reset code. Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffe

Re: [RFC 0/2] VFIO: Add virtual MSI doorbell support.

On Tue, Sep 22, 2015 at 11:09:14PM +0100, Marc Zyngier wrote: > On Tue, 4 Aug 2015 06:52:01 +0100 > Bhushan Bharat wrote: > > > > > > > > -Original Message- > > > From: Pranavkumar Sawargaonkar [mailto:pranavku...@linaro.org] > > > Sent: Tuesday, August

Re: [PATCH 2/3] arm64: KVM: Disable virtual timer even if the guest is not using it

dif > str x3, [x0, #VCPU_TIMER_CNTV_CVAL] > > 1: > + msr cntv_ctl_el0, xzr > + We could have a comment here, but ok. > // Allow physical timer/counter access for the host > mrs x2, cnthctl_el2 > orr x2, x2, #3 > -- >

Re: [PATCH] arm64: KVM: Fix user access for debug registers

mayd...@linaro.org> > Cc: Alex Bennée <alex.ben...@linaro.org> > Fixes: 84e690bfbed1 ("KVM: arm64: introduce vcpu->arch.debug_ptr") > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> yikes! Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> --

Re: [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

On Mon, Sep 14, 2015 at 04:46:28PM +0100, Marc Zyngier wrote: > On 14/09/15 16:06, Will Deacon wrote: > > When restoring the system register state for an AArch32 guest at EL2, > > writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57, > > which can lead to the guest effectively

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