marm/next of 23.10.2015.
- Do not use vgic_retire_lr() for initializing ELRSR bitmask, because now
it also handles pushback of PENDING state, use direct initialization
instead (copied from Andre's patchset).
- Took more care about vgic_retire_lr(), which has deserved own patch.
Pavel Fedin (3):
family) with stock device trees (using MCT) and CONFIG_KVM enabled.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
arch/arm/kvm/mmu.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 7b42012..839dd970 100644
--- a/ar
zation
instead (copied from Andre's patchset).
- Took more care about vgic_retire_lr(), which has deserved own patch.
Pavel Fedin (3):
KVM: arm/arm64: Optimize away redundant LR tracking
KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()
KVM: arm/arm64: Refactor vgic_ret
done by the
following vgic_retire_lr().
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
include/kvm/arm_vgic.h | 1 -
virt/kvm/arm/vgic-v2.c | 5 -
virt/kvm/arm/vgic-v3.c | 5 -
virt/kvm/arm/vgic.c| 33 -
4 files changed, 4 insertions(
elrsr/aisr
in sync with software model"), because together with lr_used we also update
elrsr. This allows to easily replace lr_used with elrsr, inverting all
conditions (because in elrsr '1' means 'free').
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
include/kvm/arm_vgic.h | 6
1. Remove unnecessary 'irq' argument, because irq number can be retrieved
from the LR.
2. vgic_retire_lr() is always accompanied by vgic_irq_clear_queued(). Since
it already does more than just clearing the LR, move
vgic_irq_clear_queued() inside of it.
Signed-off-by: Pavel Fedin <p
vgic_irq_clear_queued(). LR_STATE_PENDING check was
included in vgic_retire_lr() by
cff9211eb1a1f58ce7f5a2d596b617928fd4be0e ("arm/arm64: KVM: Fix arch timer
behavior for disabled interrupts "), so i simply removed
duplicated code.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics R
ved own patch.
Pavel Fedin (3):
KVM: arm/arm64: Optimize away redundant LR tracking
KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()
KVM: arm/arm64: Refactor vgic_retire_lr()
include/kvm/arm_vgic.h | 7
virt/kvm/arm/vgic-v2.c | 6 +--
virt/kvm/arm/vgic-v3.c | 6 +--
v
elrsr/aisr
in sync with software model"), because together with lr_used we also update
elrsr. This allows to easily replace lr_used with elrsr, inverting all
conditions (because in elrsr '1' means 'free').
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
include/kvm/arm_vgic.h | 6
1. Remove unnecessary 'irq' argument, because irq number can be retrieved
from the LR.
2. vgic_retire_lr() is always accompanied by vgic_irq_clear_queued(). Since
it already does more than just clearing the LR, move
vgic_irq_clear_queued() inside of it.
Signed-off-by: Pavel Fedin <p
done by the
following vgic_retire_lr().
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
include/kvm/arm_vgic.h | 1 -
virt/kvm/arm/vgic-v2.c | 5 -
virt/kvm/arm/vgic-v3.c | 5 -
virt/kvm/arm/vgic.c| 33 -
4 files changed, 4 insertions(
Hello!
> -Original Message-
> From: Christoffer Dall [mailto:christoffer.d...@linaro.org]
> Sent: Friday, October 23, 2015 12:43 AM
> To: Pavel Fedin
> Cc: kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org; Marc Zyngier; Andre
> Przywara
> Subject: Re: [PATC
/kvm/arm/vgic.h
> @@ -71,6 +71,8 @@ void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
>phys_addr_t offset, int mode);
> bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
> phys_addr_t offset);
> +void vgic_re
Hello!
One more idea...
> Here you store lpis_enabled globally, and this is plain wrong.
By the way, may be we should move this flag, together with pendbaser array,
into struct vgic_cpu? Then we would not have to
allocate them manually.
Kind regards,
Pavel Fedin
Expert Engineer
Sams
er access, but a small KVM API extension is needed for this.
Currently it is possible to run qemu vexpress model in this mode, because it
has another, memory-mapped timer. It is only necessary
to either remove CP15 timer from guest device tree, or disable support in guest
.config.
Kind regards,
Pavel Fed
@@ int vits_init(struct kvm *kvm)
> if (!dist->pendbaser)
> return -ENOMEM;
>
> + its->buffer_page = kmalloc(CHUNK_SIZE, GFP_KERNEL);
> + if (!its->buffer_page)
> + return -ENOMEM;
> +
> spin_lock_init(>lock);
>
> INI
Hello! How are things going? There was lots of activity, discussions, and then
- silence...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Hello!
> We'll get to your patches when we get to them, but seriously, you have
> to curb your eagerness a bit.
Ok, sorry for this disturbance then. It is enough for me to know it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Hello!
> Currently the gsi routing applies on top of ITS emulation series. I am
> going to rebase it soon. It can go in 4.5 with ITS emulation series.
Ah, yes, of course, because it reuses API definitions. I forgot this.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Re
ret = vits_cmd_handle_movi(vcpu->kvm, its_cmd);
> + break;
> + case GITS_CMD_DISCARD:
> + ret = vits_cmd_handle_discard(vcpu->kvm, its_cmd);
> + break;
> + case GITS_CMD_CLEAR:
> + ret = vits_cmd_handle_clear(vcpu->kvm, its
Correct some old mistakes in the API documentation:
1. VCPU is identified by index (using kvm_get_vcpu() function), but
"cpu id" can be mistaken for affinity ID.
2. Some error codes are wrong.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
This is a small extraction fro
Mon Sep 17 00:00:00 2001
From: Pavel Fedin <p.fe...@samsung.com>
Date: Tue, 13 Oct 2015 15:24:19 +0300
Subject: [PATCH] KVM: arm/arm64: Fix LPI loss
compute_pending_for_cpu() should return true if there's something pending
on the given vCPU. This is used in order to correctly set
dist->irq_pe
to take care about still pending LPIs */
> + if (!(vlr.state & LR_STATE_PENDING))
> continue;
> + vgic_unqueue_lpi(vcpu, vlr.irq);
> + } else {
> + BUG_ON(!(vlr.state & LR_STATE_MA
is to introduce a function which would check for any
pending LPIs. I will
suggest a fix on top of the current series after some time.
I'm cc'ing this whole discussion to Andre.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Hello!
> >
> ok, fair enough. This kind of rationale is helpful to put in the commit
> text though.
By the way, may be apply this as a standalone patch? Should i post a
standalone version with the
updated commit message then?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung
ould cause rollover. For write operations
this would overwrite lower word with the upper one (which would normally
be 0), for read operations this would cause duplication of the same word
in both halves.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
arch/arm64/include/uapi/asm/kv
Replace Rt with data pointer in struct sys_reg_params. This will allow to
reuse system register handling code in implementation of vGICv3 CPU
interface access API. Additionally, got rid of "massive hack"
in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Access size is always 64 bits. Since CPU interface state actually affects
only a single vCPU, no vGIC locking is done in order to avoid code
duplication. Just made sure that the vCPU is not running.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
arch/arm64/include/uapi/asm/kvm.h
differently.
Also, vcpu pointer has backpointer to kvm, so 'dev' was replaced with 'vcpu'.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
virt/kvm/arm/vgic-v2-emul.c | 120 +++-
virt/kvm/arm/vgic.c | 57 +
virt/kvm/arm/
of endianess conversion and masking.
Masking is not used here (the mask is set to ~0), so we just move out the
remaining endianess conversion.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
virt/kvm/arm/vgic-v2-emul.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
In order to implement vGICv3 CPU interface access, we will need to perform
table lookup of system registers. We would need both index_to_params() and
find_reg() exported for that purpose, but instead we export a single
function which combines them both.
Signed-off-by: Pavel Fedin <p
size specifier for distributor and redistributor register
accesses, do not assume size any more.
- Lots of refactor and reusable code extraction.
- Added forgotten documentation
Christoffer Dall (1):
KVM: arm/arm64: Update API documentation
Pavel Fedin (6):
KVM: arm/arm64: Move endianess
GICv2 documentation, noticed during
refactoring:
1. GICv2 always identified vCPU by index (using kvm_get_vcpu() function),
but "cpu id" can be mistaken for affinity ID.
2. Some error codes were wrong.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off
P.S. I still sometimes lose LPIs, and this is not related to spurious
injection fix, because i
tried to omit resetting irq_pending_on_cpu bit, and still lost some LPIs. Will
try to compare with
v2, because with v2 i don't remember this problem.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electron
GICv2m it
should use hardcoded linear MSI->SPI mapping.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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ication: do you really want it to be different from
KVM_DEV_ARM_VGIC_GRP_CPU_REGS?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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s just a
clarification. Ok, this is
not a problem. By the way, i've just finished v5 patchset, now need to rewrite
qemu and test before
posting it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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needed.
--- cut ---
Would you be happy with this? An alternative would be to add a check for
pending LPIs, but wouldn't
it just be too complex for a simple problem?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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rons.com/source/include/linux/kvm_host.h#L427
I decided to change this after
http://www.spinics.net/lists/kvm-arm/msg16359.html, Andre clearly
mistook this ID for being affinity value.
Before GICv3 nobody saw the difference because we had only up to 16 CPUs, with
IDs from 0 to 15, i.
e.
hich it uses for GICv2 accesses.
Keeping index allows to reuse more code, and provides better backwards
compatibility. So could we
do this?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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ave an active state, and transition to the inactive state on being
acknowledged by a PE
--- cut ---
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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patible with GICv2", i'll accept this and proceed
with the rewrite.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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me pieces
are missing, considering my live migration W.I.P (see patch below). Together
with this, vITS v3
backported to v4.2.2 and...
Tested-by: Pavel Fedin <p.fe...@samsung.com>
---
>From b08e9ba1da69f9cf5731c89a4ff39561cd16e6ea Mon Sep 17 00:00:00 2001
From: Pavel Fedin <p.fe...@sams
i
go your way. :) Don't know if i'll be able to roll out v5 tomorrow, but i think
on monday i'll
definitely do.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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;-)
It a little bit clashes, patch No 0012 needs small modifications, but i'd say
they are trivial. If
you want, i could rebase the whole thing on top of current kvmarm.git by myself.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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should also work fine
with v3, replacing
patches 0001 and 0002. Merging this at the moment.
Yes, vgic_unqueue_lpi() falls out of use, but this is temporary, because it
will be very useful for
live migration.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center
?
I rolled it out a week ago:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg325331.html. I
tried to get reviewed/accepted/whatever at least data structure part, but Peter
replied that he
isn't interested before we have the kernel.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung
.
The question is - how can we handle it? Should we have one more bitwise table
for active LPIs, or
is it enough to remember only a single, currently active LPI? Can LPIs be
preempted on a real
hardware, or not?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ter directly into guest's memory (which it writes
to
PROPBASER/PENDBASER), and just keep it? There will be no issues with caching
and synchronization at
all.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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active state there, just for migration. Would this be a big violation of
specification? It says
nothing about these bits at all.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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a bit better, in case of pending bit modification, the
operations on both
guest and host side have to be atomic, otherwise we can clobber our table if,
for example, both host
and guest modify adjacent bits. And there's no way to interlock with the guest.
So, OK, i accept
your point.
Kind regards,
;Properties of LPI".
And another thread,
http://lists.xen.org/archives/html/xen-devel/2014-09/msg01141.html, says that
virtual LPIs actually do have active state in LR.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Jump to correct label and free kvm_host_cpu_state
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
arch/arm/kvm/arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index dc017ad..78b2869 100644
--- a/arch/arm/kvm/arm.c
+++
Hello! Sorry if you're terribly busy, but... small gentle PING...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvmarm-boun...@lists.cs.columbia.edu
> [mailto:kvmarm-boun...@lists.cs.columbia.edu] On
> Beh
ic->nr_lr)
iteration instead. The rest
of mechanism will work as it is, there's no need to remove the state tracking
bitmap and
optimization itself.
I am currently testing this approach and preparing my alternative patch for
upstreaming.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Ele
e physical timer in QEMU.
Of course it is, and with TCG it works. But we currently cannot use it with
KVM because KVM assumes that it emulates all CP15 (or system) registers by
itself, and never hands any of them outside.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Resear
timization to me.
I'll take a look. You seem to be right, lr_used became a direct (well,
inverted) copy of elrsr
after full elrsr synchronization was introduced long time ago. It's just
current code relying on
lr_used everywhere.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics
sr_ptr will diverge
at this point, and this function actually brings them into sync. And it relies
on lr_used for the
loop to operate correctly (no idea why we use "for" loop here with extra check
instead of
"for_each_set_bit(lr, vgic_cpu->lr_used, vgic->nr_lr)", looks stu
- What is wrong with exposing another, memory mapped timer and remove
> the architected timer entirely?
Well... qemu guys don't want to remove CP15, i already proposed it, and it was
very simple thing to
do. :) But, again, this is also device-tree-based, the same concern applies as
to (*).
K
works everywhere.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Hello!
> I like the latter. But I guess one could even do both?
You know, you are right, they absolutely do not contradict each other.
Patch set for #1 is quite not big, if you are interested, and nobody votes
strongly against, i can
rebase it to 4.3 and post.
Kind regards,
Pavel Fe
, and this information is enough to track LR
usage.
This patchset is made against linux-next of 02.10.2015. Thanks to Andre
for pointing out some 4.3 specifics.
Pavel Fedin (2):
Optimize away redundant LR tracking
Merge vgic_set_lr() and vgic_sync_lr_elrsr()
include/kvm/arm_vgic.h | 7
elrsr/aisr
in sync with software model"), because together with lr_used we also update
elrsr. This allows to easily replace lr_used with elrsr, inverting all
conditions (because in elrsr '1' means 'free').
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
include/kvm/arm_vgic.h |
to zero
anyway.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
include/kvm/arm_vgic.h | 1 -
virt/kvm/arm/vgic-v2.c | 5 -
virt/kvm/arm/vgic-v3.c | 5 -
virt/kvm/arm/vgic.c| 30 --
4 files changed, 4 insertions(+), 37 deletions(-)
diff
pect both timers (are there any? RTOS?)
So, what is your final word? Would you consider this improvement?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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ests which
just expect physical
timer to be there.
Both approaches have their own limitations, but anyway this is much better
than nothing. What do
you think, and which approach do you like more?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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eentrant by checking for dist->pendbaser != NULL)
is now called from
within two places:
a) vits_map_resources()
b) handle_mmio_pendbaser_redist()
Therefore, all allocations happen either on first vCPU run, or on first
PENDBASER access, whatever
comes first. An alternative is to do allocatio
Hello!
> I reworked the commit message and applied this patch.
Thank you very much.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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s move on. :)
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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and reusable code extraction.
- Added forgotten documentation
Pavel Fedin (7):
KVM: arm/arm64: Move endianness conversion out of
vgic_attr_regs_access()
KVM: arm/arm64: Refactor vGIC attributes handling code
KVM: arm/arm64: Fix the documentation
KVM: arm64: Implement vGICv3
of endianness conversion and
masking. Masking is not used here (the mask is set to ~0), so we just move
out the remaining endianness conversion.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
virt/kvm/arm/vgic-v2-emul.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
is not running.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 38 +++-
arch/arm64/include/uapi/asm/kvm.h | 7 +
include/linux/irqchip/arm-gic-v3.h | 18 +-
virt/kvm/arm/vgic-v3-emul.c
Separate all implementation-independent code in vgic_attr_regs_access()
and move it to vgic.c. This will allow to reuse this code for vGICv3
implementation.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
virt/kvm/arm/vgic-v2-emul.c | 118 +---
Replace Rt with data pointer in struct sys_reg_params. This will allow to
reuse system register handling code in implementation of vGICv3 CPU
interface access API. Additionally, got rid of "massive hack"
in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
In order to implement vGICv3 CPU interface access, we will need to perform
table lookup of system registers. We would need both index_to_params() and
find_reg() exported for that purpose, but instead we export a single
function which combines them both.
Signed-off-by: Pavel Fedin <p
CPUs.
Some registers are 64-bit wide according to the specification.
KVM_DEV_ARM_VGIC_64BIT flag is introduced, allowing to perform full 64-bit
accesses. vgic_attr_regs_access() has also been fixed up in order to be
able to perform 64-bit accesses correctly.
Signed-off-by: Pavel Fedin <p
During refactoring we noticed some mistakes in the documentation.
Correct them.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/Documentation/virtu
will also be reset if this was the only pending
interrupt, saving us from unnecessary wakeups.
The bug was caught on ARM64 kernel v4.1.6, running qemu "virt" guest,
where it was caused by emulated pl011.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
v1 =>
nding_on_cpu saves from
unnecessary wakeups IIRC.
Posting v2...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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More m
Hello Andre and others!
How are things going? I see the last message in thread something like 1 month
old, then silence...
Our project relies on this feature, any assistance needed?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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rest of that patch set? Does it need rebase or what ?
By the way, after this is applied, we can drop useless check inside
vgic_v2_map_resources().
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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l be missing 'arch' and 'size' field, and instead i will
use
KVM_DEV_ARM_VGIC_64BIT flag for length specification, the same as for
redistributor.
Will this be OK ?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Hello Andre! I haven't heard from you on any of my questions. But,
nevertheless, i would like to
inform you (and other interested people) that i'm leaving on vacation, and will
be back 2 weeks
later. Just in case if someone writes me something and i don't reply.
Kind regards,
Pavel Fedin
;
else
*((__le32 *)) = cpu_to_le32(*((__le32 *));
isn't this even more ugly? Regardless of where it is placed.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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, under
dev->kvm->lock mutex, out of 'cpuid' index.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Replace Rt with data pointer in struct sys_reg_params. This will allow to
reuse system register handling code in implementation of vGICv3 CPU
interface access API. Additionally, got rid of "massive hack"
in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
is not running.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 38 +++-
arch/arm64/include/uapi/asm/kvm.h | 7 +
include/linux/irqchip/arm-gic-v3.h | 18 +-
virt/kvm/arm/vgic-v3-emul.c
In order to implement vGICv3 CPU interface access, we will need to perform
table lookup of system registers. We would need both index_to_params() and
find_reg() exported for that purpose, but instead we export a single
function which combines them both.
Signed-off-by: Pavel Fedin <p
Separate all implementation-independent code in vgic_attr_regs_access()
and move it to vgic.c. This will allow to reuse this code for vGICv3
implementation.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
virt/kvm/arm/vgic-v2-emul.c | 126 +---
accesses, do not assume size any more.
- Lots of refactor and reusable code extraction.
- Added forgotten documentation
Pavel Fedin (5):
KVM: arm/arm64: Refactor vGIC attributes handling code
KVM: arm64: Implement vGICv3 distributor and redistributor access from
userspace
KVM: arm64:
CPUs.
Some registers are 64-bit wide according to the specification.
KVM_DEV_ARM_VGIC_64BIT flag is introduced, allowing to perform full 64-bit
accesses.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 35 --
arch/arm64/includ
next respin
i'd better add this explanation to commit message. Would it be OK?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Mor
GRP_CPU_REGS:
--- cut ---
bits: | 63 .. 56 | 55 .. 48 | 47 ... 40 | 39 .. 32 | 31 .. 0 |
values: | arch | size | reserved | cpu id | reg id |
--- cut ---
arch = KVM_REG_ARM64 and size = KVM_REG_SIZE_U64. I decided not to invent own
macro.
Kind regards,
Pavel
, Rt)'. So
i decided to change it to u_long * instead of having casts here and there. Do
you like casts?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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the body of a message to maj
d "cpu id" (actually CPU index) field to 31 bit. :)
It's friday evening here, work week is almost over, i'll read your replies 2
days later on monday.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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nce id is actually an index, may be we should fix up docs?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
In order to implement vGICv3 CPU interface access, we will need to perform
table lookup of system registers. We would need both index_to_params() and
find_reg() exported for that purpose, but instead we export a single function
which combines them both.
Signed-off-by: Pavel Fedin <p
Replace Rt with data pointer in struct sys_reg_params. This will allow to
reuse system register handling code in implementation of vGICv3 CPU
interface access API. Additionally, got rid of "massive hack"
in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Separate all implementation-independent code in vgic_attr_regs_access()
and move it to vgic.c. This will allow to reuse this code for vGICv3
implementation.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
virt/kvm/arm/vgic-v2-emul.c | 126 +---
is not running.
Signed-off-by: Pavel Fedin <p.fe...@samsung.com>
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 38 +++-
arch/arm64/include/uapi/asm/kvm.h | 7 +
include/linux/irqchip/arm-gic-v3.h | 18 +-
virt/kvm/arm/vgic-v3-emul.c
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