From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We want to use CMA for allocating hash page table and real mode area for
PPC64. Hence move DMA contiguous related changes into a seperate config
so that ppc64 can enable CMA without requiring DMA contiguous.
Acked-by: Michal Nazarewicz min
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Powerpc architecture uses a hash based page table mechanism for mapping virtual
addresses to physical address. The architecture require this hash page table to
be physically contiguous. With KVM on Powerpc currently we use early reservation
Alexander Graf ag...@suse.de writes:
On 07/02/2013 07:45 AM, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.Vaneesh.ku...@linux.vnet.ibm.com
Older version of power architecture use Real Mode Offset register and Real
Mode Limit
Selector for mapping guest Real Mode Area. The guest RMA should
Alexander Graf ag...@suse.de writes:
On 07/02/2013 07:45 AM, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.Vaneesh.ku...@linux.vnet.ibm.com
Powerpc architecture uses a hash based page table mechanism for mapping
virtual
addresses to physical address. The architecture require this hash page
Marek Szyprowski m.szyprow...@samsung.com writes:
Hello,
On 7/2/2013 7:45 AM, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We want to use CMA for allocating hash page table and real mode area for
PPC64. Hence move DMA contiguous related changes
Alexander Graf ag...@suse.de writes:
On 07/02/2013 05:29 PM, Aneesh Kumar K.V wrote:
Alexander Grafag...@suse.de writes:
On 07/02/2013 07:45 AM, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.Vaneesh.ku...@linux.vnet.ibm.com
Older version of power architecture use Real Mode Offset register
Paul Mackerras pau...@samba.org writes:
This corrects the usage of the tlbie (TLB invalidate entry) instruction
in HV KVM. The tlbie instruction changed between PPC970 and POWER7.
On the PPC970, the bit to select large vs. small page is in the instruction,
not in the RB register value. This
Paul Mackerras pau...@samba.org writes:
@@ -575,8 +577,6 @@ static int kvmppc_handle_ext(struct kvm_vcpu *vcpu,
unsigned int exit_nr,
printk(KERN_INFO Loading up ext 0x%lx\n, msr);
#endif
- current-thread.regs-msr |= msr;
-
if (msr MSR_FP) {
for (i = 0;
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Without this, a value of rb=0 and rs=0, result in us replacing the 0th index
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
target-ppc/kvm.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff
Paul Mackerras pau...@samba.org writes:
This makes PR KVM allocate its kvm_vcpu structs from the kvm_vcpu_cache
rather than having them embedded in the kvmppc_vcpu_book3s struct,
which is allocated with vzalloc. The reason is to reduce the
differences between PR and HV KVM in order to make
Alexander Graf ag...@suse.de writes:
On 11.08.2013, at 20:16, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Without this, a value of rb=0 and rs=0, result in us replacing the 0th index
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Alexander Graf ag...@suse.de writes:
On 20.08.2013, at 14:57, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 19.08.2013, at 09:25, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 11.08.2013, at 20:16, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V
Alexander Graf ag...@suse.de writes:
On HV KVM yes, that would be the end of the list, but PR KVM could
give you entry 0 containing esid==0 and vsid==0 followed by valid
entries. Perhaps the best approach is to ignore any entries with
SLB_ESID_V clear.
That means we don't clear
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We should be able to copy upto count bytes
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_64_mmu_hv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Otherwise we would clear the pvr value
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_hv.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c
Alexander Graf ag...@suse.de writes:
Am 21.08.2013 um 16:59 schrieb Aneesh Kumar K.V
aneesh.ku...@linux.vnet.ibm.com:
Alexander Graf ag...@suse.de writes:
On HV KVM yes, that would be the end of the list, but PR KVM could
give you entry 0 containing esid==0 and vsid==0
Alexander Graf ag...@suse.de writes:
On 22.08.2013, at 12:37, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Isn't this you?
Yes. The patches are generated using git format-patch and sent by
git send-email. That's how it always created patches for me. I am
Alexander Graf ag...@suse.de writes:
On 26.08.2013, at 05:28, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 23.08.2013, at 04:31, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 22.08.2013, at 12:37, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V
Paul Mackerras pau...@samba.org writes:
This enables us to use the Processor Compatibility Register (PCR) on
POWER7 to put the processor into architecture 2.05 compatibility mode
when running a guest. In this mode the new instructions and registers
that were introduced on POWER7 are disabled
Benjamin Herrenschmidt b...@kernel.crashing.org writes:
On Fri, 2013-09-13 at 10:17 +1000, Paul Mackerras wrote:
Aneesh and I are currently investigating an alternative approach,
which is much more like the x86 way of doing things. We are looking
at splitting the code into three modules: a
Alexander Graf ag...@suse.de writes:
Am 14.09.2013 um 13:33 schrieb Aneesh Kumar K.V
aneesh.ku...@linux.vnet.ibm.com:
Benjamin Herrenschmidt b...@kernel.crashing.org writes:
On Fri, 2013-09-13 at 10:17 +1000, Paul Mackerras wrote:
Aneesh and I are currently investigating an alternative
Hi Alex,
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes:
Ok, please give me an example with real numbers and why it breaks.
http://mid.gmane.org/1376995766-16526-4-git-send-email-aneesh.ku...@linux.vnet.ibm.com
Didn't quiet get what you are looking for. As explained before
an EXPORT_SYMBOL_GPL().
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/Makefile | 12
arch/powerpc/kvm/book3s_64_vio_hv.c | 2 ++
2 files changed, 10 insertions(+), 4 deletions(-)
diff
From: Paul Mackerras pau...@samba.org
add kvmppc_free_vcores() to free the kvmppc_vcore structures
that we allocate for a guest, which are currently being leaked.
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This help ups to select the relevant code in the kernel code
when we later move HV and PR bits as seperate modules.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_book3s_64.h | 6
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This help us to identify whether we are running with hypervisor mode KVM
enabled. The change is needed so that we can have both HV and PR kvm
enabled in the same kernel.
If both HV and PR KVM are included, interrupts come in to the HV
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/arm/kvm/arm.c | 4 ++--
arch/ia64/kvm/kvm-ia64.c | 4 ++--
arch/mips/kvm/kvm_mips.c | 6 ++
arch/powerpc/include/asm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This moves HV and PR specific functions to kvmppc_ops callback.
This is needed so that we can enable HV and PR together in the
same kernel. Actual changes to enable both come in the later
patch.This also renames almost all of the symbols
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This moves /dev/kvm ownership to kvm.ko module. Depending on
which KVM mode we select during VM creation we take a reference
count on respective module
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include
Hi All,
This patch series support enabling HV and PR KVM together in the same kernel. We
extend machine property with new property kvm_type. A value of 1 will force HV
KVM and 2 PR KVM. The default value is 0 which will select the fastest KVM mode.
ie, HV if that is supported otherwise PR.
With
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This patch moves PR related tracepoints to a separate header. This
enables in converting PR to a kernel module which will be done in
later patches
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/Kconfig | 6 +++---
arch/powerpc/kvm/Makefile | 12
arch/powerpc/kvm/book3s.c | 19
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This moves the kvmppc_ops callbacks to be a per VM entity. This
enables us to select HV and PR mode when creating a VM
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_host.h | 3 ++
arch
From: Paul Mackerras pau...@samba.org
This label is not used now.
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_hv_interrupts.S | 3 ---
arch/powerpc/kvm/book3s_interrupts.S| 3 ---
2 files changed
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes:
Hi All,
This patch series support enabling HV and PR KVM together in the same kernel.
We
extend machine property with new property kvm_type. A value of 1 will force
HV
KVM and 2 PR KVM. The default value is 0 which will select
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This moves HV and PR specific functions to kvmppc_ops callback.
This is needed so that we can enable HV and PR together in the
same kernel. Actual
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This help us to identify whether we are running with hypervisor mode KVM
enabled. The change is needed so that we can have both HV and PR kvm
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c
b/arch/powerpc/kvm/book3s_64_mmu_host.c
index fd5b393..775d368 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Missing patch description.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
I fail to see how this really simplifies things
Paolo Bonzini pbonz...@redhat.com writes:
Il 27/09/2013 15:13, Aneesh Kumar K.V ha scritto:
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Missing patch description.
Signed-off-by: Aneesh
Gleb Natapov g...@redhat.com writes:
On Sat, Sep 28, 2013 at 09:06:47PM +0530, Aneesh Kumar K.V wrote:
Paolo Bonzini pbonz...@redhat.com writes:
Il 27/09/2013 15:13, Aneesh Kumar K.V ha scritto:
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 15:03, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
diff --git a/arch/powerpc/kvm/book3s_segment.S
b/arch/powerpc/kvm/book3s_segment.S
index 1abe478..e0229dd 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 15:06, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This patch moves PR related tracepoints to a separate
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 15:08, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c
b/arch/powerpc/kvm/book3s_64_mmu_host.c
index fd5b393..775d368
Alexander Graf ag...@suse.de writes:
On 27.09.2013, at 12:52, Aneesh Kumar K.V wrote:
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes:
Hi All,
This patch series support enabling HV and PR KVM together in the same
kernel. We
extend machine property with new property kvm_type
Alexander Graf ag...@suse.de writes:
On 09/30/2013 02:57 PM, Aneesh Kumar K.V wrote:
Alexander Grafag...@suse.de writes:
diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
index a088e9a..7d5a136 100644
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm/trace.h
@@ -85,6
Alexander Graf ag...@suse.de writes:
On 09/30/2013 03:09 PM, Aneesh Kumar K.V wrote:
Alexander Grafag...@suse.de writes:
On 27.09.2013, at 12:52, Aneesh Kumar K.V wrote:
Aneesh Kumar K.Vaneesh.ku...@linux.vnet.ibm.com writes:
Hi All,
This patch series support enabling HV and PR KVM
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This was introduced by 85a0d845d8bb5df5d2669416212f56cbe1474c6b
arch/powerpc/kvm/book3s_pr.c: In function 'kvmppc_core_vcpu_create':
arch/powerpc/kvm/book3s_pr.c:1182:30: error: 'struct kvmppc_vcpu_book3s' has no
member named 'shadow_vcpu
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This was introduced by 85a0d845d8 (KVM: PPC: Book3S PR: Allocate
kvm_vcpu structs from kvm_vcpu_cache).
arch/powerpc/kvm/book3s_pr.c: In function 'kvmppc_core_vcpu_create':
arch/powerpc/kvm/book3s_pr.c:1182:30: error: 'struct
Cédric Le Goater c...@fr.ibm.com writes:
MMIO emulation reads the last instruction executed by the guest
and then emulates. If the guest is running in Little Endian mode,
the instruction needs to be byte-swapped before being emulated.
This patch stores the last instruction in the endian
Alexander Graf ag...@suse.de writes:
On 04.10.2013, at 14:23, Alexander Graf wrote:
On 03.10.2013, at 06:14, Paul Mackerras wrote:
On Wed, Oct 02, 2013 at 08:08:44PM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This was introduced
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This patch add a new callback kvmppc_ops. This will help us in enabling
both HV and PR KVM together in the same kernel. The actual change to
enable them together is done in the later patch in the series.
Signed-off-by: Aneesh Kumar K.V
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
With later patches supporting PR kvm as a kernel module, the changes
that has to be built into the main kernel binary to enable PR KVM module
is now selected via KVM_BOOK3S_PR_POSSIBLE
Signed-off-by: Aneesh Kumar K.V aneesh.ku
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We will use that in the later patch to find the kvm ops handler
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/arm/kvm/arm.c | 5 +++--
arch/ia64/kvm/kvm-ia64.c | 5 +++--
arch/mips/kvm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This patch moves PR related tracepoints to a separate header. This
enables in converting PR to a kernel module which will be done in
later patches
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This moves the kvmppc_ops callbacks to be a per VM entity. This
enables us to select HV and PR mode when creating a VM. We also
allow both kvm-hv and kvm-pr kernel module to be loaded. To
achieve this we move /dev/kvm ownership to kvm.ko
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This help us to identify whether we are running with hypervisor mode KVM
enabled. The change is needed so that we can have both HV and PR kvm
enabled in the same kernel.
If both HV and PR KVM are included, interrupts come in to the HV
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This help ups to select the relevant code in the kernel code
when we later move HV and PR bits as seperate modules. The patch
also makes the config options for PR KVM selectable
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/Kconfig | 6 +++---
arch/powerpc/kvm/Makefile | 11 ---
arch/powerpc/kvm/book3s.c | 12 +++-
arch/powerpc/kvm
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/booke.c | 4 +-
arch/powerpc/kvm/e500_mmu.c | 2 +-
arch/powerpc/kvm/e500_mmu_host.c | 3 +-
arch/powerpc/kvm/trace.h | 204
From: Paul Mackerras pau...@samba.org
This label is not used now.
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_hv_interrupts.S | 3 ---
arch/powerpc/kvm/book3s_interrupts.S| 3 ---
2 files changed
Hi All,
This patch series support enabling HV and PR KVM together in the same kernel. We
extend machine property with new property kvm_type. A value of HV will
force HV
KVM and PR PR KVM. If we don't specify kvm_type we will select the fastest
KVM mode.
ie, HV if that is supported otherwise PR.
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Make required changes to get BOOKE configs to build with
the introduction of kvmppc_ops callback
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_ppc.h | 4 +--
arch/powerpc/kvm/44x.c
an EXPORT_SYMBOL_GPL().
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/Makefile | 12
arch/powerpc/kvm/book3s_64_vio_hv.c | 1 +
2 files changed, 9 insertions(+), 4 deletions(-)
diff
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
drop is_hv_enabled, because that should not be a callback property
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_ppc.h | 6 +-
arch/powerpc/kvm/book3s.c | 6 +++---
arch
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
With this patch if HV is included, interrupts come in to the HV version
of the kvmppc_interrupt code, which then jumps to the PR handler,
renamed to kvmppc_interrupt_pr, if the guest is a PR guest. This helps
in enabling both HV and PR, which
Bharat Bhushan r65...@freescale.com writes:
We need to search linux pte to get pte attributes for
setting TLB in KVM.
This patch defines a linux_pte_lookup() function for same.
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
---
arch/powerpc/include/asm/pgtable.h | 35
Paul Mackerras pau...@samba.org writes:
On Wed, Oct 09, 2013 at 12:47:31PM -0500, Scott Wood wrote:
On Wed, 2013-10-09 at 03:48 -0500, Bhushan Bharat-R65777 wrote:
What lookup_linux_pte_and_update() does:-
- find_linux_pte_or_hugepte()
- does size and some other trivial checks
-
Hi Alex,
Any update on this ?
-aneesh
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes:
Hi All,
This patch series support enabling HV and PR KVM together in the same kernel.
We
extend machine property with new property kvm_type. A value of HV will
force HV
KVM and PR PR KVM
The below patch fix a compile issue with KVM_XICS. Please fold
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index cef3de9..c3c832b 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -840,6 +840,7 @@ int kvmppc_xics_hcall(struct
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
NOTE: I am not sure why we were originally computing dsisr and dar. So may be
we need a variant of this patch
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This patch make sure we inherit the LE bit correctly in different case
so that we can run Little Endian distro in PR mode
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
This patch depends on the below two changes
1
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This patch make sure we inherit the LE bit correctly in different case
so that we can run Little Endian distro in PR mode
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V1:
* Use LPCR bit to find whether
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We already checked need_resched. So we can call schedule directly
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
NOTE: This patch also work around a regression upstream w.r.t PR KVM
BUG: soft lockup - CPU#0 stuck
Hi Alex,
Any update on this ? We need this to got into 3.13.
-aneesh
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We don't use PACATOC for PR. Avoid updating HOST_R2 with PR
KVM mode when both HV and PR are enabled
Liu ping fan kernelf...@gmail.com writes:
On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf ag...@suse.de wrote:
On 11.12.2013, at 09:47, Liu Ping Fan kernelf...@gmail.com wrote:
This series is based on Aneesh's series [PATCH -V2 0/5] powerpc: mm: Numa
faults support for ppc64
For this
Liu ping fan kernelf...@gmail.com writes:
On Mon, Jan 20, 2014 at 11:45 PM, Aneesh Kumar K.V
aneesh.ku...@linux.vnet.ibm.com wrote:
Liu ping fan kernelf...@gmail.com writes:
On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf ag...@suse.de wrote:
On 11.12.2013, at 09:47, Liu Ping Fan kernelf
Kumar K.V aneesh.ku...@linux.vnet.ibm.com
When we mark pte with _PAGE_NUMA we already call
mmu_notifier_invalidate_range_start and
mmu_notifier_invalidate_range_end, which will mark existing guest hpte
entry as HPTE_V_ABSENT. Now we need to do that when we are inserting new
guest hpte entries
Alexander Graf ag...@suse.de writes:
On 27.01.2014, at 11:28, Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
wrote:
Alexander Graf ag...@suse.de writes:
On 21.01.2014, at 10:42, Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
wrote:
Liu Ping Fan kernelf...@gmail.com writes
We definitely don't need to emulate mtspr, because both the registers
are hypervisor resource.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_book3s.h | 2 --
arch/powerpc/include/asm/kvm_host.h | 4 ++--
arch/powerpc/kvm/book3s_emulate.c
virtual time base register is a per vm register and need to saved
and restored on vm exit and entry. Writing to VTB is not allowed
in the privileged mode.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/include/asm
Alexander Graf ag...@suse.de writes:
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
We definitely don't need to emulate mtspr, because both the registers
are hypervisor resource.
This patch description doesn't cover what the patch actually does. It
changes the implementation from always
Alexander Graf ag...@suse.de writes:
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
Writing to IC is not allowed in the privileged mode.
This is not a patch description.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_host.h | 1
Paul Mackerras pau...@samba.org writes:
On Tue, Jan 28, 2014 at 10:14:12PM +0530, Aneesh Kumar K.V wrote:
We allow priv-mode update of this. The guest value is saved in fscr,
and the value actually used is saved in shadow_fscr. shadow_fscr
only contains values that are allowed by the host
Alexander Graf ag...@suse.de writes:
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
At this point we allow all the supported facilities except EBB. So
forward the interrupt to guest as illegal instruction.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc
running book3s_32 kvm as a module for me.
Signed-off-by: Alexander Graf ag...@suse.de
I thought Greg Kurz had sent a patch for this. Remember discussing this
on irc.
Reviewed-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s.c| 6 +++---
arch/powerpc/kvm
Alexander Graf ag...@suse.com writes:
On 03.04.14 04:36, Liu ping fan wrote:
Hi Alex, could you help to pick up this patch? since v3.14 kernel can
enable numa fault for powerpc.
What bad happens without this patch? We map a page even though it was
declared to get NUMA migrated? What
Alexander Graf ag...@suse.de writes:
When running on a POWER8 host, we get away with running the guest as POWER7
and nothing falls apart.
However, when we start exposing POWER8 as guest CPU, guests will start using
new abilities on POWER8 which we need to handle.
This patch set does a
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V3:
* Use make_dsisr instead of checking feature flag to decide whether to use
saved
[c000ec59fd90] [c0225148] .SyS_ioctl+0x58/0xb0
[c000ec59fe30] [c000a1e4] syscall_exit+0x0/0x98
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_pr.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch
Alexander Graf ag...@suse.de writes:
On 06.05.14 02:41, Paul Mackerras wrote:
On Mon, May 05, 2014 at 01:19:30PM +0200, Alexander Graf wrote:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
+#ifdef CONFIG_PPC_BOOK3S_64
+ return vcpu-arch.fault_dar;
How about PA6T and G5s?
G5 sets DAR
Alexander Graf ag...@suse.de writes:
On 06.05.14 09:19, Benjamin Herrenschmidt wrote:
On Tue, 2014-05-06 at 09:05 +0200, Alexander Graf wrote:
On 06.05.14 02:06, Benjamin Herrenschmidt wrote:
On Mon, 2014-05-05 at 17:16 +0200, Alexander Graf wrote:
Isn't this a greater problem? We should
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
static inline unsigned long hpte_page_size(unsigned long h, unsigned long
l)
{
+int size, a_size;
+/* Look at the 8
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
* Changes from V4
* Update comments around using fault_dar
arch/powerpc/include/asm/disassemble.h
Alexander Graf ag...@suse.de writes:
On 05/06/2014 11:26 AM, Benjamin Herrenschmidt wrote:
On Tue, 2014-05-06 at 11:12 +0200, Alexander Graf wrote:
.
I updated the commit message as below. Let me know if this is ok.
KVM: PPC: BOOK3S: HV: THP support for guest
On recent IBM
still have plenty of space
available in CMA.
This patch addresses this issue by first trying hash page table
allocation from CMA's reserved region before falling back to the normal
page allocator. So if we run out of memory, we really are out of memory.
Signed-off-by: Aneesh Kumar K.V aneesh.ku
from the
HPTE entry.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V1:
* Update commit message
* Rename variables as per review feedback
arch/powerpc/include/asm/kvm_book3s_64.h | 146 ++-
arch/powerpc/kvm/book3s_hv.c
Paul Mackerras pau...@samba.org writes:
On Sun, May 04, 2014 at 10:56:08PM +0530, Aneesh Kumar K.V wrote:
With debug option sleep inside atomic section checking enabled we get
the below WARN_ON during a PR KVM boot. This is because upstream now
have PREEMPT_COUNT enabled even if we have
Although it's optional, IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V5:
* Split the patch to two and also update commit message
arch/powerpc/kvm
Use make_dsisr instead of open coding it. This also have
the added benefit of handling alignment interrupt on additional
instructions.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/disassemble.h | 34 +
arch/powerpc
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