Re: [PATCH 14/14] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

On 29 January 2018 at 09:36, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 28/01/18 23:08, Ard Biesheuvel wrote: >> On 26 January 2018 at 14:28, Marc Zyngier <marc.zyng...@arm.com> wrote: >>> Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROU

Re: [PATCH 14/14] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

On 26 January 2018 at 14:28, Marc Zyngier wrote: > Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. > It is lovely. Really. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kernel/bpi.S| 20 >

Re: [PATCH v2 2/2] arm64: Implement branch predictor hardening for Falkor

On 8 January 2018 at 21:31, Shanker Donthineni wrote: > Falkor is susceptible to branch predictor aliasing and can > theoretically be attacked by malicious code. This patch > implements a mitigation for these attacks, preventing any > malicious entries from affecting

Re: [PATCH 07/12] arm64: mm: Place kImage at bottom of VA space

On 4 December 2017 at 17:18, Steve Capper <steve.cap...@arm.com> wrote: > Hi Ard, > > On Mon, Dec 04, 2017 at 04:25:18PM +, Ard Biesheuvel wrote: >> On 4 December 2017 at 14:13, Steve Capper <steve.cap...@arm.com> wrote: >> > Re-arrange the kernel memo

Re: [PATCH 07/12] arm64: mm: Place kImage at bottom of VA space

On 4 December 2017 at 14:13, Steve Capper wrote: > Re-arrange the kernel memory map s.t. the kernel image resides in the > bottom 514MB of memory. I guess this breaks KASLR entirely, no? Given that it adds an offset in the range [0 ... sizeof(VMALLOC_SPACE) /4 ]. In any

[PATCH] kvm: arm: don't treat unavailable HYP mode as an error

'quiet' console. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- virt/kvm/arm/arm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c index 772bf74ac2e9..988c888a9667 100644 --- a/virt/kvm/arm/arm.c +++ b/virt/kvm/arm

Re: [RFC 00/11] KVM, EFI, arm64: EFI Runtime Services Sandboxing

On 25 August 2017 at 01:31, Florent Revest wrote: > Hi, > > This series implements a mechanism to sandbox EFI Runtime Services on arm64. > It can be enabled with CONFIG_EFI_SANDBOX. At boot it spawns an internal KVM > virtual machine that is ran everytime an EFI Runtime

Re: [PATCH 11/27] arm64/sve: Core task context handling

On 17 August 2017 at 17:42, Dave Martin <dave.mar...@arm.com> wrote: > On Tue, Aug 15, 2017 at 06:31:05PM +0100, Ard Biesheuvel wrote: >> Hi Dave, >> >> On 9 August 2017 at 13:05, Dave Martin <dave.mar...@arm.com> wrote: >> > This patch adds the core

Re: [PATCH 17/27] arm64/sve: Preserve SVE registers around EFI runtime service calls

e_used))) { > + char const *sve_state = this_cpu_ptr(efi_sve_state); > + > + sve_load_state(sve_state + sve_ffr_offset(sve_max_vl), > + _cpu_ptr(_fpsimd_state)->fpsr, &g

Re: [PATCH 16/27] arm64/sve: Preserve SVE registers around kernel-mode NEON use

_flag(TIF_FOREIGN_FPSTATE); > + } > > /* Invalidate any task state remaining in the fpsimd regs: */ > __this_cpu_write(fpsimd_last_state, NULL); Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH 11/27] arm64/sve: Core task context handling

Hi Dave, On 9 August 2017 at 13:05, Dave Martin wrote: > This patch adds the core support for switching and managing the SVE > architectural state of user tasks. > > Calls to the existing FPSIMD low-level save/restore functions are > factored out as new functions

Re: [PATCH 05/27] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag()

is verbosity isn't strictly needed. > > For consistency, this patch simplifies the affected calls. This > should have no impact on behaviour. > > Signed-off-by: Dave Martin <dave.mar...@arm.com> Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org> > --- > arch/ar

Re: [PATCH 05/15] ARM: head: use PC-relative insn sequence for __smp_alt

On 14 August 2017 at 17:19, Tony Lindgren <t...@atomide.com> wrote: > * Ard Biesheuvel <ard.biesheu...@linaro.org> [170811 12:37]: >> On 11 August 2017 at 16:13, Tony Lindgren <t...@atomide.com> wrote: >> > * Ard Biesheuvel <ard.biesheu...@linaro.org> [1

Re: [PATCH 05/15] ARM: head: use PC-relative insn sequence for __smp_alt

On 11 August 2017 at 21:06, Nicolas Pitre <nicolas.pi...@linaro.org> wrote: > On Fri, 11 Aug 2017, Ard Biesheuvel wrote: > >> On 11 August 2017 at 20:58, Nicolas Pitre <nicolas.pi...@linaro.org> wrote: >> > On Fri, 11 Aug 2017, Ard Biesheuvel wrote: >> &

Re: [PATCH 05/15] ARM: head: use PC-relative insn sequence for __smp_alt

On 11 August 2017 at 16:13, Tony Lindgren <t...@atomide.com> wrote: > * Ard Biesheuvel <ard.biesheu...@linaro.org> [170805 13:54]: >> Replace the open coded PC relative offset calculations with a pair >> of adr_l invocations. >> >> Signed-off-by: Ar

Re: [PATCH 12/15] arm-soc: omap: replace open coded VA->PA calculations

On 10 August 2017 at 15:03, Tony Lindgren <t...@atomide.com> wrote: > * Ard Biesheuvel <ard.biesheu...@linaro.org> [170810 02:23]: >> On 9 August 2017 at 22:05, Tony Lindgren <t...@atomide.com> wrote: >> > * Ard Biesheuvel <ard.biesheu...@linaro.org> [1708

Re: [PATCH 12/15] arm-soc: omap: replace open coded VA->PA calculations

On 9 August 2017 at 22:05, Tony Lindgren <t...@atomide.com> wrote: > * Ard Biesheuvel <ard.biesheu...@linaro.org> [170809 12:24]: >> On 9 August 2017 at 20:05, Tony Lindgren <t...@atomide.com> wrote: >> > * Ard Biesheuvel <ard.biesheu...@linaro.org> [1

Re: [PATCH 12/15] arm-soc: omap: replace open coded VA->PA calculations

On 9 August 2017 at 20:05, Tony Lindgren <t...@atomide.com> wrote: > * Ard Biesheuvel <ard.biesheu...@linaro.org> [170805 13:54]: >> This replaces a couple of open coded calculations to obtain the >> physical address of a far symbol with calls to the new adr_l etc >&g

Re: [PATCH 01/15] ARM: assembler: introduce adr_l, ldr_l and str_l macros

On 8 August 2017 at 16:10, Nicolas Pitre <nicolas.pi...@linaro.org> wrote: > On Sat, 5 Aug 2017, Ard Biesheuvel wrote: > >> Like arm64, ARM supports position independent code sequences that >> produce symbol references with a greater reach than the ordinary >> adr/ldr

[PATCH 14/15] arm-soc: shmobile: replace open coded VA->PA calculation

This replaces a couple of open coded calculations to obtain the physical address of a far symbol with calls to the new adr_l etc macros. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/mach-shmobile/headsmp.S | 14 -- 1 file changed, 4 insertions(

[PATCH 15/15] ARM: l2c: replace open coded VA->PA calculation

This replaces an open coded calculation to obtain the physical address of a far symbol with a call to the new adr_l macro. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/mm/l2c-l2x0-resume.S | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git

[PATCH 12/15] arm-soc: omap: replace open coded VA->PA calculations

This replaces a couple of open coded calculations to obtain the physical address of a far symbol with calls to the new adr_l etc macros. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/mach-omap2/sleep34xx.S | 21 arch/arm/mach-omap2/sleep44xx.

[PATCH 13/15] arm-soc: various: replace open coded VA->PA calculation of pen_release

This replaces a few copies of the open coded calculations of the physical address of 'pen_release' in the secondary startup code of a couple of platforms. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/mach-prima2/headsmp.S| 11 +++ arch/arm/mach

[PATCH 11/15] arm-soc: mvebu: replace open coded VA->PA conversion

This replaces an open coded calculation to obtain the physical address of a far symbol with a call to the new ldr_l etc macro. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/mach-mvebu/coherency_ll.S | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff

[PATCH 06/15] ARM: sleep.S: use PC-relative insn sequence for sleep_save_sp/mpidr_hash

Replace the open coded PC relative offset calculations with adr_l and ldr_l invocations. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/sleep.S | 16 +++- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/arch/arm/kernel/sleep.S b/ar

[PATCH 07/15] ARM: head.S: use PC-relative insn sequences for __fixup_pv_table

Replace the open coded PC relative offset calculations with adr_l and mov_l invocations. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/head.S | 27 ++-- 1 file changed, 8 insertions(+), 19 deletions(-) diff --git a/arch/arm/kernel/head.S

[PATCH 08/15] ARM: head.S: use PC relative insn sequence to calculate PHYS_OFFSET

Replace the open coded arithmetic with a simple adr_l/sub pair. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/head.S | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 939543

[PATCH 10/15] arm-soc: exynos: replace open coded VA->PA conversions

This replaces a couple of open coded calculations to obtain the physical address of a far symbol with calls to the new adr_l etc macros. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/mach-exynos/headsmp.S | 9 +-- arch/arm/mach-exynos/sleep.S

[PATCH 04/15] ARM: head.S: use PC-relative insn sequence for secondary_data

Replace the open coded PC relative offset calculations with adr_l and ldr_l invocations. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/head.S | 19 --- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/arch/arm/kernel/head.S b/ar

[PATCH 03/15] ARM: head-common.S: use PC-relative insn sequence for __turn_mmu_on

Replace the open coded PC relative offset calculations with a pair of adr_l invocations. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/head.S | 12 ++-- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/

[PATCH 09/15] ARM: kvm: replace open coded VA->PA calculations with adr_l call

Replace the open coded calculations of the actual physical address of the KVM stub vector table with a single adr_l invocation. Cc: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/boot/compressed/head.S | 15 ++--- arc

[PATCH 05/15] ARM: head: use PC-relative insn sequence for __smp_alt

Replace the open coded PC relative offset calculations with a pair of adr_l invocations. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/head.S | 12 ++-- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/

[PATCH 02/15] ARM: head-common.S: use PC-relative insn sequence for __proc_info

Replace the open coded PC relative offset calculations with a pair of adr_l invocations. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/kernel/head-common.S | 22 ++-- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/arch/arm/kerne

[PATCH 01/15] ARM: assembler: introduce adr_l, ldr_l and str_l macros

rs on v7 and later CPUs, and use PC-relative literals otherwise. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm/include/asm/assembler.h | 70 1 file changed, 70 insertions(+) diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/a

[PATCH 00/15] ARM: add and use convenience macros for PC relative references

on the first one. I understand there may be concerns about churn, but some of these cleanups are really quite nice so please don't dismiss the series wholesale for that reason. Ard Biesheuvel (15): ARM: assembler: introduce adr_l, ldr_l and str_l macros ARM: head-common.S: use PC-relative insn

Re: [PATCH V17 08/11] efi: print unrecognized CPER section

y: Tyler Baicar <tbai...@codeaurora.org> > CC: Jonathan (Zhixiong) Zhang <zjzh...@codeaurora.org> > Reviewed-by: James Morse <james.mo...@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> > --- > drivers/firmware/efi/cper.c | 11 +-- >

Re: [PATCH V17 03/11] cper: add timestamp print to CPER status printing

rora.org> > CC: Jonathan (Zhixiong) Zhang <zjzh...@codeaurora.org> Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> > --- > drivers/firmware/efi/cper.c | 26 ++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/firmware/efi/cper

Re: [PATCH V17 02/11] ras: acpi/apei: cper: add support for generic data v3 structure

arm64, but I need an ack from Ard or Matt on the EFI changes > in this patch and the subsequent one. > Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH 1/5] arm64: KVM: Do not use stack-protector to compile EL2 code

On 11 May 2017 at 17:42, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 11/05/17 17:36, Ard Biesheuvel wrote: >> On 11 May 2017 at 17:11, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote: >>> On 11 May 2017 at 17:02, Marc Zyngier <marc.zyng...@arm.com> wrote:

Re: [PATCH 1/5] arm64: KVM: Do not use stack-protector to compile EL2 code

On 11 May 2017 at 17:11, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote: > On 11 May 2017 at 17:02, Marc Zyngier <marc.zyng...@arm.com> wrote: >> On 02/05/17 15:50, Marc Zyngier wrote: >>> On 02/05/17 15:40, Catalin Marinas wrote: >>>> On Tue, May 02, 20

Re: [PATCH 1/5] arm64: KVM: Do not use stack-protector to compile EL2 code

On 11 May 2017 at 17:02, Marc Zyngier wrote: > On 02/05/17 15:50, Marc Zyngier wrote: >> On 02/05/17 15:40, Catalin Marinas wrote: >>> On Tue, May 02, 2017 at 02:30:37PM +0100, Marc Zyngier wrote: We like living dangerously. Nothing explicitely forbids stack-protector

Re: [PATCH 1/5] arm64: KVM: Do not use stack-protector to compile EL2 code

On 2 May 2017 at 15:40, Catalin Marinas wrote: > On Tue, May 02, 2017 at 02:30:37PM +0100, Marc Zyngier wrote: >> We like living dangerously. Nothing explicitely forbids stack-protector >> to be used in the EL2 code, while distributions routinely compile their >> kernel

Re: [PATCH v2] arm64: Add ASM modifier for xN register operands

On 28 April 2017 at 15:33, Mark Rutland <mark.rutl...@arm.com> wrote: > On Fri, Apr 28, 2017 at 08:18:52AM +0100, Ard Biesheuvel wrote: >> On 27 April 2017 at 23:52, Matthias Kaehlcke <m...@chromium.org> wrote: >> > El Thu, Apr 27, 2017 at 12:02:56PM +0100 Mark Rutlan

Re: [PATCH v2] arm64: Add ASM modifier for xN register operands

On 28 April 2017 at 10:53, Mark Rutland <mark.rutl...@arm.com> wrote: > On Fri, Apr 28, 2017 at 08:18:52AM +0100, Ard Biesheuvel wrote: >> On 27 April 2017 at 23:52, Matthias Kaehlcke <m...@chromium.org> wrote: >> > El Thu, Apr 27, 2017 at 12:02:56PM +0100 Mark Rutlan

Re: [PATCH v2] arm64: Add ASM modifier for xN register operands

On 27 April 2017 at 23:52, Matthias Kaehlcke wrote: > Hi Mark, > > Thanks for your comments. > > El Thu, Apr 27, 2017 at 12:02:56PM +0100 Mark Rutland ha dit: > >> Hi, >> >> On Wed, Apr 26, 2017 at 02:46:16PM -0700, Matthias Kaehlcke wrote: >> > Many inline assembly statements

Re: [PATCH] arm64: Add ASM modifier for xN register operands

On 24 April 2017 at 18:00, Will Deacon wrote: > Hi Matthias, > > On Thu, Apr 20, 2017 at 11:30:53AM -0700, Matthias Kaehlcke wrote: >> Many inline assembly statements don't include the 'x' modifier when >> using xN registers as operands. This is perfectly valid, however it >>

Re: [PATCH v5 10/10] arm64: mm: set the contiguous bit for kernel mappings where appropriate

On 9 March 2017 at 20:33, Mark Rutland <mark.rutl...@arm.com> wrote: > On Thu, Mar 09, 2017 at 09:25:12AM +0100, Ard Biesheuvel wrote: >> +static inline u64 pte_cont_addr_end(u64 addr, u64 end) >> +{ >> + return min((addr + CONT_PTE_SIZE) & CONT_PTE_MASK, end); &

[PATCH v5 09/10] arm64/mmu: replace 'page_mappings_only' parameter with flags argument

In preparation of extending the policy for manipulating kernel mappings with whether or not contiguous hints may be used in the page tables, replace the bool 'page_mappings_only' with a flags field and a flag NO_BLOCK_MAPPINGS. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> ---

[PATCH v5 10/10] arm64: mm: set the contiguous bit for kernel mappings where appropriate

configuration only consists of PGDs and PTEs, and the added complexity of dealing with folded PMDs is not justified considering that 16 GB contiguous ranges are likely to be ignored by the hardware (and 16k/2 levels is a niche configuration) Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.

[PATCH v5 08/10] arm64/mmu: add contiguous bit to sanity bug check

A mapping with the contiguous bit cannot be safely manipulated while live, regardless of whether the bit changes between the old and new mapping. So take this into account when deciding whether the change is safe. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm

[PATCH v5 04/10] arm64: mmu: map .text as read-only from the outset

rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index df377fbe464e..300e98e8cd63 100644 --- a/arch/arm64/mm/m

[PATCH v5 07/10] arm64/mmu: ignore debug_pagealloc for kernel segments

can use block mappings unconditionally. Note that this applies equally to the linear alias of text/rodata: we will never have dynamic allocations there given that the same memory is statically in use by the kernel image. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/ar

[PATCH v5 05/10] arm64: mmu: apply strict permissions to .init.text and .init.data

; Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/sections.h | 2 ++ arch/arm64/kernel/vmlinux.lds.S | 25 +--- arch/arm64/mm/mmu.c | 12 ++ 3 files changed, 26 insertions(+), 13 deletions(-) diff --git a/arch/arm64/incl

[PATCH v5 06/10] arm64/mmu: align alloc_init_pte prototype with pmd/pud versions

Align the function prototype of alloc_init_pte() with its pmd and pud counterparts by replacing the pfn parameter with the equivalent physical address. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 8 1 file changed, 4 insertions(+), 4 del

[PATCH v5 02/10] arm64: mmu: move TLB maintenance from callers to create_mapping_late()

-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/ar

[PATCH v5 03/10] arm64: alternatives: apply boot time fixups via the linear mapping

patching has completed. Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/mmu.h| 1 + arch/ar

[PATCH v5 01/10] arm: kvm: move kvm_vgic_global_state out of .text section

Zyngier <marc.zyng...@arm.com> Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- virt/kvm/arm/vgic/vgic.c | 4 +++-

[PATCH v5 00/10] arm64: mmu: avoid W+X mappings and re-enable PTE_CONT for kernel

commit log of #2 - add acks Ard Biesheuvel (10): arm: kvm: move kvm_vgic_global_state out of .text section arm64: mmu: move TLB maintenance from callers to create_mapping_late() arm64: alternatives: apply boot time fixups via the linear mapping arm64: mmu: map .text as read-only from

Re: [PATCH v4 6/6] arm64: mm: set the contiguous bit for kernel mappings where appropriate

On 7 March 2017 at 17:46, Mark Rutland <mark.rutl...@arm.com> wrote: > Hi, > > On Sat, Mar 04, 2017 at 02:30:48PM +, Ard Biesheuvel wrote: >> This is the third attempt at enabling the use of contiguous hints for >> kernel mappings. The most recent attempt 0bfc

[PATCH v4 4/6] arm64: mmu: map .text as read-only from the outset

by external debuggers to manage software breakpoints (as pointed out by Mark), add an early_param() check for rodata=, and use RWX permissions if it set to 'off'. Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Kees Cook <keesc...@chromium.org> Signed-off-by: Ard Biesheuvel

[PATCH v4 1/6] arm: kvm: move kvm_vgic_global_state out of .text section

Zyngier <marc.zyng...@arm.com> Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- virt/kvm/arm/vgic/vgic.c | 4 +++-

[PATCH v4 5/6] arm64: mmu: apply strict permissions to .init.text and .init.data

, and the linear alias of the init region is always mapped writable (but never executable). Since the alternatives descriptions themselves are read-only data, move those into the .init.text region. Reviewed-by: Laura Abbott <labb...@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@l

[PATCH v4 6/6] arm64: mm: set the contiguous bit for kernel mappings where appropriate

configuration only consists of PGDs and PTEs, and the added complexity of dealing with folded PMDs is not justified considering that 16 GB contiguous ranges are likely to be ignored by the hardware (and 16k/2 levels is a niche configuration) Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.

[PATCH v4 3/6] arm64: alternatives: apply boot time fixups via the linear mapping

patching has completed. Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/mmu.h| 1 + arch/ar

[PATCH v4 2/6] arm64: mmu: move TLB maintenance from callers to create_mapping_late()

-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/ar

Re: [PATCH 13/20] ARM: KVM: Implement HVC_RESET_VECTORS stub hypercall

On 17 February 2017 at 15:44, Marc Zyngier wrote: > In order to restore HYP mode to its original condition, KVM currently > implements __kvm_hyp_reset(). As we're moving towards a hyp-stub > defined API, it becomes necessary to implement HVC_RESET_VECTORS. > > This patch

Re: [PATCH 10/20] ARM: hyp-stub: Use r1 for the soft-restart address

On 17 February 2017 at 15:44, Marc Zyngier wrote: > It is not really obvious why the restart address should be in r3 > when communicated to the hyp-stub. r1 should be perfectly adequate, > and consistent with the rest of the code. > > Signed-off-by: Marc Zyngier

Re: [PATCH 13/20] ARM: KVM: Implement HVC_RESET_VECTORS stub hypercall

On 17 February 2017 at 15:44, Marc Zyngier wrote: > In order to restore HYP mode to its original condition, KVM currently > implements __kvm_hyp_reset(). As we're moving towards a hyp-stub > defined API, it becomes necessary to implement HVC_RESET_VECTORS. > > This patch

Re: [PATCH V10 05/10] acpi: apei: handle SEA notification type for ARMv8

On 15 February 2017 at 19:51, Tyler Baicar wrote: > ARM APEI extension proposal added SEA (Synchronous External Abort) > notification type for ARMv8. > Add a new GHES error source handling function for SEA. If an error > source's notification type is SEA, then this

Re: [PATCH V10 03/10] efi: parse ARM processor error

ovides more detail on for processor error logs. > > Signed-off-by: Tyler Baicar <tbai...@codeaurora.org> > Signed-off-by: Jonathan (Zhixiong) Zhang <zjzh...@codeaurora.org> > Signed-off-by: Naveen Kaje <nk...@codeaurora.org> > Reviewed-by: James Morse <james.mo

Re: [PATCH V10 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1

a.org> > Reviewed-by: James Morse <james.mo...@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> > --- > drivers/acpi/apei/ghes.c| 9 --- > drivers/firmware/efi/cper.c | 63 > +++-- > include/acpi/

[PATCH v3 2/5] arm64: mmu: move TLB maintenance from callers to create_mapping_late()

-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/ar

[PATCH v3 3/5] arm64: alternatives: apply boot time fixups via the linear mapping

patching has completed. Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/mmu.h| 1 + arch/ar

[PATCH v3 5/5] arm64: mmu: apply strict permissions to .init.text and .init.data

, and the linear alias of the init region is always mapped writable (but never executable). Since the alternatives descriptions themselves are read-only data, move those into the .init.text region. Reviewed-by: Laura Abbott <labb...@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@l

[PATCH v3 0/5] arm64: mmu: avoid writeable-executable mappings

of the kernel Image, which is probably a bad idea (#5). See below for an example. - add acks Ard Biesheuvel (5): arm: kvm: move kvm_vgic_global_state out of .text section arm64: mmu: move TLB maintenance from callers to create_mapping_late() arm64: alternatives: apply boot time fixups via

[PATCH v3 1/5] arm: kvm: move kvm_vgic_global_state out of .text section

Zyngier <marc.zyng...@arm.com> Reviewed-by: Laura Abbott <labb...@redhat.com> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark.rutl...@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- virt/kvm/arm/vgic/vgic.c | 4 +++-

Re: [PATCH v2 4/5] arm64: mmu: map .text as read-only from the outset

> On 14 Feb 2017, at 17:40, Mark Rutland <mark.rutl...@arm.com> wrote: > >> On Tue, Feb 14, 2017 at 04:15:11PM +0000, Ard Biesheuvel wrote: >> >>>> On 14 Feb 2017, at 15:57, Mark Rutland <mark.rutl...@arm.com> wrote: >>>> >>>&

Re: [PATCH v2 4/5] arm64: mmu: map .text as read-only from the outset

> On 14 Feb 2017, at 15:57, Mark Rutland <mark.rutl...@arm.com> wrote: > >> On Sat, Feb 11, 2017 at 08:23:05PM +0000, Ard Biesheuvel wrote: >> Now that alternatives patching code no longer relies on the primary >> mapping of .text being writable, we ca

[PATCH v2 3/5] arm64: alternatives: apply boot time fixups via the linear mapping

patching has completed. Reviewed-by: Laura Abbott <labb...@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/mmu.h| 1 + arch/arm64/kernel/alternative.c | 2 +- arch/arm64/kernel/smp.c | 1 + arch/arm64/mm/mmu.c

[PATCH v2 4/5] arm64: mmu: map .text as read-only from the outset

<keesc...@chromium.org> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 7ed981c7f4c0..e97f1ce967ec 100644 --- a/arch/arm64/mm/mmu.c +

[PATCH v2 5/5] arm64: mmu: apply strict permissions to .init.text and .init.data

, and the linear alias of the init region is always mapped writable (but never executable). Since the alternatives descriptions themselves are read-only data, move those into the .init.text region. Reviewed-by: Laura Abbott <labb...@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@l

[PATCH v2 2/5] arm64: mmu: move TLB maintenance from callers to create_mapping_late()

appropriate here. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/mm/mmu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 2131521ddc24..9e0ec1a8cd3b 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/ar

[PATCH v2 0/5] arm64: mmu: avoid writeable-executable mappings

between the segments results in a peculiar situation where other unrelated allocations end up right in the middle of the kernel Image, which is probably a bad idea (#5). See below for an example. - add acks Ard Biesheuvel (5): arm: kvm: move kvm_vgic_global_state out of .text section arm64

[PATCH v2 1/5] arm: kvm: move kvm_vgic_global_state out of .text section

Zyngier <marc.zyng...@arm.com> Reviewed-by: Laura Abbott <labb...@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- virt/kvm/arm/vgic/vgic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm

Re: [PATCH 2/4] arm64: alternatives: apply boot time fixups via the linear mapping

> On 10 Feb 2017, at 18:49, Suzuki K Poulose <suzuki.poul...@arm.com> wrote: > >> On 10/02/17 17:16, Ard Biesheuvel wrote: >> One important rule of thumb when designing a secure software system is >> that memory should never be writable and executable at the

[PATCH 3/4] arm64: mmu: map .text as read-only from the outset

Now that alternatives patching code no longer relies on the primary mapping of .text being writable, we can remove the code that removes the writable permissions post-init time, and map it read-only from the outset. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/ar

[PATCH 4/4] arm64: mmu: apply strict permissions to .init.text and .init.data

mapping entirely. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/sections.h | 3 +- arch/arm64/kernel/vmlinux.lds.S | 32 ++-- arch/arm64/mm/init.c | 3 +- arch/arm64/mm/mmu.c | 12 +--- 4 files chang

[PATCH 2/4] arm64: alternatives: apply boot time fixups via the linear mapping

patching has completed. Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> --- arch/arm64/include/asm/mmu.h| 1 + arch/arm64/kernel/alternative.c | 6 ++--- arch/arm64/kernel/smp.c | 1 + arch/arm64/mm/mmu.c | 25 4 files changed, 25 inse

[PATCH 0/4] arm64: mmu: avoid writeable-executable mappings

by: - making the alternatives patching use the linear mapping - splitting the init region into separate text and data regions This removes all RWX mappings except the really early one created in head.S (which we could perhaps fix in the future as well) Ard Biesheuvel (4): arm: kvm: move

Re: [PATCH 2/2] arm64: Support systems without FP/ASIMD

> make sure that the FP/ASIMD is supported. > > Cc: Catalin Marinas <catalin.mari...@arm.com> > Cc: Will Deacon <will.dea...@arm.com> > Cc: Christoffer Dall <christoffer.d...@linaro.org> > Cc: Marc Zyngier <marc.zyng...@arm.com> > Cc: Ard Biesheuvel

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

On 17 September 2016 at 16:38, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 17 September 2016 at 16:28, Ard Biesheuvel <ard.biesheu...@linaro.org> > wrote: >> Another thing to keep in mind is that GICv2 >> compatibility is disabled on the non-secure sid

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

On 16 September 2016 at 13:44, Alexander Graf wrote: > >> On 16 Sep 2016, at 14:40, Paolo Bonzini wrote: >> >> >> >> On 16/09/2016 14:29, Christoffer Dall wrote: It may be useful for migrating a gicv2 VM to a gicv3 host without gicv2 emulation as

Re: usb keyboard and mouse can't work on QEMU ARM64 with KVM

On 26 July 2016 at 09:34, Shannon Zhao wrote: > Hi， > > Recently I'm trying to use usb keyboard and mouse with QEMU on ARM64. Below > is my QEMU command line, > host and guest kernel both are 4.7.0-rc7+, and I ran it on Hikey board. > > qemu-system-aarch64 \ >

Re: [PATCH 05/15] arm64: KVM: Refactor kern_hyp_va/hyp_kern_va to deal with multiple offsets

On 30 June 2016 at 13:02, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 30/06/16 11:42, Ard Biesheuvel wrote: >> On 30 June 2016 at 12:16, Marc Zyngier <marc.zyng...@arm.com> wrote: >>> On 30/06/16 10:22, Marc Zyngier wrote: >>>> On 28/06/16 13:42, Ch

Re: [PATCH 05/15] arm64: KVM: Refactor kern_hyp_va/hyp_kern_va to deal with multiple offsets

On 30 June 2016 at 12:16, Marc Zyngier wrote: > On 30/06/16 10:22, Marc Zyngier wrote: >> On 28/06/16 13:42, Christoffer Dall wrote: >>> On Tue, Jun 07, 2016 at 11:58:25AM +0100, Marc Zyngier wrote: As we move towards a selectable HYP VA range, it is obvious that

Re: issues with emulated PCI MMIO backed by host memory under KVM

; On Mon, Jun 27, 2016 at 03:57:28PM +0200, Ard Biesheuvel wrote: >> > >> So if vga-pci.c is the only problematic device, for which a reasonable >> > >> alternative exists (virtio-gpu), I think the only feasible solution is >> > >> to educate QEMU not to

Re: issues with emulated PCI MMIO backed by host memory under KVM

On 28 June 2016 at 12:55, Laszlo Ersek <ler...@redhat.com> wrote: > On 06/27/16 12:34, Christoffer Dall wrote: >> On Mon, Jun 27, 2016 at 11:47:18AM +0200, Ard Biesheuvel wrote: > >>> So first of all, let me reiterate that I could only find a single >>> inst

Re: issues with emulated PCI MMIO backed by host memory under KVM

On 27 June 2016 at 15:35, Christoffer Dall <christoffer.d...@linaro.org> wrote: > On Mon, Jun 27, 2016 at 02:30:46PM +0200, Ard Biesheuvel wrote: >> On 27 June 2016 at 12:34, Christoffer Dall <christoffer.d...@linaro.org> >> wrote: >> > On Mon, Jun 27, 2016

Re: issues with emulated PCI MMIO backed by host memory under KVM

On 27 June 2016 at 12:34, Christoffer Dall <christoffer.d...@linaro.org> wrote: > On Mon, Jun 27, 2016 at 11:47:18AM +0200, Ard Biesheuvel wrote: >> On 27 June 2016 at 11:16, Christoffer Dall <christoffer.d...@linaro.org> >> wrote: >> > Hi, >> > >

Re: issues with emulated PCI MMIO backed by host memory under KVM

On 27 June 2016 at 11:16, Christoffer Dall <christoffer.d...@linaro.org> wrote: > Hi, > > I'm going to ask some stupid questions here... > > On Fri, Jun 24, 2016 at 04:04:45PM +0200, Ard Biesheuvel wrote: >> Hi all, >> >> This old subject came up again

<    1   2   3   >